Commit | Line | Data |
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8ecbabd9 MLC |
1 | /* |
2 | * ALSA SoC TWL6040 codec driver | |
3 | * | |
4 | * Author: Misael Lopez Cruz <x0052729@ti.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
18 | * 02110-1301 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/pm.h> | |
8ecbabd9 | 27 | #include <linux/platform_device.h> |
68b40cc4 | 28 | #include <linux/slab.h> |
8ecbabd9 | 29 | #include <linux/i2c/twl.h> |
fb34d3d5 | 30 | #include <linux/mfd/twl6040.h> |
8ecbabd9 MLC |
31 | |
32 | #include <sound/core.h> | |
33 | #include <sound/pcm.h> | |
34 | #include <sound/pcm_params.h> | |
35 | #include <sound/soc.h> | |
8ecbabd9 MLC |
36 | #include <sound/initval.h> |
37 | #include <sound/tlv.h> | |
38 | ||
39 | #include "twl6040.h" | |
40 | ||
60ea4cec | 41 | #define TWL6040_RATES SNDRV_PCM_RATE_8000_96000 |
1bf84759 MOC |
42 | #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) |
43 | ||
44 | #define TWL6040_OUTHS_0dB 0x00 | |
45 | #define TWL6040_OUTHS_M30dB 0x0F | |
46 | #define TWL6040_OUTHF_0dB 0x03 | |
47 | #define TWL6040_OUTHF_M52dB 0x1D | |
48 | ||
49 | #define TWL6040_RAMP_NONE 0 | |
50 | #define TWL6040_RAMP_UP 1 | |
51 | #define TWL6040_RAMP_DOWN 2 | |
52 | ||
53 | #define TWL6040_HSL_VOL_MASK 0x0F | |
54 | #define TWL6040_HSL_VOL_SHIFT 0 | |
55 | #define TWL6040_HSR_VOL_MASK 0xF0 | |
56 | #define TWL6040_HSR_VOL_SHIFT 4 | |
57 | #define TWL6040_HF_VOL_MASK 0x1F | |
58 | #define TWL6040_HF_VOL_SHIFT 0 | |
59 | ||
60 | struct twl6040_output { | |
61 | u16 active; | |
62 | u16 left_vol; | |
63 | u16 right_vol; | |
64 | u16 left_step; | |
65 | u16 right_step; | |
66 | unsigned int step_delay; | |
67 | u16 ramp; | |
68 | u16 mute; | |
69 | struct completion ramp_done; | |
70 | }; | |
8ecbabd9 | 71 | |
a2d2362e JEC |
72 | struct twl6040_jack_data { |
73 | struct snd_soc_jack *jack; | |
74 | int report; | |
75 | }; | |
76 | ||
8ecbabd9 MLC |
77 | /* codec private data */ |
78 | struct twl6040_data { | |
8ecbabd9 MLC |
79 | int codec_powered; |
80 | int pll; | |
81 | int non_lp; | |
6bba63b6 MLC |
82 | int hs_power_mode; |
83 | int hs_power_mode_locked; | |
fb34d3d5 | 84 | unsigned int clk_in; |
8ecbabd9 | 85 | unsigned int sysclk; |
1fbe9952 ACG |
86 | u16 hs_left_step; |
87 | u16 hs_right_step; | |
88 | u16 hf_left_step; | |
89 | u16 hf_right_step; | |
8ecbabd9 | 90 | struct snd_pcm_hw_constraint_list *sysclk_constraints; |
a2d2362e JEC |
91 | struct twl6040_jack_data hs_jack; |
92 | struct snd_soc_codec *codec; | |
93 | struct workqueue_struct *workqueue; | |
94 | struct delayed_work delayed_work; | |
95 | struct mutex mutex; | |
1bf84759 MOC |
96 | struct twl6040_output headset; |
97 | struct twl6040_output handsfree; | |
98 | struct workqueue_struct *hf_workqueue; | |
99 | struct workqueue_struct *hs_workqueue; | |
100 | struct delayed_work hs_delayed_work; | |
101 | struct delayed_work hf_delayed_work; | |
8ecbabd9 MLC |
102 | }; |
103 | ||
104 | /* | |
105 | * twl6040 register cache & default register settings | |
106 | */ | |
107 | static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { | |
108 | 0x00, /* not used 0x00 */ | |
109 | 0x4B, /* TWL6040_ASICID (ro) 0x01 */ | |
110 | 0x00, /* TWL6040_ASICREV (ro) 0x02 */ | |
111 | 0x00, /* TWL6040_INTID 0x03 */ | |
112 | 0x00, /* TWL6040_INTMR 0x04 */ | |
113 | 0x00, /* TWL6040_NCPCTRL 0x05 */ | |
114 | 0x00, /* TWL6040_LDOCTL 0x06 */ | |
115 | 0x60, /* TWL6040_HPPLLCTL 0x07 */ | |
116 | 0x00, /* TWL6040_LPPLLCTL 0x08 */ | |
117 | 0x4A, /* TWL6040_LPPLLDIV 0x09 */ | |
118 | 0x00, /* TWL6040_AMICBCTL 0x0A */ | |
119 | 0x00, /* TWL6040_DMICBCTL 0x0B */ | |
120 | 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */ | |
121 | 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */ | |
122 | 0x00, /* TWL6040_MICGAIN 0x0E */ | |
123 | 0x1B, /* TWL6040_LINEGAIN 0x0F */ | |
124 | 0x00, /* TWL6040_HSLCTL 0x10 */ | |
125 | 0x00, /* TWL6040_HSRCTL 0x11 */ | |
126 | 0x00, /* TWL6040_HSGAIN 0x12 */ | |
127 | 0x00, /* TWL6040_EARCTL 0x13 */ | |
128 | 0x00, /* TWL6040_HFLCTL 0x14 */ | |
129 | 0x00, /* TWL6040_HFLGAIN 0x15 */ | |
130 | 0x00, /* TWL6040_HFRCTL 0x16 */ | |
131 | 0x00, /* TWL6040_HFRGAIN 0x17 */ | |
132 | 0x00, /* TWL6040_VIBCTLL 0x18 */ | |
133 | 0x00, /* TWL6040_VIBDATL 0x19 */ | |
134 | 0x00, /* TWL6040_VIBCTLR 0x1A */ | |
135 | 0x00, /* TWL6040_VIBDATR 0x1B */ | |
136 | 0x00, /* TWL6040_HKCTL1 0x1C */ | |
137 | 0x00, /* TWL6040_HKCTL2 0x1D */ | |
138 | 0x00, /* TWL6040_GPOCTL 0x1E */ | |
139 | 0x00, /* TWL6040_ALB 0x1F */ | |
140 | 0x00, /* TWL6040_DLB 0x20 */ | |
141 | 0x00, /* not used 0x21 */ | |
142 | 0x00, /* not used 0x22 */ | |
143 | 0x00, /* not used 0x23 */ | |
144 | 0x00, /* not used 0x24 */ | |
145 | 0x00, /* not used 0x25 */ | |
146 | 0x00, /* not used 0x26 */ | |
147 | 0x00, /* not used 0x27 */ | |
148 | 0x00, /* TWL6040_TRIM1 0x28 */ | |
149 | 0x00, /* TWL6040_TRIM2 0x29 */ | |
150 | 0x00, /* TWL6040_TRIM3 0x2A */ | |
151 | 0x00, /* TWL6040_HSOTRIM 0x2B */ | |
152 | 0x00, /* TWL6040_HFOTRIM 0x2C */ | |
153 | 0x09, /* TWL6040_ACCCTL 0x2D */ | |
154 | 0x00, /* TWL6040_STATUS (ro) 0x2E */ | |
155 | }; | |
156 | ||
157 | /* | |
158 | * twl6040 vio/gnd registers: | |
159 | * registers under vio/gnd supply can be accessed | |
160 | * before the power-up sequence, after NRESPWRON goes high | |
161 | */ | |
162 | static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = { | |
163 | TWL6040_REG_ASICID, | |
164 | TWL6040_REG_ASICREV, | |
165 | TWL6040_REG_INTID, | |
166 | TWL6040_REG_INTMR, | |
167 | TWL6040_REG_NCPCTL, | |
168 | TWL6040_REG_LDOCTL, | |
169 | TWL6040_REG_AMICBCTL, | |
170 | TWL6040_REG_DMICBCTL, | |
171 | TWL6040_REG_HKCTL1, | |
172 | TWL6040_REG_HKCTL2, | |
173 | TWL6040_REG_GPOCTL, | |
174 | TWL6040_REG_TRIM1, | |
175 | TWL6040_REG_TRIM2, | |
176 | TWL6040_REG_TRIM3, | |
177 | TWL6040_REG_HSOTRIM, | |
178 | TWL6040_REG_HFOTRIM, | |
179 | TWL6040_REG_ACCCTL, | |
180 | TWL6040_REG_STATUS, | |
181 | }; | |
182 | ||
183 | /* | |
184 | * twl6040 vdd/vss registers: | |
185 | * registers under vdd/vss supplies can only be accessed | |
186 | * after the power-up sequence | |
187 | */ | |
188 | static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = { | |
189 | TWL6040_REG_HPPLLCTL, | |
190 | TWL6040_REG_LPPLLCTL, | |
191 | TWL6040_REG_LPPLLDIV, | |
192 | TWL6040_REG_MICLCTL, | |
193 | TWL6040_REG_MICRCTL, | |
194 | TWL6040_REG_MICGAIN, | |
195 | TWL6040_REG_LINEGAIN, | |
196 | TWL6040_REG_HSLCTL, | |
197 | TWL6040_REG_HSRCTL, | |
198 | TWL6040_REG_HSGAIN, | |
199 | TWL6040_REG_EARCTL, | |
200 | TWL6040_REG_HFLCTL, | |
201 | TWL6040_REG_HFLGAIN, | |
202 | TWL6040_REG_HFRCTL, | |
203 | TWL6040_REG_HFRGAIN, | |
204 | TWL6040_REG_VIBCTLL, | |
205 | TWL6040_REG_VIBDATL, | |
206 | TWL6040_REG_VIBCTLR, | |
207 | TWL6040_REG_VIBDATR, | |
208 | TWL6040_REG_ALB, | |
209 | TWL6040_REG_DLB, | |
210 | }; | |
211 | ||
212 | /* | |
213 | * read twl6040 register cache | |
214 | */ | |
215 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, | |
216 | unsigned int reg) | |
217 | { | |
218 | u8 *cache = codec->reg_cache; | |
219 | ||
220 | if (reg >= TWL6040_CACHEREGNUM) | |
221 | return -EIO; | |
222 | ||
223 | return cache[reg]; | |
224 | } | |
225 | ||
226 | /* | |
227 | * write twl6040 register cache | |
228 | */ | |
229 | static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, | |
230 | u8 reg, u8 value) | |
231 | { | |
232 | u8 *cache = codec->reg_cache; | |
233 | ||
234 | if (reg >= TWL6040_CACHEREGNUM) | |
235 | return; | |
236 | cache[reg] = value; | |
237 | } | |
238 | ||
239 | /* | |
240 | * read from twl6040 hardware register | |
241 | */ | |
242 | static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, | |
243 | unsigned int reg) | |
244 | { | |
fb34d3d5 | 245 | struct twl6040 *twl6040 = codec->control_data; |
8ecbabd9 MLC |
246 | u8 value; |
247 | ||
248 | if (reg >= TWL6040_CACHEREGNUM) | |
249 | return -EIO; | |
250 | ||
fb34d3d5 | 251 | value = twl6040_reg_read(twl6040, reg); |
8ecbabd9 MLC |
252 | twl6040_write_reg_cache(codec, reg, value); |
253 | ||
254 | return value; | |
255 | } | |
256 | ||
257 | /* | |
258 | * write to the twl6040 register space | |
259 | */ | |
260 | static int twl6040_write(struct snd_soc_codec *codec, | |
261 | unsigned int reg, unsigned int value) | |
262 | { | |
fb34d3d5 MLC |
263 | struct twl6040 *twl6040 = codec->control_data; |
264 | ||
8ecbabd9 MLC |
265 | if (reg >= TWL6040_CACHEREGNUM) |
266 | return -EIO; | |
267 | ||
268 | twl6040_write_reg_cache(codec, reg, value); | |
fb34d3d5 | 269 | return twl6040_reg_write(twl6040, reg, value); |
8ecbabd9 MLC |
270 | } |
271 | ||
272 | static void twl6040_init_vio_regs(struct snd_soc_codec *codec) | |
273 | { | |
274 | u8 *cache = codec->reg_cache; | |
275 | int reg, i; | |
276 | ||
8ecbabd9 MLC |
277 | for (i = 0; i < TWL6040_VIOREGNUM; i++) { |
278 | reg = twl6040_vio_reg[i]; | |
fb34d3d5 MLC |
279 | /* |
280 | * skip read-only registers (ASICID, ASICREV, STATUS) | |
281 | * and registers shared among MFD children | |
282 | */ | |
8ecbabd9 MLC |
283 | switch (reg) { |
284 | case TWL6040_REG_ASICID: | |
285 | case TWL6040_REG_ASICREV: | |
fb34d3d5 MLC |
286 | case TWL6040_REG_INTID: |
287 | case TWL6040_REG_INTMR: | |
288 | case TWL6040_REG_NCPCTL: | |
289 | case TWL6040_REG_LDOCTL: | |
290 | case TWL6040_REG_GPOCTL: | |
291 | case TWL6040_REG_ACCCTL: | |
8ecbabd9 MLC |
292 | case TWL6040_REG_STATUS: |
293 | continue; | |
294 | default: | |
295 | break; | |
296 | } | |
297 | twl6040_write(codec, reg, cache[reg]); | |
298 | } | |
299 | } | |
300 | ||
301 | static void twl6040_init_vdd_regs(struct snd_soc_codec *codec) | |
302 | { | |
303 | u8 *cache = codec->reg_cache; | |
304 | int reg, i; | |
305 | ||
306 | for (i = 0; i < TWL6040_VDDREGNUM; i++) { | |
307 | reg = twl6040_vdd_reg[i]; | |
fb34d3d5 MLC |
308 | /* skip vibra and PLL registers */ |
309 | switch (reg) { | |
310 | case TWL6040_REG_VIBCTLL: | |
311 | case TWL6040_REG_VIBDATL: | |
312 | case TWL6040_REG_VIBCTLR: | |
313 | case TWL6040_REG_VIBDATR: | |
314 | case TWL6040_REG_HPPLLCTL: | |
315 | case TWL6040_REG_LPPLLCTL: | |
316 | case TWL6040_REG_LPPLLDIV: | |
317 | continue; | |
318 | default: | |
319 | break; | |
320 | } | |
321 | ||
8ecbabd9 MLC |
322 | twl6040_write(codec, reg, cache[reg]); |
323 | } | |
324 | } | |
325 | ||
1bf84759 MOC |
326 | /* |
327 | * Ramp HS PGA volume to minimise pops at stream startup and shutdown. | |
328 | */ | |
329 | static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec, | |
330 | unsigned int left_step, unsigned int right_step) | |
331 | { | |
332 | ||
333 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
334 | struct twl6040_output *headset = &priv->headset; | |
335 | int left_complete = 0, right_complete = 0; | |
336 | u8 reg, val; | |
337 | ||
338 | /* left channel */ | |
339 | left_step = (left_step > 0xF) ? 0xF : left_step; | |
340 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN); | |
341 | val = (~reg & TWL6040_HSL_VOL_MASK); | |
342 | ||
343 | if (headset->ramp == TWL6040_RAMP_UP) { | |
344 | /* ramp step up */ | |
345 | if (val < headset->left_vol) { | |
1fbe9952 ACG |
346 | if (val + left_step > headset->left_vol) |
347 | val = headset->left_vol; | |
348 | else | |
349 | val += left_step; | |
350 | ||
1bf84759 MOC |
351 | reg &= ~TWL6040_HSL_VOL_MASK; |
352 | twl6040_write(codec, TWL6040_REG_HSGAIN, | |
353 | (reg | (~val & TWL6040_HSL_VOL_MASK))); | |
354 | } else { | |
355 | left_complete = 1; | |
356 | } | |
357 | } else if (headset->ramp == TWL6040_RAMP_DOWN) { | |
358 | /* ramp step down */ | |
359 | if (val > 0x0) { | |
1fbe9952 ACG |
360 | if ((int)val - (int)left_step < 0) |
361 | val = 0; | |
362 | else | |
363 | val -= left_step; | |
364 | ||
1bf84759 MOC |
365 | reg &= ~TWL6040_HSL_VOL_MASK; |
366 | twl6040_write(codec, TWL6040_REG_HSGAIN, reg | | |
367 | (~val & TWL6040_HSL_VOL_MASK)); | |
368 | } else { | |
369 | left_complete = 1; | |
370 | } | |
371 | } | |
372 | ||
373 | /* right channel */ | |
374 | right_step = (right_step > 0xF) ? 0xF : right_step; | |
375 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN); | |
376 | val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT; | |
377 | ||
378 | if (headset->ramp == TWL6040_RAMP_UP) { | |
379 | /* ramp step up */ | |
380 | if (val < headset->right_vol) { | |
1fbe9952 ACG |
381 | if (val + right_step > headset->right_vol) |
382 | val = headset->right_vol; | |
383 | else | |
384 | val += right_step; | |
385 | ||
1bf84759 MOC |
386 | reg &= ~TWL6040_HSR_VOL_MASK; |
387 | twl6040_write(codec, TWL6040_REG_HSGAIN, | |
388 | (reg | (~val << TWL6040_HSR_VOL_SHIFT))); | |
389 | } else { | |
390 | right_complete = 1; | |
391 | } | |
392 | } else if (headset->ramp == TWL6040_RAMP_DOWN) { | |
393 | /* ramp step down */ | |
394 | if (val > 0x0) { | |
1fbe9952 ACG |
395 | if ((int)val - (int)right_step < 0) |
396 | val = 0; | |
397 | else | |
398 | val -= right_step; | |
399 | ||
1bf84759 MOC |
400 | reg &= ~TWL6040_HSR_VOL_MASK; |
401 | twl6040_write(codec, TWL6040_REG_HSGAIN, | |
402 | reg | (~val << TWL6040_HSR_VOL_SHIFT)); | |
403 | } else { | |
404 | right_complete = 1; | |
405 | } | |
406 | } | |
407 | ||
408 | return left_complete & right_complete; | |
409 | } | |
410 | ||
411 | /* | |
412 | * Ramp HF PGA volume to minimise pops at stream startup and shutdown. | |
413 | */ | |
414 | static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec, | |
415 | unsigned int left_step, unsigned int right_step) | |
416 | { | |
417 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
418 | struct twl6040_output *handsfree = &priv->handsfree; | |
419 | int left_complete = 0, right_complete = 0; | |
420 | u16 reg, val; | |
421 | ||
422 | /* left channel */ | |
423 | left_step = (left_step > 0x1D) ? 0x1D : left_step; | |
424 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN); | |
425 | reg = 0x1D - reg; | |
426 | val = (reg & TWL6040_HF_VOL_MASK); | |
427 | if (handsfree->ramp == TWL6040_RAMP_UP) { | |
428 | /* ramp step up */ | |
429 | if (val < handsfree->left_vol) { | |
1fbe9952 ACG |
430 | if (val + left_step > handsfree->left_vol) |
431 | val = handsfree->left_vol; | |
432 | else | |
433 | val += left_step; | |
434 | ||
1bf84759 MOC |
435 | reg &= ~TWL6040_HF_VOL_MASK; |
436 | twl6040_write(codec, TWL6040_REG_HFLGAIN, | |
437 | reg | (0x1D - val)); | |
438 | } else { | |
439 | left_complete = 1; | |
440 | } | |
441 | } else if (handsfree->ramp == TWL6040_RAMP_DOWN) { | |
442 | /* ramp step down */ | |
443 | if (val > 0) { | |
1fbe9952 ACG |
444 | if ((int)val - (int)left_step < 0) |
445 | val = 0; | |
446 | else | |
447 | val -= left_step; | |
448 | ||
1bf84759 MOC |
449 | reg &= ~TWL6040_HF_VOL_MASK; |
450 | twl6040_write(codec, TWL6040_REG_HFLGAIN, | |
451 | reg | (0x1D - val)); | |
452 | } else { | |
453 | left_complete = 1; | |
454 | } | |
455 | } | |
456 | ||
457 | /* right channel */ | |
458 | right_step = (right_step > 0x1D) ? 0x1D : right_step; | |
459 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN); | |
460 | reg = 0x1D - reg; | |
461 | val = (reg & TWL6040_HF_VOL_MASK); | |
462 | if (handsfree->ramp == TWL6040_RAMP_UP) { | |
463 | /* ramp step up */ | |
464 | if (val < handsfree->right_vol) { | |
1fbe9952 ACG |
465 | if (val + right_step > handsfree->right_vol) |
466 | val = handsfree->right_vol; | |
467 | else | |
468 | val += right_step; | |
469 | ||
1bf84759 MOC |
470 | reg &= ~TWL6040_HF_VOL_MASK; |
471 | twl6040_write(codec, TWL6040_REG_HFRGAIN, | |
472 | reg | (0x1D - val)); | |
473 | } else { | |
474 | right_complete = 1; | |
475 | } | |
476 | } else if (handsfree->ramp == TWL6040_RAMP_DOWN) { | |
477 | /* ramp step down */ | |
478 | if (val > 0) { | |
1fbe9952 ACG |
479 | if ((int)val - (int)right_step < 0) |
480 | val = 0; | |
481 | else | |
482 | val -= right_step; | |
483 | ||
1bf84759 MOC |
484 | reg &= ~TWL6040_HF_VOL_MASK; |
485 | twl6040_write(codec, TWL6040_REG_HFRGAIN, | |
486 | reg | (0x1D - val)); | |
487 | } | |
488 | } | |
489 | ||
490 | return left_complete & right_complete; | |
491 | } | |
492 | ||
493 | /* | |
494 | * This work ramps both output PGAs at stream start/stop time to | |
495 | * minimise pop associated with DAPM power switching. | |
496 | */ | |
497 | static void twl6040_pga_hs_work(struct work_struct *work) | |
498 | { | |
499 | struct twl6040_data *priv = | |
500 | container_of(work, struct twl6040_data, hs_delayed_work.work); | |
501 | struct snd_soc_codec *codec = priv->codec; | |
502 | struct twl6040_output *headset = &priv->headset; | |
503 | unsigned int delay = headset->step_delay; | |
504 | int i, headset_complete; | |
505 | ||
506 | /* do we need to ramp at all ? */ | |
507 | if (headset->ramp == TWL6040_RAMP_NONE) | |
508 | return; | |
509 | ||
510 | /* HS PGA volumes have 4 bits of resolution to ramp */ | |
511 | for (i = 0; i <= 16; i++) { | |
1fbe9952 ACG |
512 | headset_complete = twl6040_hs_ramp_step(codec, |
513 | headset->left_step, | |
514 | headset->right_step); | |
1bf84759 MOC |
515 | |
516 | /* ramp finished ? */ | |
517 | if (headset_complete) | |
518 | break; | |
519 | ||
520 | /* | |
521 | * TODO: tune: delay is longer over 0dB | |
522 | * as increases are larger. | |
523 | */ | |
524 | if (i >= 8) | |
525 | schedule_timeout_interruptible(msecs_to_jiffies(delay + | |
526 | (delay >> 1))); | |
527 | else | |
528 | schedule_timeout_interruptible(msecs_to_jiffies(delay)); | |
529 | } | |
530 | ||
531 | if (headset->ramp == TWL6040_RAMP_DOWN) { | |
532 | headset->active = 0; | |
533 | complete(&headset->ramp_done); | |
534 | } else { | |
535 | headset->active = 1; | |
536 | } | |
537 | headset->ramp = TWL6040_RAMP_NONE; | |
538 | } | |
539 | ||
540 | static void twl6040_pga_hf_work(struct work_struct *work) | |
541 | { | |
542 | struct twl6040_data *priv = | |
543 | container_of(work, struct twl6040_data, hf_delayed_work.work); | |
544 | struct snd_soc_codec *codec = priv->codec; | |
545 | struct twl6040_output *handsfree = &priv->handsfree; | |
546 | unsigned int delay = handsfree->step_delay; | |
547 | int i, handsfree_complete; | |
548 | ||
549 | /* do we need to ramp at all ? */ | |
550 | if (handsfree->ramp == TWL6040_RAMP_NONE) | |
551 | return; | |
552 | ||
553 | /* HF PGA volumes have 5 bits of resolution to ramp */ | |
554 | for (i = 0; i <= 32; i++) { | |
1fbe9952 ACG |
555 | handsfree_complete = twl6040_hf_ramp_step(codec, |
556 | handsfree->left_step, | |
557 | handsfree->right_step); | |
1bf84759 MOC |
558 | |
559 | /* ramp finished ? */ | |
560 | if (handsfree_complete) | |
561 | break; | |
562 | ||
563 | /* | |
564 | * TODO: tune: delay is longer over 0dB | |
565 | * as increases are larger. | |
566 | */ | |
567 | if (i >= 16) | |
568 | schedule_timeout_interruptible(msecs_to_jiffies(delay + | |
569 | (delay >> 1))); | |
570 | else | |
571 | schedule_timeout_interruptible(msecs_to_jiffies(delay)); | |
572 | } | |
573 | ||
574 | ||
575 | if (handsfree->ramp == TWL6040_RAMP_DOWN) { | |
576 | handsfree->active = 0; | |
577 | complete(&handsfree->ramp_done); | |
578 | } else | |
579 | handsfree->active = 1; | |
580 | handsfree->ramp = TWL6040_RAMP_NONE; | |
581 | } | |
582 | ||
583 | static int pga_event(struct snd_soc_dapm_widget *w, | |
584 | struct snd_kcontrol *kcontrol, int event) | |
585 | { | |
586 | struct snd_soc_codec *codec = w->codec; | |
587 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
588 | struct twl6040_output *out; | |
589 | struct delayed_work *work; | |
590 | struct workqueue_struct *queue; | |
591 | ||
592 | switch (w->shift) { | |
593 | case 2: | |
594 | case 3: | |
595 | out = &priv->headset; | |
596 | work = &priv->hs_delayed_work; | |
597 | queue = priv->hs_workqueue; | |
1fbe9952 ACG |
598 | out->left_step = priv->hs_left_step; |
599 | out->right_step = priv->hs_right_step; | |
1bf84759 MOC |
600 | out->step_delay = 5; /* 5 ms between volume ramp steps */ |
601 | break; | |
602 | case 4: | |
603 | out = &priv->handsfree; | |
604 | work = &priv->hf_delayed_work; | |
605 | queue = priv->hf_workqueue; | |
1fbe9952 ACG |
606 | out->left_step = priv->hf_left_step; |
607 | out->right_step = priv->hf_right_step; | |
1bf84759 MOC |
608 | out->step_delay = 5; /* 5 ms between volume ramp steps */ |
609 | if (SND_SOC_DAPM_EVENT_ON(event)) | |
610 | priv->non_lp++; | |
611 | else | |
612 | priv->non_lp--; | |
613 | break; | |
614 | default: | |
615 | return -1; | |
616 | } | |
617 | ||
618 | switch (event) { | |
619 | case SND_SOC_DAPM_POST_PMU: | |
620 | if (out->active) | |
621 | break; | |
622 | ||
623 | /* don't use volume ramp for power-up */ | |
624 | out->left_step = out->left_vol; | |
625 | out->right_step = out->right_vol; | |
626 | ||
627 | if (!delayed_work_pending(work)) { | |
628 | out->ramp = TWL6040_RAMP_UP; | |
629 | queue_delayed_work(queue, work, | |
630 | msecs_to_jiffies(1)); | |
631 | } | |
632 | break; | |
633 | ||
634 | case SND_SOC_DAPM_PRE_PMD: | |
635 | if (!out->active) | |
636 | break; | |
637 | ||
638 | if (!delayed_work_pending(work)) { | |
639 | /* use volume ramp for power-down */ | |
1bf84759 MOC |
640 | out->ramp = TWL6040_RAMP_DOWN; |
641 | INIT_COMPLETION(out->ramp_done); | |
642 | ||
643 | queue_delayed_work(queue, work, | |
644 | msecs_to_jiffies(1)); | |
645 | ||
646 | wait_for_completion_timeout(&out->ramp_done, | |
647 | msecs_to_jiffies(2000)); | |
648 | } | |
649 | break; | |
650 | } | |
651 | ||
652 | return 0; | |
653 | } | |
654 | ||
8ecbabd9 MLC |
655 | /* set headset dac and driver power mode */ |
656 | static int headset_power_mode(struct snd_soc_codec *codec, int high_perf) | |
657 | { | |
658 | int hslctl, hsrctl; | |
659 | int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL; | |
660 | ||
661 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | |
662 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | |
663 | ||
664 | if (high_perf) { | |
665 | hslctl &= ~mask; | |
666 | hsrctl &= ~mask; | |
667 | } else { | |
668 | hslctl |= mask; | |
669 | hsrctl |= mask; | |
670 | } | |
671 | ||
672 | twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl); | |
673 | twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl); | |
674 | ||
675 | return 0; | |
676 | } | |
677 | ||
0fad4ed7 JEC |
678 | static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w, |
679 | struct snd_kcontrol *kcontrol, int event) | |
680 | { | |
681 | msleep(1); | |
682 | return 0; | |
683 | } | |
684 | ||
8ecbabd9 MLC |
685 | static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w, |
686 | struct snd_kcontrol *kcontrol, int event) | |
687 | { | |
688 | struct snd_soc_codec *codec = w->codec; | |
d4a8ca24 | 689 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
6bba63b6 | 690 | int ret = 0; |
8ecbabd9 | 691 | |
6bba63b6 | 692 | if (SND_SOC_DAPM_EVENT_ON(event)) { |
8ecbabd9 | 693 | priv->non_lp++; |
6bba63b6 MLC |
694 | if (!strcmp(w->name, "Earphone Driver")) { |
695 | /* Earphone doesn't support low power mode */ | |
696 | priv->hs_power_mode_locked = 1; | |
697 | ret = headset_power_mode(codec, 1); | |
698 | } | |
699 | } else { | |
8ecbabd9 | 700 | priv->non_lp--; |
6bba63b6 MLC |
701 | if (!strcmp(w->name, "Earphone Driver")) { |
702 | priv->hs_power_mode_locked = 0; | |
703 | ret = headset_power_mode(codec, priv->hs_power_mode); | |
704 | } | |
705 | } | |
8ecbabd9 | 706 | |
0fad4ed7 JEC |
707 | msleep(1); |
708 | ||
6bba63b6 | 709 | return ret; |
8ecbabd9 MLC |
710 | } |
711 | ||
64ed9836 MB |
712 | static void twl6040_hs_jack_report(struct snd_soc_codec *codec, |
713 | struct snd_soc_jack *jack, int report) | |
a2d2362e JEC |
714 | { |
715 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
716 | int status; | |
717 | ||
718 | mutex_lock(&priv->mutex); | |
719 | ||
720 | /* Sync status */ | |
721 | status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS); | |
722 | if (status & TWL6040_PLUGCOMP) | |
723 | snd_soc_jack_report(jack, report, report); | |
724 | else | |
725 | snd_soc_jack_report(jack, 0, report); | |
726 | ||
727 | mutex_unlock(&priv->mutex); | |
728 | } | |
729 | ||
730 | void twl6040_hs_jack_detect(struct snd_soc_codec *codec, | |
731 | struct snd_soc_jack *jack, int report) | |
732 | { | |
733 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
734 | struct twl6040_jack_data *hs_jack = &priv->hs_jack; | |
735 | ||
736 | hs_jack->jack = jack; | |
737 | hs_jack->report = report; | |
738 | ||
739 | twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report); | |
740 | } | |
741 | EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect); | |
742 | ||
743 | static void twl6040_accessory_work(struct work_struct *work) | |
744 | { | |
745 | struct twl6040_data *priv = container_of(work, | |
746 | struct twl6040_data, delayed_work.work); | |
747 | struct snd_soc_codec *codec = priv->codec; | |
748 | struct twl6040_jack_data *hs_jack = &priv->hs_jack; | |
749 | ||
750 | twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report); | |
751 | } | |
752 | ||
8ecbabd9 | 753 | /* audio interrupt handler */ |
fb34d3d5 | 754 | static irqreturn_t twl6040_audio_handler(int irq, void *data) |
8ecbabd9 MLC |
755 | { |
756 | struct snd_soc_codec *codec = data; | |
fb34d3d5 | 757 | struct twl6040 *twl6040 = codec->control_data; |
d4a8ca24 | 758 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
759 | u8 intid; |
760 | ||
fb34d3d5 | 761 | intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID); |
cf370a5a OM |
762 | |
763 | if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT)) | |
a2d2362e JEC |
764 | queue_delayed_work(priv->workqueue, &priv->delayed_work, |
765 | msecs_to_jiffies(200)); | |
cf370a5a | 766 | |
8ecbabd9 MLC |
767 | return IRQ_HANDLED; |
768 | } | |
769 | ||
1bf84759 MOC |
770 | static int twl6040_put_volsw(struct snd_kcontrol *kcontrol, |
771 | struct snd_ctl_elem_value *ucontrol) | |
772 | { | |
773 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
774 | struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec); | |
775 | struct twl6040_output *out = NULL; | |
776 | struct soc_mixer_control *mc = | |
777 | (struct soc_mixer_control *)kcontrol->private_value; | |
778 | int ret; | |
779 | unsigned int reg = mc->reg; | |
780 | ||
781 | /* For HS and HF we shadow the values and only actually write | |
782 | * them out when active in order to ensure the amplifier comes on | |
783 | * as quietly as possible. */ | |
784 | switch (reg) { | |
785 | case TWL6040_REG_HSGAIN: | |
786 | out = &twl6040_priv->headset; | |
787 | break; | |
788 | default: | |
789 | break; | |
790 | } | |
791 | ||
792 | if (out) { | |
793 | out->left_vol = ucontrol->value.integer.value[0]; | |
794 | out->right_vol = ucontrol->value.integer.value[1]; | |
795 | if (!out->active) | |
796 | return 1; | |
797 | } | |
798 | ||
799 | ret = snd_soc_put_volsw(kcontrol, ucontrol); | |
800 | if (ret < 0) | |
801 | return ret; | |
802 | ||
803 | return 1; | |
804 | } | |
805 | ||
806 | static int twl6040_get_volsw(struct snd_kcontrol *kcontrol, | |
807 | struct snd_ctl_elem_value *ucontrol) | |
808 | { | |
809 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
810 | struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec); | |
811 | struct twl6040_output *out = &twl6040_priv->headset; | |
812 | struct soc_mixer_control *mc = | |
813 | (struct soc_mixer_control *)kcontrol->private_value; | |
814 | unsigned int reg = mc->reg; | |
815 | ||
816 | switch (reg) { | |
817 | case TWL6040_REG_HSGAIN: | |
818 | out = &twl6040_priv->headset; | |
819 | ucontrol->value.integer.value[0] = out->left_vol; | |
820 | ucontrol->value.integer.value[1] = out->right_vol; | |
821 | return 0; | |
822 | ||
823 | default: | |
824 | break; | |
825 | } | |
826 | ||
827 | return snd_soc_get_volsw(kcontrol, ucontrol); | |
828 | } | |
829 | ||
830 | static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol, | |
831 | struct snd_ctl_elem_value *ucontrol) | |
832 | { | |
833 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
834 | struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec); | |
835 | struct twl6040_output *out = NULL; | |
836 | struct soc_mixer_control *mc = | |
837 | (struct soc_mixer_control *)kcontrol->private_value; | |
838 | int ret; | |
839 | unsigned int reg = mc->reg; | |
840 | ||
841 | /* For HS and HF we shadow the values and only actually write | |
842 | * them out when active in order to ensure the amplifier comes on | |
843 | * as quietly as possible. */ | |
844 | switch (reg) { | |
845 | case TWL6040_REG_HFLGAIN: | |
846 | case TWL6040_REG_HFRGAIN: | |
847 | out = &twl6040_priv->handsfree; | |
848 | break; | |
849 | default: | |
850 | break; | |
851 | } | |
852 | ||
853 | if (out) { | |
854 | out->left_vol = ucontrol->value.integer.value[0]; | |
855 | out->right_vol = ucontrol->value.integer.value[1]; | |
856 | if (!out->active) | |
857 | return 1; | |
858 | } | |
859 | ||
860 | ret = snd_soc_put_volsw_2r(kcontrol, ucontrol); | |
861 | if (ret < 0) | |
862 | return ret; | |
863 | ||
864 | return 1; | |
865 | } | |
866 | ||
867 | static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol, | |
868 | struct snd_ctl_elem_value *ucontrol) | |
869 | { | |
870 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
871 | struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec); | |
872 | struct twl6040_output *out = &twl6040_priv->handsfree; | |
873 | struct soc_mixer_control *mc = | |
874 | (struct soc_mixer_control *)kcontrol->private_value; | |
875 | unsigned int reg = mc->reg; | |
876 | ||
877 | /* If these are cached registers use the cache */ | |
878 | switch (reg) { | |
879 | case TWL6040_REG_HFLGAIN: | |
880 | case TWL6040_REG_HFRGAIN: | |
881 | out = &twl6040_priv->handsfree; | |
882 | ucontrol->value.integer.value[0] = out->left_vol; | |
883 | ucontrol->value.integer.value[1] = out->right_vol; | |
884 | return 0; | |
885 | ||
886 | default: | |
887 | break; | |
888 | } | |
889 | ||
890 | return snd_soc_get_volsw_2r(kcontrol, ucontrol); | |
891 | } | |
892 | ||
893 | /* double control with volume update */ | |
894 | #define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\ | |
895 | xinvert, tlv_array)\ | |
896 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
897 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
898 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
899 | .tlv.p = (tlv_array), \ | |
900 | .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \ | |
901 | .put = twl6040_put_volsw, \ | |
902 | .private_value = (unsigned long)&(struct soc_mixer_control) \ | |
903 | {.reg = xreg, .shift = shift_left, .rshift = shift_right,\ | |
904 | .max = xmax, .platform_max = xmax, .invert = xinvert} } | |
905 | ||
906 | /* double control with volume update */ | |
907 | #define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\ | |
908 | xinvert, tlv_array)\ | |
909 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
910 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
911 | SNDRV_CTL_ELEM_ACCESS_READWRITE | \ | |
912 | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ | |
913 | .tlv.p = (tlv_array), \ | |
914 | .info = snd_soc_info_volsw_2r, \ | |
915 | .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \ | |
916 | .private_value = (unsigned long)&(struct soc_mixer_control) \ | |
917 | {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ | |
918 | .rshift = xshift, .max = xmax, .invert = xinvert}, } | |
919 | ||
8ecbabd9 MLC |
920 | /* |
921 | * MICATT volume control: | |
922 | * from -6 to 0 dB in 6 dB steps | |
923 | */ | |
924 | static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0); | |
925 | ||
926 | /* | |
927 | * MICGAIN volume control: | |
9020808b | 928 | * from -6 to 30 dB in 6 dB steps |
8ecbabd9 | 929 | */ |
9020808b | 930 | static DECLARE_TLV_DB_SCALE(mic_amp_tlv, -600, 600, 0); |
8ecbabd9 | 931 | |
370a0314 JEC |
932 | /* |
933 | * AFMGAIN volume control: | |
1f71a3ba | 934 | * from -18 to 24 dB in 6 dB steps |
370a0314 | 935 | */ |
1f71a3ba | 936 | static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0); |
370a0314 | 937 | |
8ecbabd9 MLC |
938 | /* |
939 | * HSGAIN volume control: | |
940 | * from -30 to 0 dB in 2 dB steps | |
941 | */ | |
942 | static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0); | |
943 | ||
944 | /* | |
945 | * HFGAIN volume control: | |
946 | * from -52 to 6 dB in 2 dB steps | |
947 | */ | |
948 | static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0); | |
949 | ||
871a05a7 JEC |
950 | /* |
951 | * EPGAIN volume control: | |
952 | * from -24 to 6 dB in 2 dB steps | |
953 | */ | |
954 | static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0); | |
955 | ||
8ecbabd9 MLC |
956 | /* Left analog microphone selection */ |
957 | static const char *twl6040_amicl_texts[] = | |
958 | {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"}; | |
959 | ||
960 | /* Right analog microphone selection */ | |
961 | static const char *twl6040_amicr_texts[] = | |
962 | {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"}; | |
963 | ||
964 | static const struct soc_enum twl6040_enum[] = { | |
cb973d78 FM |
965 | SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts), |
966 | SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts), | |
8ecbabd9 MLC |
967 | }; |
968 | ||
370a0314 JEC |
969 | static const char *twl6040_hs_texts[] = { |
970 | "Off", "HS DAC", "Line-In amp" | |
971 | }; | |
972 | ||
973 | static const struct soc_enum twl6040_hs_enum[] = { | |
974 | SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts), | |
975 | twl6040_hs_texts), | |
976 | SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts), | |
977 | twl6040_hs_texts), | |
978 | }; | |
979 | ||
980 | static const char *twl6040_hf_texts[] = { | |
981 | "Off", "HF DAC", "Line-In amp" | |
982 | }; | |
983 | ||
984 | static const struct soc_enum twl6040_hf_enum[] = { | |
985 | SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts), | |
986 | twl6040_hf_texts), | |
987 | SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts), | |
988 | twl6040_hf_texts), | |
989 | }; | |
990 | ||
8ecbabd9 MLC |
991 | static const struct snd_kcontrol_new amicl_control = |
992 | SOC_DAPM_ENUM("Route", twl6040_enum[0]); | |
993 | ||
994 | static const struct snd_kcontrol_new amicr_control = | |
995 | SOC_DAPM_ENUM("Route", twl6040_enum[1]); | |
996 | ||
997 | /* Headset DAC playback switches */ | |
370a0314 JEC |
998 | static const struct snd_kcontrol_new hsl_mux_controls = |
999 | SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]); | |
8ecbabd9 | 1000 | |
370a0314 JEC |
1001 | static const struct snd_kcontrol_new hsr_mux_controls = |
1002 | SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]); | |
8ecbabd9 MLC |
1003 | |
1004 | /* Handsfree DAC playback switches */ | |
370a0314 JEC |
1005 | static const struct snd_kcontrol_new hfl_mux_controls = |
1006 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]); | |
8ecbabd9 | 1007 | |
370a0314 JEC |
1008 | static const struct snd_kcontrol_new hfr_mux_controls = |
1009 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]); | |
8ecbabd9 | 1010 | |
871a05a7 JEC |
1011 | static const struct snd_kcontrol_new ep_driver_switch_controls = |
1012 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0); | |
1013 | ||
6bba63b6 MLC |
1014 | /* Headset power mode */ |
1015 | static const char *twl6040_headset_power_texts[] = { | |
1016 | "Low-Power", "High-Perfomance", | |
1017 | }; | |
1018 | ||
1019 | static const struct soc_enum twl6040_headset_power_enum = | |
1020 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_headset_power_texts), | |
1021 | twl6040_headset_power_texts); | |
1022 | ||
1023 | static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol, | |
1024 | struct snd_ctl_elem_value *ucontrol) | |
1025 | { | |
1026 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
1027 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
1028 | ||
1029 | ucontrol->value.enumerated.item[0] = priv->hs_power_mode; | |
1030 | ||
1031 | return 0; | |
1032 | } | |
1033 | ||
1034 | static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol, | |
1035 | struct snd_ctl_elem_value *ucontrol) | |
1036 | { | |
1037 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
1038 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
1039 | int high_perf = ucontrol->value.enumerated.item[0]; | |
1040 | int ret = 0; | |
1041 | ||
1042 | if (!priv->hs_power_mode_locked) | |
1043 | ret = headset_power_mode(codec, high_perf); | |
1044 | ||
1045 | if (!ret) | |
1046 | priv->hs_power_mode = high_perf; | |
1047 | ||
1048 | return ret; | |
1049 | } | |
1050 | ||
8ecbabd9 MLC |
1051 | static const struct snd_kcontrol_new twl6040_snd_controls[] = { |
1052 | /* Capture gains */ | |
1053 | SOC_DOUBLE_TLV("Capture Preamplifier Volume", | |
1054 | TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv), | |
1055 | SOC_DOUBLE_TLV("Capture Volume", | |
1056 | TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv), | |
1057 | ||
370a0314 JEC |
1058 | /* AFM gains */ |
1059 | SOC_DOUBLE_TLV("Aux FM Volume", | |
1f71a3ba | 1060 | TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv), |
370a0314 | 1061 | |
8ecbabd9 | 1062 | /* Playback gains */ |
1bf84759 | 1063 | SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume", |
8ecbabd9 | 1064 | TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv), |
1bf84759 | 1065 | SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume", |
8ecbabd9 | 1066 | TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv), |
871a05a7 JEC |
1067 | SOC_SINGLE_TLV("Earphone Playback Volume", |
1068 | TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv), | |
6bba63b6 MLC |
1069 | |
1070 | SOC_ENUM_EXT("Headset Power Mode", twl6040_headset_power_enum, | |
1071 | twl6040_headset_power_get_enum, | |
1072 | twl6040_headset_power_put_enum), | |
8ecbabd9 MLC |
1073 | }; |
1074 | ||
1075 | static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { | |
1076 | /* Inputs */ | |
1077 | SND_SOC_DAPM_INPUT("MAINMIC"), | |
1078 | SND_SOC_DAPM_INPUT("HSMIC"), | |
1079 | SND_SOC_DAPM_INPUT("SUBMIC"), | |
1080 | SND_SOC_DAPM_INPUT("AFML"), | |
1081 | SND_SOC_DAPM_INPUT("AFMR"), | |
1082 | ||
1083 | /* Outputs */ | |
1084 | SND_SOC_DAPM_OUTPUT("HSOL"), | |
1085 | SND_SOC_DAPM_OUTPUT("HSOR"), | |
1086 | SND_SOC_DAPM_OUTPUT("HFL"), | |
1087 | SND_SOC_DAPM_OUTPUT("HFR"), | |
871a05a7 | 1088 | SND_SOC_DAPM_OUTPUT("EP"), |
8ecbabd9 MLC |
1089 | |
1090 | /* Analog input muxes for the capture amplifiers */ | |
1091 | SND_SOC_DAPM_MUX("Analog Left Capture Route", | |
1092 | SND_SOC_NOPM, 0, 0, &amicl_control), | |
1093 | SND_SOC_DAPM_MUX("Analog Right Capture Route", | |
1094 | SND_SOC_NOPM, 0, 0, &amicr_control), | |
1095 | ||
1096 | /* Analog capture PGAs */ | |
1097 | SND_SOC_DAPM_PGA("MicAmpL", | |
1098 | TWL6040_REG_MICLCTL, 0, 0, NULL, 0), | |
1099 | SND_SOC_DAPM_PGA("MicAmpR", | |
1100 | TWL6040_REG_MICRCTL, 0, 0, NULL, 0), | |
1101 | ||
370a0314 JEC |
1102 | /* Auxiliary FM PGAs */ |
1103 | SND_SOC_DAPM_PGA("AFMAmpL", | |
1104 | TWL6040_REG_MICLCTL, 1, 0, NULL, 0), | |
1105 | SND_SOC_DAPM_PGA("AFMAmpR", | |
1106 | TWL6040_REG_MICRCTL, 1, 0, NULL, 0), | |
1107 | ||
8ecbabd9 MLC |
1108 | /* ADCs */ |
1109 | SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture", | |
1110 | TWL6040_REG_MICLCTL, 2, 0), | |
1111 | SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture", | |
1112 | TWL6040_REG_MICRCTL, 2, 0), | |
1113 | ||
1114 | /* Microphone bias */ | |
1115 | SND_SOC_DAPM_MICBIAS("Headset Mic Bias", | |
1116 | TWL6040_REG_AMICBCTL, 0, 0), | |
1117 | SND_SOC_DAPM_MICBIAS("Main Mic Bias", | |
1118 | TWL6040_REG_AMICBCTL, 4, 0), | |
1119 | SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias", | |
1120 | TWL6040_REG_DMICBCTL, 0, 0), | |
1121 | SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias", | |
1122 | TWL6040_REG_DMICBCTL, 4, 0), | |
1123 | ||
1124 | /* DACs */ | |
0fad4ed7 JEC |
1125 | SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback", |
1126 | TWL6040_REG_HSLCTL, 0, 0, | |
1127 | twl6040_hs_dac_event, | |
1128 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
1129 | SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback", | |
1130 | TWL6040_REG_HSRCTL, 0, 0, | |
1131 | twl6040_hs_dac_event, | |
1132 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
8ecbabd9 MLC |
1133 | SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback", |
1134 | TWL6040_REG_HFLCTL, 0, 0, | |
1135 | twl6040_power_mode_event, | |
1136 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
1137 | SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback", | |
1138 | TWL6040_REG_HFRCTL, 0, 0, | |
1139 | twl6040_power_mode_event, | |
1140 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
1141 | ||
370a0314 JEC |
1142 | SND_SOC_DAPM_MUX("HF Left Playback", |
1143 | SND_SOC_NOPM, 0, 0, &hfl_mux_controls), | |
1144 | SND_SOC_DAPM_MUX("HF Right Playback", | |
1145 | SND_SOC_NOPM, 0, 0, &hfr_mux_controls), | |
1146 | /* Analog playback Muxes */ | |
1147 | SND_SOC_DAPM_MUX("HS Left Playback", | |
1148 | SND_SOC_NOPM, 0, 0, &hsl_mux_controls), | |
1149 | SND_SOC_DAPM_MUX("HS Right Playback", | |
1150 | SND_SOC_NOPM, 0, 0, &hsr_mux_controls), | |
8ecbabd9 | 1151 | |
0fad4ed7 | 1152 | /* Analog playback drivers */ |
f769bdf2 | 1153 | SND_SOC_DAPM_OUT_DRV_E("Handsfree Left Driver", |
0fad4ed7 | 1154 | TWL6040_REG_HFLCTL, 4, 0, NULL, 0, |
1bf84759 MOC |
1155 | pga_event, |
1156 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | |
f769bdf2 | 1157 | SND_SOC_DAPM_OUT_DRV_E("Handsfree Right Driver", |
0fad4ed7 | 1158 | TWL6040_REG_HFRCTL, 4, 0, NULL, 0, |
1bf84759 MOC |
1159 | pga_event, |
1160 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | |
f769bdf2 | 1161 | SND_SOC_DAPM_OUT_DRV_E("Headset Left Driver", |
1bf84759 MOC |
1162 | TWL6040_REG_HSLCTL, 2, 0, NULL, 0, |
1163 | pga_event, | |
1164 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | |
f769bdf2 | 1165 | SND_SOC_DAPM_OUT_DRV_E("Headset Right Driver", |
1bf84759 MOC |
1166 | TWL6040_REG_HSRCTL, 2, 0, NULL, 0, |
1167 | pga_event, | |
1168 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | |
871a05a7 JEC |
1169 | SND_SOC_DAPM_SWITCH_E("Earphone Driver", |
1170 | SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls, | |
1171 | twl6040_power_mode_event, | |
1172 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
8ecbabd9 MLC |
1173 | |
1174 | /* Analog playback PGAs */ | |
1175 | SND_SOC_DAPM_PGA("HFDAC Left PGA", | |
1176 | TWL6040_REG_HFLCTL, 1, 0, NULL, 0), | |
1177 | SND_SOC_DAPM_PGA("HFDAC Right PGA", | |
1178 | TWL6040_REG_HFRCTL, 1, 0, NULL, 0), | |
1179 | ||
1180 | }; | |
1181 | ||
1182 | static const struct snd_soc_dapm_route intercon[] = { | |
1183 | /* Capture path */ | |
1184 | {"Analog Left Capture Route", "Headset Mic", "HSMIC"}, | |
1185 | {"Analog Left Capture Route", "Main Mic", "MAINMIC"}, | |
1186 | {"Analog Left Capture Route", "Aux/FM Left", "AFML"}, | |
1187 | ||
1188 | {"Analog Right Capture Route", "Headset Mic", "HSMIC"}, | |
1189 | {"Analog Right Capture Route", "Sub Mic", "SUBMIC"}, | |
1190 | {"Analog Right Capture Route", "Aux/FM Right", "AFMR"}, | |
1191 | ||
1192 | {"MicAmpL", NULL, "Analog Left Capture Route"}, | |
1193 | {"MicAmpR", NULL, "Analog Right Capture Route"}, | |
1194 | ||
1195 | {"ADC Left", NULL, "MicAmpL"}, | |
1196 | {"ADC Right", NULL, "MicAmpR"}, | |
1197 | ||
370a0314 JEC |
1198 | /* AFM path */ |
1199 | {"AFMAmpL", "NULL", "AFML"}, | |
1200 | {"AFMAmpR", "NULL", "AFMR"}, | |
1201 | ||
1202 | {"HS Left Playback", "HS DAC", "HSDAC Left"}, | |
1203 | {"HS Left Playback", "Line-In amp", "AFMAmpL"}, | |
8ecbabd9 | 1204 | |
370a0314 JEC |
1205 | {"HS Right Playback", "HS DAC", "HSDAC Right"}, |
1206 | {"HS Right Playback", "Line-In amp", "AFMAmpR"}, | |
1207 | ||
1208 | {"Headset Left Driver", "NULL", "HS Left Playback"}, | |
1209 | {"Headset Right Driver", "NULL", "HS Right Playback"}, | |
8ecbabd9 MLC |
1210 | |
1211 | {"HSOL", NULL, "Headset Left Driver"}, | |
1212 | {"HSOR", NULL, "Headset Right Driver"}, | |
1213 | ||
871a05a7 JEC |
1214 | /* Earphone playback path */ |
1215 | {"Earphone Driver", "Switch", "HSDAC Left"}, | |
1216 | {"EP", NULL, "Earphone Driver"}, | |
1217 | ||
370a0314 JEC |
1218 | {"HF Left Playback", "HF DAC", "HFDAC Left"}, |
1219 | {"HF Left Playback", "Line-In amp", "AFMAmpL"}, | |
1220 | ||
1221 | {"HF Right Playback", "HF DAC", "HFDAC Right"}, | |
1222 | {"HF Right Playback", "Line-In amp", "AFMAmpR"}, | |
8ecbabd9 | 1223 | |
370a0314 JEC |
1224 | {"HFDAC Left PGA", NULL, "HF Left Playback"}, |
1225 | {"HFDAC Right PGA", NULL, "HF Right Playback"}, | |
8ecbabd9 MLC |
1226 | |
1227 | {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"}, | |
1228 | {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"}, | |
1229 | ||
1230 | {"HFL", NULL, "Handsfree Left Driver"}, | |
1231 | {"HFR", NULL, "Handsfree Right Driver"}, | |
1232 | }; | |
1233 | ||
1234 | static int twl6040_add_widgets(struct snd_soc_codec *codec) | |
1235 | { | |
ce6120cc | 1236 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
8ecbabd9 | 1237 | |
ce6120cc LG |
1238 | snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets, |
1239 | ARRAY_SIZE(twl6040_dapm_widgets)); | |
1240 | snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); | |
1241 | snd_soc_dapm_new_widgets(dapm); | |
8ecbabd9 MLC |
1242 | |
1243 | return 0; | |
1244 | } | |
1245 | ||
8ecbabd9 MLC |
1246 | static int twl6040_set_bias_level(struct snd_soc_codec *codec, |
1247 | enum snd_soc_bias_level level) | |
1248 | { | |
fb34d3d5 | 1249 | struct twl6040 *twl6040 = codec->control_data; |
d4a8ca24 | 1250 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
1251 | int ret; |
1252 | ||
1253 | switch (level) { | |
1254 | case SND_SOC_BIAS_ON: | |
1255 | break; | |
1256 | case SND_SOC_BIAS_PREPARE: | |
1257 | break; | |
1258 | case SND_SOC_BIAS_STANDBY: | |
1259 | if (priv->codec_powered) | |
1260 | break; | |
1261 | ||
fb34d3d5 MLC |
1262 | ret = twl6040_power(twl6040, 1); |
1263 | if (ret) | |
1264 | return ret; | |
8ecbabd9 | 1265 | |
fb34d3d5 | 1266 | priv->codec_powered = 1; |
8ecbabd9 MLC |
1267 | |
1268 | /* initialize vdd/vss registers with reg_cache */ | |
1269 | twl6040_init_vdd_regs(codec); | |
65b7cecc OM |
1270 | |
1271 | /* Set external boost GPO */ | |
1272 | twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02); | |
8ecbabd9 MLC |
1273 | break; |
1274 | case SND_SOC_BIAS_OFF: | |
1275 | if (!priv->codec_powered) | |
1276 | break; | |
1277 | ||
fb34d3d5 | 1278 | twl6040_power(twl6040, 0); |
8ecbabd9 MLC |
1279 | priv->codec_powered = 0; |
1280 | break; | |
1281 | } | |
1282 | ||
fb34d3d5 MLC |
1283 | /* get PLL and sysclk after power transition */ |
1284 | priv->pll = twl6040_get_pll(twl6040); | |
1285 | priv->sysclk = twl6040_get_sysclk(twl6040); | |
ce6120cc | 1286 | codec->dapm.bias_level = level; |
8ecbabd9 MLC |
1287 | |
1288 | return 0; | |
1289 | } | |
1290 | ||
1291 | /* set of rates for each pll: low-power and high-performance */ | |
1292 | ||
1293 | static unsigned int lp_rates[] = { | |
e17e4ab8 LG |
1294 | 8000, |
1295 | 11250, | |
1296 | 16000, | |
1297 | 22500, | |
1298 | 32000, | |
1299 | 44100, | |
1300 | 48000, | |
8ecbabd9 MLC |
1301 | 88200, |
1302 | 96000, | |
1303 | }; | |
1304 | ||
1305 | static struct snd_pcm_hw_constraint_list lp_constraints = { | |
1306 | .count = ARRAY_SIZE(lp_rates), | |
1307 | .list = lp_rates, | |
1308 | }; | |
1309 | ||
1310 | static unsigned int hp_rates[] = { | |
e17e4ab8 LG |
1311 | 8000, |
1312 | 16000, | |
1313 | 32000, | |
1314 | 48000, | |
8ecbabd9 MLC |
1315 | 96000, |
1316 | }; | |
1317 | ||
1318 | static struct snd_pcm_hw_constraint_list hp_constraints = { | |
1319 | .count = ARRAY_SIZE(hp_rates), | |
1320 | .list = hp_rates, | |
1321 | }; | |
1322 | ||
1323 | static int twl6040_startup(struct snd_pcm_substream *substream, | |
1324 | struct snd_soc_dai *dai) | |
1325 | { | |
1326 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 1327 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 1328 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 1329 | |
8ecbabd9 MLC |
1330 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
1331 | SNDRV_PCM_HW_PARAM_RATE, | |
1332 | priv->sysclk_constraints); | |
1333 | ||
1334 | return 0; | |
1335 | } | |
1336 | ||
1337 | static int twl6040_hw_params(struct snd_pcm_substream *substream, | |
1338 | struct snd_pcm_hw_params *params, | |
1339 | struct snd_soc_dai *dai) | |
1340 | { | |
1341 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 1342 | struct snd_soc_codec *codec = rtd->codec; |
fb34d3d5 | 1343 | struct twl6040 *twl6040 = codec->control_data; |
d4a8ca24 | 1344 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
fb34d3d5 MLC |
1345 | unsigned int sysclk; |
1346 | int rate, ret; | |
8ecbabd9 MLC |
1347 | |
1348 | /* nothing to do for high-perf pll, it supports only 48 kHz */ | |
1349 | if (priv->pll == TWL6040_HPPLL_ID) | |
1350 | return 0; | |
1351 | ||
8ecbabd9 MLC |
1352 | rate = params_rate(params); |
1353 | switch (rate) { | |
60ea4cec OM |
1354 | case 11250: |
1355 | case 22500: | |
1356 | case 44100: | |
8ecbabd9 | 1357 | case 88200: |
fb34d3d5 | 1358 | sysclk = 17640000; |
8ecbabd9 | 1359 | break; |
60ea4cec OM |
1360 | case 8000: |
1361 | case 16000: | |
1362 | case 32000: | |
1363 | case 48000: | |
8ecbabd9 | 1364 | case 96000: |
fb34d3d5 | 1365 | sysclk = 19200000; |
8ecbabd9 MLC |
1366 | break; |
1367 | default: | |
1368 | dev_err(codec->dev, "unsupported rate %d\n", rate); | |
1369 | return -EINVAL; | |
1370 | } | |
1371 | ||
fb34d3d5 MLC |
1372 | ret = twl6040_set_pll(twl6040, TWL6040_LPPLL_ID, priv->clk_in, sysclk); |
1373 | if (ret) | |
1374 | return ret; | |
1375 | ||
1376 | priv->sysclk = twl6040_get_sysclk(twl6040); | |
8ecbabd9 MLC |
1377 | |
1378 | return 0; | |
1379 | } | |
1380 | ||
4e624d06 OM |
1381 | static int twl6040_prepare(struct snd_pcm_substream *substream, |
1382 | struct snd_soc_dai *dai) | |
8ecbabd9 MLC |
1383 | { |
1384 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 1385 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 1386 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 1387 | |
4e624d06 OM |
1388 | if (!priv->sysclk) { |
1389 | dev_err(codec->dev, | |
1390 | "no mclk configured, call set_sysclk() on init\n"); | |
1391 | return -EINVAL; | |
1392 | } | |
1393 | ||
1394 | /* | |
1395 | * capture is not supported at 17.64 MHz, | |
1396 | * it's reserved for headset low-power playback scenario | |
1397 | */ | |
1398 | if ((priv->sysclk == 17640000) && | |
1399 | substream->stream == SNDRV_PCM_STREAM_CAPTURE) { | |
1400 | dev_err(codec->dev, | |
1401 | "capture mode is not supported at %dHz\n", | |
1402 | priv->sysclk); | |
1403 | return -EINVAL; | |
1404 | } | |
1405 | ||
1406 | if ((priv->sysclk == 17640000) && priv->non_lp) { | |
8ecbabd9 MLC |
1407 | dev_err(codec->dev, |
1408 | "some enabled paths aren't supported at %dHz\n", | |
1409 | priv->sysclk); | |
1410 | return -EPERM; | |
8ecbabd9 | 1411 | } |
8ecbabd9 MLC |
1412 | return 0; |
1413 | } | |
1414 | ||
1415 | static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
1416 | int clk_id, unsigned int freq, int dir) | |
1417 | { | |
1418 | struct snd_soc_codec *codec = codec_dai->codec; | |
fb34d3d5 | 1419 | struct twl6040 *twl6040 = codec->control_data; |
d4a8ca24 | 1420 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
fb34d3d5 | 1421 | int ret = 0; |
8ecbabd9 MLC |
1422 | |
1423 | switch (clk_id) { | |
1424 | case TWL6040_SYSCLK_SEL_LPPLL: | |
fb34d3d5 MLC |
1425 | ret = twl6040_set_pll(twl6040, TWL6040_LPPLL_ID, |
1426 | freq, priv->sysclk); | |
1427 | if (ret) | |
1428 | return ret; | |
8ecbabd9 | 1429 | |
8ecbabd9 MLC |
1430 | priv->sysclk_constraints = &lp_constraints; |
1431 | break; | |
1432 | case TWL6040_SYSCLK_SEL_HPPLL: | |
fb34d3d5 MLC |
1433 | ret = twl6040_set_pll(twl6040, TWL6040_HPPLL_ID, |
1434 | freq, priv->sysclk); | |
1435 | if (ret) | |
1436 | return ret; | |
8ecbabd9 | 1437 | |
8ecbabd9 MLC |
1438 | priv->sysclk_constraints = &hp_constraints; |
1439 | break; | |
1440 | default: | |
1441 | dev_err(codec->dev, "unknown clk_id %d\n", clk_id); | |
1442 | return -EINVAL; | |
1443 | } | |
1444 | ||
fb34d3d5 MLC |
1445 | priv->pll = twl6040_get_pll(twl6040); |
1446 | priv->clk_in = freq; | |
1447 | priv->sysclk = twl6040_get_sysclk(twl6040); | |
1448 | ||
8ecbabd9 MLC |
1449 | return 0; |
1450 | } | |
1451 | ||
1452 | static struct snd_soc_dai_ops twl6040_dai_ops = { | |
1453 | .startup = twl6040_startup, | |
1454 | .hw_params = twl6040_hw_params, | |
4e624d06 | 1455 | .prepare = twl6040_prepare, |
8ecbabd9 MLC |
1456 | .set_sysclk = twl6040_set_dai_sysclk, |
1457 | }; | |
1458 | ||
6510bdc3 LG |
1459 | static struct snd_soc_dai_driver twl6040_dai[] = { |
1460 | { | |
1461 | .name = "twl6040-ul", | |
1462 | .capture = { | |
1463 | .stream_name = "Capture", | |
1464 | .channels_min = 1, | |
1465 | .channels_max = 2, | |
1466 | .rates = TWL6040_RATES, | |
1467 | .formats = TWL6040_FORMATS, | |
1468 | }, | |
1469 | .ops = &twl6040_dai_ops, | |
1470 | }, | |
1471 | { | |
1472 | .name = "twl6040-dl1", | |
8ecbabd9 | 1473 | .playback = { |
6510bdc3 | 1474 | .stream_name = "Headset Playback", |
8ecbabd9 | 1475 | .channels_min = 1, |
6510bdc3 | 1476 | .channels_max = 2, |
8ecbabd9 MLC |
1477 | .rates = TWL6040_RATES, |
1478 | .formats = TWL6040_FORMATS, | |
1479 | }, | |
6510bdc3 LG |
1480 | .ops = &twl6040_dai_ops, |
1481 | }, | |
1482 | { | |
1483 | .name = "twl6040-dl2", | |
1484 | .playback = { | |
1485 | .stream_name = "Handsfree Playback", | |
8ecbabd9 MLC |
1486 | .channels_min = 1, |
1487 | .channels_max = 2, | |
1488 | .rates = TWL6040_RATES, | |
1489 | .formats = TWL6040_FORMATS, | |
1490 | }, | |
1491 | .ops = &twl6040_dai_ops, | |
6510bdc3 LG |
1492 | }, |
1493 | { | |
1494 | .name = "twl6040-vib", | |
1495 | .playback = { | |
1496 | .stream_name = "Vibra Playback", | |
1497 | .channels_min = 2, | |
1498 | .channels_max = 2, | |
1499 | .rates = SNDRV_PCM_RATE_CONTINUOUS, | |
1500 | .formats = TWL6040_FORMATS, | |
1501 | }, | |
1502 | .ops = &twl6040_dai_ops, | |
1503 | }, | |
8ecbabd9 | 1504 | }; |
8ecbabd9 MLC |
1505 | |
1506 | #ifdef CONFIG_PM | |
f0fba2ad | 1507 | static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state) |
8ecbabd9 | 1508 | { |
8ecbabd9 MLC |
1509 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1510 | ||
1511 | return 0; | |
1512 | } | |
1513 | ||
f0fba2ad | 1514 | static int twl6040_resume(struct snd_soc_codec *codec) |
8ecbabd9 | 1515 | { |
8ecbabd9 | 1516 | twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
6c311041 | 1517 | twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level); |
8ecbabd9 MLC |
1518 | |
1519 | return 0; | |
1520 | } | |
1521 | #else | |
1522 | #define twl6040_suspend NULL | |
1523 | #define twl6040_resume NULL | |
1524 | #endif | |
1525 | ||
f0fba2ad | 1526 | static int twl6040_probe(struct snd_soc_codec *codec) |
8ecbabd9 | 1527 | { |
8ecbabd9 | 1528 | struct twl6040_data *priv; |
1fbe9952 | 1529 | struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); |
8ecbabd9 MLC |
1530 | int ret = 0; |
1531 | ||
1532 | priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL); | |
1533 | if (priv == NULL) | |
1534 | return -ENOMEM; | |
f0fba2ad | 1535 | snd_soc_codec_set_drvdata(codec, priv); |
8ecbabd9 | 1536 | |
a2d2362e | 1537 | priv->codec = codec; |
fb34d3d5 | 1538 | codec->control_data = dev_get_drvdata(codec->dev->parent); |
a2d2362e | 1539 | |
1fbe9952 ACG |
1540 | if (pdata && pdata->hs_left_step && pdata->hs_right_step) { |
1541 | priv->hs_left_step = pdata->hs_left_step; | |
1542 | priv->hs_right_step = pdata->hs_right_step; | |
1543 | } else { | |
1544 | priv->hs_left_step = 1; | |
1545 | priv->hs_right_step = 1; | |
1546 | } | |
1547 | ||
1548 | if (pdata && pdata->hf_left_step && pdata->hf_right_step) { | |
1549 | priv->hf_left_step = pdata->hf_left_step; | |
1550 | priv->hf_right_step = pdata->hf_right_step; | |
1551 | } else { | |
1552 | priv->hf_left_step = 1; | |
1553 | priv->hf_right_step = 1; | |
1554 | } | |
1555 | ||
f7026c99 | 1556 | priv->sysclk_constraints = &hp_constraints; |
a2d2362e | 1557 | priv->workqueue = create_singlethread_workqueue("twl6040-codec"); |
19aab08d AL |
1558 | if (!priv->workqueue) { |
1559 | ret = -ENOMEM; | |
a2d2362e | 1560 | goto work_err; |
19aab08d | 1561 | } |
a2d2362e JEC |
1562 | |
1563 | INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work); | |
1564 | ||
1565 | mutex_init(&priv->mutex); | |
8ecbabd9 | 1566 | |
1bf84759 MOC |
1567 | init_completion(&priv->headset.ramp_done); |
1568 | init_completion(&priv->handsfree.ramp_done); | |
8ecbabd9 | 1569 | |
1bf84759 MOC |
1570 | priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf"); |
1571 | if (priv->hf_workqueue == NULL) { | |
1572 | ret = -ENOMEM; | |
fb34d3d5 | 1573 | goto hfwq_err; |
1bf84759 MOC |
1574 | } |
1575 | priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs"); | |
1576 | if (priv->hs_workqueue == NULL) { | |
1577 | ret = -ENOMEM; | |
fb34d3d5 | 1578 | goto hswq_err; |
1bf84759 MOC |
1579 | } |
1580 | ||
1581 | INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work); | |
1582 | INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work); | |
1583 | ||
fb34d3d5 MLC |
1584 | ret = twl6040_request_irq(codec->control_data, TWL6040_IRQ_PLUG, |
1585 | twl6040_audio_handler, 0, | |
1586 | "twl6040_irq_plug", codec); | |
1587 | if (ret) { | |
1588 | dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret); | |
1589 | goto plugirq_err; | |
1590 | } | |
1591 | ||
1592 | /* init vio registers */ | |
1593 | twl6040_init_vio_regs(codec); | |
1594 | ||
8ecbabd9 MLC |
1595 | /* power on device */ |
1596 | ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
1597 | if (ret) | |
1bf84759 | 1598 | goto bias_err; |
8ecbabd9 | 1599 | |
f0fba2ad LG |
1600 | snd_soc_add_controls(codec, twl6040_snd_controls, |
1601 | ARRAY_SIZE(twl6040_snd_controls)); | |
1602 | twl6040_add_widgets(codec); | |
8ecbabd9 MLC |
1603 | |
1604 | return 0; | |
1605 | ||
1bf84759 | 1606 | bias_err: |
fb34d3d5 MLC |
1607 | twl6040_free_irq(codec->control_data, TWL6040_IRQ_PLUG, codec); |
1608 | plugirq_err: | |
1bf84759 | 1609 | destroy_workqueue(priv->hs_workqueue); |
fb34d3d5 | 1610 | hswq_err: |
1bf84759 | 1611 | destroy_workqueue(priv->hf_workqueue); |
fb34d3d5 | 1612 | hfwq_err: |
a2d2362e JEC |
1613 | destroy_workqueue(priv->workqueue); |
1614 | work_err: | |
8ecbabd9 MLC |
1615 | kfree(priv); |
1616 | return ret; | |
1617 | } | |
1618 | ||
f0fba2ad | 1619 | static int twl6040_remove(struct snd_soc_codec *codec) |
8ecbabd9 | 1620 | { |
f0fba2ad | 1621 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 1622 | |
f0fba2ad | 1623 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); |
fb34d3d5 | 1624 | twl6040_free_irq(codec->control_data, TWL6040_IRQ_PLUG, codec); |
a2d2362e | 1625 | destroy_workqueue(priv->workqueue); |
1bf84759 MOC |
1626 | destroy_workqueue(priv->hf_workqueue); |
1627 | destroy_workqueue(priv->hs_workqueue); | |
f0fba2ad | 1628 | kfree(priv); |
8ecbabd9 | 1629 | |
f0fba2ad LG |
1630 | return 0; |
1631 | } | |
8ecbabd9 | 1632 | |
f0fba2ad LG |
1633 | static struct snd_soc_codec_driver soc_codec_dev_twl6040 = { |
1634 | .probe = twl6040_probe, | |
1635 | .remove = twl6040_remove, | |
1636 | .suspend = twl6040_suspend, | |
1637 | .resume = twl6040_resume, | |
1638 | .read = twl6040_read_reg_cache, | |
1639 | .write = twl6040_write, | |
1640 | .set_bias_level = twl6040_set_bias_level, | |
1641 | .reg_cache_size = ARRAY_SIZE(twl6040_reg), | |
1642 | .reg_word_size = sizeof(u8), | |
1643 | .reg_cache_default = twl6040_reg, | |
1644 | }; | |
1645 | ||
1646 | static int __devinit twl6040_codec_probe(struct platform_device *pdev) | |
1647 | { | |
6510bdc3 LG |
1648 | return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040, |
1649 | twl6040_dai, ARRAY_SIZE(twl6040_dai)); | |
f0fba2ad LG |
1650 | } |
1651 | ||
1652 | static int __devexit twl6040_codec_remove(struct platform_device *pdev) | |
1653 | { | |
1654 | snd_soc_unregister_codec(&pdev->dev); | |
8ecbabd9 MLC |
1655 | return 0; |
1656 | } | |
1657 | ||
1658 | static struct platform_driver twl6040_codec_driver = { | |
1659 | .driver = { | |
f0fba2ad | 1660 | .name = "twl6040-codec", |
8ecbabd9 MLC |
1661 | .owner = THIS_MODULE, |
1662 | }, | |
1663 | .probe = twl6040_codec_probe, | |
1664 | .remove = __devexit_p(twl6040_codec_remove), | |
1665 | }; | |
1666 | ||
1667 | static int __init twl6040_codec_init(void) | |
1668 | { | |
1669 | return platform_driver_register(&twl6040_codec_driver); | |
1670 | } | |
1671 | module_init(twl6040_codec_init); | |
1672 | ||
1673 | static void __exit twl6040_codec_exit(void) | |
1674 | { | |
1675 | platform_driver_unregister(&twl6040_codec_driver); | |
1676 | } | |
1677 | module_exit(twl6040_codec_exit); | |
1678 | ||
1679 | MODULE_DESCRIPTION("ASoC TWL6040 codec driver"); | |
1680 | MODULE_AUTHOR("Misael Lopez Cruz"); | |
1681 | MODULE_LICENSE("GPL"); |