Commit | Line | Data |
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8ecbabd9 MLC |
1 | /* |
2 | * ALSA SoC TWL6040 codec driver | |
3 | * | |
4 | * Author: Misael Lopez Cruz <x0052729@ti.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
18 | * 02110-1301 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/pm.h> | |
27 | #include <linux/i2c.h> | |
28 | #include <linux/gpio.h> | |
29 | #include <linux/platform_device.h> | |
68b40cc4 | 30 | #include <linux/slab.h> |
8ecbabd9 MLC |
31 | #include <linux/i2c/twl.h> |
32 | ||
33 | #include <sound/core.h> | |
34 | #include <sound/pcm.h> | |
35 | #include <sound/pcm_params.h> | |
36 | #include <sound/soc.h> | |
8ecbabd9 MLC |
37 | #include <sound/initval.h> |
38 | #include <sound/tlv.h> | |
39 | ||
40 | #include "twl6040.h" | |
41 | ||
60ea4cec | 42 | #define TWL6040_RATES SNDRV_PCM_RATE_8000_96000 |
8ecbabd9 MLC |
43 | #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) |
44 | ||
a2d2362e JEC |
45 | struct twl6040_jack_data { |
46 | struct snd_soc_jack *jack; | |
47 | int report; | |
48 | }; | |
49 | ||
8ecbabd9 MLC |
50 | /* codec private data */ |
51 | struct twl6040_data { | |
8ecbabd9 MLC |
52 | int audpwron; |
53 | int naudint; | |
54 | int codec_powered; | |
55 | int pll; | |
56 | int non_lp; | |
57 | unsigned int sysclk; | |
58 | struct snd_pcm_hw_constraint_list *sysclk_constraints; | |
59 | struct completion ready; | |
a2d2362e JEC |
60 | struct twl6040_jack_data hs_jack; |
61 | struct snd_soc_codec *codec; | |
62 | struct workqueue_struct *workqueue; | |
63 | struct delayed_work delayed_work; | |
64 | struct mutex mutex; | |
8ecbabd9 MLC |
65 | }; |
66 | ||
67 | /* | |
68 | * twl6040 register cache & default register settings | |
69 | */ | |
70 | static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { | |
71 | 0x00, /* not used 0x00 */ | |
72 | 0x4B, /* TWL6040_ASICID (ro) 0x01 */ | |
73 | 0x00, /* TWL6040_ASICREV (ro) 0x02 */ | |
74 | 0x00, /* TWL6040_INTID 0x03 */ | |
75 | 0x00, /* TWL6040_INTMR 0x04 */ | |
76 | 0x00, /* TWL6040_NCPCTRL 0x05 */ | |
77 | 0x00, /* TWL6040_LDOCTL 0x06 */ | |
78 | 0x60, /* TWL6040_HPPLLCTL 0x07 */ | |
79 | 0x00, /* TWL6040_LPPLLCTL 0x08 */ | |
80 | 0x4A, /* TWL6040_LPPLLDIV 0x09 */ | |
81 | 0x00, /* TWL6040_AMICBCTL 0x0A */ | |
82 | 0x00, /* TWL6040_DMICBCTL 0x0B */ | |
83 | 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */ | |
84 | 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */ | |
85 | 0x00, /* TWL6040_MICGAIN 0x0E */ | |
86 | 0x1B, /* TWL6040_LINEGAIN 0x0F */ | |
87 | 0x00, /* TWL6040_HSLCTL 0x10 */ | |
88 | 0x00, /* TWL6040_HSRCTL 0x11 */ | |
89 | 0x00, /* TWL6040_HSGAIN 0x12 */ | |
90 | 0x00, /* TWL6040_EARCTL 0x13 */ | |
91 | 0x00, /* TWL6040_HFLCTL 0x14 */ | |
92 | 0x00, /* TWL6040_HFLGAIN 0x15 */ | |
93 | 0x00, /* TWL6040_HFRCTL 0x16 */ | |
94 | 0x00, /* TWL6040_HFRGAIN 0x17 */ | |
95 | 0x00, /* TWL6040_VIBCTLL 0x18 */ | |
96 | 0x00, /* TWL6040_VIBDATL 0x19 */ | |
97 | 0x00, /* TWL6040_VIBCTLR 0x1A */ | |
98 | 0x00, /* TWL6040_VIBDATR 0x1B */ | |
99 | 0x00, /* TWL6040_HKCTL1 0x1C */ | |
100 | 0x00, /* TWL6040_HKCTL2 0x1D */ | |
101 | 0x00, /* TWL6040_GPOCTL 0x1E */ | |
102 | 0x00, /* TWL6040_ALB 0x1F */ | |
103 | 0x00, /* TWL6040_DLB 0x20 */ | |
104 | 0x00, /* not used 0x21 */ | |
105 | 0x00, /* not used 0x22 */ | |
106 | 0x00, /* not used 0x23 */ | |
107 | 0x00, /* not used 0x24 */ | |
108 | 0x00, /* not used 0x25 */ | |
109 | 0x00, /* not used 0x26 */ | |
110 | 0x00, /* not used 0x27 */ | |
111 | 0x00, /* TWL6040_TRIM1 0x28 */ | |
112 | 0x00, /* TWL6040_TRIM2 0x29 */ | |
113 | 0x00, /* TWL6040_TRIM3 0x2A */ | |
114 | 0x00, /* TWL6040_HSOTRIM 0x2B */ | |
115 | 0x00, /* TWL6040_HFOTRIM 0x2C */ | |
116 | 0x09, /* TWL6040_ACCCTL 0x2D */ | |
117 | 0x00, /* TWL6040_STATUS (ro) 0x2E */ | |
118 | }; | |
119 | ||
120 | /* | |
121 | * twl6040 vio/gnd registers: | |
122 | * registers under vio/gnd supply can be accessed | |
123 | * before the power-up sequence, after NRESPWRON goes high | |
124 | */ | |
125 | static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = { | |
126 | TWL6040_REG_ASICID, | |
127 | TWL6040_REG_ASICREV, | |
128 | TWL6040_REG_INTID, | |
129 | TWL6040_REG_INTMR, | |
130 | TWL6040_REG_NCPCTL, | |
131 | TWL6040_REG_LDOCTL, | |
132 | TWL6040_REG_AMICBCTL, | |
133 | TWL6040_REG_DMICBCTL, | |
134 | TWL6040_REG_HKCTL1, | |
135 | TWL6040_REG_HKCTL2, | |
136 | TWL6040_REG_GPOCTL, | |
137 | TWL6040_REG_TRIM1, | |
138 | TWL6040_REG_TRIM2, | |
139 | TWL6040_REG_TRIM3, | |
140 | TWL6040_REG_HSOTRIM, | |
141 | TWL6040_REG_HFOTRIM, | |
142 | TWL6040_REG_ACCCTL, | |
143 | TWL6040_REG_STATUS, | |
144 | }; | |
145 | ||
146 | /* | |
147 | * twl6040 vdd/vss registers: | |
148 | * registers under vdd/vss supplies can only be accessed | |
149 | * after the power-up sequence | |
150 | */ | |
151 | static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = { | |
152 | TWL6040_REG_HPPLLCTL, | |
153 | TWL6040_REG_LPPLLCTL, | |
154 | TWL6040_REG_LPPLLDIV, | |
155 | TWL6040_REG_MICLCTL, | |
156 | TWL6040_REG_MICRCTL, | |
157 | TWL6040_REG_MICGAIN, | |
158 | TWL6040_REG_LINEGAIN, | |
159 | TWL6040_REG_HSLCTL, | |
160 | TWL6040_REG_HSRCTL, | |
161 | TWL6040_REG_HSGAIN, | |
162 | TWL6040_REG_EARCTL, | |
163 | TWL6040_REG_HFLCTL, | |
164 | TWL6040_REG_HFLGAIN, | |
165 | TWL6040_REG_HFRCTL, | |
166 | TWL6040_REG_HFRGAIN, | |
167 | TWL6040_REG_VIBCTLL, | |
168 | TWL6040_REG_VIBDATL, | |
169 | TWL6040_REG_VIBCTLR, | |
170 | TWL6040_REG_VIBDATR, | |
171 | TWL6040_REG_ALB, | |
172 | TWL6040_REG_DLB, | |
173 | }; | |
174 | ||
175 | /* | |
176 | * read twl6040 register cache | |
177 | */ | |
178 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, | |
179 | unsigned int reg) | |
180 | { | |
181 | u8 *cache = codec->reg_cache; | |
182 | ||
183 | if (reg >= TWL6040_CACHEREGNUM) | |
184 | return -EIO; | |
185 | ||
186 | return cache[reg]; | |
187 | } | |
188 | ||
189 | /* | |
190 | * write twl6040 register cache | |
191 | */ | |
192 | static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, | |
193 | u8 reg, u8 value) | |
194 | { | |
195 | u8 *cache = codec->reg_cache; | |
196 | ||
197 | if (reg >= TWL6040_CACHEREGNUM) | |
198 | return; | |
199 | cache[reg] = value; | |
200 | } | |
201 | ||
202 | /* | |
203 | * read from twl6040 hardware register | |
204 | */ | |
205 | static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, | |
206 | unsigned int reg) | |
207 | { | |
208 | u8 value; | |
209 | ||
210 | if (reg >= TWL6040_CACHEREGNUM) | |
211 | return -EIO; | |
212 | ||
0dec1ec7 | 213 | twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &value, reg); |
8ecbabd9 MLC |
214 | twl6040_write_reg_cache(codec, reg, value); |
215 | ||
216 | return value; | |
217 | } | |
218 | ||
219 | /* | |
220 | * write to the twl6040 register space | |
221 | */ | |
222 | static int twl6040_write(struct snd_soc_codec *codec, | |
223 | unsigned int reg, unsigned int value) | |
224 | { | |
225 | if (reg >= TWL6040_CACHEREGNUM) | |
226 | return -EIO; | |
227 | ||
228 | twl6040_write_reg_cache(codec, reg, value); | |
0dec1ec7 | 229 | return twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, value, reg); |
8ecbabd9 MLC |
230 | } |
231 | ||
232 | static void twl6040_init_vio_regs(struct snd_soc_codec *codec) | |
233 | { | |
234 | u8 *cache = codec->reg_cache; | |
235 | int reg, i; | |
236 | ||
237 | /* allow registers to be accessed by i2c */ | |
238 | twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]); | |
239 | ||
240 | for (i = 0; i < TWL6040_VIOREGNUM; i++) { | |
241 | reg = twl6040_vio_reg[i]; | |
242 | /* skip read-only registers (ASICID, ASICREV, STATUS) */ | |
243 | switch (reg) { | |
244 | case TWL6040_REG_ASICID: | |
245 | case TWL6040_REG_ASICREV: | |
246 | case TWL6040_REG_STATUS: | |
247 | continue; | |
248 | default: | |
249 | break; | |
250 | } | |
251 | twl6040_write(codec, reg, cache[reg]); | |
252 | } | |
253 | } | |
254 | ||
255 | static void twl6040_init_vdd_regs(struct snd_soc_codec *codec) | |
256 | { | |
257 | u8 *cache = codec->reg_cache; | |
258 | int reg, i; | |
259 | ||
260 | for (i = 0; i < TWL6040_VDDREGNUM; i++) { | |
261 | reg = twl6040_vdd_reg[i]; | |
262 | twl6040_write(codec, reg, cache[reg]); | |
263 | } | |
264 | } | |
265 | ||
266 | /* twl6040 codec manual power-up sequence */ | |
267 | static void twl6040_power_up(struct snd_soc_codec *codec) | |
268 | { | |
269 | u8 ncpctl, ldoctl, lppllctl, accctl; | |
270 | ||
271 | ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL); | |
272 | ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL); | |
273 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | |
274 | accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL); | |
275 | ||
276 | /* enable reference system */ | |
277 | ldoctl |= TWL6040_REFENA; | |
278 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
279 | msleep(10); | |
280 | /* enable internal oscillator */ | |
281 | ldoctl |= TWL6040_OSCENA; | |
282 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
283 | udelay(10); | |
284 | /* enable high-side ldo */ | |
285 | ldoctl |= TWL6040_HSLDOENA; | |
286 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
287 | udelay(244); | |
288 | /* enable negative charge pump */ | |
289 | ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN; | |
290 | twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl); | |
291 | udelay(488); | |
292 | /* enable low-side ldo */ | |
293 | ldoctl |= TWL6040_LSLDOENA; | |
294 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
295 | udelay(244); | |
296 | /* enable low-power pll */ | |
297 | lppllctl |= TWL6040_LPLLENA; | |
298 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
299 | /* reset state machine */ | |
300 | accctl |= TWL6040_RESETSPLIT; | |
301 | twl6040_write(codec, TWL6040_REG_ACCCTL, accctl); | |
302 | mdelay(5); | |
303 | accctl &= ~TWL6040_RESETSPLIT; | |
304 | twl6040_write(codec, TWL6040_REG_ACCCTL, accctl); | |
305 | /* disable internal oscillator */ | |
306 | ldoctl &= ~TWL6040_OSCENA; | |
307 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
308 | } | |
309 | ||
310 | /* twl6040 codec manual power-down sequence */ | |
311 | static void twl6040_power_down(struct snd_soc_codec *codec) | |
312 | { | |
313 | u8 ncpctl, ldoctl, lppllctl, accctl; | |
314 | ||
315 | ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL); | |
316 | ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL); | |
317 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | |
318 | accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL); | |
319 | ||
320 | /* enable internal oscillator */ | |
321 | ldoctl |= TWL6040_OSCENA; | |
322 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
323 | udelay(10); | |
324 | /* disable low-power pll */ | |
325 | lppllctl &= ~TWL6040_LPLLENA; | |
326 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
327 | /* disable low-side ldo */ | |
328 | ldoctl &= ~TWL6040_LSLDOENA; | |
329 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
330 | udelay(244); | |
331 | /* disable negative charge pump */ | |
332 | ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN); | |
333 | twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl); | |
334 | udelay(488); | |
335 | /* disable high-side ldo */ | |
336 | ldoctl &= ~TWL6040_HSLDOENA; | |
337 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
338 | udelay(244); | |
339 | /* disable internal oscillator */ | |
340 | ldoctl &= ~TWL6040_OSCENA; | |
341 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
342 | /* disable reference system */ | |
343 | ldoctl &= ~TWL6040_REFENA; | |
344 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | |
345 | msleep(10); | |
346 | } | |
347 | ||
348 | /* set headset dac and driver power mode */ | |
349 | static int headset_power_mode(struct snd_soc_codec *codec, int high_perf) | |
350 | { | |
351 | int hslctl, hsrctl; | |
352 | int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL; | |
353 | ||
354 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | |
355 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | |
356 | ||
357 | if (high_perf) { | |
358 | hslctl &= ~mask; | |
359 | hsrctl &= ~mask; | |
360 | } else { | |
361 | hslctl |= mask; | |
362 | hsrctl |= mask; | |
363 | } | |
364 | ||
365 | twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl); | |
366 | twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl); | |
367 | ||
368 | return 0; | |
369 | } | |
370 | ||
0fad4ed7 JEC |
371 | static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w, |
372 | struct snd_kcontrol *kcontrol, int event) | |
373 | { | |
374 | msleep(1); | |
375 | return 0; | |
376 | } | |
377 | ||
8ecbabd9 MLC |
378 | static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w, |
379 | struct snd_kcontrol *kcontrol, int event) | |
380 | { | |
381 | struct snd_soc_codec *codec = w->codec; | |
d4a8ca24 | 382 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
383 | |
384 | if (SND_SOC_DAPM_EVENT_ON(event)) | |
385 | priv->non_lp++; | |
386 | else | |
387 | priv->non_lp--; | |
388 | ||
0fad4ed7 JEC |
389 | msleep(1); |
390 | ||
8ecbabd9 MLC |
391 | return 0; |
392 | } | |
393 | ||
a2d2362e JEC |
394 | void twl6040_hs_jack_report(struct snd_soc_codec *codec, |
395 | struct snd_soc_jack *jack, int report) | |
396 | { | |
397 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
398 | int status; | |
399 | ||
400 | mutex_lock(&priv->mutex); | |
401 | ||
402 | /* Sync status */ | |
403 | status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS); | |
404 | if (status & TWL6040_PLUGCOMP) | |
405 | snd_soc_jack_report(jack, report, report); | |
406 | else | |
407 | snd_soc_jack_report(jack, 0, report); | |
408 | ||
409 | mutex_unlock(&priv->mutex); | |
410 | } | |
411 | ||
412 | void twl6040_hs_jack_detect(struct snd_soc_codec *codec, | |
413 | struct snd_soc_jack *jack, int report) | |
414 | { | |
415 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
416 | struct twl6040_jack_data *hs_jack = &priv->hs_jack; | |
417 | ||
418 | hs_jack->jack = jack; | |
419 | hs_jack->report = report; | |
420 | ||
421 | twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report); | |
422 | } | |
423 | EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect); | |
424 | ||
425 | static void twl6040_accessory_work(struct work_struct *work) | |
426 | { | |
427 | struct twl6040_data *priv = container_of(work, | |
428 | struct twl6040_data, delayed_work.work); | |
429 | struct snd_soc_codec *codec = priv->codec; | |
430 | struct twl6040_jack_data *hs_jack = &priv->hs_jack; | |
431 | ||
432 | twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report); | |
433 | } | |
434 | ||
8ecbabd9 MLC |
435 | /* audio interrupt handler */ |
436 | static irqreturn_t twl6040_naudint_handler(int irq, void *data) | |
437 | { | |
438 | struct snd_soc_codec *codec = data; | |
d4a8ca24 | 439 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
440 | u8 intid; |
441 | ||
0dec1ec7 | 442 | twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID); |
8ecbabd9 | 443 | |
cf370a5a | 444 | if (intid & TWL6040_THINT) |
8ecbabd9 | 445 | dev_alert(codec->dev, "die temp over-limit detection\n"); |
cf370a5a OM |
446 | |
447 | if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT)) | |
a2d2362e JEC |
448 | queue_delayed_work(priv->workqueue, &priv->delayed_work, |
449 | msecs_to_jiffies(200)); | |
cf370a5a OM |
450 | |
451 | if (intid & TWL6040_HOOKINT) | |
452 | dev_info(codec->dev, "hook detection\n"); | |
453 | ||
454 | if (intid & TWL6040_HFINT) | |
8ecbabd9 | 455 | dev_alert(codec->dev, "hf drivers over current detection\n"); |
cf370a5a OM |
456 | |
457 | if (intid & TWL6040_VIBINT) | |
8ecbabd9 | 458 | dev_alert(codec->dev, "vib drivers over current detection\n"); |
cf370a5a OM |
459 | |
460 | if (intid & TWL6040_READYINT) | |
8ecbabd9 | 461 | complete(&priv->ready); |
8ecbabd9 MLC |
462 | |
463 | return IRQ_HANDLED; | |
464 | } | |
465 | ||
466 | /* | |
467 | * MICATT volume control: | |
468 | * from -6 to 0 dB in 6 dB steps | |
469 | */ | |
470 | static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0); | |
471 | ||
472 | /* | |
473 | * MICGAIN volume control: | |
9020808b | 474 | * from -6 to 30 dB in 6 dB steps |
8ecbabd9 | 475 | */ |
9020808b | 476 | static DECLARE_TLV_DB_SCALE(mic_amp_tlv, -600, 600, 0); |
8ecbabd9 | 477 | |
370a0314 JEC |
478 | /* |
479 | * AFMGAIN volume control: | |
480 | * from 18 to 24 dB in 6 dB steps | |
481 | */ | |
482 | static DECLARE_TLV_DB_SCALE(afm_amp_tlv, 1800, 600, 0); | |
483 | ||
8ecbabd9 MLC |
484 | /* |
485 | * HSGAIN volume control: | |
486 | * from -30 to 0 dB in 2 dB steps | |
487 | */ | |
488 | static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0); | |
489 | ||
490 | /* | |
491 | * HFGAIN volume control: | |
492 | * from -52 to 6 dB in 2 dB steps | |
493 | */ | |
494 | static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0); | |
495 | ||
871a05a7 JEC |
496 | /* |
497 | * EPGAIN volume control: | |
498 | * from -24 to 6 dB in 2 dB steps | |
499 | */ | |
500 | static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0); | |
501 | ||
8ecbabd9 MLC |
502 | /* Left analog microphone selection */ |
503 | static const char *twl6040_amicl_texts[] = | |
504 | {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"}; | |
505 | ||
506 | /* Right analog microphone selection */ | |
507 | static const char *twl6040_amicr_texts[] = | |
508 | {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"}; | |
509 | ||
510 | static const struct soc_enum twl6040_enum[] = { | |
cb973d78 FM |
511 | SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts), |
512 | SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts), | |
8ecbabd9 MLC |
513 | }; |
514 | ||
370a0314 JEC |
515 | static const char *twl6040_hs_texts[] = { |
516 | "Off", "HS DAC", "Line-In amp" | |
517 | }; | |
518 | ||
519 | static const struct soc_enum twl6040_hs_enum[] = { | |
520 | SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts), | |
521 | twl6040_hs_texts), | |
522 | SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts), | |
523 | twl6040_hs_texts), | |
524 | }; | |
525 | ||
526 | static const char *twl6040_hf_texts[] = { | |
527 | "Off", "HF DAC", "Line-In amp" | |
528 | }; | |
529 | ||
530 | static const struct soc_enum twl6040_hf_enum[] = { | |
531 | SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts), | |
532 | twl6040_hf_texts), | |
533 | SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts), | |
534 | twl6040_hf_texts), | |
535 | }; | |
536 | ||
8ecbabd9 MLC |
537 | static const struct snd_kcontrol_new amicl_control = |
538 | SOC_DAPM_ENUM("Route", twl6040_enum[0]); | |
539 | ||
540 | static const struct snd_kcontrol_new amicr_control = | |
541 | SOC_DAPM_ENUM("Route", twl6040_enum[1]); | |
542 | ||
543 | /* Headset DAC playback switches */ | |
370a0314 JEC |
544 | static const struct snd_kcontrol_new hsl_mux_controls = |
545 | SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]); | |
8ecbabd9 | 546 | |
370a0314 JEC |
547 | static const struct snd_kcontrol_new hsr_mux_controls = |
548 | SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]); | |
8ecbabd9 MLC |
549 | |
550 | /* Handsfree DAC playback switches */ | |
370a0314 JEC |
551 | static const struct snd_kcontrol_new hfl_mux_controls = |
552 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]); | |
8ecbabd9 | 553 | |
370a0314 JEC |
554 | static const struct snd_kcontrol_new hfr_mux_controls = |
555 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]); | |
8ecbabd9 | 556 | |
871a05a7 JEC |
557 | static const struct snd_kcontrol_new ep_driver_switch_controls = |
558 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0); | |
559 | ||
8ecbabd9 MLC |
560 | static const struct snd_kcontrol_new twl6040_snd_controls[] = { |
561 | /* Capture gains */ | |
562 | SOC_DOUBLE_TLV("Capture Preamplifier Volume", | |
563 | TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv), | |
564 | SOC_DOUBLE_TLV("Capture Volume", | |
565 | TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv), | |
566 | ||
370a0314 JEC |
567 | /* AFM gains */ |
568 | SOC_DOUBLE_TLV("Aux FM Volume", | |
53a9ef15 | 569 | TWL6040_REG_LINEGAIN, 0, 4, 0xF, 0, afm_amp_tlv), |
370a0314 | 570 | |
8ecbabd9 MLC |
571 | /* Playback gains */ |
572 | SOC_DOUBLE_TLV("Headset Playback Volume", | |
573 | TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv), | |
574 | SOC_DOUBLE_R_TLV("Handsfree Playback Volume", | |
575 | TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv), | |
871a05a7 JEC |
576 | SOC_SINGLE_TLV("Earphone Playback Volume", |
577 | TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv), | |
8ecbabd9 MLC |
578 | }; |
579 | ||
580 | static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { | |
581 | /* Inputs */ | |
582 | SND_SOC_DAPM_INPUT("MAINMIC"), | |
583 | SND_SOC_DAPM_INPUT("HSMIC"), | |
584 | SND_SOC_DAPM_INPUT("SUBMIC"), | |
585 | SND_SOC_DAPM_INPUT("AFML"), | |
586 | SND_SOC_DAPM_INPUT("AFMR"), | |
587 | ||
588 | /* Outputs */ | |
589 | SND_SOC_DAPM_OUTPUT("HSOL"), | |
590 | SND_SOC_DAPM_OUTPUT("HSOR"), | |
591 | SND_SOC_DAPM_OUTPUT("HFL"), | |
592 | SND_SOC_DAPM_OUTPUT("HFR"), | |
871a05a7 | 593 | SND_SOC_DAPM_OUTPUT("EP"), |
8ecbabd9 MLC |
594 | |
595 | /* Analog input muxes for the capture amplifiers */ | |
596 | SND_SOC_DAPM_MUX("Analog Left Capture Route", | |
597 | SND_SOC_NOPM, 0, 0, &amicl_control), | |
598 | SND_SOC_DAPM_MUX("Analog Right Capture Route", | |
599 | SND_SOC_NOPM, 0, 0, &amicr_control), | |
600 | ||
601 | /* Analog capture PGAs */ | |
602 | SND_SOC_DAPM_PGA("MicAmpL", | |
603 | TWL6040_REG_MICLCTL, 0, 0, NULL, 0), | |
604 | SND_SOC_DAPM_PGA("MicAmpR", | |
605 | TWL6040_REG_MICRCTL, 0, 0, NULL, 0), | |
606 | ||
370a0314 JEC |
607 | /* Auxiliary FM PGAs */ |
608 | SND_SOC_DAPM_PGA("AFMAmpL", | |
609 | TWL6040_REG_MICLCTL, 1, 0, NULL, 0), | |
610 | SND_SOC_DAPM_PGA("AFMAmpR", | |
611 | TWL6040_REG_MICRCTL, 1, 0, NULL, 0), | |
612 | ||
8ecbabd9 MLC |
613 | /* ADCs */ |
614 | SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture", | |
615 | TWL6040_REG_MICLCTL, 2, 0), | |
616 | SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture", | |
617 | TWL6040_REG_MICRCTL, 2, 0), | |
618 | ||
619 | /* Microphone bias */ | |
620 | SND_SOC_DAPM_MICBIAS("Headset Mic Bias", | |
621 | TWL6040_REG_AMICBCTL, 0, 0), | |
622 | SND_SOC_DAPM_MICBIAS("Main Mic Bias", | |
623 | TWL6040_REG_AMICBCTL, 4, 0), | |
624 | SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias", | |
625 | TWL6040_REG_DMICBCTL, 0, 0), | |
626 | SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias", | |
627 | TWL6040_REG_DMICBCTL, 4, 0), | |
628 | ||
629 | /* DACs */ | |
0fad4ed7 JEC |
630 | SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback", |
631 | TWL6040_REG_HSLCTL, 0, 0, | |
632 | twl6040_hs_dac_event, | |
633 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
634 | SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback", | |
635 | TWL6040_REG_HSRCTL, 0, 0, | |
636 | twl6040_hs_dac_event, | |
637 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
8ecbabd9 MLC |
638 | SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback", |
639 | TWL6040_REG_HFLCTL, 0, 0, | |
640 | twl6040_power_mode_event, | |
641 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
642 | SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback", | |
643 | TWL6040_REG_HFRCTL, 0, 0, | |
644 | twl6040_power_mode_event, | |
645 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
646 | ||
370a0314 JEC |
647 | SND_SOC_DAPM_MUX("HF Left Playback", |
648 | SND_SOC_NOPM, 0, 0, &hfl_mux_controls), | |
649 | SND_SOC_DAPM_MUX("HF Right Playback", | |
650 | SND_SOC_NOPM, 0, 0, &hfr_mux_controls), | |
651 | /* Analog playback Muxes */ | |
652 | SND_SOC_DAPM_MUX("HS Left Playback", | |
653 | SND_SOC_NOPM, 0, 0, &hsl_mux_controls), | |
654 | SND_SOC_DAPM_MUX("HS Right Playback", | |
655 | SND_SOC_NOPM, 0, 0, &hsr_mux_controls), | |
8ecbabd9 | 656 | |
0fad4ed7 JEC |
657 | /* Analog playback drivers */ |
658 | SND_SOC_DAPM_PGA_E("Handsfree Left Driver", | |
659 | TWL6040_REG_HFLCTL, 4, 0, NULL, 0, | |
8ecbabd9 MLC |
660 | twl6040_power_mode_event, |
661 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
0fad4ed7 JEC |
662 | SND_SOC_DAPM_PGA_E("Handsfree Right Driver", |
663 | TWL6040_REG_HFRCTL, 4, 0, NULL, 0, | |
8ecbabd9 MLC |
664 | twl6040_power_mode_event, |
665 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
0fad4ed7 JEC |
666 | SND_SOC_DAPM_PGA("Headset Left Driver", |
667 | TWL6040_REG_HSLCTL, 2, 0, NULL, 0), | |
668 | SND_SOC_DAPM_PGA("Headset Right Driver", | |
669 | TWL6040_REG_HSRCTL, 2, 0, NULL, 0), | |
871a05a7 JEC |
670 | SND_SOC_DAPM_SWITCH_E("Earphone Driver", |
671 | SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls, | |
672 | twl6040_power_mode_event, | |
673 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
8ecbabd9 MLC |
674 | |
675 | /* Analog playback PGAs */ | |
676 | SND_SOC_DAPM_PGA("HFDAC Left PGA", | |
677 | TWL6040_REG_HFLCTL, 1, 0, NULL, 0), | |
678 | SND_SOC_DAPM_PGA("HFDAC Right PGA", | |
679 | TWL6040_REG_HFRCTL, 1, 0, NULL, 0), | |
680 | ||
681 | }; | |
682 | ||
683 | static const struct snd_soc_dapm_route intercon[] = { | |
684 | /* Capture path */ | |
685 | {"Analog Left Capture Route", "Headset Mic", "HSMIC"}, | |
686 | {"Analog Left Capture Route", "Main Mic", "MAINMIC"}, | |
687 | {"Analog Left Capture Route", "Aux/FM Left", "AFML"}, | |
688 | ||
689 | {"Analog Right Capture Route", "Headset Mic", "HSMIC"}, | |
690 | {"Analog Right Capture Route", "Sub Mic", "SUBMIC"}, | |
691 | {"Analog Right Capture Route", "Aux/FM Right", "AFMR"}, | |
692 | ||
693 | {"MicAmpL", NULL, "Analog Left Capture Route"}, | |
694 | {"MicAmpR", NULL, "Analog Right Capture Route"}, | |
695 | ||
696 | {"ADC Left", NULL, "MicAmpL"}, | |
697 | {"ADC Right", NULL, "MicAmpR"}, | |
698 | ||
370a0314 JEC |
699 | /* AFM path */ |
700 | {"AFMAmpL", "NULL", "AFML"}, | |
701 | {"AFMAmpR", "NULL", "AFMR"}, | |
702 | ||
703 | {"HS Left Playback", "HS DAC", "HSDAC Left"}, | |
704 | {"HS Left Playback", "Line-In amp", "AFMAmpL"}, | |
8ecbabd9 | 705 | |
370a0314 JEC |
706 | {"HS Right Playback", "HS DAC", "HSDAC Right"}, |
707 | {"HS Right Playback", "Line-In amp", "AFMAmpR"}, | |
708 | ||
709 | {"Headset Left Driver", "NULL", "HS Left Playback"}, | |
710 | {"Headset Right Driver", "NULL", "HS Right Playback"}, | |
8ecbabd9 MLC |
711 | |
712 | {"HSOL", NULL, "Headset Left Driver"}, | |
713 | {"HSOR", NULL, "Headset Right Driver"}, | |
714 | ||
871a05a7 JEC |
715 | /* Earphone playback path */ |
716 | {"Earphone Driver", "Switch", "HSDAC Left"}, | |
717 | {"EP", NULL, "Earphone Driver"}, | |
718 | ||
370a0314 JEC |
719 | {"HF Left Playback", "HF DAC", "HFDAC Left"}, |
720 | {"HF Left Playback", "Line-In amp", "AFMAmpL"}, | |
721 | ||
722 | {"HF Right Playback", "HF DAC", "HFDAC Right"}, | |
723 | {"HF Right Playback", "Line-In amp", "AFMAmpR"}, | |
8ecbabd9 | 724 | |
370a0314 JEC |
725 | {"HFDAC Left PGA", NULL, "HF Left Playback"}, |
726 | {"HFDAC Right PGA", NULL, "HF Right Playback"}, | |
8ecbabd9 MLC |
727 | |
728 | {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"}, | |
729 | {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"}, | |
730 | ||
731 | {"HFL", NULL, "Handsfree Left Driver"}, | |
732 | {"HFR", NULL, "Handsfree Right Driver"}, | |
733 | }; | |
734 | ||
735 | static int twl6040_add_widgets(struct snd_soc_codec *codec) | |
736 | { | |
ce6120cc | 737 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
8ecbabd9 | 738 | |
ce6120cc LG |
739 | snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets, |
740 | ARRAY_SIZE(twl6040_dapm_widgets)); | |
741 | snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); | |
742 | snd_soc_dapm_new_widgets(dapm); | |
8ecbabd9 MLC |
743 | |
744 | return 0; | |
745 | } | |
746 | ||
747 | static int twl6040_power_up_completion(struct snd_soc_codec *codec, | |
748 | int naudint) | |
749 | { | |
d4a8ca24 | 750 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
751 | int time_left; |
752 | u8 intid; | |
753 | ||
754 | time_left = wait_for_completion_timeout(&priv->ready, | |
cbd9cb5d | 755 | msecs_to_jiffies(144)); |
8ecbabd9 MLC |
756 | |
757 | if (!time_left) { | |
0dec1ec7 | 758 | twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid, |
8ecbabd9 MLC |
759 | TWL6040_REG_INTID); |
760 | if (!(intid & TWL6040_READYINT)) { | |
761 | dev_err(codec->dev, "timeout waiting for READYINT\n"); | |
762 | return -ETIMEDOUT; | |
763 | } | |
764 | } | |
765 | ||
766 | priv->codec_powered = 1; | |
767 | ||
768 | return 0; | |
769 | } | |
770 | ||
771 | static int twl6040_set_bias_level(struct snd_soc_codec *codec, | |
772 | enum snd_soc_bias_level level) | |
773 | { | |
d4a8ca24 | 774 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
775 | int audpwron = priv->audpwron; |
776 | int naudint = priv->naudint; | |
777 | int ret; | |
778 | ||
779 | switch (level) { | |
780 | case SND_SOC_BIAS_ON: | |
781 | break; | |
782 | case SND_SOC_BIAS_PREPARE: | |
783 | break; | |
784 | case SND_SOC_BIAS_STANDBY: | |
785 | if (priv->codec_powered) | |
786 | break; | |
787 | ||
788 | if (gpio_is_valid(audpwron)) { | |
789 | /* use AUDPWRON line */ | |
790 | gpio_set_value(audpwron, 1); | |
791 | ||
792 | /* wait for power-up completion */ | |
793 | ret = twl6040_power_up_completion(codec, naudint); | |
794 | if (ret) | |
795 | return ret; | |
796 | ||
797 | /* sync registers updated during power-up sequence */ | |
798 | twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL); | |
799 | twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL); | |
800 | twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL); | |
801 | } else { | |
802 | /* use manual power-up sequence */ | |
803 | twl6040_power_up(codec); | |
804 | priv->codec_powered = 1; | |
805 | } | |
806 | ||
807 | /* initialize vdd/vss registers with reg_cache */ | |
808 | twl6040_init_vdd_regs(codec); | |
65b7cecc OM |
809 | |
810 | /* Set external boost GPO */ | |
811 | twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02); | |
812 | ||
813 | /* Set initial minimal gain values */ | |
814 | twl6040_write(codec, TWL6040_REG_HSGAIN, 0xFF); | |
815 | twl6040_write(codec, TWL6040_REG_EARCTL, 0x1E); | |
816 | twl6040_write(codec, TWL6040_REG_HFLGAIN, 0x1D); | |
817 | twl6040_write(codec, TWL6040_REG_HFRGAIN, 0x1D); | |
8ecbabd9 MLC |
818 | break; |
819 | case SND_SOC_BIAS_OFF: | |
820 | if (!priv->codec_powered) | |
821 | break; | |
822 | ||
823 | if (gpio_is_valid(audpwron)) { | |
824 | /* use AUDPWRON line */ | |
825 | gpio_set_value(audpwron, 0); | |
826 | ||
827 | /* power-down sequence latency */ | |
828 | udelay(500); | |
829 | ||
830 | /* sync registers updated during power-down sequence */ | |
831 | twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL); | |
832 | twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL); | |
833 | twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL, | |
834 | 0x00); | |
835 | } else { | |
836 | /* use manual power-down sequence */ | |
837 | twl6040_power_down(codec); | |
838 | } | |
839 | ||
840 | priv->codec_powered = 0; | |
841 | break; | |
842 | } | |
843 | ||
ce6120cc | 844 | codec->dapm.bias_level = level; |
8ecbabd9 MLC |
845 | |
846 | return 0; | |
847 | } | |
848 | ||
849 | /* set of rates for each pll: low-power and high-performance */ | |
850 | ||
851 | static unsigned int lp_rates[] = { | |
852 | 88200, | |
853 | 96000, | |
854 | }; | |
855 | ||
856 | static struct snd_pcm_hw_constraint_list lp_constraints = { | |
857 | .count = ARRAY_SIZE(lp_rates), | |
858 | .list = lp_rates, | |
859 | }; | |
860 | ||
861 | static unsigned int hp_rates[] = { | |
862 | 96000, | |
863 | }; | |
864 | ||
865 | static struct snd_pcm_hw_constraint_list hp_constraints = { | |
866 | .count = ARRAY_SIZE(hp_rates), | |
867 | .list = hp_rates, | |
868 | }; | |
869 | ||
870 | static int twl6040_startup(struct snd_pcm_substream *substream, | |
871 | struct snd_soc_dai *dai) | |
872 | { | |
873 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 874 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 875 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 876 | |
8ecbabd9 MLC |
877 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
878 | SNDRV_PCM_HW_PARAM_RATE, | |
879 | priv->sysclk_constraints); | |
880 | ||
881 | return 0; | |
882 | } | |
883 | ||
884 | static int twl6040_hw_params(struct snd_pcm_substream *substream, | |
885 | struct snd_pcm_hw_params *params, | |
886 | struct snd_soc_dai *dai) | |
887 | { | |
888 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 889 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 890 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
891 | u8 lppllctl; |
892 | int rate; | |
893 | ||
894 | /* nothing to do for high-perf pll, it supports only 48 kHz */ | |
895 | if (priv->pll == TWL6040_HPPLL_ID) | |
896 | return 0; | |
897 | ||
898 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | |
899 | ||
900 | rate = params_rate(params); | |
901 | switch (rate) { | |
60ea4cec OM |
902 | case 11250: |
903 | case 22500: | |
904 | case 44100: | |
8ecbabd9 MLC |
905 | case 88200: |
906 | lppllctl |= TWL6040_LPLLFIN; | |
907 | priv->sysclk = 17640000; | |
908 | break; | |
60ea4cec OM |
909 | case 8000: |
910 | case 16000: | |
911 | case 32000: | |
912 | case 48000: | |
8ecbabd9 MLC |
913 | case 96000: |
914 | lppllctl &= ~TWL6040_LPLLFIN; | |
915 | priv->sysclk = 19200000; | |
916 | break; | |
917 | default: | |
918 | dev_err(codec->dev, "unsupported rate %d\n", rate); | |
919 | return -EINVAL; | |
920 | } | |
921 | ||
922 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
923 | ||
924 | return 0; | |
925 | } | |
926 | ||
4e624d06 OM |
927 | static int twl6040_prepare(struct snd_pcm_substream *substream, |
928 | struct snd_soc_dai *dai) | |
8ecbabd9 MLC |
929 | { |
930 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 931 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 932 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 933 | |
4e624d06 OM |
934 | if (!priv->sysclk) { |
935 | dev_err(codec->dev, | |
936 | "no mclk configured, call set_sysclk() on init\n"); | |
937 | return -EINVAL; | |
938 | } | |
939 | ||
940 | /* | |
941 | * capture is not supported at 17.64 MHz, | |
942 | * it's reserved for headset low-power playback scenario | |
943 | */ | |
944 | if ((priv->sysclk == 17640000) && | |
945 | substream->stream == SNDRV_PCM_STREAM_CAPTURE) { | |
946 | dev_err(codec->dev, | |
947 | "capture mode is not supported at %dHz\n", | |
948 | priv->sysclk); | |
949 | return -EINVAL; | |
950 | } | |
951 | ||
952 | if ((priv->sysclk == 17640000) && priv->non_lp) { | |
8ecbabd9 MLC |
953 | dev_err(codec->dev, |
954 | "some enabled paths aren't supported at %dHz\n", | |
955 | priv->sysclk); | |
956 | return -EPERM; | |
8ecbabd9 | 957 | } |
8ecbabd9 MLC |
958 | return 0; |
959 | } | |
960 | ||
961 | static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
962 | int clk_id, unsigned int freq, int dir) | |
963 | { | |
964 | struct snd_soc_codec *codec = codec_dai->codec; | |
d4a8ca24 | 965 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
966 | u8 hppllctl, lppllctl; |
967 | ||
968 | hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL); | |
969 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | |
970 | ||
971 | switch (clk_id) { | |
972 | case TWL6040_SYSCLK_SEL_LPPLL: | |
973 | switch (freq) { | |
974 | case 32768: | |
975 | /* headset dac and driver must be in low-power mode */ | |
976 | headset_power_mode(codec, 0); | |
977 | ||
978 | /* clk32k input requires low-power pll */ | |
979 | lppllctl |= TWL6040_LPLLENA; | |
980 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
981 | mdelay(5); | |
982 | lppllctl &= ~TWL6040_HPLLSEL; | |
983 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
984 | hppllctl &= ~TWL6040_HPLLENA; | |
985 | twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl); | |
986 | break; | |
987 | default: | |
988 | dev_err(codec->dev, "unknown mclk freq %d\n", freq); | |
989 | return -EINVAL; | |
990 | } | |
991 | ||
992 | /* lppll divider */ | |
993 | switch (priv->sysclk) { | |
994 | case 17640000: | |
995 | lppllctl |= TWL6040_LPLLFIN; | |
996 | break; | |
997 | case 19200000: | |
998 | lppllctl &= ~TWL6040_LPLLFIN; | |
999 | break; | |
1000 | default: | |
1001 | /* sysclk not yet configured */ | |
1002 | lppllctl &= ~TWL6040_LPLLFIN; | |
1003 | priv->sysclk = 19200000; | |
1004 | break; | |
1005 | } | |
1006 | ||
1007 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
1008 | ||
1009 | priv->pll = TWL6040_LPPLL_ID; | |
1010 | priv->sysclk_constraints = &lp_constraints; | |
1011 | break; | |
1012 | case TWL6040_SYSCLK_SEL_HPPLL: | |
1013 | hppllctl &= ~TWL6040_MCLK_MSK; | |
1014 | ||
1015 | switch (freq) { | |
1016 | case 12000000: | |
1017 | /* mclk input, pll enabled */ | |
1018 | hppllctl |= TWL6040_MCLK_12000KHZ | | |
1019 | TWL6040_HPLLSQRBP | | |
1020 | TWL6040_HPLLENA; | |
1021 | break; | |
1022 | case 19200000: | |
1023 | /* mclk input, pll disabled */ | |
1024 | hppllctl |= TWL6040_MCLK_19200KHZ | | |
44ebaa5d | 1025 | TWL6040_HPLLSQRENA | |
8ecbabd9 MLC |
1026 | TWL6040_HPLLBP; |
1027 | break; | |
1028 | case 26000000: | |
1029 | /* mclk input, pll enabled */ | |
1030 | hppllctl |= TWL6040_MCLK_26000KHZ | | |
1031 | TWL6040_HPLLSQRBP | | |
1032 | TWL6040_HPLLENA; | |
1033 | break; | |
1034 | case 38400000: | |
1035 | /* clk slicer, pll disabled */ | |
1036 | hppllctl |= TWL6040_MCLK_38400KHZ | | |
1037 | TWL6040_HPLLSQRENA | | |
1038 | TWL6040_HPLLBP; | |
1039 | break; | |
1040 | default: | |
1041 | dev_err(codec->dev, "unknown mclk freq %d\n", freq); | |
1042 | return -EINVAL; | |
1043 | } | |
1044 | ||
1045 | /* headset dac and driver must be in high-performance mode */ | |
1046 | headset_power_mode(codec, 1); | |
1047 | ||
1048 | twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl); | |
1049 | udelay(500); | |
1050 | lppllctl |= TWL6040_HPLLSEL; | |
1051 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
1052 | lppllctl &= ~TWL6040_LPLLENA; | |
1053 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | |
1054 | ||
1055 | /* high-performance pll can provide only 19.2 MHz */ | |
1056 | priv->pll = TWL6040_HPPLL_ID; | |
1057 | priv->sysclk = 19200000; | |
1058 | priv->sysclk_constraints = &hp_constraints; | |
1059 | break; | |
1060 | default: | |
1061 | dev_err(codec->dev, "unknown clk_id %d\n", clk_id); | |
1062 | return -EINVAL; | |
1063 | } | |
1064 | ||
1065 | return 0; | |
1066 | } | |
1067 | ||
1068 | static struct snd_soc_dai_ops twl6040_dai_ops = { | |
1069 | .startup = twl6040_startup, | |
1070 | .hw_params = twl6040_hw_params, | |
4e624d06 | 1071 | .prepare = twl6040_prepare, |
8ecbabd9 MLC |
1072 | .set_sysclk = twl6040_set_dai_sysclk, |
1073 | }; | |
1074 | ||
f0fba2ad LG |
1075 | static struct snd_soc_dai_driver twl6040_dai = { |
1076 | .name = "twl6040-hifi", | |
8ecbabd9 MLC |
1077 | .playback = { |
1078 | .stream_name = "Playback", | |
1079 | .channels_min = 1, | |
1080 | .channels_max = 4, | |
1081 | .rates = TWL6040_RATES, | |
1082 | .formats = TWL6040_FORMATS, | |
1083 | }, | |
1084 | .capture = { | |
1085 | .stream_name = "Capture", | |
1086 | .channels_min = 1, | |
1087 | .channels_max = 2, | |
1088 | .rates = TWL6040_RATES, | |
1089 | .formats = TWL6040_FORMATS, | |
1090 | }, | |
1091 | .ops = &twl6040_dai_ops, | |
1092 | }; | |
8ecbabd9 MLC |
1093 | |
1094 | #ifdef CONFIG_PM | |
f0fba2ad | 1095 | static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state) |
8ecbabd9 | 1096 | { |
8ecbabd9 MLC |
1097 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1098 | ||
1099 | return 0; | |
1100 | } | |
1101 | ||
f0fba2ad | 1102 | static int twl6040_resume(struct snd_soc_codec *codec) |
8ecbabd9 | 1103 | { |
8ecbabd9 | 1104 | twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
6c311041 | 1105 | twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level); |
8ecbabd9 MLC |
1106 | |
1107 | return 0; | |
1108 | } | |
1109 | #else | |
1110 | #define twl6040_suspend NULL | |
1111 | #define twl6040_resume NULL | |
1112 | #endif | |
1113 | ||
f0fba2ad | 1114 | static int twl6040_probe(struct snd_soc_codec *codec) |
8ecbabd9 | 1115 | { |
f0fba2ad | 1116 | struct twl4030_codec_data *twl_codec = codec->dev->platform_data; |
8ecbabd9 MLC |
1117 | struct twl6040_data *priv; |
1118 | int audpwron, naudint; | |
1119 | int ret = 0; | |
4f44ee1f | 1120 | u8 icrev, intmr = TWL6040_ALLINT_MSK; |
8ecbabd9 MLC |
1121 | |
1122 | priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL); | |
1123 | if (priv == NULL) | |
1124 | return -ENOMEM; | |
f0fba2ad | 1125 | snd_soc_codec_set_drvdata(codec, priv); |
8ecbabd9 | 1126 | |
a2d2362e JEC |
1127 | priv->codec = codec; |
1128 | ||
99903ea2 OM |
1129 | twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &icrev, TWL6040_REG_ASICREV); |
1130 | ||
1131 | if (twl_codec && (icrev > 0)) | |
8ecbabd9 | 1132 | audpwron = twl_codec->audpwron_gpio; |
99903ea2 | 1133 | else |
8ecbabd9 | 1134 | audpwron = -EINVAL; |
99903ea2 OM |
1135 | |
1136 | if (twl_codec) | |
1137 | naudint = twl_codec->naudint_irq; | |
1138 | else | |
8ecbabd9 | 1139 | naudint = 0; |
8ecbabd9 MLC |
1140 | |
1141 | priv->audpwron = audpwron; | |
1142 | priv->naudint = naudint; | |
a2d2362e JEC |
1143 | priv->workqueue = create_singlethread_workqueue("twl6040-codec"); |
1144 | ||
1145 | if (!priv->workqueue) | |
1146 | goto work_err; | |
1147 | ||
1148 | INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work); | |
1149 | ||
1150 | mutex_init(&priv->mutex); | |
8ecbabd9 | 1151 | |
8ecbabd9 MLC |
1152 | init_completion(&priv->ready); |
1153 | ||
1154 | if (gpio_is_valid(audpwron)) { | |
1155 | ret = gpio_request(audpwron, "audpwron"); | |
1156 | if (ret) | |
1157 | goto gpio1_err; | |
1158 | ||
1159 | ret = gpio_direction_output(audpwron, 0); | |
1160 | if (ret) | |
1161 | goto gpio2_err; | |
1162 | ||
1163 | priv->codec_powered = 0; | |
f1f489a6 JEC |
1164 | |
1165 | /* enable only codec ready interrupt */ | |
4f44ee1f | 1166 | intmr &= ~(TWL6040_READYMSK | TWL6040_PLUGMSK); |
f1f489a6 JEC |
1167 | |
1168 | /* reset interrupt status to allow correct power up sequence */ | |
1169 | twl6040_read_reg_volatile(codec, TWL6040_REG_INTID); | |
8ecbabd9 | 1170 | } |
4f44ee1f | 1171 | twl6040_write(codec, TWL6040_REG_INTMR, intmr); |
8ecbabd9 MLC |
1172 | |
1173 | if (naudint) { | |
1174 | /* audio interrupt */ | |
1175 | ret = request_threaded_irq(naudint, NULL, | |
1176 | twl6040_naudint_handler, | |
1177 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
1178 | "twl6040_codec", codec); | |
1179 | if (ret) | |
1180 | goto gpio2_err; | |
8ecbabd9 MLC |
1181 | } |
1182 | ||
1183 | /* init vio registers */ | |
1184 | twl6040_init_vio_regs(codec); | |
1185 | ||
1186 | /* power on device */ | |
1187 | ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
1188 | if (ret) | |
1189 | goto irq_err; | |
1190 | ||
f0fba2ad LG |
1191 | snd_soc_add_controls(codec, twl6040_snd_controls, |
1192 | ARRAY_SIZE(twl6040_snd_controls)); | |
1193 | twl6040_add_widgets(codec); | |
8ecbabd9 MLC |
1194 | |
1195 | return 0; | |
1196 | ||
8ecbabd9 MLC |
1197 | irq_err: |
1198 | if (naudint) | |
1199 | free_irq(naudint, codec); | |
1200 | gpio2_err: | |
1201 | if (gpio_is_valid(audpwron)) | |
1202 | gpio_free(audpwron); | |
1203 | gpio1_err: | |
a2d2362e JEC |
1204 | destroy_workqueue(priv->workqueue); |
1205 | work_err: | |
8ecbabd9 MLC |
1206 | kfree(priv); |
1207 | return ret; | |
1208 | } | |
1209 | ||
f0fba2ad | 1210 | static int twl6040_remove(struct snd_soc_codec *codec) |
8ecbabd9 | 1211 | { |
f0fba2ad | 1212 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
1213 | int audpwron = priv->audpwron; |
1214 | int naudint = priv->naudint; | |
1215 | ||
f0fba2ad LG |
1216 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1217 | ||
8ecbabd9 MLC |
1218 | if (gpio_is_valid(audpwron)) |
1219 | gpio_free(audpwron); | |
1220 | ||
1221 | if (naudint) | |
f0fba2ad | 1222 | free_irq(naudint, codec); |
8ecbabd9 | 1223 | |
a2d2362e | 1224 | destroy_workqueue(priv->workqueue); |
f0fba2ad | 1225 | kfree(priv); |
8ecbabd9 | 1226 | |
f0fba2ad LG |
1227 | return 0; |
1228 | } | |
8ecbabd9 | 1229 | |
f0fba2ad LG |
1230 | static struct snd_soc_codec_driver soc_codec_dev_twl6040 = { |
1231 | .probe = twl6040_probe, | |
1232 | .remove = twl6040_remove, | |
1233 | .suspend = twl6040_suspend, | |
1234 | .resume = twl6040_resume, | |
1235 | .read = twl6040_read_reg_cache, | |
1236 | .write = twl6040_write, | |
1237 | .set_bias_level = twl6040_set_bias_level, | |
1238 | .reg_cache_size = ARRAY_SIZE(twl6040_reg), | |
1239 | .reg_word_size = sizeof(u8), | |
1240 | .reg_cache_default = twl6040_reg, | |
1241 | }; | |
1242 | ||
1243 | static int __devinit twl6040_codec_probe(struct platform_device *pdev) | |
1244 | { | |
1245 | return snd_soc_register_codec(&pdev->dev, | |
1246 | &soc_codec_dev_twl6040, &twl6040_dai, 1); | |
1247 | } | |
1248 | ||
1249 | static int __devexit twl6040_codec_remove(struct platform_device *pdev) | |
1250 | { | |
1251 | snd_soc_unregister_codec(&pdev->dev); | |
8ecbabd9 MLC |
1252 | return 0; |
1253 | } | |
1254 | ||
1255 | static struct platform_driver twl6040_codec_driver = { | |
1256 | .driver = { | |
f0fba2ad | 1257 | .name = "twl6040-codec", |
8ecbabd9 MLC |
1258 | .owner = THIS_MODULE, |
1259 | }, | |
1260 | .probe = twl6040_codec_probe, | |
1261 | .remove = __devexit_p(twl6040_codec_remove), | |
1262 | }; | |
1263 | ||
1264 | static int __init twl6040_codec_init(void) | |
1265 | { | |
1266 | return platform_driver_register(&twl6040_codec_driver); | |
1267 | } | |
1268 | module_init(twl6040_codec_init); | |
1269 | ||
1270 | static void __exit twl6040_codec_exit(void) | |
1271 | { | |
1272 | platform_driver_unregister(&twl6040_codec_driver); | |
1273 | } | |
1274 | module_exit(twl6040_codec_exit); | |
1275 | ||
1276 | MODULE_DESCRIPTION("ASoC TWL6040 codec driver"); | |
1277 | MODULE_AUTHOR("Misael Lopez Cruz"); | |
1278 | MODULE_LICENSE("GPL"); |