ASoC: Writing register default value for the reset register
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC
1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
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31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
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MLC
36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
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MOC
42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
d17bf318
PU
60/* Shadow register used by the driver */
61#define TWL6040_REG_SW_SHADOW 0x2F
62#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
63
317596a6
PU
64/* TWL6040_REG_SW_SHADOW (0x2F) fields */
65#define TWL6040_EAR_PATH_ENABLE 0x01
66
1bf84759
MOC
67struct twl6040_output {
68 u16 active;
69 u16 left_vol;
70 u16 right_vol;
71 u16 left_step;
72 u16 right_step;
73 unsigned int step_delay;
74 u16 ramp;
e71a5e5a 75 struct delayed_work work;
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MOC
76 struct completion ramp_done;
77};
8ecbabd9 78
a2d2362e
JEC
79struct twl6040_jack_data {
80 struct snd_soc_jack *jack;
46dd0b93 81 struct delayed_work work;
a2d2362e
JEC
82 int report;
83};
84
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MLC
85/* codec private data */
86struct twl6040_data {
2a433b9d 87 int plug_irq;
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88 int codec_powered;
89 int pll;
90 int non_lp;
af958c72 91 int pll_power_mode;
6bba63b6
MLC
92 int hs_power_mode;
93 int hs_power_mode_locked;
fb34d3d5 94 unsigned int clk_in;
8ecbabd9 95 unsigned int sysclk;
1fbe9952
ACG
96 u16 hs_left_step;
97 u16 hs_right_step;
98 u16 hf_left_step;
99 u16 hf_right_step;
a2d2362e
JEC
100 struct twl6040_jack_data hs_jack;
101 struct snd_soc_codec *codec;
102 struct workqueue_struct *workqueue;
a2d2362e 103 struct mutex mutex;
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MOC
104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
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MLC
106};
107
108/*
109 * twl6040 register cache & default register settings
110 */
111static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU
112 0x00, /* not used 0x00 */
113 0x4B, /* REG_ASICID 0x01 (ro) */
114 0x00, /* REG_ASICREV 0x02 (ro) */
115 0x00, /* REG_INTID 0x03 */
116 0x00, /* REG_INTMR 0x04 */
117 0x00, /* REG_NCPCTRL 0x05 */
118 0x00, /* REG_LDOCTL 0x06 */
119 0x60, /* REG_HPPLLCTL 0x07 */
120 0x00, /* REG_LPPLLCTL 0x08 */
121 0x4A, /* REG_LPPLLDIV 0x09 */
122 0x00, /* REG_AMICBCTL 0x0A */
123 0x00, /* REG_DMICBCTL 0x0B */
124 0x00, /* REG_MICLCTL 0x0C */
125 0x00, /* REG_MICRCTL 0x0D */
126 0x00, /* REG_MICGAIN 0x0E */
127 0x1B, /* REG_LINEGAIN 0x0F */
128 0x00, /* REG_HSLCTL 0x10 */
129 0x00, /* REG_HSRCTL 0x11 */
130 0x00, /* REG_HSGAIN 0x12 */
131 0x00, /* REG_EARCTL 0x13 */
132 0x00, /* REG_HFLCTL 0x14 */
133 0x00, /* REG_HFLGAIN 0x15 */
134 0x00, /* REG_HFRCTL 0x16 */
135 0x00, /* REG_HFRGAIN 0x17 */
136 0x00, /* REG_VIBCTLL 0x18 */
137 0x00, /* REG_VIBDATL 0x19 */
138 0x00, /* REG_VIBCTLR 0x1A */
139 0x00, /* REG_VIBDATR 0x1B */
140 0x00, /* REG_HKCTL1 0x1C */
141 0x00, /* REG_HKCTL2 0x1D */
142 0x00, /* REG_GPOCTL 0x1E */
143 0x00, /* REG_ALB 0x1F */
144 0x00, /* REG_DLB 0x20 */
145 0x00, /* not used 0x21 */
146 0x00, /* not used 0x22 */
147 0x00, /* not used 0x23 */
148 0x00, /* not used 0x24 */
149 0x00, /* not used 0x25 */
150 0x00, /* not used 0x26 */
151 0x00, /* not used 0x27 */
152 0x00, /* REG_TRIM1 0x28 */
153 0x00, /* REG_TRIM2 0x29 */
154 0x00, /* REG_TRIM3 0x2A */
155 0x00, /* REG_HSOTRIM 0x2B */
156 0x00, /* REG_HFOTRIM 0x2C */
157 0x09, /* REG_ACCCTL 0x2D */
158 0x00, /* REG_STATUS 0x2E (ro) */
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PU
159
160 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
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MLC
161};
162
a52762ee
PU
163/* List of registers to be restored after power up */
164static const int twl6040_restore_list[] = {
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MLC
165 TWL6040_REG_MICLCTL,
166 TWL6040_REG_MICRCTL,
167 TWL6040_REG_MICGAIN,
168 TWL6040_REG_LINEGAIN,
169 TWL6040_REG_HSLCTL,
170 TWL6040_REG_HSRCTL,
171 TWL6040_REG_HSGAIN,
172 TWL6040_REG_EARCTL,
173 TWL6040_REG_HFLCTL,
174 TWL6040_REG_HFLGAIN,
175 TWL6040_REG_HFRCTL,
176 TWL6040_REG_HFRGAIN,
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MLC
177};
178
af958c72
PU
179/* set of rates for each pll: low-power and high-performance */
180static unsigned int lp_rates[] = {
181 8000,
182 11250,
183 16000,
184 22500,
185 32000,
186 44100,
187 48000,
188 88200,
189 96000,
190};
191
af958c72
PU
192static unsigned int hp_rates[] = {
193 8000,
194 16000,
195 32000,
196 48000,
197 96000,
198};
199
f53c346c
PU
200static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
201 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
202 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU
203};
204
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MLC
205/*
206 * read twl6040 register cache
207 */
208static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
209 unsigned int reg)
210{
211 u8 *cache = codec->reg_cache;
212
213 if (reg >= TWL6040_CACHEREGNUM)
214 return -EIO;
215
216 return cache[reg];
217}
218
219/*
220 * write twl6040 register cache
221 */
222static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
223 u8 reg, u8 value)
224{
225 u8 *cache = codec->reg_cache;
226
227 if (reg >= TWL6040_CACHEREGNUM)
228 return;
229 cache[reg] = value;
230}
231
232/*
233 * read from twl6040 hardware register
234 */
235static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
236 unsigned int reg)
237{
fb34d3d5 238 struct twl6040 *twl6040 = codec->control_data;
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MLC
239 u8 value;
240
241 if (reg >= TWL6040_CACHEREGNUM)
242 return -EIO;
243
d17bf318
PU
244 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
245 value = twl6040_reg_read(twl6040, reg);
246 twl6040_write_reg_cache(codec, reg, value);
247 } else {
248 value = twl6040_read_reg_cache(codec, reg);
249 }
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250
251 return value;
252}
253
254/*
255 * write to the twl6040 register space
256 */
257static int twl6040_write(struct snd_soc_codec *codec,
258 unsigned int reg, unsigned int value)
259{
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MLC
260 struct twl6040 *twl6040 = codec->control_data;
261
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MLC
262 if (reg >= TWL6040_CACHEREGNUM)
263 return -EIO;
264
265 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU
266 if (likely(reg < TWL6040_REG_SW_SHADOW))
267 return twl6040_reg_write(twl6040, reg, value);
268 else
269 return 0;
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MLC
270}
271
a52762ee 272static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 273{
a52762ee
PU
274 struct twl6040 *twl6040 = codec->control_data;
275 u8 val;
276
f97217f1 277 /* Update reg_cache: ASICREV, and TRIM values */
a52762ee
PU
278 val = twl6040_get_revid(twl6040);
279 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 280
f97217f1
PU
281 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1);
282 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2);
283 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3);
284 twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM);
285 twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM);
286
2c27ff41
PU
287 /* Change chip defaults */
288 /* No imput selected for microphone amplifiers */
289 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
290 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU
291
292 /*
293 * We need to lower the default gain values, so the ramp code
294 * can work correctly for the first playback.
295 * This reduces the pop noise heard at the first playback.
296 */
297 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
298 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
299 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
300 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
301 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
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MLC
302}
303
a52762ee 304static void twl6040_restore_regs(struct snd_soc_codec *codec)
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MLC
305{
306 u8 *cache = codec->reg_cache;
307 int reg, i;
308
a52762ee
PU
309 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
310 reg = twl6040_restore_list[i];
8ecbabd9
MLC
311 twl6040_write(codec, reg, cache[reg]);
312 }
313}
314
1bf84759
MOC
315/*
316 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
317 */
318static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
319 unsigned int left_step, unsigned int right_step)
320{
321
322 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
323 struct twl6040_output *headset = &priv->headset;
324 int left_complete = 0, right_complete = 0;
325 u8 reg, val;
326
327 /* left channel */
328 left_step = (left_step > 0xF) ? 0xF : left_step;
329 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
330 val = (~reg & TWL6040_HSL_VOL_MASK);
331
332 if (headset->ramp == TWL6040_RAMP_UP) {
333 /* ramp step up */
334 if (val < headset->left_vol) {
1fbe9952
ACG
335 if (val + left_step > headset->left_vol)
336 val = headset->left_vol;
337 else
338 val += left_step;
339
1bf84759
MOC
340 reg &= ~TWL6040_HSL_VOL_MASK;
341 twl6040_write(codec, TWL6040_REG_HSGAIN,
342 (reg | (~val & TWL6040_HSL_VOL_MASK)));
343 } else {
344 left_complete = 1;
345 }
346 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
347 /* ramp step down */
348 if (val > 0x0) {
1fbe9952
ACG
349 if ((int)val - (int)left_step < 0)
350 val = 0;
351 else
352 val -= left_step;
353
1bf84759
MOC
354 reg &= ~TWL6040_HSL_VOL_MASK;
355 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
356 (~val & TWL6040_HSL_VOL_MASK));
357 } else {
358 left_complete = 1;
359 }
360 }
361
362 /* right channel */
363 right_step = (right_step > 0xF) ? 0xF : right_step;
364 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
365 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
366
367 if (headset->ramp == TWL6040_RAMP_UP) {
368 /* ramp step up */
369 if (val < headset->right_vol) {
1fbe9952
ACG
370 if (val + right_step > headset->right_vol)
371 val = headset->right_vol;
372 else
373 val += right_step;
374
1bf84759
MOC
375 reg &= ~TWL6040_HSR_VOL_MASK;
376 twl6040_write(codec, TWL6040_REG_HSGAIN,
377 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
378 } else {
379 right_complete = 1;
380 }
381 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
382 /* ramp step down */
383 if (val > 0x0) {
1fbe9952
ACG
384 if ((int)val - (int)right_step < 0)
385 val = 0;
386 else
387 val -= right_step;
388
1bf84759
MOC
389 reg &= ~TWL6040_HSR_VOL_MASK;
390 twl6040_write(codec, TWL6040_REG_HSGAIN,
391 reg | (~val << TWL6040_HSR_VOL_SHIFT));
392 } else {
393 right_complete = 1;
394 }
395 }
396
397 return left_complete & right_complete;
398}
399
400/*
401 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
402 */
403static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
404 unsigned int left_step, unsigned int right_step)
405{
406 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
407 struct twl6040_output *handsfree = &priv->handsfree;
408 int left_complete = 0, right_complete = 0;
409 u16 reg, val;
410
411 /* left channel */
412 left_step = (left_step > 0x1D) ? 0x1D : left_step;
413 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
414 reg = 0x1D - reg;
415 val = (reg & TWL6040_HF_VOL_MASK);
416 if (handsfree->ramp == TWL6040_RAMP_UP) {
417 /* ramp step up */
418 if (val < handsfree->left_vol) {
1fbe9952
ACG
419 if (val + left_step > handsfree->left_vol)
420 val = handsfree->left_vol;
421 else
422 val += left_step;
423
1bf84759
MOC
424 reg &= ~TWL6040_HF_VOL_MASK;
425 twl6040_write(codec, TWL6040_REG_HFLGAIN,
426 reg | (0x1D - val));
427 } else {
428 left_complete = 1;
429 }
430 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
431 /* ramp step down */
432 if (val > 0) {
1fbe9952
ACG
433 if ((int)val - (int)left_step < 0)
434 val = 0;
435 else
436 val -= left_step;
437
1bf84759
MOC
438 reg &= ~TWL6040_HF_VOL_MASK;
439 twl6040_write(codec, TWL6040_REG_HFLGAIN,
440 reg | (0x1D - val));
441 } else {
442 left_complete = 1;
443 }
444 }
445
446 /* right channel */
447 right_step = (right_step > 0x1D) ? 0x1D : right_step;
448 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
449 reg = 0x1D - reg;
450 val = (reg & TWL6040_HF_VOL_MASK);
451 if (handsfree->ramp == TWL6040_RAMP_UP) {
452 /* ramp step up */
453 if (val < handsfree->right_vol) {
1fbe9952
ACG
454 if (val + right_step > handsfree->right_vol)
455 val = handsfree->right_vol;
456 else
457 val += right_step;
458
1bf84759
MOC
459 reg &= ~TWL6040_HF_VOL_MASK;
460 twl6040_write(codec, TWL6040_REG_HFRGAIN,
461 reg | (0x1D - val));
462 } else {
463 right_complete = 1;
464 }
465 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
466 /* ramp step down */
467 if (val > 0) {
1fbe9952
ACG
468 if ((int)val - (int)right_step < 0)
469 val = 0;
470 else
471 val -= right_step;
472
1bf84759
MOC
473 reg &= ~TWL6040_HF_VOL_MASK;
474 twl6040_write(codec, TWL6040_REG_HFRGAIN,
475 reg | (0x1D - val));
476 }
477 }
478
479 return left_complete & right_complete;
480}
481
482/*
483 * This work ramps both output PGAs at stream start/stop time to
484 * minimise pop associated with DAPM power switching.
485 */
486static void twl6040_pga_hs_work(struct work_struct *work)
487{
488 struct twl6040_data *priv =
e71a5e5a 489 container_of(work, struct twl6040_data, headset.work.work);
1bf84759
MOC
490 struct snd_soc_codec *codec = priv->codec;
491 struct twl6040_output *headset = &priv->headset;
1bf84759
MOC
492 int i, headset_complete;
493
494 /* do we need to ramp at all ? */
495 if (headset->ramp == TWL6040_RAMP_NONE)
496 return;
497
93eebc69
PU
498 /* HS PGA gain range: 0x0 - 0xf (0 - 15) */
499 for (i = 0; i < 16; i++) {
1fbe9952
ACG
500 headset_complete = twl6040_hs_ramp_step(codec,
501 headset->left_step,
502 headset->right_step);
1bf84759
MOC
503
504 /* ramp finished ? */
505 if (headset_complete)
506 break;
507
8ff1e170
PU
508 schedule_timeout_interruptible(
509 msecs_to_jiffies(headset->step_delay));
1bf84759
MOC
510 }
511
512 if (headset->ramp == TWL6040_RAMP_DOWN) {
513 headset->active = 0;
514 complete(&headset->ramp_done);
515 } else {
516 headset->active = 1;
517 }
518 headset->ramp = TWL6040_RAMP_NONE;
519}
520
521static void twl6040_pga_hf_work(struct work_struct *work)
522{
523 struct twl6040_data *priv =
e71a5e5a 524 container_of(work, struct twl6040_data, handsfree.work.work);
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MOC
525 struct snd_soc_codec *codec = priv->codec;
526 struct twl6040_output *handsfree = &priv->handsfree;
1bf84759
MOC
527 int i, handsfree_complete;
528
529 /* do we need to ramp at all ? */
530 if (handsfree->ramp == TWL6040_RAMP_NONE)
531 return;
532
93eebc69
PU
533 /*
534 * HF PGA gain range: 0x00 - 0x1d (0 - 29) */
535 for (i = 0; i < 30; i++) {
1fbe9952
ACG
536 handsfree_complete = twl6040_hf_ramp_step(codec,
537 handsfree->left_step,
538 handsfree->right_step);
1bf84759
MOC
539
540 /* ramp finished ? */
541 if (handsfree_complete)
542 break;
543
4d64bdca
PU
544 schedule_timeout_interruptible(
545 msecs_to_jiffies(handsfree->step_delay));
1bf84759
MOC
546 }
547
548
549 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
550 handsfree->active = 0;
551 complete(&handsfree->ramp_done);
552 } else
553 handsfree->active = 1;
554 handsfree->ramp = TWL6040_RAMP_NONE;
555}
556
eb6b71e7 557static int out_drv_event(struct snd_soc_dapm_widget *w,
1bf84759
MOC
558 struct snd_kcontrol *kcontrol, int event)
559{
560 struct snd_soc_codec *codec = w->codec;
561 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
562 struct twl6040_output *out;
563 struct delayed_work *work;
1bf84759
MOC
564
565 switch (w->shift) {
6fbb32d1 566 case 2: /* Headset output driver */
1bf84759 567 out = &priv->headset;
009d196b
PU
568 work = &out->work;
569 /*
570 * Make sure, that we do not mess up variables for already
571 * executing work.
572 */
573 cancel_delayed_work_sync(work);
574
1fbe9952
ACG
575 out->left_step = priv->hs_left_step;
576 out->right_step = priv->hs_right_step;
1bf84759
MOC
577 out->step_delay = 5; /* 5 ms between volume ramp steps */
578 break;
6fbb32d1 579 case 4: /* Handsfree output driver */
1bf84759 580 out = &priv->handsfree;
009d196b
PU
581 work = &out->work;
582 /*
583 * Make sure, that we do not mess up variables for already
584 * executing work.
585 */
586 cancel_delayed_work_sync(work);
587
1fbe9952
ACG
588 out->left_step = priv->hf_left_step;
589 out->right_step = priv->hf_right_step;
1bf84759
MOC
590 out->step_delay = 5; /* 5 ms between volume ramp steps */
591 if (SND_SOC_DAPM_EVENT_ON(event))
592 priv->non_lp++;
593 else
594 priv->non_lp--;
595 break;
596 default:
597 return -1;
598 }
599
600 switch (event) {
601 case SND_SOC_DAPM_POST_PMU:
602 if (out->active)
603 break;
604
605 /* don't use volume ramp for power-up */
009d196b 606 out->ramp = TWL6040_RAMP_UP;
1bf84759
MOC
607 out->left_step = out->left_vol;
608 out->right_step = out->right_vol;
609
009d196b 610 queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1));
1bf84759
MOC
611 break;
612
613 case SND_SOC_DAPM_PRE_PMD:
614 if (!out->active)
615 break;
616
009d196b
PU
617 /* use volume ramp for power-down */
618 out->ramp = TWL6040_RAMP_DOWN;
619 INIT_COMPLETION(out->ramp_done);
1bf84759 620
009d196b 621 queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1));
1bf84759 622
009d196b
PU
623 wait_for_completion_timeout(&out->ramp_done,
624 msecs_to_jiffies(2000));
1bf84759
MOC
625 break;
626 }
627
628 return 0;
629}
630
8ecbabd9
MLC
631/* set headset dac and driver power mode */
632static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
633{
634 int hslctl, hsrctl;
ab6cf139 635 int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
8ecbabd9
MLC
636
637 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
638 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
639
640 if (high_perf) {
641 hslctl &= ~mask;
642 hsrctl &= ~mask;
643 } else {
644 hslctl |= mask;
645 hsrctl |= mask;
646 }
647
648 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
649 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
650
651 return 0;
652}
653
0fad4ed7
JEC
654static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
655 struct snd_kcontrol *kcontrol, int event)
656{
657 msleep(1);
658 return 0;
659}
660
8ecbabd9
MLC
661static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
662 struct snd_kcontrol *kcontrol, int event)
663{
664 struct snd_soc_codec *codec = w->codec;
d4a8ca24 665 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 666 int ret = 0;
8ecbabd9 667
6bba63b6 668 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 669 priv->non_lp++;
6bba63b6
MLC
670 if (!strcmp(w->name, "Earphone Driver")) {
671 /* Earphone doesn't support low power mode */
672 priv->hs_power_mode_locked = 1;
673 ret = headset_power_mode(codec, 1);
674 }
675 } else {
8ecbabd9 676 priv->non_lp--;
6bba63b6
MLC
677 if (!strcmp(w->name, "Earphone Driver")) {
678 priv->hs_power_mode_locked = 0;
679 ret = headset_power_mode(codec, priv->hs_power_mode);
680 }
681 }
8ecbabd9 682
0fad4ed7
JEC
683 msleep(1);
684
6bba63b6 685 return ret;
8ecbabd9
MLC
686}
687
64ed9836
MB
688static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
689 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
690{
691 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
692 int status;
693
694 mutex_lock(&priv->mutex);
695
696 /* Sync status */
697 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
698 if (status & TWL6040_PLUGCOMP)
699 snd_soc_jack_report(jack, report, report);
700 else
701 snd_soc_jack_report(jack, 0, report);
702
703 mutex_unlock(&priv->mutex);
704}
705
706void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
707 struct snd_soc_jack *jack, int report)
708{
709 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
710 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
711
712 hs_jack->jack = jack;
713 hs_jack->report = report;
714
715 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
716}
717EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
718
719static void twl6040_accessory_work(struct work_struct *work)
720{
721 struct twl6040_data *priv = container_of(work,
46dd0b93 722 struct twl6040_data, hs_jack.work.work);
a2d2362e
JEC
723 struct snd_soc_codec *codec = priv->codec;
724 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
725
726 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
727}
728
8ecbabd9 729/* audio interrupt handler */
fb34d3d5 730static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
731{
732 struct snd_soc_codec *codec = data;
d4a8ca24 733 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
cf370a5a 734
46dd0b93 735 queue_delayed_work(priv->workqueue, &priv->hs_jack.work,
f34c6606 736 msecs_to_jiffies(200));
cf370a5a 737
8ecbabd9
MLC
738 return IRQ_HANDLED;
739}
740
1bf84759
MOC
741static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
742 struct snd_ctl_elem_value *ucontrol)
743{
744 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
745 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
746 struct twl6040_output *out = NULL;
747 struct soc_mixer_control *mc =
748 (struct soc_mixer_control *)kcontrol->private_value;
db382da5 749 int ret;
1bf84759
MOC
750
751 /* For HS and HF we shadow the values and only actually write
752 * them out when active in order to ensure the amplifier comes on
753 * as quietly as possible. */
a8cc7189 754 switch (mc->reg) {
1bf84759
MOC
755 case TWL6040_REG_HSGAIN:
756 out = &twl6040_priv->headset;
757 break;
a8cc7189
PU
758 case TWL6040_REG_HFLGAIN:
759 out = &twl6040_priv->handsfree;
760 break;
1bf84759 761 default:
a0acf47f
PU
762 dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n",
763 __func__, mc->reg);
bfd3d4e9 764 return -EINVAL;
1bf84759
MOC
765 }
766
bfd3d4e9
PU
767 out->left_vol = ucontrol->value.integer.value[0];
768 out->right_vol = ucontrol->value.integer.value[1];
769 if (!out->active)
770 return 1;
1bf84759 771
db382da5 772 ret = snd_soc_put_volsw(kcontrol, ucontrol);
1bf84759
MOC
773 if (ret < 0)
774 return ret;
775
776 return 1;
777}
778
779static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
780 struct snd_ctl_elem_value *ucontrol)
781{
782 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
783 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
784 struct twl6040_output *out = &twl6040_priv->headset;
785 struct soc_mixer_control *mc =
786 (struct soc_mixer_control *)kcontrol->private_value;
1bf84759 787
a8cc7189 788 switch (mc->reg) {
1bf84759
MOC
789 case TWL6040_REG_HSGAIN:
790 out = &twl6040_priv->headset;
1bf84759 791 break;
1bf84759 792 case TWL6040_REG_HFLGAIN:
1bf84759
MOC
793 out = &twl6040_priv->handsfree;
794 break;
795 default:
e49b6833
PU
796 dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n",
797 __func__, mc->reg);
798 return -EINVAL;
1bf84759
MOC
799 }
800
e49b6833
PU
801 ucontrol->value.integer.value[0] = out->left_vol;
802 ucontrol->value.integer.value[1] = out->right_vol;
803 return 0;
1bf84759
MOC
804}
805
8ecbabd9
MLC
806/*
807 * MICATT volume control:
808 * from -6 to 0 dB in 6 dB steps
809 */
810static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
811
812/*
813 * MICGAIN volume control:
2763f45d 814 * from 6 to 30 dB in 6 dB steps
8ecbabd9 815 */
2763f45d 816static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 817
370a0314
JEC
818/*
819 * AFMGAIN volume control:
1f71a3ba 820 * from -18 to 24 dB in 6 dB steps
370a0314 821 */
1f71a3ba 822static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 823
8ecbabd9
MLC
824/*
825 * HSGAIN volume control:
826 * from -30 to 0 dB in 2 dB steps
827 */
828static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
829
830/*
831 * HFGAIN volume control:
832 * from -52 to 6 dB in 2 dB steps
833 */
834static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
835
871a05a7
JEC
836/*
837 * EPGAIN volume control:
838 * from -24 to 6 dB in 2 dB steps
839 */
840static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
841
8ecbabd9
MLC
842/* Left analog microphone selection */
843static const char *twl6040_amicl_texts[] =
844 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
845
846/* Right analog microphone selection */
847static const char *twl6040_amicr_texts[] =
848 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
849
850static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
851 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
852 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
853};
854
370a0314
JEC
855static const char *twl6040_hs_texts[] = {
856 "Off", "HS DAC", "Line-In amp"
857};
858
859static const struct soc_enum twl6040_hs_enum[] = {
860 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
861 twl6040_hs_texts),
862 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
863 twl6040_hs_texts),
864};
865
866static const char *twl6040_hf_texts[] = {
867 "Off", "HF DAC", "Line-In amp"
868};
869
870static const struct soc_enum twl6040_hf_enum[] = {
871 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
872 twl6040_hf_texts),
873 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
874 twl6040_hf_texts),
875};
876
8ecbabd9
MLC
877static const struct snd_kcontrol_new amicl_control =
878 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
879
880static const struct snd_kcontrol_new amicr_control =
881 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
882
883/* Headset DAC playback switches */
370a0314
JEC
884static const struct snd_kcontrol_new hsl_mux_controls =
885 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 886
370a0314
JEC
887static const struct snd_kcontrol_new hsr_mux_controls =
888 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
889
890/* Handsfree DAC playback switches */
370a0314
JEC
891static const struct snd_kcontrol_new hfl_mux_controls =
892 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 893
370a0314
JEC
894static const struct snd_kcontrol_new hfr_mux_controls =
895 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 896
317596a6
PU
897static const struct snd_kcontrol_new ep_path_enable_control =
898 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 899
fdb625ff
PU
900static const struct snd_kcontrol_new auxl_switch_control =
901 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
902
903static const struct snd_kcontrol_new auxr_switch_control =
904 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
905
6bba63b6 906/* Headset power mode */
7cca6067 907static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC
908 "Low-Power", "High-Perfomance",
909};
910
7cca6067
PU
911static const struct soc_enum twl6040_power_mode_enum =
912 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
913 twl6040_power_mode_texts);
6bba63b6
MLC
914
915static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
916 struct snd_ctl_elem_value *ucontrol)
917{
918 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
919 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
920
921 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
922
923 return 0;
924}
925
926static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
927 struct snd_ctl_elem_value *ucontrol)
928{
929 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
930 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
931 int high_perf = ucontrol->value.enumerated.item[0];
932 int ret = 0;
933
934 if (!priv->hs_power_mode_locked)
935 ret = headset_power_mode(codec, high_perf);
936
937 if (!ret)
938 priv->hs_power_mode = high_perf;
939
940 return ret;
941}
942
af958c72
PU
943static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
944 struct snd_ctl_elem_value *ucontrol)
945{
946 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
947 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
948
949 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
950
951 return 0;
952}
953
954static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
955 struct snd_ctl_elem_value *ucontrol)
956{
957 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
958 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
959
960 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU
961
962 return 0;
963}
964
965int twl6040_get_clk_id(struct snd_soc_codec *codec)
966{
967 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
968
ff593ca1 969 return priv->pll_power_mode;
af958c72
PU
970}
971EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
972
db4aabcc
PU
973int twl6040_get_trim_value(struct snd_soc_codec *codec, enum twl6040_trim trim)
974{
975 if (unlikely(trim >= TWL6040_TRIM_INVAL))
976 return -EINVAL;
977
978 return twl6040_read_reg_cache(codec, TWL6040_REG_TRIM1 + trim);
979}
980EXPORT_SYMBOL_GPL(twl6040_get_trim_value);
981
8ecbabd9
MLC
982static const struct snd_kcontrol_new twl6040_snd_controls[] = {
983 /* Capture gains */
984 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
985 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
986 SOC_DOUBLE_TLV("Capture Volume",
987 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
988
370a0314
JEC
989 /* AFM gains */
990 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 991 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 992
8ecbabd9 993 /* Playback gains */
0f9887d1
PU
994 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
995 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, twl6040_get_volsw,
996 twl6040_put_volsw, hs_tlv),
997 SOC_DOUBLE_R_EXT_TLV("Handsfree Playback Volume",
998 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1,
999 twl6040_get_volsw, twl6040_put_volsw, hf_tlv),
871a05a7
JEC
1000 SOC_SINGLE_TLV("Earphone Playback Volume",
1001 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1002
7cca6067 1003 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC
1004 twl6040_headset_power_get_enum,
1005 twl6040_headset_power_put_enum),
af958c72
PU
1006
1007 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1008 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC
1009};
1010
1011static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1012 /* Inputs */
1013 SND_SOC_DAPM_INPUT("MAINMIC"),
1014 SND_SOC_DAPM_INPUT("HSMIC"),
1015 SND_SOC_DAPM_INPUT("SUBMIC"),
1016 SND_SOC_DAPM_INPUT("AFML"),
1017 SND_SOC_DAPM_INPUT("AFMR"),
1018
1019 /* Outputs */
1020 SND_SOC_DAPM_OUTPUT("HSOL"),
1021 SND_SOC_DAPM_OUTPUT("HSOR"),
1022 SND_SOC_DAPM_OUTPUT("HFL"),
1023 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1024 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU
1025 SND_SOC_DAPM_OUTPUT("AUXL"),
1026 SND_SOC_DAPM_OUTPUT("AUXR"),
8ecbabd9
MLC
1027
1028 /* Analog input muxes for the capture amplifiers */
1029 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1030 SND_SOC_NOPM, 0, 0, &amicl_control),
1031 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1032 SND_SOC_NOPM, 0, 0, &amicr_control),
1033
1034 /* Analog capture PGAs */
1035 SND_SOC_DAPM_PGA("MicAmpL",
1036 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1037 SND_SOC_DAPM_PGA("MicAmpR",
1038 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1039
370a0314
JEC
1040 /* Auxiliary FM PGAs */
1041 SND_SOC_DAPM_PGA("AFMAmpL",
1042 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1043 SND_SOC_DAPM_PGA("AFMAmpR",
1044 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1045
8ecbabd9
MLC
1046 /* ADCs */
1047 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1048 TWL6040_REG_MICLCTL, 2, 0),
1049 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1050 TWL6040_REG_MICRCTL, 2, 0),
1051
1052 /* Microphone bias */
1053 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1054 TWL6040_REG_AMICBCTL, 0, 0),
1055 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1056 TWL6040_REG_AMICBCTL, 4, 0),
1057 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1058 TWL6040_REG_DMICBCTL, 0, 0),
1059 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1060 TWL6040_REG_DMICBCTL, 4, 0),
1061
1062 /* DACs */
0fad4ed7
JEC
1063 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1064 TWL6040_REG_HSLCTL, 0, 0,
1065 twl6040_hs_dac_event,
1066 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1067 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1068 TWL6040_REG_HSRCTL, 0, 0,
1069 twl6040_hs_dac_event,
1070 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1071 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1072 TWL6040_REG_HFLCTL, 0, 0,
1073 twl6040_power_mode_event,
1074 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1075 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1076 TWL6040_REG_HFRCTL, 0, 0,
1077 twl6040_power_mode_event,
1078 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1079
df11ce29 1080 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1081 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1082 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC
1083 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1084 /* Analog playback Muxes */
45b0f60d 1085 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1086 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1087 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1088 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1089
317596a6
PU
1090 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1091 &ep_path_enable_control),
fdb625ff
PU
1092 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1093 &auxl_switch_control),
1094 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1095 &auxr_switch_control),
317596a6 1096
0fad4ed7 1097 /* Analog playback drivers */
df11ce29 1098 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1099 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
eb6b71e7 1100 out_drv_event,
1bf84759 1101 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1102 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1103 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
eb6b71e7 1104 out_drv_event,
1bf84759 1105 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1106 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759 1107 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
eb6b71e7 1108 out_drv_event,
1bf84759 1109 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1110 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759 1111 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
eb6b71e7 1112 out_drv_event,
1bf84759 1113 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU
1114 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1115 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
871a05a7
JEC
1116 twl6040_power_mode_event,
1117 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1118
1119 /* Analog playback PGAs */
df11ce29 1120 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1121 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1122 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC
1123 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1124
1125};
1126
1127static const struct snd_soc_dapm_route intercon[] = {
1128 /* Capture path */
1129 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1130 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1131 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1132
1133 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1134 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1135 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1136
1137 {"MicAmpL", NULL, "Analog Left Capture Route"},
1138 {"MicAmpR", NULL, "Analog Right Capture Route"},
1139
1140 {"ADC Left", NULL, "MicAmpL"},
1141 {"ADC Right", NULL, "MicAmpR"},
1142
370a0314 1143 /* AFM path */
5bf692d9
PU
1144 {"AFMAmpL", NULL, "AFML"},
1145 {"AFMAmpR", NULL, "AFMR"},
370a0314 1146
45b0f60d
PU
1147 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1148 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1149
45b0f60d
PU
1150 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1151 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1152
45b0f60d
PU
1153 {"HS Left Driver", NULL, "Headset Left Playback"},
1154 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1155
45b0f60d
PU
1156 {"HSOL", NULL, "HS Left Driver"},
1157 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1158
871a05a7 1159 /* Earphone playback path */
317596a6
PU
1160 {"Earphone Playback", "Switch", "HSDAC Left"},
1161 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC
1162 {"EP", NULL, "Earphone Driver"},
1163
df11ce29
PU
1164 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1165 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1166
df11ce29
PU
1167 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1168 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1169
df11ce29
PU
1170 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1171 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1172
df11ce29
PU
1173 {"HF Left Driver", NULL, "HF Left PGA"},
1174 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1175
df11ce29
PU
1176 {"HFL", NULL, "HF Left Driver"},
1177 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU
1178
1179 {"AUXL Playback", "Switch", "HF Left PGA"},
1180 {"AUXR Playback", "Switch", "HF Right PGA"},
1181
1182 {"AUXL", NULL, "AUXL Playback"},
1183 {"AUXR", NULL, "AUXR Playback"},
8ecbabd9
MLC
1184};
1185
1186static int twl6040_add_widgets(struct snd_soc_codec *codec)
1187{
ce6120cc 1188 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1189
ce6120cc
LG
1190 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1191 ARRAY_SIZE(twl6040_dapm_widgets));
1192 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1193 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC
1194
1195 return 0;
1196}
1197
8ecbabd9
MLC
1198static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1199 enum snd_soc_bias_level level)
1200{
fb34d3d5 1201 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1202 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1203 int ret;
1204
1205 switch (level) {
1206 case SND_SOC_BIAS_ON:
1207 break;
1208 case SND_SOC_BIAS_PREPARE:
1209 break;
1210 case SND_SOC_BIAS_STANDBY:
1211 if (priv->codec_powered)
1212 break;
1213
fb34d3d5
MLC
1214 ret = twl6040_power(twl6040, 1);
1215 if (ret)
1216 return ret;
8ecbabd9 1217
fb34d3d5 1218 priv->codec_powered = 1;
8ecbabd9 1219
a52762ee 1220 twl6040_restore_regs(codec);
65b7cecc
OM
1221
1222 /* Set external boost GPO */
1223 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1224 break;
1225 case SND_SOC_BIAS_OFF:
1226 if (!priv->codec_powered)
1227 break;
1228
fb34d3d5 1229 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1230 priv->codec_powered = 0;
1231 break;
1232 }
1233
ce6120cc 1234 codec->dapm.bias_level = level;
8ecbabd9
MLC
1235
1236 return 0;
1237}
1238
8ecbabd9
MLC
1239static int twl6040_startup(struct snd_pcm_substream *substream,
1240 struct snd_soc_dai *dai)
1241{
1242 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1243 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1244 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1245
8ecbabd9
MLC
1246 snd_pcm_hw_constraint_list(substream->runtime, 0,
1247 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1248 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC
1249
1250 return 0;
1251}
1252
1253static int twl6040_hw_params(struct snd_pcm_substream *substream,
1254 struct snd_pcm_hw_params *params,
1255 struct snd_soc_dai *dai)
1256{
1257 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1258 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1259 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1260 int rate;
1261
8ecbabd9
MLC
1262 rate = params_rate(params);
1263 switch (rate) {
60ea4cec
OM
1264 case 11250:
1265 case 22500:
1266 case 44100:
8ecbabd9 1267 case 88200:
753621c2
PU
1268 /* These rates are not supported when HPPLL is in use */
1269 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1270 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1271 rate);
1272 return -EINVAL;
1273 }
1274 /* Capture is not supported with 17.64MHz sysclk */
1275 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1276 dev_err(codec->dev,
1277 "capture mode is not supported at %dHz\n",
1278 rate);
1279 return -EINVAL;
1280 }
8ecbabd9
MLC
1281 priv->sysclk = 17640000;
1282 break;
60ea4cec
OM
1283 case 8000:
1284 case 16000:
1285 case 32000:
1286 case 48000:
8ecbabd9 1287 case 96000:
8ecbabd9
MLC
1288 priv->sysclk = 19200000;
1289 break;
1290 default:
1291 dev_err(codec->dev, "unsupported rate %d\n", rate);
1292 return -EINVAL;
1293 }
1294
8ecbabd9
MLC
1295 return 0;
1296}
1297
4e624d06
OM
1298static int twl6040_prepare(struct snd_pcm_substream *substream,
1299 struct snd_soc_dai *dai)
8ecbabd9
MLC
1300{
1301 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1302 struct snd_soc_codec *codec = rtd->codec;
753621c2 1303 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1304 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1305 int ret;
8ecbabd9 1306
4e624d06
OM
1307 if (!priv->sysclk) {
1308 dev_err(codec->dev,
1309 "no mclk configured, call set_sysclk() on init\n");
1310 return -EINVAL;
1311 }
1312
4e624d06 1313 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC
1314 dev_err(codec->dev,
1315 "some enabled paths aren't supported at %dHz\n",
1316 priv->sysclk);
1317 return -EPERM;
8ecbabd9 1318 }
753621c2
PU
1319
1320 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1321 if (ret) {
1322 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1323 return -EPERM;
1324 }
1325
8ecbabd9
MLC
1326 return 0;
1327}
1328
1329static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1330 int clk_id, unsigned int freq, int dir)
1331{
1332 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1333 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1334
1335 switch (clk_id) {
1336 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1337 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU
1338 priv->pll = clk_id;
1339 priv->clk_in = freq;
8ecbabd9
MLC
1340 break;
1341 default:
1342 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1343 return -EINVAL;
1344 }
1345
1346 return 0;
1347}
1348
1349static struct snd_soc_dai_ops twl6040_dai_ops = {
1350 .startup = twl6040_startup,
1351 .hw_params = twl6040_hw_params,
4e624d06 1352 .prepare = twl6040_prepare,
8ecbabd9
MLC
1353 .set_sysclk = twl6040_set_dai_sysclk,
1354};
1355
6510bdc3 1356static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1357{
d13f1fe0 1358 .name = "twl6040-legacy",
8ecbabd9
MLC
1359 .playback = {
1360 .stream_name = "Playback",
1361 .channels_min = 1,
cdd5054c 1362 .channels_max = 5,
21385eeb
PU
1363 .rates = TWL6040_RATES,
1364 .formats = TWL6040_FORMATS,
1365 },
1366 .capture = {
1367 .stream_name = "Capture",
1368 .channels_min = 1,
1369 .channels_max = 2,
8ecbabd9
MLC
1370 .rates = TWL6040_RATES,
1371 .formats = TWL6040_FORMATS,
1372 },
21385eeb
PU
1373 .ops = &twl6040_dai_ops,
1374},
6510bdc3
LG
1375{
1376 .name = "twl6040-ul",
8ecbabd9
MLC
1377 .capture = {
1378 .stream_name = "Capture",
1379 .channels_min = 1,
1380 .channels_max = 2,
1381 .rates = TWL6040_RATES,
1382 .formats = TWL6040_FORMATS,
1383 },
1384 .ops = &twl6040_dai_ops,
6510bdc3
LG
1385},
1386{
1387 .name = "twl6040-dl1",
8ecbabd9 1388 .playback = {
6510bdc3 1389 .stream_name = "Headset Playback",
8ecbabd9 1390 .channels_min = 1,
6510bdc3 1391 .channels_max = 2,
8ecbabd9
MLC
1392 .rates = TWL6040_RATES,
1393 .formats = TWL6040_FORMATS,
1394 },
6510bdc3
LG
1395 .ops = &twl6040_dai_ops,
1396},
1397{
1398 .name = "twl6040-dl2",
1399 .playback = {
1400 .stream_name = "Handsfree Playback",
8ecbabd9
MLC
1401 .channels_min = 1,
1402 .channels_max = 2,
1403 .rates = TWL6040_RATES,
1404 .formats = TWL6040_FORMATS,
1405 },
1406 .ops = &twl6040_dai_ops,
6510bdc3
LG
1407},
1408{
1409 .name = "twl6040-vib",
1410 .playback = {
1411 .stream_name = "Vibra Playback",
d8dd032d
PU
1412 .channels_min = 1,
1413 .channels_max = 1,
6510bdc3
LG
1414 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1415 .formats = TWL6040_FORMATS,
1416 },
1417 .ops = &twl6040_dai_ops,
1418},
8ecbabd9 1419};
8ecbabd9
MLC
1420
1421#ifdef CONFIG_PM
f0fba2ad 1422static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1423{
8ecbabd9
MLC
1424 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1425
1426 return 0;
1427}
1428
f0fba2ad 1429static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1430{
8ecbabd9 1431 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1432 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1433
1434 return 0;
1435}
1436#else
1437#define twl6040_suspend NULL
1438#define twl6040_resume NULL
1439#endif
1440
f0fba2ad 1441static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1442{
8ecbabd9 1443 struct twl6040_data *priv;
1fbe9952 1444 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU
1445 struct platform_device *pdev = container_of(codec->dev,
1446 struct platform_device, dev);
8ecbabd9
MLC
1447 int ret = 0;
1448
1449 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1450 if (priv == NULL)
1451 return -ENOMEM;
f0fba2ad 1452 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1453
a2d2362e 1454 priv->codec = codec;
fb34d3d5 1455 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1456
1fbe9952
ACG
1457 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1458 priv->hs_left_step = pdata->hs_left_step;
1459 priv->hs_right_step = pdata->hs_right_step;
1460 } else {
1461 priv->hs_left_step = 1;
1462 priv->hs_right_step = 1;
1463 }
99903ea2 1464
1fbe9952
ACG
1465 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1466 priv->hf_left_step = pdata->hf_left_step;
1467 priv->hf_right_step = pdata->hf_right_step;
1468 } else {
1469 priv->hf_left_step = 1;
1470 priv->hf_right_step = 1;
1471 }
99903ea2 1472
2a433b9d
PU
1473 priv->plug_irq = platform_get_irq(pdev, 0);
1474 if (priv->plug_irq < 0) {
1475 dev_err(codec->dev, "invalid irq\n");
1476 ret = -EINVAL;
1477 goto work_err;
1478 }
8ecbabd9 1479
a46737ae 1480 priv->workqueue = alloc_workqueue("twl6040-codec", 0, 0);
19aab08d
AL
1481 if (!priv->workqueue) {
1482 ret = -ENOMEM;
a2d2362e 1483 goto work_err;
19aab08d 1484 }
a2d2362e 1485
46dd0b93 1486 INIT_DELAYED_WORK(&priv->hs_jack.work, twl6040_accessory_work);
a46737ae
PU
1487 INIT_DELAYED_WORK(&priv->headset.work, twl6040_pga_hs_work);
1488 INIT_DELAYED_WORK(&priv->handsfree.work, twl6040_pga_hf_work);
a2d2362e
JEC
1489
1490 mutex_init(&priv->mutex);
8ecbabd9 1491
1bf84759
MOC
1492 init_completion(&priv->headset.ramp_done);
1493 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1494
2a433b9d
PU
1495 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1496 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC
1497 if (ret) {
1498 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1499 goto plugirq_err;
1500 }
1501
a52762ee 1502 twl6040_init_chip(codec);
fb34d3d5 1503
8ecbabd9
MLC
1504 /* power on device */
1505 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1506 if (ret)
1bf84759 1507 goto bias_err;
8ecbabd9 1508
f0fba2ad
LG
1509 snd_soc_add_controls(codec, twl6040_snd_controls,
1510 ARRAY_SIZE(twl6040_snd_controls));
1511 twl6040_add_widgets(codec);
8ecbabd9
MLC
1512
1513 return 0;
1514
1bf84759 1515bias_err:
2a433b9d 1516 free_irq(priv->plug_irq, codec);
fb34d3d5 1517plugirq_err:
a2d2362e
JEC
1518 destroy_workqueue(priv->workqueue);
1519work_err:
8ecbabd9
MLC
1520 kfree(priv);
1521 return ret;
1522}
1523
f0fba2ad 1524static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1525{
f0fba2ad 1526 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1527
f0fba2ad 1528 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1529 free_irq(priv->plug_irq, codec);
a2d2362e 1530 destroy_workqueue(priv->workqueue);
f0fba2ad 1531 kfree(priv);
8ecbabd9 1532
f0fba2ad
LG
1533 return 0;
1534}
8ecbabd9 1535
f0fba2ad
LG
1536static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1537 .probe = twl6040_probe,
1538 .remove = twl6040_remove,
1539 .suspend = twl6040_suspend,
1540 .resume = twl6040_resume,
1541 .read = twl6040_read_reg_cache,
1542 .write = twl6040_write,
1543 .set_bias_level = twl6040_set_bias_level,
1544 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1545 .reg_word_size = sizeof(u8),
1546 .reg_cache_default = twl6040_reg,
1547};
1548
1549static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1550{
6510bdc3
LG
1551 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1552 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG
1553}
1554
1555static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1556{
1557 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC
1558 return 0;
1559}
1560
1561static struct platform_driver twl6040_codec_driver = {
1562 .driver = {
f0fba2ad 1563 .name = "twl6040-codec",
8ecbabd9
MLC
1564 .owner = THIS_MODULE,
1565 },
1566 .probe = twl6040_codec_probe,
1567 .remove = __devexit_p(twl6040_codec_remove),
1568};
1569
1570static int __init twl6040_codec_init(void)
1571{
1572 return platform_driver_register(&twl6040_codec_driver);
1573}
1574module_init(twl6040_codec_init);
1575
1576static void __exit twl6040_codec_exit(void)
1577{
1578 platform_driver_unregister(&twl6040_codec_driver);
1579}
1580module_exit(twl6040_codec_exit);
1581
1582MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1583MODULE_AUTHOR("Misael Lopez Cruz");
1584MODULE_LICENSE("GPL");
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