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MFD: twl6040: Fix power on GPIO handling
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC		 1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
8ecbabd9
MLC		 31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
8ecbabd9
MLC		 36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
1bf84759
MOC		 42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
60struct twl6040_output {
61 u16 active;
62 u16 left_vol;
63 u16 right_vol;
64 u16 left_step;
65 u16 right_step;
66 unsigned int step_delay;
67 u16 ramp;
68 u16 mute;
69 struct completion ramp_done;
70};
8ecbabd9 71
a2d2362e
JEC		 72struct twl6040_jack_data {
73 struct snd_soc_jack *jack;
74 int report;
75};
76
8ecbabd9
MLC		 77/* codec private data */
78struct twl6040_data {
2a433b9d 79 int plug_irq;
8ecbabd9
MLC		 80 int codec_powered;
81 int pll;
82 int non_lp;
af958c72 83 int pll_power_mode;
6bba63b6
MLC		 84 int hs_power_mode;
85 int hs_power_mode_locked;
fb34d3d5 86 unsigned int clk_in;
8ecbabd9 87 unsigned int sysclk;
1fbe9952
ACG		 88 u16 hs_left_step;
89 u16 hs_right_step;
90 u16 hf_left_step;
91 u16 hf_right_step;
a2d2362e
JEC		 92 struct twl6040_jack_data hs_jack;
93 struct snd_soc_codec *codec;
94 struct workqueue_struct *workqueue;
95 struct delayed_work delayed_work;
96 struct mutex mutex;
1bf84759
MOC		 97 struct twl6040_output headset;
98 struct twl6040_output handsfree;
99 struct workqueue_struct *hf_workqueue;
100 struct workqueue_struct *hs_workqueue;
101 struct delayed_work hs_delayed_work;
102 struct delayed_work hf_delayed_work;
8ecbabd9
MLC		 103};
104
105/*
106 * twl6040 register cache & default register settings
107 */
108static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
109 0x00, /* not used 0x00 */
110 0x4B, /* TWL6040_ASICID (ro) 0x01 */
111 0x00, /* TWL6040_ASICREV (ro) 0x02 */
112 0x00, /* TWL6040_INTID 0x03 */
113 0x00, /* TWL6040_INTMR 0x04 */
114 0x00, /* TWL6040_NCPCTRL 0x05 */
115 0x00, /* TWL6040_LDOCTL 0x06 */
116 0x60, /* TWL6040_HPPLLCTL 0x07 */
117 0x00, /* TWL6040_LPPLLCTL 0x08 */
118 0x4A, /* TWL6040_LPPLLDIV 0x09 */
119 0x00, /* TWL6040_AMICBCTL 0x0A */
120 0x00, /* TWL6040_DMICBCTL 0x0B */
121 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
122 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
123 0x00, /* TWL6040_MICGAIN 0x0E */
124 0x1B, /* TWL6040_LINEGAIN 0x0F */
125 0x00, /* TWL6040_HSLCTL 0x10 */
126 0x00, /* TWL6040_HSRCTL 0x11 */
127 0x00, /* TWL6040_HSGAIN 0x12 */
128 0x00, /* TWL6040_EARCTL 0x13 */
129 0x00, /* TWL6040_HFLCTL 0x14 */
130 0x00, /* TWL6040_HFLGAIN 0x15 */
131 0x00, /* TWL6040_HFRCTL 0x16 */
132 0x00, /* TWL6040_HFRGAIN 0x17 */
133 0x00, /* TWL6040_VIBCTLL 0x18 */
134 0x00, /* TWL6040_VIBDATL 0x19 */
135 0x00, /* TWL6040_VIBCTLR 0x1A */
136 0x00, /* TWL6040_VIBDATR 0x1B */
137 0x00, /* TWL6040_HKCTL1 0x1C */
138 0x00, /* TWL6040_HKCTL2 0x1D */
139 0x00, /* TWL6040_GPOCTL 0x1E */
140 0x00, /* TWL6040_ALB 0x1F */
141 0x00, /* TWL6040_DLB 0x20 */
142 0x00, /* not used 0x21 */
143 0x00, /* not used 0x22 */
144 0x00, /* not used 0x23 */
145 0x00, /* not used 0x24 */
146 0x00, /* not used 0x25 */
147 0x00, /* not used 0x26 */
148 0x00, /* not used 0x27 */
149 0x00, /* TWL6040_TRIM1 0x28 */
150 0x00, /* TWL6040_TRIM2 0x29 */
151 0x00, /* TWL6040_TRIM3 0x2A */
152 0x00, /* TWL6040_HSOTRIM 0x2B */
153 0x00, /* TWL6040_HFOTRIM 0x2C */
154 0x09, /* TWL6040_ACCCTL 0x2D */
155 0x00, /* TWL6040_STATUS (ro) 0x2E */
156};
157
158/*
159 * twl6040 vio/gnd registers:
160 * registers under vio/gnd supply can be accessed
161 * before the power-up sequence, after NRESPWRON goes high
162 */
163static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
164 TWL6040_REG_ASICID,
165 TWL6040_REG_ASICREV,
166 TWL6040_REG_INTID,
167 TWL6040_REG_INTMR,
168 TWL6040_REG_NCPCTL,
169 TWL6040_REG_LDOCTL,
170 TWL6040_REG_AMICBCTL,
171 TWL6040_REG_DMICBCTL,
172 TWL6040_REG_HKCTL1,
173 TWL6040_REG_HKCTL2,
174 TWL6040_REG_GPOCTL,
175 TWL6040_REG_TRIM1,
176 TWL6040_REG_TRIM2,
177 TWL6040_REG_TRIM3,
178 TWL6040_REG_HSOTRIM,
179 TWL6040_REG_HFOTRIM,
180 TWL6040_REG_ACCCTL,
181 TWL6040_REG_STATUS,
182};
183
184/*
185 * twl6040 vdd/vss registers:
186 * registers under vdd/vss supplies can only be accessed
187 * after the power-up sequence
188 */
189static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
190 TWL6040_REG_HPPLLCTL,
191 TWL6040_REG_LPPLLCTL,
192 TWL6040_REG_LPPLLDIV,
193 TWL6040_REG_MICLCTL,
194 TWL6040_REG_MICRCTL,
195 TWL6040_REG_MICGAIN,
196 TWL6040_REG_LINEGAIN,
197 TWL6040_REG_HSLCTL,
198 TWL6040_REG_HSRCTL,
199 TWL6040_REG_HSGAIN,
200 TWL6040_REG_EARCTL,
201 TWL6040_REG_HFLCTL,
202 TWL6040_REG_HFLGAIN,
203 TWL6040_REG_HFRCTL,
204 TWL6040_REG_HFRGAIN,
205 TWL6040_REG_VIBCTLL,
206 TWL6040_REG_VIBDATL,
207 TWL6040_REG_VIBCTLR,
208 TWL6040_REG_VIBDATR,
209 TWL6040_REG_ALB,
210 TWL6040_REG_DLB,
211};
212
af958c72
PU		 213/* set of rates for each pll: low-power and high-performance */
214static unsigned int lp_rates[] = {
215 8000,
216 11250,
217 16000,
218 22500,
219 32000,
220 44100,
221 48000,
222 88200,
223 96000,
224};
225
af958c72
PU		 226static unsigned int hp_rates[] = {
227 8000,
228 16000,
229 32000,
230 48000,
231 96000,
232};
233
f53c346c
PU		 234static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
235 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
236 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU		 237};
238
8ecbabd9
MLC		 239/*
240 * read twl6040 register cache
241 */
242static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
243 unsigned int reg)
244{
245 u8 *cache = codec->reg_cache;
246
247 if (reg >= TWL6040_CACHEREGNUM)
248 return -EIO;
249
250 return cache[reg];
251}
252
253/*
254 * write twl6040 register cache
255 */
256static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
257 u8 reg, u8 value)
258{
259 u8 *cache = codec->reg_cache;
260
261 if (reg >= TWL6040_CACHEREGNUM)
262 return;
263 cache[reg] = value;
264}
265
266/*
267 * read from twl6040 hardware register
268 */
269static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
270 unsigned int reg)
271{
fb34d3d5 272 struct twl6040 *twl6040 = codec->control_data;
8ecbabd9
MLC		 273 u8 value;
274
275 if (reg >= TWL6040_CACHEREGNUM)
276 return -EIO;
277
fb34d3d5 278 value = twl6040_reg_read(twl6040, reg);
8ecbabd9
MLC		 279 twl6040_write_reg_cache(codec, reg, value);
280
281 return value;
282}
283
284/*
285 * write to the twl6040 register space
286 */
287static int twl6040_write(struct snd_soc_codec *codec,
288 unsigned int reg, unsigned int value)
289{
fb34d3d5
MLC		 290 struct twl6040 *twl6040 = codec->control_data;
291
8ecbabd9
MLC		 292 if (reg >= TWL6040_CACHEREGNUM)
293 return -EIO;
294
295 twl6040_write_reg_cache(codec, reg, value);
fb34d3d5 296 return twl6040_reg_write(twl6040, reg, value);
8ecbabd9
MLC		 297}
298
299static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
300{
301 u8 *cache = codec->reg_cache;
302 int reg, i;
303
8ecbabd9
MLC		 304 for (i = 0; i < TWL6040_VIOREGNUM; i++) {
305 reg = twl6040_vio_reg[i];
fb34d3d5
MLC		 306 /*
307 * skip read-only registers (ASICID, ASICREV, STATUS)
308 * and registers shared among MFD children
309 */
8ecbabd9
MLC		 310 switch (reg) {
311 case TWL6040_REG_ASICID:
312 case TWL6040_REG_ASICREV:
fb34d3d5
MLC		 313 case TWL6040_REG_INTID:
314 case TWL6040_REG_INTMR:
315 case TWL6040_REG_NCPCTL:
316 case TWL6040_REG_LDOCTL:
317 case TWL6040_REG_GPOCTL:
318 case TWL6040_REG_ACCCTL:
8ecbabd9
MLC		 319 case TWL6040_REG_STATUS:
320 continue;
321 default:
322 break;
323 }
324 twl6040_write(codec, reg, cache[reg]);
325 }
326}
327
328static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
329{
330 u8 *cache = codec->reg_cache;
331 int reg, i;
332
333 for (i = 0; i < TWL6040_VDDREGNUM; i++) {
334 reg = twl6040_vdd_reg[i];
fb34d3d5
MLC		 335 /* skip vibra and PLL registers */
336 switch (reg) {
337 case TWL6040_REG_VIBCTLL:
338 case TWL6040_REG_VIBDATL:
339 case TWL6040_REG_VIBCTLR:
340 case TWL6040_REG_VIBDATR:
341 case TWL6040_REG_HPPLLCTL:
342 case TWL6040_REG_LPPLLCTL:
343 case TWL6040_REG_LPPLLDIV:
344 continue;
345 default:
346 break;
347 }
348
8ecbabd9
MLC		 349 twl6040_write(codec, reg, cache[reg]);
350 }
351}
352
1bf84759
MOC		 353/*
354 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
355 */
356static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
357 unsigned int left_step, unsigned int right_step)
358{
359
360 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
361 struct twl6040_output *headset = &priv->headset;
362 int left_complete = 0, right_complete = 0;
363 u8 reg, val;
364
365 /* left channel */
366 left_step = (left_step > 0xF) ? 0xF : left_step;
367 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
368 val = (~reg & TWL6040_HSL_VOL_MASK);
369
370 if (headset->ramp == TWL6040_RAMP_UP) {
371 /* ramp step up */
372 if (val < headset->left_vol) {
1fbe9952
ACG		 373 if (val + left_step > headset->left_vol)
374 val = headset->left_vol;
375 else
376 val += left_step;
377
1bf84759
MOC		 378 reg &= ~TWL6040_HSL_VOL_MASK;
379 twl6040_write(codec, TWL6040_REG_HSGAIN,
380 (reg | (~val & TWL6040_HSL_VOL_MASK)));
381 } else {
382 left_complete = 1;
383 }
384 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
385 /* ramp step down */
386 if (val > 0x0) {
1fbe9952
ACG		 387 if ((int)val - (int)left_step < 0)
388 val = 0;
389 else
390 val -= left_step;
391
1bf84759
MOC		 392 reg &= ~TWL6040_HSL_VOL_MASK;
393 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
394 (~val & TWL6040_HSL_VOL_MASK));
395 } else {
396 left_complete = 1;
397 }
398 }
399
400 /* right channel */
401 right_step = (right_step > 0xF) ? 0xF : right_step;
402 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
403 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
404
405 if (headset->ramp == TWL6040_RAMP_UP) {
406 /* ramp step up */
407 if (val < headset->right_vol) {
1fbe9952
ACG		 408 if (val + right_step > headset->right_vol)
409 val = headset->right_vol;
410 else
411 val += right_step;
412
1bf84759
MOC		 413 reg &= ~TWL6040_HSR_VOL_MASK;
414 twl6040_write(codec, TWL6040_REG_HSGAIN,
415 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
416 } else {
417 right_complete = 1;
418 }
419 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
420 /* ramp step down */
421 if (val > 0x0) {
1fbe9952
ACG		 422 if ((int)val - (int)right_step < 0)
423 val = 0;
424 else
425 val -= right_step;
426
1bf84759
MOC		 427 reg &= ~TWL6040_HSR_VOL_MASK;
428 twl6040_write(codec, TWL6040_REG_HSGAIN,
429 reg | (~val << TWL6040_HSR_VOL_SHIFT));
430 } else {
431 right_complete = 1;
432 }
433 }
434
435 return left_complete & right_complete;
436}
437
438/*
439 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
440 */
441static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
442 unsigned int left_step, unsigned int right_step)
443{
444 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
445 struct twl6040_output *handsfree = &priv->handsfree;
446 int left_complete = 0, right_complete = 0;
447 u16 reg, val;
448
449 /* left channel */
450 left_step = (left_step > 0x1D) ? 0x1D : left_step;
451 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
452 reg = 0x1D - reg;
453 val = (reg & TWL6040_HF_VOL_MASK);
454 if (handsfree->ramp == TWL6040_RAMP_UP) {
455 /* ramp step up */
456 if (val < handsfree->left_vol) {
1fbe9952
ACG		 457 if (val + left_step > handsfree->left_vol)
458 val = handsfree->left_vol;
459 else
460 val += left_step;
461
1bf84759
MOC		 462 reg &= ~TWL6040_HF_VOL_MASK;
463 twl6040_write(codec, TWL6040_REG_HFLGAIN,
464 reg | (0x1D - val));
465 } else {
466 left_complete = 1;
467 }
468 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
469 /* ramp step down */
470 if (val > 0) {
1fbe9952
ACG		 471 if ((int)val - (int)left_step < 0)
472 val = 0;
473 else
474 val -= left_step;
475
1bf84759
MOC		 476 reg &= ~TWL6040_HF_VOL_MASK;
477 twl6040_write(codec, TWL6040_REG_HFLGAIN,
478 reg | (0x1D - val));
479 } else {
480 left_complete = 1;
481 }
482 }
483
484 /* right channel */
485 right_step = (right_step > 0x1D) ? 0x1D : right_step;
486 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
487 reg = 0x1D - reg;
488 val = (reg & TWL6040_HF_VOL_MASK);
489 if (handsfree->ramp == TWL6040_RAMP_UP) {
490 /* ramp step up */
491 if (val < handsfree->right_vol) {
1fbe9952
ACG		 492 if (val + right_step > handsfree->right_vol)
493 val = handsfree->right_vol;
494 else
495 val += right_step;
496
1bf84759
MOC		 497 reg &= ~TWL6040_HF_VOL_MASK;
498 twl6040_write(codec, TWL6040_REG_HFRGAIN,
499 reg | (0x1D - val));
500 } else {
501 right_complete = 1;
502 }
503 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
504 /* ramp step down */
505 if (val > 0) {
1fbe9952
ACG		 506 if ((int)val - (int)right_step < 0)
507 val = 0;
508 else
509 val -= right_step;
510
1bf84759
MOC		 511 reg &= ~TWL6040_HF_VOL_MASK;
512 twl6040_write(codec, TWL6040_REG_HFRGAIN,
513 reg | (0x1D - val));
514 }
515 }
516
517 return left_complete & right_complete;
518}
519
520/*
521 * This work ramps both output PGAs at stream start/stop time to
522 * minimise pop associated with DAPM power switching.
523 */
524static void twl6040_pga_hs_work(struct work_struct *work)
525{
526 struct twl6040_data *priv =
527 container_of(work, struct twl6040_data, hs_delayed_work.work);
528 struct snd_soc_codec *codec = priv->codec;
529 struct twl6040_output *headset = &priv->headset;
530 unsigned int delay = headset->step_delay;
531 int i, headset_complete;
532
533 /* do we need to ramp at all ? */
534 if (headset->ramp == TWL6040_RAMP_NONE)
535 return;
536
537 /* HS PGA volumes have 4 bits of resolution to ramp */
538 for (i = 0; i <= 16; i++) {
1fbe9952
ACG		 539 headset_complete = twl6040_hs_ramp_step(codec,
540 headset->left_step,
541 headset->right_step);
1bf84759
MOC		 542
543 /* ramp finished ? */
544 if (headset_complete)
545 break;
546
547 /*
548 * TODO: tune: delay is longer over 0dB
549 * as increases are larger.
550 */
551 if (i >= 8)
552 schedule_timeout_interruptible(msecs_to_jiffies(delay +
553 (delay >> 1)));
554 else
555 schedule_timeout_interruptible(msecs_to_jiffies(delay));
556 }
557
558 if (headset->ramp == TWL6040_RAMP_DOWN) {
559 headset->active = 0;
560 complete(&headset->ramp_done);
561 } else {
562 headset->active = 1;
563 }
564 headset->ramp = TWL6040_RAMP_NONE;
565}
566
567static void twl6040_pga_hf_work(struct work_struct *work)
568{
569 struct twl6040_data *priv =
570 container_of(work, struct twl6040_data, hf_delayed_work.work);
571 struct snd_soc_codec *codec = priv->codec;
572 struct twl6040_output *handsfree = &priv->handsfree;
573 unsigned int delay = handsfree->step_delay;
574 int i, handsfree_complete;
575
576 /* do we need to ramp at all ? */
577 if (handsfree->ramp == TWL6040_RAMP_NONE)
578 return;
579
580 /* HF PGA volumes have 5 bits of resolution to ramp */
581 for (i = 0; i <= 32; i++) {
1fbe9952
ACG		 582 handsfree_complete = twl6040_hf_ramp_step(codec,
583 handsfree->left_step,
584 handsfree->right_step);
1bf84759
MOC		 585
586 /* ramp finished ? */
587 if (handsfree_complete)
588 break;
589
590 /*
591 * TODO: tune: delay is longer over 0dB
592 * as increases are larger.
593 */
594 if (i >= 16)
595 schedule_timeout_interruptible(msecs_to_jiffies(delay +
596 (delay >> 1)));
597 else
598 schedule_timeout_interruptible(msecs_to_jiffies(delay));
599 }
600
601
602 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
603 handsfree->active = 0;
604 complete(&handsfree->ramp_done);
605 } else
606 handsfree->active = 1;
607 handsfree->ramp = TWL6040_RAMP_NONE;
608}
609
610static int pga_event(struct snd_soc_dapm_widget *w,
611 struct snd_kcontrol *kcontrol, int event)
612{
613 struct snd_soc_codec *codec = w->codec;
614 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
615 struct twl6040_output *out;
616 struct delayed_work *work;
617 struct workqueue_struct *queue;
618
619 switch (w->shift) {
620 case 2:
621 case 3:
622 out = &priv->headset;
623 work = &priv->hs_delayed_work;
624 queue = priv->hs_workqueue;
1fbe9952
ACG		 625 out->left_step = priv->hs_left_step;
626 out->right_step = priv->hs_right_step;
1bf84759
MOC		 627 out->step_delay = 5; /* 5 ms between volume ramp steps */
628 break;
629 case 4:
630 out = &priv->handsfree;
631 work = &priv->hf_delayed_work;
632 queue = priv->hf_workqueue;
1fbe9952
ACG		 633 out->left_step = priv->hf_left_step;
634 out->right_step = priv->hf_right_step;
1bf84759
MOC		 635 out->step_delay = 5; /* 5 ms between volume ramp steps */
636 if (SND_SOC_DAPM_EVENT_ON(event))
637 priv->non_lp++;
638 else
639 priv->non_lp--;
640 break;
641 default:
642 return -1;
643 }
644
645 switch (event) {
646 case SND_SOC_DAPM_POST_PMU:
647 if (out->active)
648 break;
649
650 /* don't use volume ramp for power-up */
651 out->left_step = out->left_vol;
652 out->right_step = out->right_vol;
653
654 if (!delayed_work_pending(work)) {
655 out->ramp = TWL6040_RAMP_UP;
656 queue_delayed_work(queue, work,
657 msecs_to_jiffies(1));
658 }
659 break;
660
661 case SND_SOC_DAPM_PRE_PMD:
662 if (!out->active)
663 break;
664
665 if (!delayed_work_pending(work)) {
666 /* use volume ramp for power-down */
1bf84759
MOC		 667 out->ramp = TWL6040_RAMP_DOWN;
668 INIT_COMPLETION(out->ramp_done);
669
670 queue_delayed_work(queue, work,
671 msecs_to_jiffies(1));
672
673 wait_for_completion_timeout(&out->ramp_done,
674 msecs_to_jiffies(2000));
675 }
676 break;
677 }
678
679 return 0;
680}
681
8ecbabd9
MLC		 682/* set headset dac and driver power mode */
683static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
684{
685 int hslctl, hsrctl;
686 int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
687
688 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
689 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
690
691 if (high_perf) {
692 hslctl &= ~mask;
693 hsrctl &= ~mask;
694 } else {
695 hslctl |= mask;
696 hsrctl |= mask;
697 }
698
699 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
700 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
701
702 return 0;
703}
704
0fad4ed7
JEC		 705static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
706 struct snd_kcontrol *kcontrol, int event)
707{
708 msleep(1);
709 return 0;
710}
711
8ecbabd9
MLC		 712static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
713 struct snd_kcontrol *kcontrol, int event)
714{
715 struct snd_soc_codec *codec = w->codec;
d4a8ca24 716 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 717 int ret = 0;
8ecbabd9 718
6bba63b6 719 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 720 priv->non_lp++;
6bba63b6
MLC		 721 if (!strcmp(w->name, "Earphone Driver")) {
722 /* Earphone doesn't support low power mode */
723 priv->hs_power_mode_locked = 1;
724 ret = headset_power_mode(codec, 1);
725 }
726 } else {
8ecbabd9 727 priv->non_lp--;
6bba63b6
MLC		 728 if (!strcmp(w->name, "Earphone Driver")) {
729 priv->hs_power_mode_locked = 0;
730 ret = headset_power_mode(codec, priv->hs_power_mode);
731 }
732 }
8ecbabd9 733
0fad4ed7
JEC		 734 msleep(1);
735
6bba63b6 736 return ret;
8ecbabd9
MLC		 737}
738
64ed9836
MB		 739static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
740 struct snd_soc_jack *jack, int report)
a2d2362e
JEC		 741{
742 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
743 int status;
744
745 mutex_lock(&priv->mutex);
746
747 /* Sync status */
748 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
749 if (status & TWL6040_PLUGCOMP)
750 snd_soc_jack_report(jack, report, report);
751 else
752 snd_soc_jack_report(jack, 0, report);
753
754 mutex_unlock(&priv->mutex);
755}
756
757void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
758 struct snd_soc_jack *jack, int report)
759{
760 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
761 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
762
763 hs_jack->jack = jack;
764 hs_jack->report = report;
765
766 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
767}
768EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
769
770static void twl6040_accessory_work(struct work_struct *work)
771{
772 struct twl6040_data *priv = container_of(work,
773 struct twl6040_data, delayed_work.work);
774 struct snd_soc_codec *codec = priv->codec;
775 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
776
777 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
778}
779
8ecbabd9 780/* audio interrupt handler */
fb34d3d5 781static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC		 782{
783 struct snd_soc_codec *codec = data;
fb34d3d5 784 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 785 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 786 u8 intid;
787
fb34d3d5 788 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
cf370a5a
OM		 789
790 if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT))
a2d2362e
JEC		 791 queue_delayed_work(priv->workqueue, &priv->delayed_work,
792 msecs_to_jiffies(200));
cf370a5a 793
8ecbabd9
MLC		 794 return IRQ_HANDLED;
795}
796
1bf84759
MOC		 797static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
798 struct snd_ctl_elem_value *ucontrol)
799{
800 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
801 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
802 struct twl6040_output *out = NULL;
803 struct soc_mixer_control *mc =
804 (struct soc_mixer_control *)kcontrol->private_value;
805 int ret;
806 unsigned int reg = mc->reg;
807
808 /* For HS and HF we shadow the values and only actually write
809 * them out when active in order to ensure the amplifier comes on
810 * as quietly as possible. */
811 switch (reg) {
812 case TWL6040_REG_HSGAIN:
813 out = &twl6040_priv->headset;
814 break;
815 default:
816 break;
817 }
818
819 if (out) {
820 out->left_vol = ucontrol->value.integer.value[0];
821 out->right_vol = ucontrol->value.integer.value[1];
822 if (!out->active)
823 return 1;
824 }
825
826 ret = snd_soc_put_volsw(kcontrol, ucontrol);
827 if (ret < 0)
828 return ret;
829
830 return 1;
831}
832
833static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
834 struct snd_ctl_elem_value *ucontrol)
835{
836 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
837 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
838 struct twl6040_output *out = &twl6040_priv->headset;
839 struct soc_mixer_control *mc =
840 (struct soc_mixer_control *)kcontrol->private_value;
841 unsigned int reg = mc->reg;
842
843 switch (reg) {
844 case TWL6040_REG_HSGAIN:
845 out = &twl6040_priv->headset;
846 ucontrol->value.integer.value[0] = out->left_vol;
847 ucontrol->value.integer.value[1] = out->right_vol;
848 return 0;
849
850 default:
851 break;
852 }
853
854 return snd_soc_get_volsw(kcontrol, ucontrol);
855}
856
857static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
858 struct snd_ctl_elem_value *ucontrol)
859{
860 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
861 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
862 struct twl6040_output *out = NULL;
863 struct soc_mixer_control *mc =
864 (struct soc_mixer_control *)kcontrol->private_value;
865 int ret;
866 unsigned int reg = mc->reg;
867
868 /* For HS and HF we shadow the values and only actually write
869 * them out when active in order to ensure the amplifier comes on
870 * as quietly as possible. */
871 switch (reg) {
872 case TWL6040_REG_HFLGAIN:
873 case TWL6040_REG_HFRGAIN:
874 out = &twl6040_priv->handsfree;
875 break;
876 default:
877 break;
878 }
879
880 if (out) {
881 out->left_vol = ucontrol->value.integer.value[0];
882 out->right_vol = ucontrol->value.integer.value[1];
883 if (!out->active)
884 return 1;
885 }
886
887 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
888 if (ret < 0)
889 return ret;
890
891 return 1;
892}
893
894static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
895 struct snd_ctl_elem_value *ucontrol)
896{
897 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
898 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
899 struct twl6040_output *out = &twl6040_priv->handsfree;
900 struct soc_mixer_control *mc =
901 (struct soc_mixer_control *)kcontrol->private_value;
902 unsigned int reg = mc->reg;
903
904 /* If these are cached registers use the cache */
905 switch (reg) {
906 case TWL6040_REG_HFLGAIN:
907 case TWL6040_REG_HFRGAIN:
908 out = &twl6040_priv->handsfree;
909 ucontrol->value.integer.value[0] = out->left_vol;
910 ucontrol->value.integer.value[1] = out->right_vol;
911 return 0;
912
913 default:
914 break;
915 }
916
917 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
918}
919
920/* double control with volume update */
921#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
922 xinvert, tlv_array)\
923{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
924 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
925 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
926 .tlv.p = (tlv_array), \
927 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
928 .put = twl6040_put_volsw, \
929 .private_value = (unsigned long)&(struct soc_mixer_control) \
930 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
931 .max = xmax, .platform_max = xmax, .invert = xinvert} }
932
933/* double control with volume update */
934#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
935 xinvert, tlv_array)\
936{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
937 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
938 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
939 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
940 .tlv.p = (tlv_array), \
941 .info = snd_soc_info_volsw_2r, \
942 .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
943 .private_value = (unsigned long)&(struct soc_mixer_control) \
944 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
945 .rshift = xshift, .max = xmax, .invert = xinvert}, }
946
8ecbabd9
MLC		 947/*
948 * MICATT volume control:
949 * from -6 to 0 dB in 6 dB steps
950 */
951static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
952
953/*
954 * MICGAIN volume control:
2763f45d 955 * from 6 to 30 dB in 6 dB steps
8ecbabd9 956 */
2763f45d 957static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 958
370a0314
JEC		 959/*
960 * AFMGAIN volume control:
1f71a3ba 961 * from -18 to 24 dB in 6 dB steps
370a0314 962 */
1f71a3ba 963static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 964
8ecbabd9
MLC		 965/*
966 * HSGAIN volume control:
967 * from -30 to 0 dB in 2 dB steps
968 */
969static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
970
971/*
972 * HFGAIN volume control:
973 * from -52 to 6 dB in 2 dB steps
974 */
975static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
976
871a05a7
JEC		 977/*
978 * EPGAIN volume control:
979 * from -24 to 6 dB in 2 dB steps
980 */
981static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
982
8ecbabd9
MLC		 983/* Left analog microphone selection */
984static const char *twl6040_amicl_texts[] =
985 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
986
987/* Right analog microphone selection */
988static const char *twl6040_amicr_texts[] =
989 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
990
991static const struct soc_enum twl6040_enum[] = {
cb973d78
FM		 992 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
993 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC		 994};
995
370a0314
JEC		 996static const char *twl6040_hs_texts[] = {
997 "Off", "HS DAC", "Line-In amp"
998};
999
1000static const struct soc_enum twl6040_hs_enum[] = {
1001 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
1002 twl6040_hs_texts),
1003 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
1004 twl6040_hs_texts),
1005};
1006
1007static const char *twl6040_hf_texts[] = {
1008 "Off", "HF DAC", "Line-In amp"
1009};
1010
1011static const struct soc_enum twl6040_hf_enum[] = {
1012 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
1013 twl6040_hf_texts),
1014 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
1015 twl6040_hf_texts),
1016};
1017
8ecbabd9
MLC		 1018static const struct snd_kcontrol_new amicl_control =
1019 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
1020
1021static const struct snd_kcontrol_new amicr_control =
1022 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
1023
1024/* Headset DAC playback switches */
370a0314
JEC		 1025static const struct snd_kcontrol_new hsl_mux_controls =
1026 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 1027
370a0314
JEC		 1028static const struct snd_kcontrol_new hsr_mux_controls =
1029 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC		 1030
1031/* Handsfree DAC playback switches */
370a0314
JEC		 1032static const struct snd_kcontrol_new hfl_mux_controls =
1033 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 1034
370a0314
JEC		 1035static const struct snd_kcontrol_new hfr_mux_controls =
1036 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 1037
871a05a7
JEC		 1038static const struct snd_kcontrol_new ep_driver_switch_controls =
1039 SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
1040
6bba63b6 1041/* Headset power mode */
7cca6067 1042static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC		 1043 "Low-Power", "High-Perfomance",
1044};
1045
7cca6067
PU		 1046static const struct soc_enum twl6040_power_mode_enum =
1047 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
1048 twl6040_power_mode_texts);
6bba63b6
MLC		 1049
1050static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
1051 struct snd_ctl_elem_value *ucontrol)
1052{
1053 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1054 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1055
1056 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
1057
1058 return 0;
1059}
1060
1061static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
1062 struct snd_ctl_elem_value *ucontrol)
1063{
1064 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1065 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1066 int high_perf = ucontrol->value.enumerated.item[0];
1067 int ret = 0;
1068
1069 if (!priv->hs_power_mode_locked)
1070 ret = headset_power_mode(codec, high_perf);
1071
1072 if (!ret)
1073 priv->hs_power_mode = high_perf;
1074
1075 return ret;
1076}
1077
af958c72
PU		 1078static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_value *ucontrol)
1080{
1081 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1082 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1083
1084 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1085
1086 return 0;
1087}
1088
1089static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1090 struct snd_ctl_elem_value *ucontrol)
1091{
1092 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1093 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1094
1095 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU		 1096
1097 return 0;
1098}
1099
1100int twl6040_get_clk_id(struct snd_soc_codec *codec)
1101{
1102 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1103
ff593ca1 1104 return priv->pll_power_mode;
af958c72
PU		 1105}
1106EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1107
8ecbabd9
MLC		 1108static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1109 /* Capture gains */
1110 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1111 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1112 SOC_DOUBLE_TLV("Capture Volume",
1113 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1114
370a0314
JEC		 1115 /* AFM gains */
1116 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1117 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1118
8ecbabd9 1119 /* Playback gains */
1bf84759 1120 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 1121 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 1122 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 1123 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC		 1124 SOC_SINGLE_TLV("Earphone Playback Volume",
1125 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1126
7cca6067 1127 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC		 1128 twl6040_headset_power_get_enum,
1129 twl6040_headset_power_put_enum),
af958c72
PU		 1130
1131 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1132 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC		 1133};
1134
1135static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1136 /* Inputs */
1137 SND_SOC_DAPM_INPUT("MAINMIC"),
1138 SND_SOC_DAPM_INPUT("HSMIC"),
1139 SND_SOC_DAPM_INPUT("SUBMIC"),
1140 SND_SOC_DAPM_INPUT("AFML"),
1141 SND_SOC_DAPM_INPUT("AFMR"),
1142
1143 /* Outputs */
1144 SND_SOC_DAPM_OUTPUT("HSOL"),
1145 SND_SOC_DAPM_OUTPUT("HSOR"),
1146 SND_SOC_DAPM_OUTPUT("HFL"),
1147 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1148 SND_SOC_DAPM_OUTPUT("EP"),
8ecbabd9
MLC		 1149
1150 /* Analog input muxes for the capture amplifiers */
1151 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1152 SND_SOC_NOPM, 0, 0, &amicl_control),
1153 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1154 SND_SOC_NOPM, 0, 0, &amicr_control),
1155
1156 /* Analog capture PGAs */
1157 SND_SOC_DAPM_PGA("MicAmpL",
1158 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1159 SND_SOC_DAPM_PGA("MicAmpR",
1160 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1161
370a0314
JEC		 1162 /* Auxiliary FM PGAs */
1163 SND_SOC_DAPM_PGA("AFMAmpL",
1164 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1165 SND_SOC_DAPM_PGA("AFMAmpR",
1166 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1167
8ecbabd9
MLC		 1168 /* ADCs */
1169 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1170 TWL6040_REG_MICLCTL, 2, 0),
1171 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1172 TWL6040_REG_MICRCTL, 2, 0),
1173
1174 /* Microphone bias */
1175 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1176 TWL6040_REG_AMICBCTL, 0, 0),
1177 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1178 TWL6040_REG_AMICBCTL, 4, 0),
1179 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1180 TWL6040_REG_DMICBCTL, 0, 0),
1181 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1182 TWL6040_REG_DMICBCTL, 4, 0),
1183
1184 /* DACs */
0fad4ed7
JEC		 1185 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1186 TWL6040_REG_HSLCTL, 0, 0,
1187 twl6040_hs_dac_event,
1188 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1189 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1190 TWL6040_REG_HSRCTL, 0, 0,
1191 twl6040_hs_dac_event,
1192 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 1193 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1194 TWL6040_REG_HFLCTL, 0, 0,
1195 twl6040_power_mode_event,
1196 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1197 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1198 TWL6040_REG_HFRCTL, 0, 0,
1199 twl6040_power_mode_event,
1200 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1201
370a0314
JEC		 1202 SND_SOC_DAPM_MUX("HF Left Playback",
1203 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
1204 SND_SOC_DAPM_MUX("HF Right Playback",
1205 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1206 /* Analog playback Muxes */
1207 SND_SOC_DAPM_MUX("HS Left Playback",
1208 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
1209 SND_SOC_DAPM_MUX("HS Right Playback",
1210 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1211
0fad4ed7 1212 /* Analog playback drivers */
f769bdf2 1213 SND_SOC_DAPM_OUT_DRV_E("Handsfree Left Driver",
0fad4ed7 1214 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
1bf84759
MOC		 1215 pga_event,
1216 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1217 SND_SOC_DAPM_OUT_DRV_E("Handsfree Right Driver",
0fad4ed7 1218 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
1bf84759
MOC		 1219 pga_event,
1220 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1221 SND_SOC_DAPM_OUT_DRV_E("Headset Left Driver",
1bf84759
MOC		 1222 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
1223 pga_event,
1224 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1225 SND_SOC_DAPM_OUT_DRV_E("Headset Right Driver",
1bf84759
MOC		 1226 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
1227 pga_event,
1228 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
871a05a7
JEC		 1229 SND_SOC_DAPM_SWITCH_E("Earphone Driver",
1230 SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
1231 twl6040_power_mode_event,
1232 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 1233
1234 /* Analog playback PGAs */
1235 SND_SOC_DAPM_PGA("HFDAC Left PGA",
1236 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
1237 SND_SOC_DAPM_PGA("HFDAC Right PGA",
1238 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1239
1240};
1241
1242static const struct snd_soc_dapm_route intercon[] = {
1243 /* Capture path */
1244 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1245 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1246 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1247
1248 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1249 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1250 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1251
1252 {"MicAmpL", NULL, "Analog Left Capture Route"},
1253 {"MicAmpR", NULL, "Analog Right Capture Route"},
1254
1255 {"ADC Left", NULL, "MicAmpL"},
1256 {"ADC Right", NULL, "MicAmpR"},
1257
370a0314
JEC		 1258 /* AFM path */
1259 {"AFMAmpL", "NULL", "AFML"},
1260 {"AFMAmpR", "NULL", "AFMR"},
1261
1262 {"HS Left Playback", "HS DAC", "HSDAC Left"},
1263 {"HS Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1264
370a0314
JEC		 1265 {"HS Right Playback", "HS DAC", "HSDAC Right"},
1266 {"HS Right Playback", "Line-In amp", "AFMAmpR"},
1267
1268 {"Headset Left Driver", "NULL", "HS Left Playback"},
1269 {"Headset Right Driver", "NULL", "HS Right Playback"},
8ecbabd9
MLC		 1270
1271 {"HSOL", NULL, "Headset Left Driver"},
1272 {"HSOR", NULL, "Headset Right Driver"},
1273
871a05a7
JEC		 1274 /* Earphone playback path */
1275 {"Earphone Driver", "Switch", "HSDAC Left"},
1276 {"EP", NULL, "Earphone Driver"},
1277
370a0314
JEC		 1278 {"HF Left Playback", "HF DAC", "HFDAC Left"},
1279 {"HF Left Playback", "Line-In amp", "AFMAmpL"},
1280
1281 {"HF Right Playback", "HF DAC", "HFDAC Right"},
1282 {"HF Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1283
370a0314
JEC		 1284 {"HFDAC Left PGA", NULL, "HF Left Playback"},
1285 {"HFDAC Right PGA", NULL, "HF Right Playback"},
8ecbabd9
MLC		 1286
1287 {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
1288 {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
1289
1290 {"HFL", NULL, "Handsfree Left Driver"},
1291 {"HFR", NULL, "Handsfree Right Driver"},
1292};
1293
1294static int twl6040_add_widgets(struct snd_soc_codec *codec)
1295{
ce6120cc 1296 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1297
ce6120cc
LG		 1298 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1299 ARRAY_SIZE(twl6040_dapm_widgets));
1300 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1301 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC		 1302
1303 return 0;
1304}
1305
8ecbabd9
MLC		 1306static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1307 enum snd_soc_bias_level level)
1308{
fb34d3d5 1309 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1310 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1311 int ret;
1312
1313 switch (level) {
1314 case SND_SOC_BIAS_ON:
1315 break;
1316 case SND_SOC_BIAS_PREPARE:
1317 break;
1318 case SND_SOC_BIAS_STANDBY:
1319 if (priv->codec_powered)
1320 break;
1321
fb34d3d5
MLC		 1322 ret = twl6040_power(twl6040, 1);
1323 if (ret)
1324 return ret;
8ecbabd9 1325
fb34d3d5 1326 priv->codec_powered = 1;
8ecbabd9
MLC		 1327
1328 /* initialize vdd/vss registers with reg_cache */
1329 twl6040_init_vdd_regs(codec);
65b7cecc
OM		 1330
1331 /* Set external boost GPO */
1332 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC		 1333 break;
1334 case SND_SOC_BIAS_OFF:
1335 if (!priv->codec_powered)
1336 break;
1337
fb34d3d5 1338 twl6040_power(twl6040, 0);
8ecbabd9
MLC		 1339 priv->codec_powered = 0;
1340 break;
1341 }
1342
ce6120cc 1343 codec->dapm.bias_level = level;
8ecbabd9
MLC		 1344
1345 return 0;
1346}
1347
8ecbabd9
MLC		 1348static int twl6040_startup(struct snd_pcm_substream *substream,
1349 struct snd_soc_dai *dai)
1350{
1351 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1352 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1353 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1354
8ecbabd9
MLC		 1355 snd_pcm_hw_constraint_list(substream->runtime, 0,
1356 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1357 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC		 1358
1359 return 0;
1360}
1361
1362static int twl6040_hw_params(struct snd_pcm_substream *substream,
1363 struct snd_pcm_hw_params *params,
1364 struct snd_soc_dai *dai)
1365{
1366 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1367 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1368 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1369 int rate;
1370
8ecbabd9
MLC		 1371 rate = params_rate(params);
1372 switch (rate) {
60ea4cec
OM		 1373 case 11250:
1374 case 22500:
1375 case 44100:
8ecbabd9 1376 case 88200:
753621c2
PU		 1377 /* These rates are not supported when HPPLL is in use */
1378 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1379 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1380 rate);
1381 return -EINVAL;
1382 }
1383 /* Capture is not supported with 17.64MHz sysclk */
1384 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1385 dev_err(codec->dev,
1386 "capture mode is not supported at %dHz\n",
1387 rate);
1388 return -EINVAL;
1389 }
8ecbabd9
MLC		 1390 priv->sysclk = 17640000;
1391 break;
60ea4cec
OM		 1392 case 8000:
1393 case 16000:
1394 case 32000:
1395 case 48000:
8ecbabd9 1396 case 96000:
8ecbabd9
MLC		 1397 priv->sysclk = 19200000;
1398 break;
1399 default:
1400 dev_err(codec->dev, "unsupported rate %d\n", rate);
1401 return -EINVAL;
1402 }
1403
8ecbabd9
MLC		 1404 return 0;
1405}
1406
4e624d06
OM		 1407static int twl6040_prepare(struct snd_pcm_substream *substream,
1408 struct snd_soc_dai *dai)
8ecbabd9
MLC		 1409{
1410 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1411 struct snd_soc_codec *codec = rtd->codec;
753621c2 1412 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1413 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1414 int ret;
8ecbabd9 1415
4e624d06
OM		 1416 if (!priv->sysclk) {
1417 dev_err(codec->dev,
1418 "no mclk configured, call set_sysclk() on init\n");
1419 return -EINVAL;
1420 }
1421
4e624d06 1422 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC		 1423 dev_err(codec->dev,
1424 "some enabled paths aren't supported at %dHz\n",
1425 priv->sysclk);
1426 return -EPERM;
8ecbabd9 1427 }
753621c2
PU		 1428
1429 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1430 if (ret) {
1431 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1432 return -EPERM;
1433 }
1434
8ecbabd9
MLC		 1435 return 0;
1436}
1437
1438static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1439 int clk_id, unsigned int freq, int dir)
1440{
1441 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1442 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1443
1444 switch (clk_id) {
1445 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1446 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU		 1447 priv->pll = clk_id;
1448 priv->clk_in = freq;
8ecbabd9
MLC		 1449 break;
1450 default:
1451 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1452 return -EINVAL;
1453 }
1454
1455 return 0;
1456}
1457
1458static struct snd_soc_dai_ops twl6040_dai_ops = {
1459 .startup = twl6040_startup,
1460 .hw_params = twl6040_hw_params,
4e624d06 1461 .prepare = twl6040_prepare,
8ecbabd9
MLC		 1462 .set_sysclk = twl6040_set_dai_sysclk,
1463};
1464
6510bdc3 1465static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1466{
f0fba2ad 1467 .name = "twl6040-hifi",
8ecbabd9
MLC		 1468 .playback = {
1469 .stream_name = "Playback",
1470 .channels_min = 1,
21385eeb
PU		 1471 .channels_max = 2,
1472 .rates = TWL6040_RATES,
1473 .formats = TWL6040_FORMATS,
1474 },
1475 .capture = {
1476 .stream_name = "Capture",
1477 .channels_min = 1,
1478 .channels_max = 2,
8ecbabd9
MLC		 1479 .rates = TWL6040_RATES,
1480 .formats = TWL6040_FORMATS,
1481 },
21385eeb
PU		 1482 .ops = &twl6040_dai_ops,
1483},
6510bdc3
LG		 1484{
1485 .name = "twl6040-ul",
8ecbabd9
MLC		 1486 .capture = {
1487 .stream_name = "Capture",
1488 .channels_min = 1,
1489 .channels_max = 2,
1490 .rates = TWL6040_RATES,
1491 .formats = TWL6040_FORMATS,
1492 },
1493 .ops = &twl6040_dai_ops,
6510bdc3
LG		 1494},
1495{
1496 .name = "twl6040-dl1",
8ecbabd9 1497 .playback = {
6510bdc3 1498 .stream_name = "Headset Playback",
8ecbabd9 1499 .channels_min = 1,
6510bdc3 1500 .channels_max = 2,
8ecbabd9
MLC		 1501 .rates = TWL6040_RATES,
1502 .formats = TWL6040_FORMATS,
1503 },
6510bdc3
LG		 1504 .ops = &twl6040_dai_ops,
1505},
1506{
1507 .name = "twl6040-dl2",
1508 .playback = {
1509 .stream_name = "Handsfree Playback",
8ecbabd9
MLC		 1510 .channels_min = 1,
1511 .channels_max = 2,
1512 .rates = TWL6040_RATES,
1513 .formats = TWL6040_FORMATS,
1514 },
1515 .ops = &twl6040_dai_ops,
6510bdc3
LG		 1516},
1517{
1518 .name = "twl6040-vib",
1519 .playback = {
1520 .stream_name = "Vibra Playback",
1521 .channels_min = 2,
1522 .channels_max = 2,
1523 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1524 .formats = TWL6040_FORMATS,
1525 },
1526 .ops = &twl6040_dai_ops,
1527},
8ecbabd9 1528};
8ecbabd9
MLC		 1529
1530#ifdef CONFIG_PM
f0fba2ad 1531static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1532{
8ecbabd9
MLC		 1533 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1534
1535 return 0;
1536}
1537
f0fba2ad 1538static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1539{
8ecbabd9 1540 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1541 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC		 1542
1543 return 0;
1544}
1545#else
1546#define twl6040_suspend NULL
1547#define twl6040_resume NULL
1548#endif
1549
f0fba2ad 1550static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1551{
8ecbabd9 1552 struct twl6040_data *priv;
1fbe9952 1553 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU		 1554 struct platform_device *pdev = container_of(codec->dev,
1555 struct platform_device, dev);
8ecbabd9
MLC		 1556 int ret = 0;
1557
1558 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1559 if (priv == NULL)
1560 return -ENOMEM;
f0fba2ad 1561 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1562
a2d2362e 1563 priv->codec = codec;
fb34d3d5 1564 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1565
1fbe9952
ACG		 1566 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1567 priv->hs_left_step = pdata->hs_left_step;
1568 priv->hs_right_step = pdata->hs_right_step;
1569 } else {
1570 priv->hs_left_step = 1;
1571 priv->hs_right_step = 1;
1572 }
99903ea2 1573
1fbe9952
ACG		 1574 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1575 priv->hf_left_step = pdata->hf_left_step;
1576 priv->hf_right_step = pdata->hf_right_step;
1577 } else {
1578 priv->hf_left_step = 1;
1579 priv->hf_right_step = 1;
1580 }
99903ea2 1581
2a433b9d
PU		 1582 priv->plug_irq = platform_get_irq(pdev, 0);
1583 if (priv->plug_irq < 0) {
1584 dev_err(codec->dev, "invalid irq\n");
1585 ret = -EINVAL;
1586 goto work_err;
1587 }
8ecbabd9 1588
a2d2362e 1589 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL		 1590 if (!priv->workqueue) {
1591 ret = -ENOMEM;
a2d2362e 1592 goto work_err;
19aab08d 1593 }
a2d2362e
JEC		 1594
1595 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1596
1597 mutex_init(&priv->mutex);
8ecbabd9 1598
1bf84759
MOC		 1599 init_completion(&priv->headset.ramp_done);
1600 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1601
1bf84759
MOC		 1602 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1603 if (priv->hf_workqueue == NULL) {
1604 ret = -ENOMEM;
fb34d3d5 1605 goto hfwq_err;
1bf84759
MOC		 1606 }
1607 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1608 if (priv->hs_workqueue == NULL) {
1609 ret = -ENOMEM;
fb34d3d5 1610 goto hswq_err;
1bf84759
MOC		 1611 }
1612
1613 INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
1614 INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
1615
2a433b9d
PU		 1616 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1617 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC		 1618 if (ret) {
1619 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1620 goto plugirq_err;
1621 }
1622
1623 /* init vio registers */
1624 twl6040_init_vio_regs(codec);
1625
8ecbabd9
MLC		 1626 /* power on device */
1627 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1628 if (ret)
1bf84759 1629 goto bias_err;
8ecbabd9 1630
f0fba2ad
LG		 1631 snd_soc_add_controls(codec, twl6040_snd_controls,
1632 ARRAY_SIZE(twl6040_snd_controls));
1633 twl6040_add_widgets(codec);
8ecbabd9
MLC		 1634
1635 return 0;
1636
1bf84759 1637bias_err:
2a433b9d 1638 free_irq(priv->plug_irq, codec);
fb34d3d5 1639plugirq_err:
1bf84759 1640 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1641hswq_err:
1bf84759 1642 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1643hfwq_err:
a2d2362e
JEC		 1644 destroy_workqueue(priv->workqueue);
1645work_err:
8ecbabd9
MLC		 1646 kfree(priv);
1647 return ret;
1648}
1649
f0fba2ad 1650static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1651{
f0fba2ad 1652 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1653
f0fba2ad 1654 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1655 free_irq(priv->plug_irq, codec);
a2d2362e 1656 destroy_workqueue(priv->workqueue);
1bf84759
MOC		 1657 destroy_workqueue(priv->hf_workqueue);
1658 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1659 kfree(priv);
8ecbabd9 1660
f0fba2ad
LG		 1661 return 0;
1662}
8ecbabd9 1663
f0fba2ad
LG		 1664static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1665 .probe = twl6040_probe,
1666 .remove = twl6040_remove,
1667 .suspend = twl6040_suspend,
1668 .resume = twl6040_resume,
1669 .read = twl6040_read_reg_cache,
1670 .write = twl6040_write,
1671 .set_bias_level = twl6040_set_bias_level,
1672 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1673 .reg_word_size = sizeof(u8),
1674 .reg_cache_default = twl6040_reg,
1675};
1676
1677static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1678{
6510bdc3
LG		 1679 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1680 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG		 1681}
1682
1683static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1684{
1685 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC		 1686 return 0;
1687}
1688
1689static struct platform_driver twl6040_codec_driver = {
1690 .driver = {
f0fba2ad 1691 .name = "twl6040-codec",
8ecbabd9
MLC		 1692 .owner = THIS_MODULE,
1693 },
1694 .probe = twl6040_codec_probe,
1695 .remove = __devexit_p(twl6040_codec_remove),
1696};
1697
1698static int __init twl6040_codec_init(void)
1699{
1700 return platform_driver_register(&twl6040_codec_driver);
1701}
1702module_init(twl6040_codec_init);
1703
1704static void __exit twl6040_codec_exit(void)
1705{
1706 platform_driver_unregister(&twl6040_codec_driver);
1707}
1708module_exit(twl6040_codec_exit);
1709
1710MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1711MODULE_AUTHOR("Misael Lopez Cruz");
1712MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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