OMAP4: SDP4430: Add twl6040 vibrator platform support
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
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1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
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31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
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36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
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42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
60struct twl6040_output {
61 u16 active;
62 u16 left_vol;
63 u16 right_vol;
64 u16 left_step;
65 u16 right_step;
66 unsigned int step_delay;
67 u16 ramp;
68 u16 mute;
69 struct completion ramp_done;
70};
8ecbabd9 71
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72struct twl6040_jack_data {
73 struct snd_soc_jack *jack;
74 int report;
75};
76
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77/* codec private data */
78struct twl6040_data {
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79 int codec_powered;
80 int pll;
81 int non_lp;
fb34d3d5 82 unsigned int clk_in;
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83 unsigned int sysclk;
84 struct snd_pcm_hw_constraint_list *sysclk_constraints;
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85 struct twl6040_jack_data hs_jack;
86 struct snd_soc_codec *codec;
87 struct workqueue_struct *workqueue;
88 struct delayed_work delayed_work;
89 struct mutex mutex;
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90 struct twl6040_output headset;
91 struct twl6040_output handsfree;
92 struct workqueue_struct *hf_workqueue;
93 struct workqueue_struct *hs_workqueue;
94 struct delayed_work hs_delayed_work;
95 struct delayed_work hf_delayed_work;
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96};
97
98/*
99 * twl6040 register cache & default register settings
100 */
101static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
102 0x00, /* not used 0x00 */
103 0x4B, /* TWL6040_ASICID (ro) 0x01 */
104 0x00, /* TWL6040_ASICREV (ro) 0x02 */
105 0x00, /* TWL6040_INTID 0x03 */
106 0x00, /* TWL6040_INTMR 0x04 */
107 0x00, /* TWL6040_NCPCTRL 0x05 */
108 0x00, /* TWL6040_LDOCTL 0x06 */
109 0x60, /* TWL6040_HPPLLCTL 0x07 */
110 0x00, /* TWL6040_LPPLLCTL 0x08 */
111 0x4A, /* TWL6040_LPPLLDIV 0x09 */
112 0x00, /* TWL6040_AMICBCTL 0x0A */
113 0x00, /* TWL6040_DMICBCTL 0x0B */
114 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
115 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
116 0x00, /* TWL6040_MICGAIN 0x0E */
117 0x1B, /* TWL6040_LINEGAIN 0x0F */
118 0x00, /* TWL6040_HSLCTL 0x10 */
119 0x00, /* TWL6040_HSRCTL 0x11 */
120 0x00, /* TWL6040_HSGAIN 0x12 */
121 0x00, /* TWL6040_EARCTL 0x13 */
122 0x00, /* TWL6040_HFLCTL 0x14 */
123 0x00, /* TWL6040_HFLGAIN 0x15 */
124 0x00, /* TWL6040_HFRCTL 0x16 */
125 0x00, /* TWL6040_HFRGAIN 0x17 */
126 0x00, /* TWL6040_VIBCTLL 0x18 */
127 0x00, /* TWL6040_VIBDATL 0x19 */
128 0x00, /* TWL6040_VIBCTLR 0x1A */
129 0x00, /* TWL6040_VIBDATR 0x1B */
130 0x00, /* TWL6040_HKCTL1 0x1C */
131 0x00, /* TWL6040_HKCTL2 0x1D */
132 0x00, /* TWL6040_GPOCTL 0x1E */
133 0x00, /* TWL6040_ALB 0x1F */
134 0x00, /* TWL6040_DLB 0x20 */
135 0x00, /* not used 0x21 */
136 0x00, /* not used 0x22 */
137 0x00, /* not used 0x23 */
138 0x00, /* not used 0x24 */
139 0x00, /* not used 0x25 */
140 0x00, /* not used 0x26 */
141 0x00, /* not used 0x27 */
142 0x00, /* TWL6040_TRIM1 0x28 */
143 0x00, /* TWL6040_TRIM2 0x29 */
144 0x00, /* TWL6040_TRIM3 0x2A */
145 0x00, /* TWL6040_HSOTRIM 0x2B */
146 0x00, /* TWL6040_HFOTRIM 0x2C */
147 0x09, /* TWL6040_ACCCTL 0x2D */
148 0x00, /* TWL6040_STATUS (ro) 0x2E */
149};
150
151/*
152 * twl6040 vio/gnd registers:
153 * registers under vio/gnd supply can be accessed
154 * before the power-up sequence, after NRESPWRON goes high
155 */
156static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
157 TWL6040_REG_ASICID,
158 TWL6040_REG_ASICREV,
159 TWL6040_REG_INTID,
160 TWL6040_REG_INTMR,
161 TWL6040_REG_NCPCTL,
162 TWL6040_REG_LDOCTL,
163 TWL6040_REG_AMICBCTL,
164 TWL6040_REG_DMICBCTL,
165 TWL6040_REG_HKCTL1,
166 TWL6040_REG_HKCTL2,
167 TWL6040_REG_GPOCTL,
168 TWL6040_REG_TRIM1,
169 TWL6040_REG_TRIM2,
170 TWL6040_REG_TRIM3,
171 TWL6040_REG_HSOTRIM,
172 TWL6040_REG_HFOTRIM,
173 TWL6040_REG_ACCCTL,
174 TWL6040_REG_STATUS,
175};
176
177/*
178 * twl6040 vdd/vss registers:
179 * registers under vdd/vss supplies can only be accessed
180 * after the power-up sequence
181 */
182static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
183 TWL6040_REG_HPPLLCTL,
184 TWL6040_REG_LPPLLCTL,
185 TWL6040_REG_LPPLLDIV,
186 TWL6040_REG_MICLCTL,
187 TWL6040_REG_MICRCTL,
188 TWL6040_REG_MICGAIN,
189 TWL6040_REG_LINEGAIN,
190 TWL6040_REG_HSLCTL,
191 TWL6040_REG_HSRCTL,
192 TWL6040_REG_HSGAIN,
193 TWL6040_REG_EARCTL,
194 TWL6040_REG_HFLCTL,
195 TWL6040_REG_HFLGAIN,
196 TWL6040_REG_HFRCTL,
197 TWL6040_REG_HFRGAIN,
198 TWL6040_REG_VIBCTLL,
199 TWL6040_REG_VIBDATL,
200 TWL6040_REG_VIBCTLR,
201 TWL6040_REG_VIBDATR,
202 TWL6040_REG_ALB,
203 TWL6040_REG_DLB,
204};
205
206/*
207 * read twl6040 register cache
208 */
209static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
210 unsigned int reg)
211{
212 u8 *cache = codec->reg_cache;
213
214 if (reg >= TWL6040_CACHEREGNUM)
215 return -EIO;
216
217 return cache[reg];
218}
219
220/*
221 * write twl6040 register cache
222 */
223static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
224 u8 reg, u8 value)
225{
226 u8 *cache = codec->reg_cache;
227
228 if (reg >= TWL6040_CACHEREGNUM)
229 return;
230 cache[reg] = value;
231}
232
233/*
234 * read from twl6040 hardware register
235 */
236static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
237 unsigned int reg)
238{
fb34d3d5 239 struct twl6040 *twl6040 = codec->control_data;
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240 u8 value;
241
242 if (reg >= TWL6040_CACHEREGNUM)
243 return -EIO;
244
fb34d3d5 245 value = twl6040_reg_read(twl6040, reg);
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246 twl6040_write_reg_cache(codec, reg, value);
247
248 return value;
249}
250
251/*
252 * write to the twl6040 register space
253 */
254static int twl6040_write(struct snd_soc_codec *codec,
255 unsigned int reg, unsigned int value)
256{
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257 struct twl6040 *twl6040 = codec->control_data;
258
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259 if (reg >= TWL6040_CACHEREGNUM)
260 return -EIO;
261
262 twl6040_write_reg_cache(codec, reg, value);
fb34d3d5 263 return twl6040_reg_write(twl6040, reg, value);
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264}
265
266static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
267{
268 u8 *cache = codec->reg_cache;
269 int reg, i;
270
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271 for (i = 0; i < TWL6040_VIOREGNUM; i++) {
272 reg = twl6040_vio_reg[i];
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273 /*
274 * skip read-only registers (ASICID, ASICREV, STATUS)
275 * and registers shared among MFD children
276 */
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277 switch (reg) {
278 case TWL6040_REG_ASICID:
279 case TWL6040_REG_ASICREV:
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280 case TWL6040_REG_INTID:
281 case TWL6040_REG_INTMR:
282 case TWL6040_REG_NCPCTL:
283 case TWL6040_REG_LDOCTL:
284 case TWL6040_REG_GPOCTL:
285 case TWL6040_REG_ACCCTL:
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286 case TWL6040_REG_STATUS:
287 continue;
288 default:
289 break;
290 }
291 twl6040_write(codec, reg, cache[reg]);
292 }
293}
294
295static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
296{
297 u8 *cache = codec->reg_cache;
298 int reg, i;
299
300 for (i = 0; i < TWL6040_VDDREGNUM; i++) {
301 reg = twl6040_vdd_reg[i];
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302 /* skip vibra and PLL registers */
303 switch (reg) {
304 case TWL6040_REG_VIBCTLL:
305 case TWL6040_REG_VIBDATL:
306 case TWL6040_REG_VIBCTLR:
307 case TWL6040_REG_VIBDATR:
308 case TWL6040_REG_HPPLLCTL:
309 case TWL6040_REG_LPPLLCTL:
310 case TWL6040_REG_LPPLLDIV:
311 continue;
312 default:
313 break;
314 }
315
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316 twl6040_write(codec, reg, cache[reg]);
317 }
318}
319
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320/*
321 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
322 */
323static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
324 unsigned int left_step, unsigned int right_step)
325{
326
327 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
328 struct twl6040_output *headset = &priv->headset;
329 int left_complete = 0, right_complete = 0;
330 u8 reg, val;
331
332 /* left channel */
333 left_step = (left_step > 0xF) ? 0xF : left_step;
334 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
335 val = (~reg & TWL6040_HSL_VOL_MASK);
336
337 if (headset->ramp == TWL6040_RAMP_UP) {
338 /* ramp step up */
339 if (val < headset->left_vol) {
340 val += left_step;
341 reg &= ~TWL6040_HSL_VOL_MASK;
342 twl6040_write(codec, TWL6040_REG_HSGAIN,
343 (reg | (~val & TWL6040_HSL_VOL_MASK)));
344 } else {
345 left_complete = 1;
346 }
347 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
348 /* ramp step down */
349 if (val > 0x0) {
350 val -= left_step;
351 reg &= ~TWL6040_HSL_VOL_MASK;
352 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
353 (~val & TWL6040_HSL_VOL_MASK));
354 } else {
355 left_complete = 1;
356 }
357 }
358
359 /* right channel */
360 right_step = (right_step > 0xF) ? 0xF : right_step;
361 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
362 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
363
364 if (headset->ramp == TWL6040_RAMP_UP) {
365 /* ramp step up */
366 if (val < headset->right_vol) {
367 val += right_step;
368 reg &= ~TWL6040_HSR_VOL_MASK;
369 twl6040_write(codec, TWL6040_REG_HSGAIN,
370 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
371 } else {
372 right_complete = 1;
373 }
374 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
375 /* ramp step down */
376 if (val > 0x0) {
377 val -= right_step;
378 reg &= ~TWL6040_HSR_VOL_MASK;
379 twl6040_write(codec, TWL6040_REG_HSGAIN,
380 reg | (~val << TWL6040_HSR_VOL_SHIFT));
381 } else {
382 right_complete = 1;
383 }
384 }
385
386 return left_complete & right_complete;
387}
388
389/*
390 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
391 */
392static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
393 unsigned int left_step, unsigned int right_step)
394{
395 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
396 struct twl6040_output *handsfree = &priv->handsfree;
397 int left_complete = 0, right_complete = 0;
398 u16 reg, val;
399
400 /* left channel */
401 left_step = (left_step > 0x1D) ? 0x1D : left_step;
402 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
403 reg = 0x1D - reg;
404 val = (reg & TWL6040_HF_VOL_MASK);
405 if (handsfree->ramp == TWL6040_RAMP_UP) {
406 /* ramp step up */
407 if (val < handsfree->left_vol) {
408 val += left_step;
409 reg &= ~TWL6040_HF_VOL_MASK;
410 twl6040_write(codec, TWL6040_REG_HFLGAIN,
411 reg | (0x1D - val));
412 } else {
413 left_complete = 1;
414 }
415 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
416 /* ramp step down */
417 if (val > 0) {
418 val -= left_step;
419 reg &= ~TWL6040_HF_VOL_MASK;
420 twl6040_write(codec, TWL6040_REG_HFLGAIN,
421 reg | (0x1D - val));
422 } else {
423 left_complete = 1;
424 }
425 }
426
427 /* right channel */
428 right_step = (right_step > 0x1D) ? 0x1D : right_step;
429 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
430 reg = 0x1D - reg;
431 val = (reg & TWL6040_HF_VOL_MASK);
432 if (handsfree->ramp == TWL6040_RAMP_UP) {
433 /* ramp step up */
434 if (val < handsfree->right_vol) {
435 val += right_step;
436 reg &= ~TWL6040_HF_VOL_MASK;
437 twl6040_write(codec, TWL6040_REG_HFRGAIN,
438 reg | (0x1D - val));
439 } else {
440 right_complete = 1;
441 }
442 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
443 /* ramp step down */
444 if (val > 0) {
445 val -= right_step;
446 reg &= ~TWL6040_HF_VOL_MASK;
447 twl6040_write(codec, TWL6040_REG_HFRGAIN,
448 reg | (0x1D - val));
449 }
450 }
451
452 return left_complete & right_complete;
453}
454
455/*
456 * This work ramps both output PGAs at stream start/stop time to
457 * minimise pop associated with DAPM power switching.
458 */
459static void twl6040_pga_hs_work(struct work_struct *work)
460{
461 struct twl6040_data *priv =
462 container_of(work, struct twl6040_data, hs_delayed_work.work);
463 struct snd_soc_codec *codec = priv->codec;
464 struct twl6040_output *headset = &priv->headset;
465 unsigned int delay = headset->step_delay;
466 int i, headset_complete;
467
468 /* do we need to ramp at all ? */
469 if (headset->ramp == TWL6040_RAMP_NONE)
470 return;
471
472 /* HS PGA volumes have 4 bits of resolution to ramp */
473 for (i = 0; i <= 16; i++) {
474 headset_complete = 1;
475 if (headset->ramp != TWL6040_RAMP_NONE)
476 headset_complete = twl6040_hs_ramp_step(codec,
477 headset->left_step,
478 headset->right_step);
479
480 /* ramp finished ? */
481 if (headset_complete)
482 break;
483
484 /*
485 * TODO: tune: delay is longer over 0dB
486 * as increases are larger.
487 */
488 if (i >= 8)
489 schedule_timeout_interruptible(msecs_to_jiffies(delay +
490 (delay >> 1)));
491 else
492 schedule_timeout_interruptible(msecs_to_jiffies(delay));
493 }
494
495 if (headset->ramp == TWL6040_RAMP_DOWN) {
496 headset->active = 0;
497 complete(&headset->ramp_done);
498 } else {
499 headset->active = 1;
500 }
501 headset->ramp = TWL6040_RAMP_NONE;
502}
503
504static void twl6040_pga_hf_work(struct work_struct *work)
505{
506 struct twl6040_data *priv =
507 container_of(work, struct twl6040_data, hf_delayed_work.work);
508 struct snd_soc_codec *codec = priv->codec;
509 struct twl6040_output *handsfree = &priv->handsfree;
510 unsigned int delay = handsfree->step_delay;
511 int i, handsfree_complete;
512
513 /* do we need to ramp at all ? */
514 if (handsfree->ramp == TWL6040_RAMP_NONE)
515 return;
516
517 /* HF PGA volumes have 5 bits of resolution to ramp */
518 for (i = 0; i <= 32; i++) {
519 handsfree_complete = 1;
520 if (handsfree->ramp != TWL6040_RAMP_NONE)
521 handsfree_complete = twl6040_hf_ramp_step(codec,
522 handsfree->left_step,
523 handsfree->right_step);
524
525 /* ramp finished ? */
526 if (handsfree_complete)
527 break;
528
529 /*
530 * TODO: tune: delay is longer over 0dB
531 * as increases are larger.
532 */
533 if (i >= 16)
534 schedule_timeout_interruptible(msecs_to_jiffies(delay +
535 (delay >> 1)));
536 else
537 schedule_timeout_interruptible(msecs_to_jiffies(delay));
538 }
539
540
541 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
542 handsfree->active = 0;
543 complete(&handsfree->ramp_done);
544 } else
545 handsfree->active = 1;
546 handsfree->ramp = TWL6040_RAMP_NONE;
547}
548
549static int pga_event(struct snd_soc_dapm_widget *w,
550 struct snd_kcontrol *kcontrol, int event)
551{
552 struct snd_soc_codec *codec = w->codec;
553 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
554 struct twl6040_output *out;
555 struct delayed_work *work;
556 struct workqueue_struct *queue;
557
558 switch (w->shift) {
559 case 2:
560 case 3:
561 out = &priv->headset;
562 work = &priv->hs_delayed_work;
563 queue = priv->hs_workqueue;
564 out->step_delay = 5; /* 5 ms between volume ramp steps */
565 break;
566 case 4:
567 out = &priv->handsfree;
568 work = &priv->hf_delayed_work;
569 queue = priv->hf_workqueue;
570 out->step_delay = 5; /* 5 ms between volume ramp steps */
571 if (SND_SOC_DAPM_EVENT_ON(event))
572 priv->non_lp++;
573 else
574 priv->non_lp--;
575 break;
576 default:
577 return -1;
578 }
579
580 switch (event) {
581 case SND_SOC_DAPM_POST_PMU:
582 if (out->active)
583 break;
584
585 /* don't use volume ramp for power-up */
586 out->left_step = out->left_vol;
587 out->right_step = out->right_vol;
588
589 if (!delayed_work_pending(work)) {
590 out->ramp = TWL6040_RAMP_UP;
591 queue_delayed_work(queue, work,
592 msecs_to_jiffies(1));
593 }
594 break;
595
596 case SND_SOC_DAPM_PRE_PMD:
597 if (!out->active)
598 break;
599
600 if (!delayed_work_pending(work)) {
601 /* use volume ramp for power-down */
602 out->left_step = 1;
603 out->right_step = 1;
604 out->ramp = TWL6040_RAMP_DOWN;
605 INIT_COMPLETION(out->ramp_done);
606
607 queue_delayed_work(queue, work,
608 msecs_to_jiffies(1));
609
610 wait_for_completion_timeout(&out->ramp_done,
611 msecs_to_jiffies(2000));
612 }
613 break;
614 }
615
616 return 0;
617}
618
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619/* set headset dac and driver power mode */
620static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
621{
622 int hslctl, hsrctl;
623 int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
624
625 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
626 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
627
628 if (high_perf) {
629 hslctl &= ~mask;
630 hsrctl &= ~mask;
631 } else {
632 hslctl |= mask;
633 hsrctl |= mask;
634 }
635
636 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
637 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
638
639 return 0;
640}
641
0fad4ed7
JEC
642static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
643 struct snd_kcontrol *kcontrol, int event)
644{
645 msleep(1);
646 return 0;
647}
648
8ecbabd9
MLC
649static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
650 struct snd_kcontrol *kcontrol, int event)
651{
652 struct snd_soc_codec *codec = w->codec;
d4a8ca24 653 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
654
655 if (SND_SOC_DAPM_EVENT_ON(event))
656 priv->non_lp++;
657 else
658 priv->non_lp--;
659
0fad4ed7
JEC
660 msleep(1);
661
8ecbabd9
MLC
662 return 0;
663}
664
64ed9836
MB
665static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
666 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
667{
668 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
669 int status;
670
671 mutex_lock(&priv->mutex);
672
673 /* Sync status */
674 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
675 if (status & TWL6040_PLUGCOMP)
676 snd_soc_jack_report(jack, report, report);
677 else
678 snd_soc_jack_report(jack, 0, report);
679
680 mutex_unlock(&priv->mutex);
681}
682
683void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
684 struct snd_soc_jack *jack, int report)
685{
686 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
687 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
688
689 hs_jack->jack = jack;
690 hs_jack->report = report;
691
692 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
693}
694EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
695
696static void twl6040_accessory_work(struct work_struct *work)
697{
698 struct twl6040_data *priv = container_of(work,
699 struct twl6040_data, delayed_work.work);
700 struct snd_soc_codec *codec = priv->codec;
701 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
702
703 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
704}
705
8ecbabd9 706/* audio interrupt handler */
fb34d3d5 707static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
708{
709 struct snd_soc_codec *codec = data;
fb34d3d5 710 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 711 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
712 u8 intid;
713
fb34d3d5 714 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
cf370a5a
OM
715
716 if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT))
a2d2362e
JEC
717 queue_delayed_work(priv->workqueue, &priv->delayed_work,
718 msecs_to_jiffies(200));
cf370a5a 719
8ecbabd9
MLC
720 return IRQ_HANDLED;
721}
722
1bf84759
MOC
723static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
724 struct snd_ctl_elem_value *ucontrol)
725{
726 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
727 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
728 struct twl6040_output *out = NULL;
729 struct soc_mixer_control *mc =
730 (struct soc_mixer_control *)kcontrol->private_value;
731 int ret;
732 unsigned int reg = mc->reg;
733
734 /* For HS and HF we shadow the values and only actually write
735 * them out when active in order to ensure the amplifier comes on
736 * as quietly as possible. */
737 switch (reg) {
738 case TWL6040_REG_HSGAIN:
739 out = &twl6040_priv->headset;
740 break;
741 default:
742 break;
743 }
744
745 if (out) {
746 out->left_vol = ucontrol->value.integer.value[0];
747 out->right_vol = ucontrol->value.integer.value[1];
748 if (!out->active)
749 return 1;
750 }
751
752 ret = snd_soc_put_volsw(kcontrol, ucontrol);
753 if (ret < 0)
754 return ret;
755
756 return 1;
757}
758
759static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
760 struct snd_ctl_elem_value *ucontrol)
761{
762 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
763 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
764 struct twl6040_output *out = &twl6040_priv->headset;
765 struct soc_mixer_control *mc =
766 (struct soc_mixer_control *)kcontrol->private_value;
767 unsigned int reg = mc->reg;
768
769 switch (reg) {
770 case TWL6040_REG_HSGAIN:
771 out = &twl6040_priv->headset;
772 ucontrol->value.integer.value[0] = out->left_vol;
773 ucontrol->value.integer.value[1] = out->right_vol;
774 return 0;
775
776 default:
777 break;
778 }
779
780 return snd_soc_get_volsw(kcontrol, ucontrol);
781}
782
783static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
784 struct snd_ctl_elem_value *ucontrol)
785{
786 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
787 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
788 struct twl6040_output *out = NULL;
789 struct soc_mixer_control *mc =
790 (struct soc_mixer_control *)kcontrol->private_value;
791 int ret;
792 unsigned int reg = mc->reg;
793
794 /* For HS and HF we shadow the values and only actually write
795 * them out when active in order to ensure the amplifier comes on
796 * as quietly as possible. */
797 switch (reg) {
798 case TWL6040_REG_HFLGAIN:
799 case TWL6040_REG_HFRGAIN:
800 out = &twl6040_priv->handsfree;
801 break;
802 default:
803 break;
804 }
805
806 if (out) {
807 out->left_vol = ucontrol->value.integer.value[0];
808 out->right_vol = ucontrol->value.integer.value[1];
809 if (!out->active)
810 return 1;
811 }
812
813 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
814 if (ret < 0)
815 return ret;
816
817 return 1;
818}
819
820static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
821 struct snd_ctl_elem_value *ucontrol)
822{
823 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
824 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
825 struct twl6040_output *out = &twl6040_priv->handsfree;
826 struct soc_mixer_control *mc =
827 (struct soc_mixer_control *)kcontrol->private_value;
828 unsigned int reg = mc->reg;
829
830 /* If these are cached registers use the cache */
831 switch (reg) {
832 case TWL6040_REG_HFLGAIN:
833 case TWL6040_REG_HFRGAIN:
834 out = &twl6040_priv->handsfree;
835 ucontrol->value.integer.value[0] = out->left_vol;
836 ucontrol->value.integer.value[1] = out->right_vol;
837 return 0;
838
839 default:
840 break;
841 }
842
843 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
844}
845
846/* double control with volume update */
847#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
848 xinvert, tlv_array)\
849{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
850 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
851 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
852 .tlv.p = (tlv_array), \
853 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
854 .put = twl6040_put_volsw, \
855 .private_value = (unsigned long)&(struct soc_mixer_control) \
856 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
857 .max = xmax, .platform_max = xmax, .invert = xinvert} }
858
859/* double control with volume update */
860#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
861 xinvert, tlv_array)\
862{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
863 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
864 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
865 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
866 .tlv.p = (tlv_array), \
867 .info = snd_soc_info_volsw_2r, \
868 .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
869 .private_value = (unsigned long)&(struct soc_mixer_control) \
870 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
871 .rshift = xshift, .max = xmax, .invert = xinvert}, }
872
8ecbabd9
MLC
873/*
874 * MICATT volume control:
875 * from -6 to 0 dB in 6 dB steps
876 */
877static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
878
879/*
880 * MICGAIN volume control:
9020808b 881 * from -6 to 30 dB in 6 dB steps
8ecbabd9 882 */
9020808b 883static DECLARE_TLV_DB_SCALE(mic_amp_tlv, -600, 600, 0);
8ecbabd9 884
370a0314
JEC
885/*
886 * AFMGAIN volume control:
1f71a3ba 887 * from -18 to 24 dB in 6 dB steps
370a0314 888 */
1f71a3ba 889static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 890
8ecbabd9
MLC
891/*
892 * HSGAIN volume control:
893 * from -30 to 0 dB in 2 dB steps
894 */
895static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
896
897/*
898 * HFGAIN volume control:
899 * from -52 to 6 dB in 2 dB steps
900 */
901static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
902
871a05a7
JEC
903/*
904 * EPGAIN volume control:
905 * from -24 to 6 dB in 2 dB steps
906 */
907static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
908
8ecbabd9
MLC
909/* Left analog microphone selection */
910static const char *twl6040_amicl_texts[] =
911 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
912
913/* Right analog microphone selection */
914static const char *twl6040_amicr_texts[] =
915 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
916
917static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
918 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
919 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
920};
921
370a0314
JEC
922static const char *twl6040_hs_texts[] = {
923 "Off", "HS DAC", "Line-In amp"
924};
925
926static const struct soc_enum twl6040_hs_enum[] = {
927 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
928 twl6040_hs_texts),
929 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
930 twl6040_hs_texts),
931};
932
933static const char *twl6040_hf_texts[] = {
934 "Off", "HF DAC", "Line-In amp"
935};
936
937static const struct soc_enum twl6040_hf_enum[] = {
938 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
939 twl6040_hf_texts),
940 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
941 twl6040_hf_texts),
942};
943
8ecbabd9
MLC
944static const struct snd_kcontrol_new amicl_control =
945 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
946
947static const struct snd_kcontrol_new amicr_control =
948 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
949
950/* Headset DAC playback switches */
370a0314
JEC
951static const struct snd_kcontrol_new hsl_mux_controls =
952 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 953
370a0314
JEC
954static const struct snd_kcontrol_new hsr_mux_controls =
955 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
956
957/* Handsfree DAC playback switches */
370a0314
JEC
958static const struct snd_kcontrol_new hfl_mux_controls =
959 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 960
370a0314
JEC
961static const struct snd_kcontrol_new hfr_mux_controls =
962 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 963
871a05a7
JEC
964static const struct snd_kcontrol_new ep_driver_switch_controls =
965 SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
966
8ecbabd9
MLC
967static const struct snd_kcontrol_new twl6040_snd_controls[] = {
968 /* Capture gains */
969 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
970 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
971 SOC_DOUBLE_TLV("Capture Volume",
972 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
973
370a0314
JEC
974 /* AFM gains */
975 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 976 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 977
8ecbabd9 978 /* Playback gains */
1bf84759 979 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 980 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 981 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 982 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC
983 SOC_SINGLE_TLV("Earphone Playback Volume",
984 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
8ecbabd9
MLC
985};
986
987static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
988 /* Inputs */
989 SND_SOC_DAPM_INPUT("MAINMIC"),
990 SND_SOC_DAPM_INPUT("HSMIC"),
991 SND_SOC_DAPM_INPUT("SUBMIC"),
992 SND_SOC_DAPM_INPUT("AFML"),
993 SND_SOC_DAPM_INPUT("AFMR"),
994
995 /* Outputs */
996 SND_SOC_DAPM_OUTPUT("HSOL"),
997 SND_SOC_DAPM_OUTPUT("HSOR"),
998 SND_SOC_DAPM_OUTPUT("HFL"),
999 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1000 SND_SOC_DAPM_OUTPUT("EP"),
8ecbabd9
MLC
1001
1002 /* Analog input muxes for the capture amplifiers */
1003 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1004 SND_SOC_NOPM, 0, 0, &amicl_control),
1005 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1006 SND_SOC_NOPM, 0, 0, &amicr_control),
1007
1008 /* Analog capture PGAs */
1009 SND_SOC_DAPM_PGA("MicAmpL",
1010 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1011 SND_SOC_DAPM_PGA("MicAmpR",
1012 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1013
370a0314
JEC
1014 /* Auxiliary FM PGAs */
1015 SND_SOC_DAPM_PGA("AFMAmpL",
1016 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1017 SND_SOC_DAPM_PGA("AFMAmpR",
1018 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1019
8ecbabd9
MLC
1020 /* ADCs */
1021 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1022 TWL6040_REG_MICLCTL, 2, 0),
1023 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1024 TWL6040_REG_MICRCTL, 2, 0),
1025
1026 /* Microphone bias */
1027 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1028 TWL6040_REG_AMICBCTL, 0, 0),
1029 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1030 TWL6040_REG_AMICBCTL, 4, 0),
1031 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1032 TWL6040_REG_DMICBCTL, 0, 0),
1033 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1034 TWL6040_REG_DMICBCTL, 4, 0),
1035
1036 /* DACs */
0fad4ed7
JEC
1037 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1038 TWL6040_REG_HSLCTL, 0, 0,
1039 twl6040_hs_dac_event,
1040 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1041 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1042 TWL6040_REG_HSRCTL, 0, 0,
1043 twl6040_hs_dac_event,
1044 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1045 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1046 TWL6040_REG_HFLCTL, 0, 0,
1047 twl6040_power_mode_event,
1048 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1049 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1050 TWL6040_REG_HFRCTL, 0, 0,
1051 twl6040_power_mode_event,
1052 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1053
370a0314
JEC
1054 SND_SOC_DAPM_MUX("HF Left Playback",
1055 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
1056 SND_SOC_DAPM_MUX("HF Right Playback",
1057 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1058 /* Analog playback Muxes */
1059 SND_SOC_DAPM_MUX("HS Left Playback",
1060 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
1061 SND_SOC_DAPM_MUX("HS Right Playback",
1062 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1063
0fad4ed7 1064 /* Analog playback drivers */
f769bdf2 1065 SND_SOC_DAPM_OUT_DRV_E("Handsfree Left Driver",
0fad4ed7 1066 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
1bf84759
MOC
1067 pga_event,
1068 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1069 SND_SOC_DAPM_OUT_DRV_E("Handsfree Right Driver",
0fad4ed7 1070 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
1bf84759
MOC
1071 pga_event,
1072 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1073 SND_SOC_DAPM_OUT_DRV_E("Headset Left Driver",
1bf84759
MOC
1074 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
1075 pga_event,
1076 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1077 SND_SOC_DAPM_OUT_DRV_E("Headset Right Driver",
1bf84759
MOC
1078 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
1079 pga_event,
1080 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
871a05a7
JEC
1081 SND_SOC_DAPM_SWITCH_E("Earphone Driver",
1082 SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
1083 twl6040_power_mode_event,
1084 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1085
1086 /* Analog playback PGAs */
1087 SND_SOC_DAPM_PGA("HFDAC Left PGA",
1088 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
1089 SND_SOC_DAPM_PGA("HFDAC Right PGA",
1090 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1091
1092};
1093
1094static const struct snd_soc_dapm_route intercon[] = {
1095 /* Capture path */
1096 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1097 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1098 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1099
1100 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1101 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1102 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1103
1104 {"MicAmpL", NULL, "Analog Left Capture Route"},
1105 {"MicAmpR", NULL, "Analog Right Capture Route"},
1106
1107 {"ADC Left", NULL, "MicAmpL"},
1108 {"ADC Right", NULL, "MicAmpR"},
1109
370a0314
JEC
1110 /* AFM path */
1111 {"AFMAmpL", "NULL", "AFML"},
1112 {"AFMAmpR", "NULL", "AFMR"},
1113
1114 {"HS Left Playback", "HS DAC", "HSDAC Left"},
1115 {"HS Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1116
370a0314
JEC
1117 {"HS Right Playback", "HS DAC", "HSDAC Right"},
1118 {"HS Right Playback", "Line-In amp", "AFMAmpR"},
1119
1120 {"Headset Left Driver", "NULL", "HS Left Playback"},
1121 {"Headset Right Driver", "NULL", "HS Right Playback"},
8ecbabd9
MLC
1122
1123 {"HSOL", NULL, "Headset Left Driver"},
1124 {"HSOR", NULL, "Headset Right Driver"},
1125
871a05a7
JEC
1126 /* Earphone playback path */
1127 {"Earphone Driver", "Switch", "HSDAC Left"},
1128 {"EP", NULL, "Earphone Driver"},
1129
370a0314
JEC
1130 {"HF Left Playback", "HF DAC", "HFDAC Left"},
1131 {"HF Left Playback", "Line-In amp", "AFMAmpL"},
1132
1133 {"HF Right Playback", "HF DAC", "HFDAC Right"},
1134 {"HF Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1135
370a0314
JEC
1136 {"HFDAC Left PGA", NULL, "HF Left Playback"},
1137 {"HFDAC Right PGA", NULL, "HF Right Playback"},
8ecbabd9
MLC
1138
1139 {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
1140 {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
1141
1142 {"HFL", NULL, "Handsfree Left Driver"},
1143 {"HFR", NULL, "Handsfree Right Driver"},
1144};
1145
1146static int twl6040_add_widgets(struct snd_soc_codec *codec)
1147{
ce6120cc 1148 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1149
ce6120cc
LG
1150 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1151 ARRAY_SIZE(twl6040_dapm_widgets));
1152 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1153 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC
1154
1155 return 0;
1156}
1157
8ecbabd9
MLC
1158static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1159 enum snd_soc_bias_level level)
1160{
fb34d3d5 1161 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1162 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1163 int ret;
1164
1165 switch (level) {
1166 case SND_SOC_BIAS_ON:
1167 break;
1168 case SND_SOC_BIAS_PREPARE:
1169 break;
1170 case SND_SOC_BIAS_STANDBY:
1171 if (priv->codec_powered)
1172 break;
1173
fb34d3d5
MLC
1174 ret = twl6040_power(twl6040, 1);
1175 if (ret)
1176 return ret;
8ecbabd9 1177
fb34d3d5 1178 priv->codec_powered = 1;
8ecbabd9
MLC
1179
1180 /* initialize vdd/vss registers with reg_cache */
1181 twl6040_init_vdd_regs(codec);
65b7cecc
OM
1182
1183 /* Set external boost GPO */
1184 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1185 break;
1186 case SND_SOC_BIAS_OFF:
1187 if (!priv->codec_powered)
1188 break;
1189
fb34d3d5 1190 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1191 priv->codec_powered = 0;
1192 break;
1193 }
1194
fb34d3d5
MLC
1195 /* get PLL and sysclk after power transition */
1196 priv->pll = twl6040_get_pll(twl6040);
1197 priv->sysclk = twl6040_get_sysclk(twl6040);
ce6120cc 1198 codec->dapm.bias_level = level;
8ecbabd9
MLC
1199
1200 return 0;
1201}
1202
1203/* set of rates for each pll: low-power and high-performance */
1204
1205static unsigned int lp_rates[] = {
1206 88200,
1207 96000,
1208};
1209
1210static struct snd_pcm_hw_constraint_list lp_constraints = {
1211 .count = ARRAY_SIZE(lp_rates),
1212 .list = lp_rates,
1213};
1214
1215static unsigned int hp_rates[] = {
1216 96000,
1217};
1218
1219static struct snd_pcm_hw_constraint_list hp_constraints = {
1220 .count = ARRAY_SIZE(hp_rates),
1221 .list = hp_rates,
1222};
1223
1224static int twl6040_startup(struct snd_pcm_substream *substream,
1225 struct snd_soc_dai *dai)
1226{
1227 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1228 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1229 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1230
8ecbabd9
MLC
1231 snd_pcm_hw_constraint_list(substream->runtime, 0,
1232 SNDRV_PCM_HW_PARAM_RATE,
1233 priv->sysclk_constraints);
1234
1235 return 0;
1236}
1237
1238static int twl6040_hw_params(struct snd_pcm_substream *substream,
1239 struct snd_pcm_hw_params *params,
1240 struct snd_soc_dai *dai)
1241{
1242 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1243 struct snd_soc_codec *codec = rtd->codec;
fb34d3d5 1244 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1245 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
fb34d3d5
MLC
1246 unsigned int sysclk;
1247 int rate, ret;
8ecbabd9
MLC
1248
1249 /* nothing to do for high-perf pll, it supports only 48 kHz */
1250 if (priv->pll == TWL6040_HPPLL_ID)
1251 return 0;
1252
8ecbabd9
MLC
1253 rate = params_rate(params);
1254 switch (rate) {
60ea4cec
OM
1255 case 11250:
1256 case 22500:
1257 case 44100:
8ecbabd9 1258 case 88200:
fb34d3d5 1259 sysclk = 17640000;
8ecbabd9 1260 break;
60ea4cec
OM
1261 case 8000:
1262 case 16000:
1263 case 32000:
1264 case 48000:
8ecbabd9 1265 case 96000:
fb34d3d5 1266 sysclk = 19200000;
8ecbabd9
MLC
1267 break;
1268 default:
1269 dev_err(codec->dev, "unsupported rate %d\n", rate);
1270 return -EINVAL;
1271 }
1272
fb34d3d5
MLC
1273 ret = twl6040_set_pll(twl6040, TWL6040_LPPLL_ID, priv->clk_in, sysclk);
1274 if (ret)
1275 return ret;
1276
1277 priv->sysclk = twl6040_get_sysclk(twl6040);
8ecbabd9
MLC
1278
1279 return 0;
1280}
1281
4e624d06
OM
1282static int twl6040_prepare(struct snd_pcm_substream *substream,
1283 struct snd_soc_dai *dai)
8ecbabd9
MLC
1284{
1285 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1286 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1287 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1288
4e624d06
OM
1289 if (!priv->sysclk) {
1290 dev_err(codec->dev,
1291 "no mclk configured, call set_sysclk() on init\n");
1292 return -EINVAL;
1293 }
1294
1295 /*
1296 * capture is not supported at 17.64 MHz,
1297 * it's reserved for headset low-power playback scenario
1298 */
1299 if ((priv->sysclk == 17640000) &&
1300 substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1301 dev_err(codec->dev,
1302 "capture mode is not supported at %dHz\n",
1303 priv->sysclk);
1304 return -EINVAL;
1305 }
1306
1307 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC
1308 dev_err(codec->dev,
1309 "some enabled paths aren't supported at %dHz\n",
1310 priv->sysclk);
1311 return -EPERM;
8ecbabd9 1312 }
8ecbabd9
MLC
1313 return 0;
1314}
1315
1316static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1317 int clk_id, unsigned int freq, int dir)
1318{
1319 struct snd_soc_codec *codec = codec_dai->codec;
fb34d3d5 1320 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1321 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
fb34d3d5 1322 int ret = 0;
8ecbabd9
MLC
1323
1324 switch (clk_id) {
1325 case TWL6040_SYSCLK_SEL_LPPLL:
fb34d3d5
MLC
1326 ret = twl6040_set_pll(twl6040, TWL6040_LPPLL_ID,
1327 freq, priv->sysclk);
1328 if (ret)
1329 return ret;
8ecbabd9 1330
fb34d3d5 1331 headset_power_mode(codec, 0);
8ecbabd9
MLC
1332 priv->sysclk_constraints = &lp_constraints;
1333 break;
1334 case TWL6040_SYSCLK_SEL_HPPLL:
fb34d3d5
MLC
1335 ret = twl6040_set_pll(twl6040, TWL6040_HPPLL_ID,
1336 freq, priv->sysclk);
1337 if (ret)
1338 return ret;
8ecbabd9 1339
8ecbabd9 1340 headset_power_mode(codec, 1);
8ecbabd9
MLC
1341 priv->sysclk_constraints = &hp_constraints;
1342 break;
1343 default:
1344 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1345 return -EINVAL;
1346 }
1347
fb34d3d5
MLC
1348 priv->pll = twl6040_get_pll(twl6040);
1349 priv->clk_in = freq;
1350 priv->sysclk = twl6040_get_sysclk(twl6040);
1351
8ecbabd9
MLC
1352 return 0;
1353}
1354
1355static struct snd_soc_dai_ops twl6040_dai_ops = {
1356 .startup = twl6040_startup,
1357 .hw_params = twl6040_hw_params,
4e624d06 1358 .prepare = twl6040_prepare,
8ecbabd9
MLC
1359 .set_sysclk = twl6040_set_dai_sysclk,
1360};
1361
f0fba2ad
LG
1362static struct snd_soc_dai_driver twl6040_dai = {
1363 .name = "twl6040-hifi",
8ecbabd9
MLC
1364 .playback = {
1365 .stream_name = "Playback",
1366 .channels_min = 1,
1367 .channels_max = 4,
1368 .rates = TWL6040_RATES,
1369 .formats = TWL6040_FORMATS,
1370 },
1371 .capture = {
1372 .stream_name = "Capture",
1373 .channels_min = 1,
1374 .channels_max = 2,
1375 .rates = TWL6040_RATES,
1376 .formats = TWL6040_FORMATS,
1377 },
1378 .ops = &twl6040_dai_ops,
1379};
8ecbabd9
MLC
1380
1381#ifdef CONFIG_PM
f0fba2ad 1382static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1383{
8ecbabd9
MLC
1384 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1385
1386 return 0;
1387}
1388
f0fba2ad 1389static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1390{
8ecbabd9 1391 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1392 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1393
1394 return 0;
1395}
1396#else
1397#define twl6040_suspend NULL
1398#define twl6040_resume NULL
1399#endif
1400
f0fba2ad 1401static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1402{
8ecbabd9 1403 struct twl6040_data *priv;
8ecbabd9
MLC
1404 int ret = 0;
1405
1406 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1407 if (priv == NULL)
1408 return -ENOMEM;
f0fba2ad 1409 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1410
a2d2362e 1411 priv->codec = codec;
fb34d3d5 1412 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1413
a2d2362e 1414 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL
1415 if (!priv->workqueue) {
1416 ret = -ENOMEM;
a2d2362e 1417 goto work_err;
19aab08d 1418 }
a2d2362e
JEC
1419
1420 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1421
1422 mutex_init(&priv->mutex);
8ecbabd9 1423
1bf84759
MOC
1424 init_completion(&priv->headset.ramp_done);
1425 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1426
1bf84759
MOC
1427 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1428 if (priv->hf_workqueue == NULL) {
1429 ret = -ENOMEM;
fb34d3d5 1430 goto hfwq_err;
1bf84759
MOC
1431 }
1432 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1433 if (priv->hs_workqueue == NULL) {
1434 ret = -ENOMEM;
fb34d3d5 1435 goto hswq_err;
1bf84759
MOC
1436 }
1437
1438 INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
1439 INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
1440
fb34d3d5
MLC
1441 ret = twl6040_request_irq(codec->control_data, TWL6040_IRQ_PLUG,
1442 twl6040_audio_handler, 0,
1443 "twl6040_irq_plug", codec);
1444 if (ret) {
1445 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1446 goto plugirq_err;
1447 }
1448
1449 /* init vio registers */
1450 twl6040_init_vio_regs(codec);
1451
8ecbabd9
MLC
1452 /* power on device */
1453 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1454 if (ret)
1bf84759 1455 goto bias_err;
8ecbabd9 1456
f0fba2ad
LG
1457 snd_soc_add_controls(codec, twl6040_snd_controls,
1458 ARRAY_SIZE(twl6040_snd_controls));
1459 twl6040_add_widgets(codec);
8ecbabd9
MLC
1460
1461 return 0;
1462
1bf84759 1463bias_err:
fb34d3d5
MLC
1464 twl6040_free_irq(codec->control_data, TWL6040_IRQ_PLUG, codec);
1465plugirq_err:
1bf84759 1466 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1467hswq_err:
1bf84759 1468 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1469hfwq_err:
a2d2362e
JEC
1470 destroy_workqueue(priv->workqueue);
1471work_err:
8ecbabd9
MLC
1472 kfree(priv);
1473 return ret;
1474}
1475
f0fba2ad 1476static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1477{
f0fba2ad 1478 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1479
f0fba2ad 1480 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
fb34d3d5 1481 twl6040_free_irq(codec->control_data, TWL6040_IRQ_PLUG, codec);
a2d2362e 1482 destroy_workqueue(priv->workqueue);
1bf84759
MOC
1483 destroy_workqueue(priv->hf_workqueue);
1484 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1485 kfree(priv);
8ecbabd9 1486
f0fba2ad
LG
1487 return 0;
1488}
8ecbabd9 1489
f0fba2ad
LG
1490static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1491 .probe = twl6040_probe,
1492 .remove = twl6040_remove,
1493 .suspend = twl6040_suspend,
1494 .resume = twl6040_resume,
1495 .read = twl6040_read_reg_cache,
1496 .write = twl6040_write,
1497 .set_bias_level = twl6040_set_bias_level,
1498 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1499 .reg_word_size = sizeof(u8),
1500 .reg_cache_default = twl6040_reg,
1501};
1502
1503static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1504{
1505 return snd_soc_register_codec(&pdev->dev,
1506 &soc_codec_dev_twl6040, &twl6040_dai, 1);
1507}
1508
1509static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1510{
1511 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC
1512 return 0;
1513}
1514
1515static struct platform_driver twl6040_codec_driver = {
1516 .driver = {
f0fba2ad 1517 .name = "twl6040-codec",
8ecbabd9
MLC
1518 .owner = THIS_MODULE,
1519 },
1520 .probe = twl6040_codec_probe,
1521 .remove = __devexit_p(twl6040_codec_remove),
1522};
1523
1524static int __init twl6040_codec_init(void)
1525{
1526 return platform_driver_register(&twl6040_codec_driver);
1527}
1528module_init(twl6040_codec_init);
1529
1530static void __exit twl6040_codec_exit(void)
1531{
1532 platform_driver_unregister(&twl6040_codec_driver);
1533}
1534module_exit(twl6040_codec_exit);
1535
1536MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1537MODULE_AUTHOR("Misael Lopez Cruz");
1538MODULE_LICENSE("GPL");
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