ASoC: twl6040: Chip initialization cleanup
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
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1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
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31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
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36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
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MOC
42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
60struct twl6040_output {
61 u16 active;
62 u16 left_vol;
63 u16 right_vol;
64 u16 left_step;
65 u16 right_step;
66 unsigned int step_delay;
67 u16 ramp;
68 u16 mute;
69 struct completion ramp_done;
70};
8ecbabd9 71
a2d2362e
JEC
72struct twl6040_jack_data {
73 struct snd_soc_jack *jack;
74 int report;
75};
76
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MLC
77/* codec private data */
78struct twl6040_data {
2a433b9d 79 int plug_irq;
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80 int codec_powered;
81 int pll;
82 int non_lp;
af958c72 83 int pll_power_mode;
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MLC
84 int hs_power_mode;
85 int hs_power_mode_locked;
fb34d3d5 86 unsigned int clk_in;
8ecbabd9 87 unsigned int sysclk;
1fbe9952
ACG
88 u16 hs_left_step;
89 u16 hs_right_step;
90 u16 hf_left_step;
91 u16 hf_right_step;
a2d2362e
JEC
92 struct twl6040_jack_data hs_jack;
93 struct snd_soc_codec *codec;
94 struct workqueue_struct *workqueue;
95 struct delayed_work delayed_work;
96 struct mutex mutex;
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MOC
97 struct twl6040_output headset;
98 struct twl6040_output handsfree;
99 struct workqueue_struct *hf_workqueue;
100 struct workqueue_struct *hs_workqueue;
101 struct delayed_work hs_delayed_work;
102 struct delayed_work hf_delayed_work;
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103};
104
105/*
106 * twl6040 register cache & default register settings
107 */
108static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
109 0x00, /* not used 0x00 */
110 0x4B, /* TWL6040_ASICID (ro) 0x01 */
111 0x00, /* TWL6040_ASICREV (ro) 0x02 */
112 0x00, /* TWL6040_INTID 0x03 */
113 0x00, /* TWL6040_INTMR 0x04 */
114 0x00, /* TWL6040_NCPCTRL 0x05 */
115 0x00, /* TWL6040_LDOCTL 0x06 */
116 0x60, /* TWL6040_HPPLLCTL 0x07 */
117 0x00, /* TWL6040_LPPLLCTL 0x08 */
118 0x4A, /* TWL6040_LPPLLDIV 0x09 */
119 0x00, /* TWL6040_AMICBCTL 0x0A */
120 0x00, /* TWL6040_DMICBCTL 0x0B */
121 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
122 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
123 0x00, /* TWL6040_MICGAIN 0x0E */
124 0x1B, /* TWL6040_LINEGAIN 0x0F */
125 0x00, /* TWL6040_HSLCTL 0x10 */
126 0x00, /* TWL6040_HSRCTL 0x11 */
127 0x00, /* TWL6040_HSGAIN 0x12 */
128 0x00, /* TWL6040_EARCTL 0x13 */
129 0x00, /* TWL6040_HFLCTL 0x14 */
130 0x00, /* TWL6040_HFLGAIN 0x15 */
131 0x00, /* TWL6040_HFRCTL 0x16 */
132 0x00, /* TWL6040_HFRGAIN 0x17 */
133 0x00, /* TWL6040_VIBCTLL 0x18 */
134 0x00, /* TWL6040_VIBDATL 0x19 */
135 0x00, /* TWL6040_VIBCTLR 0x1A */
136 0x00, /* TWL6040_VIBDATR 0x1B */
137 0x00, /* TWL6040_HKCTL1 0x1C */
138 0x00, /* TWL6040_HKCTL2 0x1D */
139 0x00, /* TWL6040_GPOCTL 0x1E */
140 0x00, /* TWL6040_ALB 0x1F */
141 0x00, /* TWL6040_DLB 0x20 */
142 0x00, /* not used 0x21 */
143 0x00, /* not used 0x22 */
144 0x00, /* not used 0x23 */
145 0x00, /* not used 0x24 */
146 0x00, /* not used 0x25 */
147 0x00, /* not used 0x26 */
148 0x00, /* not used 0x27 */
149 0x00, /* TWL6040_TRIM1 0x28 */
150 0x00, /* TWL6040_TRIM2 0x29 */
151 0x00, /* TWL6040_TRIM3 0x2A */
152 0x00, /* TWL6040_HSOTRIM 0x2B */
153 0x00, /* TWL6040_HFOTRIM 0x2C */
154 0x09, /* TWL6040_ACCCTL 0x2D */
155 0x00, /* TWL6040_STATUS (ro) 0x2E */
156};
157
a52762ee
PU
158/* List of registers to be restored after power up */
159static const int twl6040_restore_list[] = {
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MLC
160 TWL6040_REG_MICLCTL,
161 TWL6040_REG_MICRCTL,
162 TWL6040_REG_MICGAIN,
163 TWL6040_REG_LINEGAIN,
164 TWL6040_REG_HSLCTL,
165 TWL6040_REG_HSRCTL,
166 TWL6040_REG_HSGAIN,
167 TWL6040_REG_EARCTL,
168 TWL6040_REG_HFLCTL,
169 TWL6040_REG_HFLGAIN,
170 TWL6040_REG_HFRCTL,
171 TWL6040_REG_HFRGAIN,
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MLC
172};
173
af958c72
PU
174/* set of rates for each pll: low-power and high-performance */
175static unsigned int lp_rates[] = {
176 8000,
177 11250,
178 16000,
179 22500,
180 32000,
181 44100,
182 48000,
183 88200,
184 96000,
185};
186
af958c72
PU
187static unsigned int hp_rates[] = {
188 8000,
189 16000,
190 32000,
191 48000,
192 96000,
193};
194
f53c346c
PU
195static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
196 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
197 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU
198};
199
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MLC
200/*
201 * read twl6040 register cache
202 */
203static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
204 unsigned int reg)
205{
206 u8 *cache = codec->reg_cache;
207
208 if (reg >= TWL6040_CACHEREGNUM)
209 return -EIO;
210
211 return cache[reg];
212}
213
214/*
215 * write twl6040 register cache
216 */
217static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
218 u8 reg, u8 value)
219{
220 u8 *cache = codec->reg_cache;
221
222 if (reg >= TWL6040_CACHEREGNUM)
223 return;
224 cache[reg] = value;
225}
226
227/*
228 * read from twl6040 hardware register
229 */
230static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
231 unsigned int reg)
232{
fb34d3d5 233 struct twl6040 *twl6040 = codec->control_data;
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234 u8 value;
235
236 if (reg >= TWL6040_CACHEREGNUM)
237 return -EIO;
238
fb34d3d5 239 value = twl6040_reg_read(twl6040, reg);
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240 twl6040_write_reg_cache(codec, reg, value);
241
242 return value;
243}
244
245/*
246 * write to the twl6040 register space
247 */
248static int twl6040_write(struct snd_soc_codec *codec,
249 unsigned int reg, unsigned int value)
250{
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MLC
251 struct twl6040 *twl6040 = codec->control_data;
252
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253 if (reg >= TWL6040_CACHEREGNUM)
254 return -EIO;
255
256 twl6040_write_reg_cache(codec, reg, value);
fb34d3d5 257 return twl6040_reg_write(twl6040, reg, value);
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258}
259
a52762ee 260static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 261{
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PU
262 struct twl6040 *twl6040 = codec->control_data;
263 u8 val;
264
265 val = twl6040_get_revid(twl6040);
266 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 267
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MLC
268}
269
a52762ee 270static void twl6040_restore_regs(struct snd_soc_codec *codec)
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271{
272 u8 *cache = codec->reg_cache;
273 int reg, i;
274
a52762ee
PU
275 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
276 reg = twl6040_restore_list[i];
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MLC
277 twl6040_write(codec, reg, cache[reg]);
278 }
279}
280
1bf84759
MOC
281/*
282 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
283 */
284static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
285 unsigned int left_step, unsigned int right_step)
286{
287
288 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
289 struct twl6040_output *headset = &priv->headset;
290 int left_complete = 0, right_complete = 0;
291 u8 reg, val;
292
293 /* left channel */
294 left_step = (left_step > 0xF) ? 0xF : left_step;
295 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
296 val = (~reg & TWL6040_HSL_VOL_MASK);
297
298 if (headset->ramp == TWL6040_RAMP_UP) {
299 /* ramp step up */
300 if (val < headset->left_vol) {
1fbe9952
ACG
301 if (val + left_step > headset->left_vol)
302 val = headset->left_vol;
303 else
304 val += left_step;
305
1bf84759
MOC
306 reg &= ~TWL6040_HSL_VOL_MASK;
307 twl6040_write(codec, TWL6040_REG_HSGAIN,
308 (reg | (~val & TWL6040_HSL_VOL_MASK)));
309 } else {
310 left_complete = 1;
311 }
312 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
313 /* ramp step down */
314 if (val > 0x0) {
1fbe9952
ACG
315 if ((int)val - (int)left_step < 0)
316 val = 0;
317 else
318 val -= left_step;
319
1bf84759
MOC
320 reg &= ~TWL6040_HSL_VOL_MASK;
321 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
322 (~val & TWL6040_HSL_VOL_MASK));
323 } else {
324 left_complete = 1;
325 }
326 }
327
328 /* right channel */
329 right_step = (right_step > 0xF) ? 0xF : right_step;
330 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
331 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
332
333 if (headset->ramp == TWL6040_RAMP_UP) {
334 /* ramp step up */
335 if (val < headset->right_vol) {
1fbe9952
ACG
336 if (val + right_step > headset->right_vol)
337 val = headset->right_vol;
338 else
339 val += right_step;
340
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MOC
341 reg &= ~TWL6040_HSR_VOL_MASK;
342 twl6040_write(codec, TWL6040_REG_HSGAIN,
343 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
344 } else {
345 right_complete = 1;
346 }
347 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
348 /* ramp step down */
349 if (val > 0x0) {
1fbe9952
ACG
350 if ((int)val - (int)right_step < 0)
351 val = 0;
352 else
353 val -= right_step;
354
1bf84759
MOC
355 reg &= ~TWL6040_HSR_VOL_MASK;
356 twl6040_write(codec, TWL6040_REG_HSGAIN,
357 reg | (~val << TWL6040_HSR_VOL_SHIFT));
358 } else {
359 right_complete = 1;
360 }
361 }
362
363 return left_complete & right_complete;
364}
365
366/*
367 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
368 */
369static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
370 unsigned int left_step, unsigned int right_step)
371{
372 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
373 struct twl6040_output *handsfree = &priv->handsfree;
374 int left_complete = 0, right_complete = 0;
375 u16 reg, val;
376
377 /* left channel */
378 left_step = (left_step > 0x1D) ? 0x1D : left_step;
379 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
380 reg = 0x1D - reg;
381 val = (reg & TWL6040_HF_VOL_MASK);
382 if (handsfree->ramp == TWL6040_RAMP_UP) {
383 /* ramp step up */
384 if (val < handsfree->left_vol) {
1fbe9952
ACG
385 if (val + left_step > handsfree->left_vol)
386 val = handsfree->left_vol;
387 else
388 val += left_step;
389
1bf84759
MOC
390 reg &= ~TWL6040_HF_VOL_MASK;
391 twl6040_write(codec, TWL6040_REG_HFLGAIN,
392 reg | (0x1D - val));
393 } else {
394 left_complete = 1;
395 }
396 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
397 /* ramp step down */
398 if (val > 0) {
1fbe9952
ACG
399 if ((int)val - (int)left_step < 0)
400 val = 0;
401 else
402 val -= left_step;
403
1bf84759
MOC
404 reg &= ~TWL6040_HF_VOL_MASK;
405 twl6040_write(codec, TWL6040_REG_HFLGAIN,
406 reg | (0x1D - val));
407 } else {
408 left_complete = 1;
409 }
410 }
411
412 /* right channel */
413 right_step = (right_step > 0x1D) ? 0x1D : right_step;
414 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
415 reg = 0x1D - reg;
416 val = (reg & TWL6040_HF_VOL_MASK);
417 if (handsfree->ramp == TWL6040_RAMP_UP) {
418 /* ramp step up */
419 if (val < handsfree->right_vol) {
1fbe9952
ACG
420 if (val + right_step > handsfree->right_vol)
421 val = handsfree->right_vol;
422 else
423 val += right_step;
424
1bf84759
MOC
425 reg &= ~TWL6040_HF_VOL_MASK;
426 twl6040_write(codec, TWL6040_REG_HFRGAIN,
427 reg | (0x1D - val));
428 } else {
429 right_complete = 1;
430 }
431 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
432 /* ramp step down */
433 if (val > 0) {
1fbe9952
ACG
434 if ((int)val - (int)right_step < 0)
435 val = 0;
436 else
437 val -= right_step;
438
1bf84759
MOC
439 reg &= ~TWL6040_HF_VOL_MASK;
440 twl6040_write(codec, TWL6040_REG_HFRGAIN,
441 reg | (0x1D - val));
442 }
443 }
444
445 return left_complete & right_complete;
446}
447
448/*
449 * This work ramps both output PGAs at stream start/stop time to
450 * minimise pop associated with DAPM power switching.
451 */
452static void twl6040_pga_hs_work(struct work_struct *work)
453{
454 struct twl6040_data *priv =
455 container_of(work, struct twl6040_data, hs_delayed_work.work);
456 struct snd_soc_codec *codec = priv->codec;
457 struct twl6040_output *headset = &priv->headset;
458 unsigned int delay = headset->step_delay;
459 int i, headset_complete;
460
461 /* do we need to ramp at all ? */
462 if (headset->ramp == TWL6040_RAMP_NONE)
463 return;
464
465 /* HS PGA volumes have 4 bits of resolution to ramp */
466 for (i = 0; i <= 16; i++) {
1fbe9952
ACG
467 headset_complete = twl6040_hs_ramp_step(codec,
468 headset->left_step,
469 headset->right_step);
1bf84759
MOC
470
471 /* ramp finished ? */
472 if (headset_complete)
473 break;
474
475 /*
476 * TODO: tune: delay is longer over 0dB
477 * as increases are larger.
478 */
479 if (i >= 8)
480 schedule_timeout_interruptible(msecs_to_jiffies(delay +
481 (delay >> 1)));
482 else
483 schedule_timeout_interruptible(msecs_to_jiffies(delay));
484 }
485
486 if (headset->ramp == TWL6040_RAMP_DOWN) {
487 headset->active = 0;
488 complete(&headset->ramp_done);
489 } else {
490 headset->active = 1;
491 }
492 headset->ramp = TWL6040_RAMP_NONE;
493}
494
495static void twl6040_pga_hf_work(struct work_struct *work)
496{
497 struct twl6040_data *priv =
498 container_of(work, struct twl6040_data, hf_delayed_work.work);
499 struct snd_soc_codec *codec = priv->codec;
500 struct twl6040_output *handsfree = &priv->handsfree;
501 unsigned int delay = handsfree->step_delay;
502 int i, handsfree_complete;
503
504 /* do we need to ramp at all ? */
505 if (handsfree->ramp == TWL6040_RAMP_NONE)
506 return;
507
508 /* HF PGA volumes have 5 bits of resolution to ramp */
509 for (i = 0; i <= 32; i++) {
1fbe9952
ACG
510 handsfree_complete = twl6040_hf_ramp_step(codec,
511 handsfree->left_step,
512 handsfree->right_step);
1bf84759
MOC
513
514 /* ramp finished ? */
515 if (handsfree_complete)
516 break;
517
518 /*
519 * TODO: tune: delay is longer over 0dB
520 * as increases are larger.
521 */
522 if (i >= 16)
523 schedule_timeout_interruptible(msecs_to_jiffies(delay +
524 (delay >> 1)));
525 else
526 schedule_timeout_interruptible(msecs_to_jiffies(delay));
527 }
528
529
530 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
531 handsfree->active = 0;
532 complete(&handsfree->ramp_done);
533 } else
534 handsfree->active = 1;
535 handsfree->ramp = TWL6040_RAMP_NONE;
536}
537
538static int pga_event(struct snd_soc_dapm_widget *w,
539 struct snd_kcontrol *kcontrol, int event)
540{
541 struct snd_soc_codec *codec = w->codec;
542 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
543 struct twl6040_output *out;
544 struct delayed_work *work;
545 struct workqueue_struct *queue;
546
547 switch (w->shift) {
548 case 2:
549 case 3:
550 out = &priv->headset;
551 work = &priv->hs_delayed_work;
552 queue = priv->hs_workqueue;
1fbe9952
ACG
553 out->left_step = priv->hs_left_step;
554 out->right_step = priv->hs_right_step;
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MOC
555 out->step_delay = 5; /* 5 ms between volume ramp steps */
556 break;
557 case 4:
558 out = &priv->handsfree;
559 work = &priv->hf_delayed_work;
560 queue = priv->hf_workqueue;
1fbe9952
ACG
561 out->left_step = priv->hf_left_step;
562 out->right_step = priv->hf_right_step;
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MOC
563 out->step_delay = 5; /* 5 ms between volume ramp steps */
564 if (SND_SOC_DAPM_EVENT_ON(event))
565 priv->non_lp++;
566 else
567 priv->non_lp--;
568 break;
569 default:
570 return -1;
571 }
572
573 switch (event) {
574 case SND_SOC_DAPM_POST_PMU:
575 if (out->active)
576 break;
577
578 /* don't use volume ramp for power-up */
579 out->left_step = out->left_vol;
580 out->right_step = out->right_vol;
581
582 if (!delayed_work_pending(work)) {
583 out->ramp = TWL6040_RAMP_UP;
584 queue_delayed_work(queue, work,
585 msecs_to_jiffies(1));
586 }
587 break;
588
589 case SND_SOC_DAPM_PRE_PMD:
590 if (!out->active)
591 break;
592
593 if (!delayed_work_pending(work)) {
594 /* use volume ramp for power-down */
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MOC
595 out->ramp = TWL6040_RAMP_DOWN;
596 INIT_COMPLETION(out->ramp_done);
597
598 queue_delayed_work(queue, work,
599 msecs_to_jiffies(1));
600
601 wait_for_completion_timeout(&out->ramp_done,
602 msecs_to_jiffies(2000));
603 }
604 break;
605 }
606
607 return 0;
608}
609
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610/* set headset dac and driver power mode */
611static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
612{
613 int hslctl, hsrctl;
614 int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
615
616 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
617 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
618
619 if (high_perf) {
620 hslctl &= ~mask;
621 hsrctl &= ~mask;
622 } else {
623 hslctl |= mask;
624 hsrctl |= mask;
625 }
626
627 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
628 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
629
630 return 0;
631}
632
0fad4ed7
JEC
633static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
634 struct snd_kcontrol *kcontrol, int event)
635{
636 msleep(1);
637 return 0;
638}
639
8ecbabd9
MLC
640static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
641 struct snd_kcontrol *kcontrol, int event)
642{
643 struct snd_soc_codec *codec = w->codec;
d4a8ca24 644 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 645 int ret = 0;
8ecbabd9 646
6bba63b6 647 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 648 priv->non_lp++;
6bba63b6
MLC
649 if (!strcmp(w->name, "Earphone Driver")) {
650 /* Earphone doesn't support low power mode */
651 priv->hs_power_mode_locked = 1;
652 ret = headset_power_mode(codec, 1);
653 }
654 } else {
8ecbabd9 655 priv->non_lp--;
6bba63b6
MLC
656 if (!strcmp(w->name, "Earphone Driver")) {
657 priv->hs_power_mode_locked = 0;
658 ret = headset_power_mode(codec, priv->hs_power_mode);
659 }
660 }
8ecbabd9 661
0fad4ed7
JEC
662 msleep(1);
663
6bba63b6 664 return ret;
8ecbabd9
MLC
665}
666
64ed9836
MB
667static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
668 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
669{
670 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
671 int status;
672
673 mutex_lock(&priv->mutex);
674
675 /* Sync status */
676 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
677 if (status & TWL6040_PLUGCOMP)
678 snd_soc_jack_report(jack, report, report);
679 else
680 snd_soc_jack_report(jack, 0, report);
681
682 mutex_unlock(&priv->mutex);
683}
684
685void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
686 struct snd_soc_jack *jack, int report)
687{
688 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
689 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
690
691 hs_jack->jack = jack;
692 hs_jack->report = report;
693
694 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
695}
696EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
697
698static void twl6040_accessory_work(struct work_struct *work)
699{
700 struct twl6040_data *priv = container_of(work,
701 struct twl6040_data, delayed_work.work);
702 struct snd_soc_codec *codec = priv->codec;
703 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
704
705 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
706}
707
8ecbabd9 708/* audio interrupt handler */
fb34d3d5 709static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
710{
711 struct snd_soc_codec *codec = data;
fb34d3d5 712 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 713 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
714 u8 intid;
715
fb34d3d5 716 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
cf370a5a
OM
717
718 if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT))
a2d2362e
JEC
719 queue_delayed_work(priv->workqueue, &priv->delayed_work,
720 msecs_to_jiffies(200));
cf370a5a 721
8ecbabd9
MLC
722 return IRQ_HANDLED;
723}
724
1bf84759
MOC
725static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
726 struct snd_ctl_elem_value *ucontrol)
727{
728 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
729 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
730 struct twl6040_output *out = NULL;
731 struct soc_mixer_control *mc =
732 (struct soc_mixer_control *)kcontrol->private_value;
733 int ret;
734 unsigned int reg = mc->reg;
735
736 /* For HS and HF we shadow the values and only actually write
737 * them out when active in order to ensure the amplifier comes on
738 * as quietly as possible. */
739 switch (reg) {
740 case TWL6040_REG_HSGAIN:
741 out = &twl6040_priv->headset;
742 break;
743 default:
744 break;
745 }
746
747 if (out) {
748 out->left_vol = ucontrol->value.integer.value[0];
749 out->right_vol = ucontrol->value.integer.value[1];
750 if (!out->active)
751 return 1;
752 }
753
754 ret = snd_soc_put_volsw(kcontrol, ucontrol);
755 if (ret < 0)
756 return ret;
757
758 return 1;
759}
760
761static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
762 struct snd_ctl_elem_value *ucontrol)
763{
764 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
765 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
766 struct twl6040_output *out = &twl6040_priv->headset;
767 struct soc_mixer_control *mc =
768 (struct soc_mixer_control *)kcontrol->private_value;
769 unsigned int reg = mc->reg;
770
771 switch (reg) {
772 case TWL6040_REG_HSGAIN:
773 out = &twl6040_priv->headset;
774 ucontrol->value.integer.value[0] = out->left_vol;
775 ucontrol->value.integer.value[1] = out->right_vol;
776 return 0;
777
778 default:
779 break;
780 }
781
782 return snd_soc_get_volsw(kcontrol, ucontrol);
783}
784
785static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
786 struct snd_ctl_elem_value *ucontrol)
787{
788 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
789 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
790 struct twl6040_output *out = NULL;
791 struct soc_mixer_control *mc =
792 (struct soc_mixer_control *)kcontrol->private_value;
793 int ret;
794 unsigned int reg = mc->reg;
795
796 /* For HS and HF we shadow the values and only actually write
797 * them out when active in order to ensure the amplifier comes on
798 * as quietly as possible. */
799 switch (reg) {
800 case TWL6040_REG_HFLGAIN:
801 case TWL6040_REG_HFRGAIN:
802 out = &twl6040_priv->handsfree;
803 break;
804 default:
805 break;
806 }
807
808 if (out) {
809 out->left_vol = ucontrol->value.integer.value[0];
810 out->right_vol = ucontrol->value.integer.value[1];
811 if (!out->active)
812 return 1;
813 }
814
815 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
816 if (ret < 0)
817 return ret;
818
819 return 1;
820}
821
822static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
823 struct snd_ctl_elem_value *ucontrol)
824{
825 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
826 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
827 struct twl6040_output *out = &twl6040_priv->handsfree;
828 struct soc_mixer_control *mc =
829 (struct soc_mixer_control *)kcontrol->private_value;
830 unsigned int reg = mc->reg;
831
832 /* If these are cached registers use the cache */
833 switch (reg) {
834 case TWL6040_REG_HFLGAIN:
835 case TWL6040_REG_HFRGAIN:
836 out = &twl6040_priv->handsfree;
837 ucontrol->value.integer.value[0] = out->left_vol;
838 ucontrol->value.integer.value[1] = out->right_vol;
839 return 0;
840
841 default:
842 break;
843 }
844
845 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
846}
847
848/* double control with volume update */
849#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
850 xinvert, tlv_array)\
851{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
852 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
853 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
854 .tlv.p = (tlv_array), \
855 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
856 .put = twl6040_put_volsw, \
857 .private_value = (unsigned long)&(struct soc_mixer_control) \
858 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
859 .max = xmax, .platform_max = xmax, .invert = xinvert} }
860
861/* double control with volume update */
862#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
863 xinvert, tlv_array)\
864{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
865 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
866 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
867 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
868 .tlv.p = (tlv_array), \
869 .info = snd_soc_info_volsw_2r, \
870 .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
871 .private_value = (unsigned long)&(struct soc_mixer_control) \
872 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
873 .rshift = xshift, .max = xmax, .invert = xinvert}, }
874
8ecbabd9
MLC
875/*
876 * MICATT volume control:
877 * from -6 to 0 dB in 6 dB steps
878 */
879static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
880
881/*
882 * MICGAIN volume control:
2763f45d 883 * from 6 to 30 dB in 6 dB steps
8ecbabd9 884 */
2763f45d 885static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 886
370a0314
JEC
887/*
888 * AFMGAIN volume control:
1f71a3ba 889 * from -18 to 24 dB in 6 dB steps
370a0314 890 */
1f71a3ba 891static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 892
8ecbabd9
MLC
893/*
894 * HSGAIN volume control:
895 * from -30 to 0 dB in 2 dB steps
896 */
897static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
898
899/*
900 * HFGAIN volume control:
901 * from -52 to 6 dB in 2 dB steps
902 */
903static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
904
871a05a7
JEC
905/*
906 * EPGAIN volume control:
907 * from -24 to 6 dB in 2 dB steps
908 */
909static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
910
8ecbabd9
MLC
911/* Left analog microphone selection */
912static const char *twl6040_amicl_texts[] =
913 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
914
915/* Right analog microphone selection */
916static const char *twl6040_amicr_texts[] =
917 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
918
919static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
920 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
921 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
922};
923
370a0314
JEC
924static const char *twl6040_hs_texts[] = {
925 "Off", "HS DAC", "Line-In amp"
926};
927
928static const struct soc_enum twl6040_hs_enum[] = {
929 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
930 twl6040_hs_texts),
931 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
932 twl6040_hs_texts),
933};
934
935static const char *twl6040_hf_texts[] = {
936 "Off", "HF DAC", "Line-In amp"
937};
938
939static const struct soc_enum twl6040_hf_enum[] = {
940 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
941 twl6040_hf_texts),
942 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
943 twl6040_hf_texts),
944};
945
8ecbabd9
MLC
946static const struct snd_kcontrol_new amicl_control =
947 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
948
949static const struct snd_kcontrol_new amicr_control =
950 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
951
952/* Headset DAC playback switches */
370a0314
JEC
953static const struct snd_kcontrol_new hsl_mux_controls =
954 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 955
370a0314
JEC
956static const struct snd_kcontrol_new hsr_mux_controls =
957 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
958
959/* Handsfree DAC playback switches */
370a0314
JEC
960static const struct snd_kcontrol_new hfl_mux_controls =
961 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 962
370a0314
JEC
963static const struct snd_kcontrol_new hfr_mux_controls =
964 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 965
871a05a7
JEC
966static const struct snd_kcontrol_new ep_driver_switch_controls =
967 SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
968
6bba63b6 969/* Headset power mode */
7cca6067 970static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC
971 "Low-Power", "High-Perfomance",
972};
973
7cca6067
PU
974static const struct soc_enum twl6040_power_mode_enum =
975 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
976 twl6040_power_mode_texts);
6bba63b6
MLC
977
978static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
979 struct snd_ctl_elem_value *ucontrol)
980{
981 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
982 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
983
984 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
985
986 return 0;
987}
988
989static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
990 struct snd_ctl_elem_value *ucontrol)
991{
992 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
993 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
994 int high_perf = ucontrol->value.enumerated.item[0];
995 int ret = 0;
996
997 if (!priv->hs_power_mode_locked)
998 ret = headset_power_mode(codec, high_perf);
999
1000 if (!ret)
1001 priv->hs_power_mode = high_perf;
1002
1003 return ret;
1004}
1005
af958c72
PU
1006static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1010 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1011
1012 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1013
1014 return 0;
1015}
1016
1017static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1018 struct snd_ctl_elem_value *ucontrol)
1019{
1020 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1021 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1022
1023 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU
1024
1025 return 0;
1026}
1027
1028int twl6040_get_clk_id(struct snd_soc_codec *codec)
1029{
1030 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1031
ff593ca1 1032 return priv->pll_power_mode;
af958c72
PU
1033}
1034EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1035
8ecbabd9
MLC
1036static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1037 /* Capture gains */
1038 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1039 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1040 SOC_DOUBLE_TLV("Capture Volume",
1041 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1042
370a0314
JEC
1043 /* AFM gains */
1044 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1045 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1046
8ecbabd9 1047 /* Playback gains */
1bf84759 1048 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 1049 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 1050 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 1051 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC
1052 SOC_SINGLE_TLV("Earphone Playback Volume",
1053 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1054
7cca6067 1055 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC
1056 twl6040_headset_power_get_enum,
1057 twl6040_headset_power_put_enum),
af958c72
PU
1058
1059 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1060 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC
1061};
1062
1063static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1064 /* Inputs */
1065 SND_SOC_DAPM_INPUT("MAINMIC"),
1066 SND_SOC_DAPM_INPUT("HSMIC"),
1067 SND_SOC_DAPM_INPUT("SUBMIC"),
1068 SND_SOC_DAPM_INPUT("AFML"),
1069 SND_SOC_DAPM_INPUT("AFMR"),
1070
1071 /* Outputs */
1072 SND_SOC_DAPM_OUTPUT("HSOL"),
1073 SND_SOC_DAPM_OUTPUT("HSOR"),
1074 SND_SOC_DAPM_OUTPUT("HFL"),
1075 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1076 SND_SOC_DAPM_OUTPUT("EP"),
8ecbabd9
MLC
1077
1078 /* Analog input muxes for the capture amplifiers */
1079 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1080 SND_SOC_NOPM, 0, 0, &amicl_control),
1081 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1082 SND_SOC_NOPM, 0, 0, &amicr_control),
1083
1084 /* Analog capture PGAs */
1085 SND_SOC_DAPM_PGA("MicAmpL",
1086 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1087 SND_SOC_DAPM_PGA("MicAmpR",
1088 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1089
370a0314
JEC
1090 /* Auxiliary FM PGAs */
1091 SND_SOC_DAPM_PGA("AFMAmpL",
1092 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1093 SND_SOC_DAPM_PGA("AFMAmpR",
1094 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1095
8ecbabd9
MLC
1096 /* ADCs */
1097 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1098 TWL6040_REG_MICLCTL, 2, 0),
1099 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1100 TWL6040_REG_MICRCTL, 2, 0),
1101
1102 /* Microphone bias */
1103 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1104 TWL6040_REG_AMICBCTL, 0, 0),
1105 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1106 TWL6040_REG_AMICBCTL, 4, 0),
1107 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1108 TWL6040_REG_DMICBCTL, 0, 0),
1109 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1110 TWL6040_REG_DMICBCTL, 4, 0),
1111
1112 /* DACs */
0fad4ed7
JEC
1113 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1114 TWL6040_REG_HSLCTL, 0, 0,
1115 twl6040_hs_dac_event,
1116 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1117 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1118 TWL6040_REG_HSRCTL, 0, 0,
1119 twl6040_hs_dac_event,
1120 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1121 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1122 TWL6040_REG_HFLCTL, 0, 0,
1123 twl6040_power_mode_event,
1124 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1125 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1126 TWL6040_REG_HFRCTL, 0, 0,
1127 twl6040_power_mode_event,
1128 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1129
370a0314
JEC
1130 SND_SOC_DAPM_MUX("HF Left Playback",
1131 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
1132 SND_SOC_DAPM_MUX("HF Right Playback",
1133 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1134 /* Analog playback Muxes */
1135 SND_SOC_DAPM_MUX("HS Left Playback",
1136 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
1137 SND_SOC_DAPM_MUX("HS Right Playback",
1138 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1139
0fad4ed7 1140 /* Analog playback drivers */
f769bdf2 1141 SND_SOC_DAPM_OUT_DRV_E("Handsfree Left Driver",
0fad4ed7 1142 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
1bf84759
MOC
1143 pga_event,
1144 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1145 SND_SOC_DAPM_OUT_DRV_E("Handsfree Right Driver",
0fad4ed7 1146 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
1bf84759
MOC
1147 pga_event,
1148 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1149 SND_SOC_DAPM_OUT_DRV_E("Headset Left Driver",
1bf84759
MOC
1150 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
1151 pga_event,
1152 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
f769bdf2 1153 SND_SOC_DAPM_OUT_DRV_E("Headset Right Driver",
1bf84759
MOC
1154 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
1155 pga_event,
1156 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
871a05a7
JEC
1157 SND_SOC_DAPM_SWITCH_E("Earphone Driver",
1158 SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
1159 twl6040_power_mode_event,
1160 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1161
1162 /* Analog playback PGAs */
1163 SND_SOC_DAPM_PGA("HFDAC Left PGA",
1164 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
1165 SND_SOC_DAPM_PGA("HFDAC Right PGA",
1166 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1167
1168};
1169
1170static const struct snd_soc_dapm_route intercon[] = {
1171 /* Capture path */
1172 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1173 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1174 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1175
1176 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1177 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1178 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1179
1180 {"MicAmpL", NULL, "Analog Left Capture Route"},
1181 {"MicAmpR", NULL, "Analog Right Capture Route"},
1182
1183 {"ADC Left", NULL, "MicAmpL"},
1184 {"ADC Right", NULL, "MicAmpR"},
1185
370a0314
JEC
1186 /* AFM path */
1187 {"AFMAmpL", "NULL", "AFML"},
1188 {"AFMAmpR", "NULL", "AFMR"},
1189
1190 {"HS Left Playback", "HS DAC", "HSDAC Left"},
1191 {"HS Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1192
370a0314
JEC
1193 {"HS Right Playback", "HS DAC", "HSDAC Right"},
1194 {"HS Right Playback", "Line-In amp", "AFMAmpR"},
1195
1196 {"Headset Left Driver", "NULL", "HS Left Playback"},
1197 {"Headset Right Driver", "NULL", "HS Right Playback"},
8ecbabd9
MLC
1198
1199 {"HSOL", NULL, "Headset Left Driver"},
1200 {"HSOR", NULL, "Headset Right Driver"},
1201
871a05a7
JEC
1202 /* Earphone playback path */
1203 {"Earphone Driver", "Switch", "HSDAC Left"},
1204 {"EP", NULL, "Earphone Driver"},
1205
370a0314
JEC
1206 {"HF Left Playback", "HF DAC", "HFDAC Left"},
1207 {"HF Left Playback", "Line-In amp", "AFMAmpL"},
1208
1209 {"HF Right Playback", "HF DAC", "HFDAC Right"},
1210 {"HF Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1211
370a0314
JEC
1212 {"HFDAC Left PGA", NULL, "HF Left Playback"},
1213 {"HFDAC Right PGA", NULL, "HF Right Playback"},
8ecbabd9
MLC
1214
1215 {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
1216 {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
1217
1218 {"HFL", NULL, "Handsfree Left Driver"},
1219 {"HFR", NULL, "Handsfree Right Driver"},
1220};
1221
1222static int twl6040_add_widgets(struct snd_soc_codec *codec)
1223{
ce6120cc 1224 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1225
ce6120cc
LG
1226 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1227 ARRAY_SIZE(twl6040_dapm_widgets));
1228 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1229 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC
1230
1231 return 0;
1232}
1233
8ecbabd9
MLC
1234static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1235 enum snd_soc_bias_level level)
1236{
fb34d3d5 1237 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1238 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1239 int ret;
1240
1241 switch (level) {
1242 case SND_SOC_BIAS_ON:
1243 break;
1244 case SND_SOC_BIAS_PREPARE:
1245 break;
1246 case SND_SOC_BIAS_STANDBY:
1247 if (priv->codec_powered)
1248 break;
1249
fb34d3d5
MLC
1250 ret = twl6040_power(twl6040, 1);
1251 if (ret)
1252 return ret;
8ecbabd9 1253
fb34d3d5 1254 priv->codec_powered = 1;
8ecbabd9 1255
a52762ee 1256 twl6040_restore_regs(codec);
65b7cecc
OM
1257
1258 /* Set external boost GPO */
1259 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1260 break;
1261 case SND_SOC_BIAS_OFF:
1262 if (!priv->codec_powered)
1263 break;
1264
fb34d3d5 1265 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1266 priv->codec_powered = 0;
1267 break;
1268 }
1269
ce6120cc 1270 codec->dapm.bias_level = level;
8ecbabd9
MLC
1271
1272 return 0;
1273}
1274
8ecbabd9
MLC
1275static int twl6040_startup(struct snd_pcm_substream *substream,
1276 struct snd_soc_dai *dai)
1277{
1278 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1279 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1280 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1281
8ecbabd9
MLC
1282 snd_pcm_hw_constraint_list(substream->runtime, 0,
1283 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1284 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC
1285
1286 return 0;
1287}
1288
1289static int twl6040_hw_params(struct snd_pcm_substream *substream,
1290 struct snd_pcm_hw_params *params,
1291 struct snd_soc_dai *dai)
1292{
1293 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1294 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1295 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1296 int rate;
1297
8ecbabd9
MLC
1298 rate = params_rate(params);
1299 switch (rate) {
60ea4cec
OM
1300 case 11250:
1301 case 22500:
1302 case 44100:
8ecbabd9 1303 case 88200:
753621c2
PU
1304 /* These rates are not supported when HPPLL is in use */
1305 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1306 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1307 rate);
1308 return -EINVAL;
1309 }
1310 /* Capture is not supported with 17.64MHz sysclk */
1311 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1312 dev_err(codec->dev,
1313 "capture mode is not supported at %dHz\n",
1314 rate);
1315 return -EINVAL;
1316 }
8ecbabd9
MLC
1317 priv->sysclk = 17640000;
1318 break;
60ea4cec
OM
1319 case 8000:
1320 case 16000:
1321 case 32000:
1322 case 48000:
8ecbabd9 1323 case 96000:
8ecbabd9
MLC
1324 priv->sysclk = 19200000;
1325 break;
1326 default:
1327 dev_err(codec->dev, "unsupported rate %d\n", rate);
1328 return -EINVAL;
1329 }
1330
8ecbabd9
MLC
1331 return 0;
1332}
1333
4e624d06
OM
1334static int twl6040_prepare(struct snd_pcm_substream *substream,
1335 struct snd_soc_dai *dai)
8ecbabd9
MLC
1336{
1337 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1338 struct snd_soc_codec *codec = rtd->codec;
753621c2 1339 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1340 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1341 int ret;
8ecbabd9 1342
4e624d06
OM
1343 if (!priv->sysclk) {
1344 dev_err(codec->dev,
1345 "no mclk configured, call set_sysclk() on init\n");
1346 return -EINVAL;
1347 }
1348
4e624d06 1349 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC
1350 dev_err(codec->dev,
1351 "some enabled paths aren't supported at %dHz\n",
1352 priv->sysclk);
1353 return -EPERM;
8ecbabd9 1354 }
753621c2
PU
1355
1356 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1357 if (ret) {
1358 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1359 return -EPERM;
1360 }
1361
8ecbabd9
MLC
1362 return 0;
1363}
1364
1365static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1366 int clk_id, unsigned int freq, int dir)
1367{
1368 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1369 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1370
1371 switch (clk_id) {
1372 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1373 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU
1374 priv->pll = clk_id;
1375 priv->clk_in = freq;
8ecbabd9
MLC
1376 break;
1377 default:
1378 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1379 return -EINVAL;
1380 }
1381
1382 return 0;
1383}
1384
1385static struct snd_soc_dai_ops twl6040_dai_ops = {
1386 .startup = twl6040_startup,
1387 .hw_params = twl6040_hw_params,
4e624d06 1388 .prepare = twl6040_prepare,
8ecbabd9
MLC
1389 .set_sysclk = twl6040_set_dai_sysclk,
1390};
1391
6510bdc3 1392static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1393{
f0fba2ad 1394 .name = "twl6040-hifi",
8ecbabd9
MLC
1395 .playback = {
1396 .stream_name = "Playback",
1397 .channels_min = 1,
21385eeb
PU
1398 .channels_max = 2,
1399 .rates = TWL6040_RATES,
1400 .formats = TWL6040_FORMATS,
1401 },
1402 .capture = {
1403 .stream_name = "Capture",
1404 .channels_min = 1,
1405 .channels_max = 2,
8ecbabd9
MLC
1406 .rates = TWL6040_RATES,
1407 .formats = TWL6040_FORMATS,
1408 },
21385eeb
PU
1409 .ops = &twl6040_dai_ops,
1410},
6510bdc3
LG
1411{
1412 .name = "twl6040-ul",
8ecbabd9
MLC
1413 .capture = {
1414 .stream_name = "Capture",
1415 .channels_min = 1,
1416 .channels_max = 2,
1417 .rates = TWL6040_RATES,
1418 .formats = TWL6040_FORMATS,
1419 },
1420 .ops = &twl6040_dai_ops,
6510bdc3
LG
1421},
1422{
1423 .name = "twl6040-dl1",
8ecbabd9 1424 .playback = {
6510bdc3 1425 .stream_name = "Headset Playback",
8ecbabd9 1426 .channels_min = 1,
6510bdc3 1427 .channels_max = 2,
8ecbabd9
MLC
1428 .rates = TWL6040_RATES,
1429 .formats = TWL6040_FORMATS,
1430 },
6510bdc3
LG
1431 .ops = &twl6040_dai_ops,
1432},
1433{
1434 .name = "twl6040-dl2",
1435 .playback = {
1436 .stream_name = "Handsfree Playback",
8ecbabd9
MLC
1437 .channels_min = 1,
1438 .channels_max = 2,
1439 .rates = TWL6040_RATES,
1440 .formats = TWL6040_FORMATS,
1441 },
1442 .ops = &twl6040_dai_ops,
6510bdc3
LG
1443},
1444{
1445 .name = "twl6040-vib",
1446 .playback = {
1447 .stream_name = "Vibra Playback",
1448 .channels_min = 2,
1449 .channels_max = 2,
1450 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1451 .formats = TWL6040_FORMATS,
1452 },
1453 .ops = &twl6040_dai_ops,
1454},
8ecbabd9 1455};
8ecbabd9
MLC
1456
1457#ifdef CONFIG_PM
f0fba2ad 1458static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1459{
8ecbabd9
MLC
1460 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1461
1462 return 0;
1463}
1464
f0fba2ad 1465static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1466{
8ecbabd9 1467 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1468 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1469
1470 return 0;
1471}
1472#else
1473#define twl6040_suspend NULL
1474#define twl6040_resume NULL
1475#endif
1476
f0fba2ad 1477static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1478{
8ecbabd9 1479 struct twl6040_data *priv;
1fbe9952 1480 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU
1481 struct platform_device *pdev = container_of(codec->dev,
1482 struct platform_device, dev);
8ecbabd9
MLC
1483 int ret = 0;
1484
1485 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1486 if (priv == NULL)
1487 return -ENOMEM;
f0fba2ad 1488 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1489
a2d2362e 1490 priv->codec = codec;
fb34d3d5 1491 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1492
1fbe9952
ACG
1493 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1494 priv->hs_left_step = pdata->hs_left_step;
1495 priv->hs_right_step = pdata->hs_right_step;
1496 } else {
1497 priv->hs_left_step = 1;
1498 priv->hs_right_step = 1;
1499 }
99903ea2 1500
1fbe9952
ACG
1501 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1502 priv->hf_left_step = pdata->hf_left_step;
1503 priv->hf_right_step = pdata->hf_right_step;
1504 } else {
1505 priv->hf_left_step = 1;
1506 priv->hf_right_step = 1;
1507 }
99903ea2 1508
2a433b9d
PU
1509 priv->plug_irq = platform_get_irq(pdev, 0);
1510 if (priv->plug_irq < 0) {
1511 dev_err(codec->dev, "invalid irq\n");
1512 ret = -EINVAL;
1513 goto work_err;
1514 }
8ecbabd9 1515
a2d2362e 1516 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL
1517 if (!priv->workqueue) {
1518 ret = -ENOMEM;
a2d2362e 1519 goto work_err;
19aab08d 1520 }
a2d2362e
JEC
1521
1522 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1523
1524 mutex_init(&priv->mutex);
8ecbabd9 1525
1bf84759
MOC
1526 init_completion(&priv->headset.ramp_done);
1527 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1528
1bf84759
MOC
1529 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1530 if (priv->hf_workqueue == NULL) {
1531 ret = -ENOMEM;
fb34d3d5 1532 goto hfwq_err;
1bf84759
MOC
1533 }
1534 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1535 if (priv->hs_workqueue == NULL) {
1536 ret = -ENOMEM;
fb34d3d5 1537 goto hswq_err;
1bf84759
MOC
1538 }
1539
1540 INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
1541 INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
1542
2a433b9d
PU
1543 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1544 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC
1545 if (ret) {
1546 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1547 goto plugirq_err;
1548 }
1549
a52762ee 1550 twl6040_init_chip(codec);
fb34d3d5 1551
8ecbabd9
MLC
1552 /* power on device */
1553 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1554 if (ret)
1bf84759 1555 goto bias_err;
8ecbabd9 1556
f0fba2ad
LG
1557 snd_soc_add_controls(codec, twl6040_snd_controls,
1558 ARRAY_SIZE(twl6040_snd_controls));
1559 twl6040_add_widgets(codec);
8ecbabd9
MLC
1560
1561 return 0;
1562
1bf84759 1563bias_err:
2a433b9d 1564 free_irq(priv->plug_irq, codec);
fb34d3d5 1565plugirq_err:
1bf84759 1566 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1567hswq_err:
1bf84759 1568 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1569hfwq_err:
a2d2362e
JEC
1570 destroy_workqueue(priv->workqueue);
1571work_err:
8ecbabd9
MLC
1572 kfree(priv);
1573 return ret;
1574}
1575
f0fba2ad 1576static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1577{
f0fba2ad 1578 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1579
f0fba2ad 1580 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1581 free_irq(priv->plug_irq, codec);
a2d2362e 1582 destroy_workqueue(priv->workqueue);
1bf84759
MOC
1583 destroy_workqueue(priv->hf_workqueue);
1584 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1585 kfree(priv);
8ecbabd9 1586
f0fba2ad
LG
1587 return 0;
1588}
8ecbabd9 1589
f0fba2ad
LG
1590static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1591 .probe = twl6040_probe,
1592 .remove = twl6040_remove,
1593 .suspend = twl6040_suspend,
1594 .resume = twl6040_resume,
1595 .read = twl6040_read_reg_cache,
1596 .write = twl6040_write,
1597 .set_bias_level = twl6040_set_bias_level,
1598 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1599 .reg_word_size = sizeof(u8),
1600 .reg_cache_default = twl6040_reg,
1601};
1602
1603static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1604{
6510bdc3
LG
1605 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1606 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG
1607}
1608
1609static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1610{
1611 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC
1612 return 0;
1613}
1614
1615static struct platform_driver twl6040_codec_driver = {
1616 .driver = {
f0fba2ad 1617 .name = "twl6040-codec",
8ecbabd9
MLC
1618 .owner = THIS_MODULE,
1619 },
1620 .probe = twl6040_codec_probe,
1621 .remove = __devexit_p(twl6040_codec_remove),
1622};
1623
1624static int __init twl6040_codec_init(void)
1625{
1626 return platform_driver_register(&twl6040_codec_driver);
1627}
1628module_init(twl6040_codec_init);
1629
1630static void __exit twl6040_codec_exit(void)
1631{
1632 platform_driver_unregister(&twl6040_codec_driver);
1633}
1634module_exit(twl6040_codec_exit);
1635
1636MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1637MODULE_AUTHOR("Misael Lopez Cruz");
1638MODULE_LICENSE("GPL");
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