ASoC: Drop exporting ad1980_dai
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC
1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
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31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
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MLC
36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
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MOC
42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
d17bf318
PU
60/* Shadow register used by the driver */
61#define TWL6040_REG_SW_SHADOW 0x2F
62#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
63
317596a6
PU
64/* TWL6040_REG_SW_SHADOW (0x2F) fields */
65#define TWL6040_EAR_PATH_ENABLE 0x01
66
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MOC
67struct twl6040_output {
68 u16 active;
69 u16 left_vol;
70 u16 right_vol;
71 u16 left_step;
72 u16 right_step;
73 unsigned int step_delay;
74 u16 ramp;
75 u16 mute;
76 struct completion ramp_done;
77};
8ecbabd9 78
a2d2362e
JEC
79struct twl6040_jack_data {
80 struct snd_soc_jack *jack;
81 int report;
82};
83
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MLC
84/* codec private data */
85struct twl6040_data {
2a433b9d 86 int plug_irq;
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87 int codec_powered;
88 int pll;
89 int non_lp;
af958c72 90 int pll_power_mode;
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91 int hs_power_mode;
92 int hs_power_mode_locked;
fb34d3d5 93 unsigned int clk_in;
8ecbabd9 94 unsigned int sysclk;
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ACG
95 u16 hs_left_step;
96 u16 hs_right_step;
97 u16 hf_left_step;
98 u16 hf_right_step;
a2d2362e
JEC
99 struct twl6040_jack_data hs_jack;
100 struct snd_soc_codec *codec;
101 struct workqueue_struct *workqueue;
102 struct delayed_work delayed_work;
103 struct mutex mutex;
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MOC
104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
106 struct workqueue_struct *hf_workqueue;
107 struct workqueue_struct *hs_workqueue;
108 struct delayed_work hs_delayed_work;
109 struct delayed_work hf_delayed_work;
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110};
111
112/*
113 * twl6040 register cache & default register settings
114 */
115static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU
116 0x00, /* not used 0x00 */
117 0x4B, /* REG_ASICID 0x01 (ro) */
118 0x00, /* REG_ASICREV 0x02 (ro) */
119 0x00, /* REG_INTID 0x03 */
120 0x00, /* REG_INTMR 0x04 */
121 0x00, /* REG_NCPCTRL 0x05 */
122 0x00, /* REG_LDOCTL 0x06 */
123 0x60, /* REG_HPPLLCTL 0x07 */
124 0x00, /* REG_LPPLLCTL 0x08 */
125 0x4A, /* REG_LPPLLDIV 0x09 */
126 0x00, /* REG_AMICBCTL 0x0A */
127 0x00, /* REG_DMICBCTL 0x0B */
128 0x00, /* REG_MICLCTL 0x0C */
129 0x00, /* REG_MICRCTL 0x0D */
130 0x00, /* REG_MICGAIN 0x0E */
131 0x1B, /* REG_LINEGAIN 0x0F */
132 0x00, /* REG_HSLCTL 0x10 */
133 0x00, /* REG_HSRCTL 0x11 */
134 0x00, /* REG_HSGAIN 0x12 */
135 0x00, /* REG_EARCTL 0x13 */
136 0x00, /* REG_HFLCTL 0x14 */
137 0x00, /* REG_HFLGAIN 0x15 */
138 0x00, /* REG_HFRCTL 0x16 */
139 0x00, /* REG_HFRGAIN 0x17 */
140 0x00, /* REG_VIBCTLL 0x18 */
141 0x00, /* REG_VIBDATL 0x19 */
142 0x00, /* REG_VIBCTLR 0x1A */
143 0x00, /* REG_VIBDATR 0x1B */
144 0x00, /* REG_HKCTL1 0x1C */
145 0x00, /* REG_HKCTL2 0x1D */
146 0x00, /* REG_GPOCTL 0x1E */
147 0x00, /* REG_ALB 0x1F */
148 0x00, /* REG_DLB 0x20 */
149 0x00, /* not used 0x21 */
150 0x00, /* not used 0x22 */
151 0x00, /* not used 0x23 */
152 0x00, /* not used 0x24 */
153 0x00, /* not used 0x25 */
154 0x00, /* not used 0x26 */
155 0x00, /* not used 0x27 */
156 0x00, /* REG_TRIM1 0x28 */
157 0x00, /* REG_TRIM2 0x29 */
158 0x00, /* REG_TRIM3 0x2A */
159 0x00, /* REG_HSOTRIM 0x2B */
160 0x00, /* REG_HFOTRIM 0x2C */
161 0x09, /* REG_ACCCTL 0x2D */
162 0x00, /* REG_STATUS 0x2E (ro) */
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PU
163
164 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
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165};
166
a52762ee
PU
167/* List of registers to be restored after power up */
168static const int twl6040_restore_list[] = {
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169 TWL6040_REG_MICLCTL,
170 TWL6040_REG_MICRCTL,
171 TWL6040_REG_MICGAIN,
172 TWL6040_REG_LINEGAIN,
173 TWL6040_REG_HSLCTL,
174 TWL6040_REG_HSRCTL,
175 TWL6040_REG_HSGAIN,
176 TWL6040_REG_EARCTL,
177 TWL6040_REG_HFLCTL,
178 TWL6040_REG_HFLGAIN,
179 TWL6040_REG_HFRCTL,
180 TWL6040_REG_HFRGAIN,
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MLC
181};
182
af958c72
PU
183/* set of rates for each pll: low-power and high-performance */
184static unsigned int lp_rates[] = {
185 8000,
186 11250,
187 16000,
188 22500,
189 32000,
190 44100,
191 48000,
192 88200,
193 96000,
194};
195
af958c72
PU
196static unsigned int hp_rates[] = {
197 8000,
198 16000,
199 32000,
200 48000,
201 96000,
202};
203
f53c346c
PU
204static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
205 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
206 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU
207};
208
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MLC
209/*
210 * read twl6040 register cache
211 */
212static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
213 unsigned int reg)
214{
215 u8 *cache = codec->reg_cache;
216
217 if (reg >= TWL6040_CACHEREGNUM)
218 return -EIO;
219
220 return cache[reg];
221}
222
223/*
224 * write twl6040 register cache
225 */
226static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
227 u8 reg, u8 value)
228{
229 u8 *cache = codec->reg_cache;
230
231 if (reg >= TWL6040_CACHEREGNUM)
232 return;
233 cache[reg] = value;
234}
235
236/*
237 * read from twl6040 hardware register
238 */
239static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
240 unsigned int reg)
241{
fb34d3d5 242 struct twl6040 *twl6040 = codec->control_data;
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MLC
243 u8 value;
244
245 if (reg >= TWL6040_CACHEREGNUM)
246 return -EIO;
247
d17bf318
PU
248 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
249 value = twl6040_reg_read(twl6040, reg);
250 twl6040_write_reg_cache(codec, reg, value);
251 } else {
252 value = twl6040_read_reg_cache(codec, reg);
253 }
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254
255 return value;
256}
257
258/*
259 * write to the twl6040 register space
260 */
261static int twl6040_write(struct snd_soc_codec *codec,
262 unsigned int reg, unsigned int value)
263{
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MLC
264 struct twl6040 *twl6040 = codec->control_data;
265
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266 if (reg >= TWL6040_CACHEREGNUM)
267 return -EIO;
268
269 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU
270 if (likely(reg < TWL6040_REG_SW_SHADOW))
271 return twl6040_reg_write(twl6040, reg, value);
272 else
273 return 0;
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MLC
274}
275
a52762ee 276static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 277{
a52762ee
PU
278 struct twl6040 *twl6040 = codec->control_data;
279 u8 val;
280
281 val = twl6040_get_revid(twl6040);
282 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 283
2c27ff41
PU
284 /* Change chip defaults */
285 /* No imput selected for microphone amplifiers */
286 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
287 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU
288
289 /*
290 * We need to lower the default gain values, so the ramp code
291 * can work correctly for the first playback.
292 * This reduces the pop noise heard at the first playback.
293 */
294 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
295 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
296 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
297 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
298 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
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MLC
299}
300
a52762ee 301static void twl6040_restore_regs(struct snd_soc_codec *codec)
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MLC
302{
303 u8 *cache = codec->reg_cache;
304 int reg, i;
305
a52762ee
PU
306 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
307 reg = twl6040_restore_list[i];
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MLC
308 twl6040_write(codec, reg, cache[reg]);
309 }
310}
311
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MOC
312/*
313 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
314 */
315static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
316 unsigned int left_step, unsigned int right_step)
317{
318
319 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
320 struct twl6040_output *headset = &priv->headset;
321 int left_complete = 0, right_complete = 0;
322 u8 reg, val;
323
324 /* left channel */
325 left_step = (left_step > 0xF) ? 0xF : left_step;
326 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
327 val = (~reg & TWL6040_HSL_VOL_MASK);
328
329 if (headset->ramp == TWL6040_RAMP_UP) {
330 /* ramp step up */
331 if (val < headset->left_vol) {
1fbe9952
ACG
332 if (val + left_step > headset->left_vol)
333 val = headset->left_vol;
334 else
335 val += left_step;
336
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MOC
337 reg &= ~TWL6040_HSL_VOL_MASK;
338 twl6040_write(codec, TWL6040_REG_HSGAIN,
339 (reg | (~val & TWL6040_HSL_VOL_MASK)));
340 } else {
341 left_complete = 1;
342 }
343 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
344 /* ramp step down */
345 if (val > 0x0) {
1fbe9952
ACG
346 if ((int)val - (int)left_step < 0)
347 val = 0;
348 else
349 val -= left_step;
350
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MOC
351 reg &= ~TWL6040_HSL_VOL_MASK;
352 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
353 (~val & TWL6040_HSL_VOL_MASK));
354 } else {
355 left_complete = 1;
356 }
357 }
358
359 /* right channel */
360 right_step = (right_step > 0xF) ? 0xF : right_step;
361 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
362 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
363
364 if (headset->ramp == TWL6040_RAMP_UP) {
365 /* ramp step up */
366 if (val < headset->right_vol) {
1fbe9952
ACG
367 if (val + right_step > headset->right_vol)
368 val = headset->right_vol;
369 else
370 val += right_step;
371
1bf84759
MOC
372 reg &= ~TWL6040_HSR_VOL_MASK;
373 twl6040_write(codec, TWL6040_REG_HSGAIN,
374 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
375 } else {
376 right_complete = 1;
377 }
378 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
379 /* ramp step down */
380 if (val > 0x0) {
1fbe9952
ACG
381 if ((int)val - (int)right_step < 0)
382 val = 0;
383 else
384 val -= right_step;
385
1bf84759
MOC
386 reg &= ~TWL6040_HSR_VOL_MASK;
387 twl6040_write(codec, TWL6040_REG_HSGAIN,
388 reg | (~val << TWL6040_HSR_VOL_SHIFT));
389 } else {
390 right_complete = 1;
391 }
392 }
393
394 return left_complete & right_complete;
395}
396
397/*
398 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
399 */
400static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
401 unsigned int left_step, unsigned int right_step)
402{
403 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
404 struct twl6040_output *handsfree = &priv->handsfree;
405 int left_complete = 0, right_complete = 0;
406 u16 reg, val;
407
408 /* left channel */
409 left_step = (left_step > 0x1D) ? 0x1D : left_step;
410 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
411 reg = 0x1D - reg;
412 val = (reg & TWL6040_HF_VOL_MASK);
413 if (handsfree->ramp == TWL6040_RAMP_UP) {
414 /* ramp step up */
415 if (val < handsfree->left_vol) {
1fbe9952
ACG
416 if (val + left_step > handsfree->left_vol)
417 val = handsfree->left_vol;
418 else
419 val += left_step;
420
1bf84759
MOC
421 reg &= ~TWL6040_HF_VOL_MASK;
422 twl6040_write(codec, TWL6040_REG_HFLGAIN,
423 reg | (0x1D - val));
424 } else {
425 left_complete = 1;
426 }
427 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
428 /* ramp step down */
429 if (val > 0) {
1fbe9952
ACG
430 if ((int)val - (int)left_step < 0)
431 val = 0;
432 else
433 val -= left_step;
434
1bf84759
MOC
435 reg &= ~TWL6040_HF_VOL_MASK;
436 twl6040_write(codec, TWL6040_REG_HFLGAIN,
437 reg | (0x1D - val));
438 } else {
439 left_complete = 1;
440 }
441 }
442
443 /* right channel */
444 right_step = (right_step > 0x1D) ? 0x1D : right_step;
445 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
446 reg = 0x1D - reg;
447 val = (reg & TWL6040_HF_VOL_MASK);
448 if (handsfree->ramp == TWL6040_RAMP_UP) {
449 /* ramp step up */
450 if (val < handsfree->right_vol) {
1fbe9952
ACG
451 if (val + right_step > handsfree->right_vol)
452 val = handsfree->right_vol;
453 else
454 val += right_step;
455
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MOC
456 reg &= ~TWL6040_HF_VOL_MASK;
457 twl6040_write(codec, TWL6040_REG_HFRGAIN,
458 reg | (0x1D - val));
459 } else {
460 right_complete = 1;
461 }
462 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
463 /* ramp step down */
464 if (val > 0) {
1fbe9952
ACG
465 if ((int)val - (int)right_step < 0)
466 val = 0;
467 else
468 val -= right_step;
469
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MOC
470 reg &= ~TWL6040_HF_VOL_MASK;
471 twl6040_write(codec, TWL6040_REG_HFRGAIN,
472 reg | (0x1D - val));
473 }
474 }
475
476 return left_complete & right_complete;
477}
478
479/*
480 * This work ramps both output PGAs at stream start/stop time to
481 * minimise pop associated with DAPM power switching.
482 */
483static void twl6040_pga_hs_work(struct work_struct *work)
484{
485 struct twl6040_data *priv =
486 container_of(work, struct twl6040_data, hs_delayed_work.work);
487 struct snd_soc_codec *codec = priv->codec;
488 struct twl6040_output *headset = &priv->headset;
489 unsigned int delay = headset->step_delay;
490 int i, headset_complete;
491
492 /* do we need to ramp at all ? */
493 if (headset->ramp == TWL6040_RAMP_NONE)
494 return;
495
496 /* HS PGA volumes have 4 bits of resolution to ramp */
497 for (i = 0; i <= 16; i++) {
1fbe9952
ACG
498 headset_complete = twl6040_hs_ramp_step(codec,
499 headset->left_step,
500 headset->right_step);
1bf84759
MOC
501
502 /* ramp finished ? */
503 if (headset_complete)
504 break;
505
506 /*
507 * TODO: tune: delay is longer over 0dB
508 * as increases are larger.
509 */
510 if (i >= 8)
511 schedule_timeout_interruptible(msecs_to_jiffies(delay +
512 (delay >> 1)));
513 else
514 schedule_timeout_interruptible(msecs_to_jiffies(delay));
515 }
516
517 if (headset->ramp == TWL6040_RAMP_DOWN) {
518 headset->active = 0;
519 complete(&headset->ramp_done);
520 } else {
521 headset->active = 1;
522 }
523 headset->ramp = TWL6040_RAMP_NONE;
524}
525
526static void twl6040_pga_hf_work(struct work_struct *work)
527{
528 struct twl6040_data *priv =
529 container_of(work, struct twl6040_data, hf_delayed_work.work);
530 struct snd_soc_codec *codec = priv->codec;
531 struct twl6040_output *handsfree = &priv->handsfree;
532 unsigned int delay = handsfree->step_delay;
533 int i, handsfree_complete;
534
535 /* do we need to ramp at all ? */
536 if (handsfree->ramp == TWL6040_RAMP_NONE)
537 return;
538
539 /* HF PGA volumes have 5 bits of resolution to ramp */
540 for (i = 0; i <= 32; i++) {
1fbe9952
ACG
541 handsfree_complete = twl6040_hf_ramp_step(codec,
542 handsfree->left_step,
543 handsfree->right_step);
1bf84759
MOC
544
545 /* ramp finished ? */
546 if (handsfree_complete)
547 break;
548
549 /*
550 * TODO: tune: delay is longer over 0dB
551 * as increases are larger.
552 */
553 if (i >= 16)
554 schedule_timeout_interruptible(msecs_to_jiffies(delay +
555 (delay >> 1)));
556 else
557 schedule_timeout_interruptible(msecs_to_jiffies(delay));
558 }
559
560
561 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
562 handsfree->active = 0;
563 complete(&handsfree->ramp_done);
564 } else
565 handsfree->active = 1;
566 handsfree->ramp = TWL6040_RAMP_NONE;
567}
568
569static int pga_event(struct snd_soc_dapm_widget *w,
570 struct snd_kcontrol *kcontrol, int event)
571{
572 struct snd_soc_codec *codec = w->codec;
573 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
574 struct twl6040_output *out;
575 struct delayed_work *work;
576 struct workqueue_struct *queue;
577
578 switch (w->shift) {
579 case 2:
580 case 3:
581 out = &priv->headset;
582 work = &priv->hs_delayed_work;
583 queue = priv->hs_workqueue;
1fbe9952
ACG
584 out->left_step = priv->hs_left_step;
585 out->right_step = priv->hs_right_step;
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MOC
586 out->step_delay = 5; /* 5 ms between volume ramp steps */
587 break;
588 case 4:
589 out = &priv->handsfree;
590 work = &priv->hf_delayed_work;
591 queue = priv->hf_workqueue;
1fbe9952
ACG
592 out->left_step = priv->hf_left_step;
593 out->right_step = priv->hf_right_step;
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MOC
594 out->step_delay = 5; /* 5 ms between volume ramp steps */
595 if (SND_SOC_DAPM_EVENT_ON(event))
596 priv->non_lp++;
597 else
598 priv->non_lp--;
599 break;
600 default:
601 return -1;
602 }
603
604 switch (event) {
605 case SND_SOC_DAPM_POST_PMU:
606 if (out->active)
607 break;
608
609 /* don't use volume ramp for power-up */
610 out->left_step = out->left_vol;
611 out->right_step = out->right_vol;
612
613 if (!delayed_work_pending(work)) {
614 out->ramp = TWL6040_RAMP_UP;
615 queue_delayed_work(queue, work,
616 msecs_to_jiffies(1));
617 }
618 break;
619
620 case SND_SOC_DAPM_PRE_PMD:
621 if (!out->active)
622 break;
623
624 if (!delayed_work_pending(work)) {
625 /* use volume ramp for power-down */
1bf84759
MOC
626 out->ramp = TWL6040_RAMP_DOWN;
627 INIT_COMPLETION(out->ramp_done);
628
629 queue_delayed_work(queue, work,
630 msecs_to_jiffies(1));
631
632 wait_for_completion_timeout(&out->ramp_done,
633 msecs_to_jiffies(2000));
634 }
635 break;
636 }
637
638 return 0;
639}
640
8ecbabd9
MLC
641/* set headset dac and driver power mode */
642static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
643{
644 int hslctl, hsrctl;
ab6cf139 645 int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
8ecbabd9
MLC
646
647 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
648 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
649
650 if (high_perf) {
651 hslctl &= ~mask;
652 hsrctl &= ~mask;
653 } else {
654 hslctl |= mask;
655 hsrctl |= mask;
656 }
657
658 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
659 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
660
661 return 0;
662}
663
0fad4ed7
JEC
664static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
665 struct snd_kcontrol *kcontrol, int event)
666{
667 msleep(1);
668 return 0;
669}
670
8ecbabd9
MLC
671static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
672 struct snd_kcontrol *kcontrol, int event)
673{
674 struct snd_soc_codec *codec = w->codec;
d4a8ca24 675 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 676 int ret = 0;
8ecbabd9 677
6bba63b6 678 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 679 priv->non_lp++;
6bba63b6
MLC
680 if (!strcmp(w->name, "Earphone Driver")) {
681 /* Earphone doesn't support low power mode */
682 priv->hs_power_mode_locked = 1;
683 ret = headset_power_mode(codec, 1);
684 }
685 } else {
8ecbabd9 686 priv->non_lp--;
6bba63b6
MLC
687 if (!strcmp(w->name, "Earphone Driver")) {
688 priv->hs_power_mode_locked = 0;
689 ret = headset_power_mode(codec, priv->hs_power_mode);
690 }
691 }
8ecbabd9 692
0fad4ed7
JEC
693 msleep(1);
694
6bba63b6 695 return ret;
8ecbabd9
MLC
696}
697
64ed9836
MB
698static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
699 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
700{
701 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
702 int status;
703
704 mutex_lock(&priv->mutex);
705
706 /* Sync status */
707 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
708 if (status & TWL6040_PLUGCOMP)
709 snd_soc_jack_report(jack, report, report);
710 else
711 snd_soc_jack_report(jack, 0, report);
712
713 mutex_unlock(&priv->mutex);
714}
715
716void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
717 struct snd_soc_jack *jack, int report)
718{
719 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
720 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
721
722 hs_jack->jack = jack;
723 hs_jack->report = report;
724
725 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
726}
727EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
728
729static void twl6040_accessory_work(struct work_struct *work)
730{
731 struct twl6040_data *priv = container_of(work,
732 struct twl6040_data, delayed_work.work);
733 struct snd_soc_codec *codec = priv->codec;
734 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
735
736 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
737}
738
8ecbabd9 739/* audio interrupt handler */
fb34d3d5 740static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
741{
742 struct snd_soc_codec *codec = data;
d4a8ca24 743 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
cf370a5a 744
f34c6606
PU
745 queue_delayed_work(priv->workqueue, &priv->delayed_work,
746 msecs_to_jiffies(200));
cf370a5a 747
8ecbabd9
MLC
748 return IRQ_HANDLED;
749}
750
1bf84759
MOC
751static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
752 struct snd_ctl_elem_value *ucontrol)
753{
754 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
755 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
756 struct twl6040_output *out = NULL;
757 struct soc_mixer_control *mc =
758 (struct soc_mixer_control *)kcontrol->private_value;
759 int ret;
760 unsigned int reg = mc->reg;
761
762 /* For HS and HF we shadow the values and only actually write
763 * them out when active in order to ensure the amplifier comes on
764 * as quietly as possible. */
765 switch (reg) {
766 case TWL6040_REG_HSGAIN:
767 out = &twl6040_priv->headset;
768 break;
769 default:
770 break;
771 }
772
773 if (out) {
774 out->left_vol = ucontrol->value.integer.value[0];
775 out->right_vol = ucontrol->value.integer.value[1];
776 if (!out->active)
777 return 1;
778 }
779
780 ret = snd_soc_put_volsw(kcontrol, ucontrol);
781 if (ret < 0)
782 return ret;
783
784 return 1;
785}
786
787static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
788 struct snd_ctl_elem_value *ucontrol)
789{
790 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
791 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
792 struct twl6040_output *out = &twl6040_priv->headset;
793 struct soc_mixer_control *mc =
794 (struct soc_mixer_control *)kcontrol->private_value;
795 unsigned int reg = mc->reg;
796
797 switch (reg) {
798 case TWL6040_REG_HSGAIN:
799 out = &twl6040_priv->headset;
800 ucontrol->value.integer.value[0] = out->left_vol;
801 ucontrol->value.integer.value[1] = out->right_vol;
802 return 0;
803
804 default:
805 break;
806 }
807
808 return snd_soc_get_volsw(kcontrol, ucontrol);
809}
810
811static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
812 struct snd_ctl_elem_value *ucontrol)
813{
814 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
815 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
816 struct twl6040_output *out = NULL;
817 struct soc_mixer_control *mc =
818 (struct soc_mixer_control *)kcontrol->private_value;
819 int ret;
820 unsigned int reg = mc->reg;
821
822 /* For HS and HF we shadow the values and only actually write
823 * them out when active in order to ensure the amplifier comes on
824 * as quietly as possible. */
825 switch (reg) {
826 case TWL6040_REG_HFLGAIN:
827 case TWL6040_REG_HFRGAIN:
828 out = &twl6040_priv->handsfree;
829 break;
830 default:
831 break;
832 }
833
834 if (out) {
835 out->left_vol = ucontrol->value.integer.value[0];
836 out->right_vol = ucontrol->value.integer.value[1];
837 if (!out->active)
838 return 1;
839 }
840
841 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
842 if (ret < 0)
843 return ret;
844
845 return 1;
846}
847
848static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
849 struct snd_ctl_elem_value *ucontrol)
850{
851 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
852 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
853 struct twl6040_output *out = &twl6040_priv->handsfree;
854 struct soc_mixer_control *mc =
855 (struct soc_mixer_control *)kcontrol->private_value;
856 unsigned int reg = mc->reg;
857
858 /* If these are cached registers use the cache */
859 switch (reg) {
860 case TWL6040_REG_HFLGAIN:
861 case TWL6040_REG_HFRGAIN:
862 out = &twl6040_priv->handsfree;
863 ucontrol->value.integer.value[0] = out->left_vol;
864 ucontrol->value.integer.value[1] = out->right_vol;
865 return 0;
866
867 default:
868 break;
869 }
870
871 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
872}
873
874/* double control with volume update */
875#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
876 xinvert, tlv_array)\
877{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
878 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
879 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
880 .tlv.p = (tlv_array), \
881 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
882 .put = twl6040_put_volsw, \
883 .private_value = (unsigned long)&(struct soc_mixer_control) \
884 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
885 .max = xmax, .platform_max = xmax, .invert = xinvert} }
886
887/* double control with volume update */
888#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
889 xinvert, tlv_array)\
890{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
891 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
892 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
893 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
894 .tlv.p = (tlv_array), \
895 .info = snd_soc_info_volsw_2r, \
896 .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
897 .private_value = (unsigned long)&(struct soc_mixer_control) \
898 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
899 .rshift = xshift, .max = xmax, .invert = xinvert}, }
900
8ecbabd9
MLC
901/*
902 * MICATT volume control:
903 * from -6 to 0 dB in 6 dB steps
904 */
905static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
906
907/*
908 * MICGAIN volume control:
2763f45d 909 * from 6 to 30 dB in 6 dB steps
8ecbabd9 910 */
2763f45d 911static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 912
370a0314
JEC
913/*
914 * AFMGAIN volume control:
1f71a3ba 915 * from -18 to 24 dB in 6 dB steps
370a0314 916 */
1f71a3ba 917static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 918
8ecbabd9
MLC
919/*
920 * HSGAIN volume control:
921 * from -30 to 0 dB in 2 dB steps
922 */
923static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
924
925/*
926 * HFGAIN volume control:
927 * from -52 to 6 dB in 2 dB steps
928 */
929static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
930
871a05a7
JEC
931/*
932 * EPGAIN volume control:
933 * from -24 to 6 dB in 2 dB steps
934 */
935static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
936
8ecbabd9
MLC
937/* Left analog microphone selection */
938static const char *twl6040_amicl_texts[] =
939 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
940
941/* Right analog microphone selection */
942static const char *twl6040_amicr_texts[] =
943 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
944
945static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
946 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
947 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
948};
949
370a0314
JEC
950static const char *twl6040_hs_texts[] = {
951 "Off", "HS DAC", "Line-In amp"
952};
953
954static const struct soc_enum twl6040_hs_enum[] = {
955 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
956 twl6040_hs_texts),
957 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
958 twl6040_hs_texts),
959};
960
961static const char *twl6040_hf_texts[] = {
962 "Off", "HF DAC", "Line-In amp"
963};
964
965static const struct soc_enum twl6040_hf_enum[] = {
966 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
967 twl6040_hf_texts),
968 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
969 twl6040_hf_texts),
970};
971
8ecbabd9
MLC
972static const struct snd_kcontrol_new amicl_control =
973 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
974
975static const struct snd_kcontrol_new amicr_control =
976 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
977
978/* Headset DAC playback switches */
370a0314
JEC
979static const struct snd_kcontrol_new hsl_mux_controls =
980 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 981
370a0314
JEC
982static const struct snd_kcontrol_new hsr_mux_controls =
983 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
984
985/* Handsfree DAC playback switches */
370a0314
JEC
986static const struct snd_kcontrol_new hfl_mux_controls =
987 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 988
370a0314
JEC
989static const struct snd_kcontrol_new hfr_mux_controls =
990 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 991
317596a6
PU
992static const struct snd_kcontrol_new ep_path_enable_control =
993 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 994
fdb625ff
PU
995static const struct snd_kcontrol_new auxl_switch_control =
996 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
997
998static const struct snd_kcontrol_new auxr_switch_control =
999 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
1000
6bba63b6 1001/* Headset power mode */
7cca6067 1002static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC
1003 "Low-Power", "High-Perfomance",
1004};
1005
7cca6067
PU
1006static const struct soc_enum twl6040_power_mode_enum =
1007 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
1008 twl6040_power_mode_texts);
6bba63b6
MLC
1009
1010static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
1011 struct snd_ctl_elem_value *ucontrol)
1012{
1013 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1014 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1015
1016 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
1017
1018 return 0;
1019}
1020
1021static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
1022 struct snd_ctl_elem_value *ucontrol)
1023{
1024 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1025 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1026 int high_perf = ucontrol->value.enumerated.item[0];
1027 int ret = 0;
1028
1029 if (!priv->hs_power_mode_locked)
1030 ret = headset_power_mode(codec, high_perf);
1031
1032 if (!ret)
1033 priv->hs_power_mode = high_perf;
1034
1035 return ret;
1036}
1037
af958c72
PU
1038static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
1039 struct snd_ctl_elem_value *ucontrol)
1040{
1041 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1042 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1043
1044 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1045
1046 return 0;
1047}
1048
1049static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1050 struct snd_ctl_elem_value *ucontrol)
1051{
1052 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1053 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1054
1055 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU
1056
1057 return 0;
1058}
1059
1060int twl6040_get_clk_id(struct snd_soc_codec *codec)
1061{
1062 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1063
ff593ca1 1064 return priv->pll_power_mode;
af958c72
PU
1065}
1066EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1067
8ecbabd9
MLC
1068static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1069 /* Capture gains */
1070 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1071 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1072 SOC_DOUBLE_TLV("Capture Volume",
1073 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1074
370a0314
JEC
1075 /* AFM gains */
1076 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1077 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1078
8ecbabd9 1079 /* Playback gains */
1bf84759 1080 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 1081 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 1082 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 1083 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC
1084 SOC_SINGLE_TLV("Earphone Playback Volume",
1085 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1086
7cca6067 1087 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC
1088 twl6040_headset_power_get_enum,
1089 twl6040_headset_power_put_enum),
af958c72
PU
1090
1091 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1092 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC
1093};
1094
1095static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1096 /* Inputs */
1097 SND_SOC_DAPM_INPUT("MAINMIC"),
1098 SND_SOC_DAPM_INPUT("HSMIC"),
1099 SND_SOC_DAPM_INPUT("SUBMIC"),
1100 SND_SOC_DAPM_INPUT("AFML"),
1101 SND_SOC_DAPM_INPUT("AFMR"),
1102
1103 /* Outputs */
1104 SND_SOC_DAPM_OUTPUT("HSOL"),
1105 SND_SOC_DAPM_OUTPUT("HSOR"),
1106 SND_SOC_DAPM_OUTPUT("HFL"),
1107 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1108 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU
1109 SND_SOC_DAPM_OUTPUT("AUXL"),
1110 SND_SOC_DAPM_OUTPUT("AUXR"),
8ecbabd9
MLC
1111
1112 /* Analog input muxes for the capture amplifiers */
1113 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1114 SND_SOC_NOPM, 0, 0, &amicl_control),
1115 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1116 SND_SOC_NOPM, 0, 0, &amicr_control),
1117
1118 /* Analog capture PGAs */
1119 SND_SOC_DAPM_PGA("MicAmpL",
1120 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1121 SND_SOC_DAPM_PGA("MicAmpR",
1122 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1123
370a0314
JEC
1124 /* Auxiliary FM PGAs */
1125 SND_SOC_DAPM_PGA("AFMAmpL",
1126 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1127 SND_SOC_DAPM_PGA("AFMAmpR",
1128 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1129
8ecbabd9
MLC
1130 /* ADCs */
1131 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1132 TWL6040_REG_MICLCTL, 2, 0),
1133 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1134 TWL6040_REG_MICRCTL, 2, 0),
1135
1136 /* Microphone bias */
1137 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1138 TWL6040_REG_AMICBCTL, 0, 0),
1139 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1140 TWL6040_REG_AMICBCTL, 4, 0),
1141 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1142 TWL6040_REG_DMICBCTL, 0, 0),
1143 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1144 TWL6040_REG_DMICBCTL, 4, 0),
1145
1146 /* DACs */
0fad4ed7
JEC
1147 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1148 TWL6040_REG_HSLCTL, 0, 0,
1149 twl6040_hs_dac_event,
1150 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1151 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1152 TWL6040_REG_HSRCTL, 0, 0,
1153 twl6040_hs_dac_event,
1154 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1155 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1156 TWL6040_REG_HFLCTL, 0, 0,
1157 twl6040_power_mode_event,
1158 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1159 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1160 TWL6040_REG_HFRCTL, 0, 0,
1161 twl6040_power_mode_event,
1162 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1163
df11ce29 1164 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1165 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1166 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC
1167 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1168 /* Analog playback Muxes */
45b0f60d 1169 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1170 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1171 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1172 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1173
317596a6
PU
1174 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1175 &ep_path_enable_control),
fdb625ff
PU
1176 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1177 &auxl_switch_control),
1178 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1179 &auxr_switch_control),
317596a6 1180
0fad4ed7 1181 /* Analog playback drivers */
df11ce29 1182 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1183 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
1bf84759
MOC
1184 pga_event,
1185 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1186 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1187 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
1bf84759
MOC
1188 pga_event,
1189 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1190 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759
MOC
1191 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
1192 pga_event,
1193 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1194 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759
MOC
1195 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
1196 pga_event,
1197 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU
1198 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1199 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
871a05a7
JEC
1200 twl6040_power_mode_event,
1201 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1202
1203 /* Analog playback PGAs */
df11ce29 1204 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1205 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1206 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC
1207 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1208
1209};
1210
1211static const struct snd_soc_dapm_route intercon[] = {
1212 /* Capture path */
1213 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1214 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1215 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1216
1217 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1218 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1219 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1220
1221 {"MicAmpL", NULL, "Analog Left Capture Route"},
1222 {"MicAmpR", NULL, "Analog Right Capture Route"},
1223
1224 {"ADC Left", NULL, "MicAmpL"},
1225 {"ADC Right", NULL, "MicAmpR"},
1226
370a0314 1227 /* AFM path */
5bf692d9
PU
1228 {"AFMAmpL", NULL, "AFML"},
1229 {"AFMAmpR", NULL, "AFMR"},
370a0314 1230
45b0f60d
PU
1231 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1232 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1233
45b0f60d
PU
1234 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1235 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1236
45b0f60d
PU
1237 {"HS Left Driver", NULL, "Headset Left Playback"},
1238 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1239
45b0f60d
PU
1240 {"HSOL", NULL, "HS Left Driver"},
1241 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1242
871a05a7 1243 /* Earphone playback path */
317596a6
PU
1244 {"Earphone Playback", "Switch", "HSDAC Left"},
1245 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC
1246 {"EP", NULL, "Earphone Driver"},
1247
df11ce29
PU
1248 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1249 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1250
df11ce29
PU
1251 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1252 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1253
df11ce29
PU
1254 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1255 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1256
df11ce29
PU
1257 {"HF Left Driver", NULL, "HF Left PGA"},
1258 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1259
df11ce29
PU
1260 {"HFL", NULL, "HF Left Driver"},
1261 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU
1262
1263 {"AUXL Playback", "Switch", "HF Left PGA"},
1264 {"AUXR Playback", "Switch", "HF Right PGA"},
1265
1266 {"AUXL", NULL, "AUXL Playback"},
1267 {"AUXR", NULL, "AUXR Playback"},
8ecbabd9
MLC
1268};
1269
1270static int twl6040_add_widgets(struct snd_soc_codec *codec)
1271{
ce6120cc 1272 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1273
ce6120cc
LG
1274 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1275 ARRAY_SIZE(twl6040_dapm_widgets));
1276 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1277 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC
1278
1279 return 0;
1280}
1281
8ecbabd9
MLC
1282static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1283 enum snd_soc_bias_level level)
1284{
fb34d3d5 1285 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1286 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1287 int ret;
1288
1289 switch (level) {
1290 case SND_SOC_BIAS_ON:
1291 break;
1292 case SND_SOC_BIAS_PREPARE:
1293 break;
1294 case SND_SOC_BIAS_STANDBY:
1295 if (priv->codec_powered)
1296 break;
1297
fb34d3d5
MLC
1298 ret = twl6040_power(twl6040, 1);
1299 if (ret)
1300 return ret;
8ecbabd9 1301
fb34d3d5 1302 priv->codec_powered = 1;
8ecbabd9 1303
a52762ee 1304 twl6040_restore_regs(codec);
65b7cecc
OM
1305
1306 /* Set external boost GPO */
1307 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1308 break;
1309 case SND_SOC_BIAS_OFF:
1310 if (!priv->codec_powered)
1311 break;
1312
fb34d3d5 1313 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1314 priv->codec_powered = 0;
1315 break;
1316 }
1317
ce6120cc 1318 codec->dapm.bias_level = level;
8ecbabd9
MLC
1319
1320 return 0;
1321}
1322
8ecbabd9
MLC
1323static int twl6040_startup(struct snd_pcm_substream *substream,
1324 struct snd_soc_dai *dai)
1325{
1326 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1327 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1328 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1329
8ecbabd9
MLC
1330 snd_pcm_hw_constraint_list(substream->runtime, 0,
1331 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1332 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC
1333
1334 return 0;
1335}
1336
1337static int twl6040_hw_params(struct snd_pcm_substream *substream,
1338 struct snd_pcm_hw_params *params,
1339 struct snd_soc_dai *dai)
1340{
1341 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1342 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1343 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1344 int rate;
1345
8ecbabd9
MLC
1346 rate = params_rate(params);
1347 switch (rate) {
60ea4cec
OM
1348 case 11250:
1349 case 22500:
1350 case 44100:
8ecbabd9 1351 case 88200:
753621c2
PU
1352 /* These rates are not supported when HPPLL is in use */
1353 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1354 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1355 rate);
1356 return -EINVAL;
1357 }
1358 /* Capture is not supported with 17.64MHz sysclk */
1359 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1360 dev_err(codec->dev,
1361 "capture mode is not supported at %dHz\n",
1362 rate);
1363 return -EINVAL;
1364 }
8ecbabd9
MLC
1365 priv->sysclk = 17640000;
1366 break;
60ea4cec
OM
1367 case 8000:
1368 case 16000:
1369 case 32000:
1370 case 48000:
8ecbabd9 1371 case 96000:
8ecbabd9
MLC
1372 priv->sysclk = 19200000;
1373 break;
1374 default:
1375 dev_err(codec->dev, "unsupported rate %d\n", rate);
1376 return -EINVAL;
1377 }
1378
8ecbabd9
MLC
1379 return 0;
1380}
1381
4e624d06
OM
1382static int twl6040_prepare(struct snd_pcm_substream *substream,
1383 struct snd_soc_dai *dai)
8ecbabd9
MLC
1384{
1385 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1386 struct snd_soc_codec *codec = rtd->codec;
753621c2 1387 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1388 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1389 int ret;
8ecbabd9 1390
4e624d06
OM
1391 if (!priv->sysclk) {
1392 dev_err(codec->dev,
1393 "no mclk configured, call set_sysclk() on init\n");
1394 return -EINVAL;
1395 }
1396
4e624d06 1397 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC
1398 dev_err(codec->dev,
1399 "some enabled paths aren't supported at %dHz\n",
1400 priv->sysclk);
1401 return -EPERM;
8ecbabd9 1402 }
753621c2
PU
1403
1404 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1405 if (ret) {
1406 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1407 return -EPERM;
1408 }
1409
8ecbabd9
MLC
1410 return 0;
1411}
1412
1413static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1414 int clk_id, unsigned int freq, int dir)
1415{
1416 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1417 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1418
1419 switch (clk_id) {
1420 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1421 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU
1422 priv->pll = clk_id;
1423 priv->clk_in = freq;
8ecbabd9
MLC
1424 break;
1425 default:
1426 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1427 return -EINVAL;
1428 }
1429
1430 return 0;
1431}
1432
1433static struct snd_soc_dai_ops twl6040_dai_ops = {
1434 .startup = twl6040_startup,
1435 .hw_params = twl6040_hw_params,
4e624d06 1436 .prepare = twl6040_prepare,
8ecbabd9
MLC
1437 .set_sysclk = twl6040_set_dai_sysclk,
1438};
1439
6510bdc3 1440static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1441{
d13f1fe0 1442 .name = "twl6040-legacy",
8ecbabd9
MLC
1443 .playback = {
1444 .stream_name = "Playback",
1445 .channels_min = 1,
cdd5054c 1446 .channels_max = 5,
21385eeb
PU
1447 .rates = TWL6040_RATES,
1448 .formats = TWL6040_FORMATS,
1449 },
1450 .capture = {
1451 .stream_name = "Capture",
1452 .channels_min = 1,
1453 .channels_max = 2,
8ecbabd9
MLC
1454 .rates = TWL6040_RATES,
1455 .formats = TWL6040_FORMATS,
1456 },
21385eeb
PU
1457 .ops = &twl6040_dai_ops,
1458},
6510bdc3
LG
1459{
1460 .name = "twl6040-ul",
8ecbabd9
MLC
1461 .capture = {
1462 .stream_name = "Capture",
1463 .channels_min = 1,
1464 .channels_max = 2,
1465 .rates = TWL6040_RATES,
1466 .formats = TWL6040_FORMATS,
1467 },
1468 .ops = &twl6040_dai_ops,
6510bdc3
LG
1469},
1470{
1471 .name = "twl6040-dl1",
8ecbabd9 1472 .playback = {
6510bdc3 1473 .stream_name = "Headset Playback",
8ecbabd9 1474 .channels_min = 1,
6510bdc3 1475 .channels_max = 2,
8ecbabd9
MLC
1476 .rates = TWL6040_RATES,
1477 .formats = TWL6040_FORMATS,
1478 },
6510bdc3
LG
1479 .ops = &twl6040_dai_ops,
1480},
1481{
1482 .name = "twl6040-dl2",
1483 .playback = {
1484 .stream_name = "Handsfree Playback",
8ecbabd9
MLC
1485 .channels_min = 1,
1486 .channels_max = 2,
1487 .rates = TWL6040_RATES,
1488 .formats = TWL6040_FORMATS,
1489 },
1490 .ops = &twl6040_dai_ops,
6510bdc3
LG
1491},
1492{
1493 .name = "twl6040-vib",
1494 .playback = {
1495 .stream_name = "Vibra Playback",
d8dd032d
PU
1496 .channels_min = 1,
1497 .channels_max = 1,
6510bdc3
LG
1498 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1499 .formats = TWL6040_FORMATS,
1500 },
1501 .ops = &twl6040_dai_ops,
1502},
8ecbabd9 1503};
8ecbabd9
MLC
1504
1505#ifdef CONFIG_PM
f0fba2ad 1506static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1507{
8ecbabd9
MLC
1508 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1509
1510 return 0;
1511}
1512
f0fba2ad 1513static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1514{
8ecbabd9 1515 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1516 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1517
1518 return 0;
1519}
1520#else
1521#define twl6040_suspend NULL
1522#define twl6040_resume NULL
1523#endif
1524
f0fba2ad 1525static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1526{
8ecbabd9 1527 struct twl6040_data *priv;
1fbe9952 1528 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU
1529 struct platform_device *pdev = container_of(codec->dev,
1530 struct platform_device, dev);
8ecbabd9
MLC
1531 int ret = 0;
1532
1533 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1534 if (priv == NULL)
1535 return -ENOMEM;
f0fba2ad 1536 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1537
a2d2362e 1538 priv->codec = codec;
fb34d3d5 1539 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1540
1fbe9952
ACG
1541 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1542 priv->hs_left_step = pdata->hs_left_step;
1543 priv->hs_right_step = pdata->hs_right_step;
1544 } else {
1545 priv->hs_left_step = 1;
1546 priv->hs_right_step = 1;
1547 }
99903ea2 1548
1fbe9952
ACG
1549 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1550 priv->hf_left_step = pdata->hf_left_step;
1551 priv->hf_right_step = pdata->hf_right_step;
1552 } else {
1553 priv->hf_left_step = 1;
1554 priv->hf_right_step = 1;
1555 }
99903ea2 1556
2a433b9d
PU
1557 priv->plug_irq = platform_get_irq(pdev, 0);
1558 if (priv->plug_irq < 0) {
1559 dev_err(codec->dev, "invalid irq\n");
1560 ret = -EINVAL;
1561 goto work_err;
1562 }
8ecbabd9 1563
a2d2362e 1564 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL
1565 if (!priv->workqueue) {
1566 ret = -ENOMEM;
a2d2362e 1567 goto work_err;
19aab08d 1568 }
a2d2362e
JEC
1569
1570 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1571
1572 mutex_init(&priv->mutex);
8ecbabd9 1573
1bf84759
MOC
1574 init_completion(&priv->headset.ramp_done);
1575 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1576
1bf84759
MOC
1577 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1578 if (priv->hf_workqueue == NULL) {
1579 ret = -ENOMEM;
fb34d3d5 1580 goto hfwq_err;
1bf84759
MOC
1581 }
1582 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1583 if (priv->hs_workqueue == NULL) {
1584 ret = -ENOMEM;
fb34d3d5 1585 goto hswq_err;
1bf84759
MOC
1586 }
1587
1588 INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
1589 INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
1590
2a433b9d
PU
1591 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1592 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC
1593 if (ret) {
1594 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1595 goto plugirq_err;
1596 }
1597
a52762ee 1598 twl6040_init_chip(codec);
fb34d3d5 1599
8ecbabd9
MLC
1600 /* power on device */
1601 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1602 if (ret)
1bf84759 1603 goto bias_err;
8ecbabd9 1604
f0fba2ad
LG
1605 snd_soc_add_controls(codec, twl6040_snd_controls,
1606 ARRAY_SIZE(twl6040_snd_controls));
1607 twl6040_add_widgets(codec);
8ecbabd9
MLC
1608
1609 return 0;
1610
1bf84759 1611bias_err:
2a433b9d 1612 free_irq(priv->plug_irq, codec);
fb34d3d5 1613plugirq_err:
1bf84759 1614 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1615hswq_err:
1bf84759 1616 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1617hfwq_err:
a2d2362e
JEC
1618 destroy_workqueue(priv->workqueue);
1619work_err:
8ecbabd9
MLC
1620 kfree(priv);
1621 return ret;
1622}
1623
f0fba2ad 1624static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1625{
f0fba2ad 1626 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1627
f0fba2ad 1628 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1629 free_irq(priv->plug_irq, codec);
a2d2362e 1630 destroy_workqueue(priv->workqueue);
1bf84759
MOC
1631 destroy_workqueue(priv->hf_workqueue);
1632 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1633 kfree(priv);
8ecbabd9 1634
f0fba2ad
LG
1635 return 0;
1636}
8ecbabd9 1637
f0fba2ad
LG
1638static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1639 .probe = twl6040_probe,
1640 .remove = twl6040_remove,
1641 .suspend = twl6040_suspend,
1642 .resume = twl6040_resume,
1643 .read = twl6040_read_reg_cache,
1644 .write = twl6040_write,
1645 .set_bias_level = twl6040_set_bias_level,
1646 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1647 .reg_word_size = sizeof(u8),
1648 .reg_cache_default = twl6040_reg,
1649};
1650
1651static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1652{
6510bdc3
LG
1653 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1654 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG
1655}
1656
1657static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1658{
1659 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC
1660 return 0;
1661}
1662
1663static struct platform_driver twl6040_codec_driver = {
1664 .driver = {
f0fba2ad 1665 .name = "twl6040-codec",
8ecbabd9
MLC
1666 .owner = THIS_MODULE,
1667 },
1668 .probe = twl6040_codec_probe,
1669 .remove = __devexit_p(twl6040_codec_remove),
1670};
1671
1672static int __init twl6040_codec_init(void)
1673{
1674 return platform_driver_register(&twl6040_codec_driver);
1675}
1676module_init(twl6040_codec_init);
1677
1678static void __exit twl6040_codec_exit(void)
1679{
1680 platform_driver_unregister(&twl6040_codec_driver);
1681}
1682module_exit(twl6040_codec_exit);
1683
1684MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1685MODULE_AUTHOR("Misael Lopez Cruz");
1686MODULE_LICENSE("GPL");
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