ASoC: twl6040/sdp4430: Change legacy DAI name
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
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1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
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31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
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MLC
36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
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MOC
42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
d17bf318
PU
60/* Shadow register used by the driver */
61#define TWL6040_REG_SW_SHADOW 0x2F
62#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
63
317596a6
PU
64/* TWL6040_REG_SW_SHADOW (0x2F) fields */
65#define TWL6040_EAR_PATH_ENABLE 0x01
66
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MOC
67struct twl6040_output {
68 u16 active;
69 u16 left_vol;
70 u16 right_vol;
71 u16 left_step;
72 u16 right_step;
73 unsigned int step_delay;
74 u16 ramp;
75 u16 mute;
76 struct completion ramp_done;
77};
8ecbabd9 78
a2d2362e
JEC
79struct twl6040_jack_data {
80 struct snd_soc_jack *jack;
81 int report;
82};
83
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MLC
84/* codec private data */
85struct twl6040_data {
2a433b9d 86 int plug_irq;
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87 int codec_powered;
88 int pll;
89 int non_lp;
af958c72 90 int pll_power_mode;
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MLC
91 int hs_power_mode;
92 int hs_power_mode_locked;
fb34d3d5 93 unsigned int clk_in;
8ecbabd9 94 unsigned int sysclk;
1fbe9952
ACG
95 u16 hs_left_step;
96 u16 hs_right_step;
97 u16 hf_left_step;
98 u16 hf_right_step;
a2d2362e
JEC
99 struct twl6040_jack_data hs_jack;
100 struct snd_soc_codec *codec;
101 struct workqueue_struct *workqueue;
102 struct delayed_work delayed_work;
103 struct mutex mutex;
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MOC
104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
106 struct workqueue_struct *hf_workqueue;
107 struct workqueue_struct *hs_workqueue;
108 struct delayed_work hs_delayed_work;
109 struct delayed_work hf_delayed_work;
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MLC
110};
111
112/*
113 * twl6040 register cache & default register settings
114 */
115static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU
116 0x00, /* not used 0x00 */
117 0x4B, /* REG_ASICID 0x01 (ro) */
118 0x00, /* REG_ASICREV 0x02 (ro) */
119 0x00, /* REG_INTID 0x03 */
120 0x00, /* REG_INTMR 0x04 */
121 0x00, /* REG_NCPCTRL 0x05 */
122 0x00, /* REG_LDOCTL 0x06 */
123 0x60, /* REG_HPPLLCTL 0x07 */
124 0x00, /* REG_LPPLLCTL 0x08 */
125 0x4A, /* REG_LPPLLDIV 0x09 */
126 0x00, /* REG_AMICBCTL 0x0A */
127 0x00, /* REG_DMICBCTL 0x0B */
128 0x00, /* REG_MICLCTL 0x0C */
129 0x00, /* REG_MICRCTL 0x0D */
130 0x00, /* REG_MICGAIN 0x0E */
131 0x1B, /* REG_LINEGAIN 0x0F */
132 0x00, /* REG_HSLCTL 0x10 */
133 0x00, /* REG_HSRCTL 0x11 */
134 0x00, /* REG_HSGAIN 0x12 */
135 0x00, /* REG_EARCTL 0x13 */
136 0x00, /* REG_HFLCTL 0x14 */
137 0x00, /* REG_HFLGAIN 0x15 */
138 0x00, /* REG_HFRCTL 0x16 */
139 0x00, /* REG_HFRGAIN 0x17 */
140 0x00, /* REG_VIBCTLL 0x18 */
141 0x00, /* REG_VIBDATL 0x19 */
142 0x00, /* REG_VIBCTLR 0x1A */
143 0x00, /* REG_VIBDATR 0x1B */
144 0x00, /* REG_HKCTL1 0x1C */
145 0x00, /* REG_HKCTL2 0x1D */
146 0x00, /* REG_GPOCTL 0x1E */
147 0x00, /* REG_ALB 0x1F */
148 0x00, /* REG_DLB 0x20 */
149 0x00, /* not used 0x21 */
150 0x00, /* not used 0x22 */
151 0x00, /* not used 0x23 */
152 0x00, /* not used 0x24 */
153 0x00, /* not used 0x25 */
154 0x00, /* not used 0x26 */
155 0x00, /* not used 0x27 */
156 0x00, /* REG_TRIM1 0x28 */
157 0x00, /* REG_TRIM2 0x29 */
158 0x00, /* REG_TRIM3 0x2A */
159 0x00, /* REG_HSOTRIM 0x2B */
160 0x00, /* REG_HFOTRIM 0x2C */
161 0x09, /* REG_ACCCTL 0x2D */
162 0x00, /* REG_STATUS 0x2E (ro) */
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PU
163
164 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
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MLC
165};
166
a52762ee
PU
167/* List of registers to be restored after power up */
168static const int twl6040_restore_list[] = {
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169 TWL6040_REG_MICLCTL,
170 TWL6040_REG_MICRCTL,
171 TWL6040_REG_MICGAIN,
172 TWL6040_REG_LINEGAIN,
173 TWL6040_REG_HSLCTL,
174 TWL6040_REG_HSRCTL,
175 TWL6040_REG_HSGAIN,
176 TWL6040_REG_EARCTL,
177 TWL6040_REG_HFLCTL,
178 TWL6040_REG_HFLGAIN,
179 TWL6040_REG_HFRCTL,
180 TWL6040_REG_HFRGAIN,
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MLC
181};
182
af958c72
PU
183/* set of rates for each pll: low-power and high-performance */
184static unsigned int lp_rates[] = {
185 8000,
186 11250,
187 16000,
188 22500,
189 32000,
190 44100,
191 48000,
192 88200,
193 96000,
194};
195
af958c72
PU
196static unsigned int hp_rates[] = {
197 8000,
198 16000,
199 32000,
200 48000,
201 96000,
202};
203
f53c346c
PU
204static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
205 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
206 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU
207};
208
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MLC
209/*
210 * read twl6040 register cache
211 */
212static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
213 unsigned int reg)
214{
215 u8 *cache = codec->reg_cache;
216
217 if (reg >= TWL6040_CACHEREGNUM)
218 return -EIO;
219
220 return cache[reg];
221}
222
223/*
224 * write twl6040 register cache
225 */
226static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
227 u8 reg, u8 value)
228{
229 u8 *cache = codec->reg_cache;
230
231 if (reg >= TWL6040_CACHEREGNUM)
232 return;
233 cache[reg] = value;
234}
235
236/*
237 * read from twl6040 hardware register
238 */
239static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
240 unsigned int reg)
241{
fb34d3d5 242 struct twl6040 *twl6040 = codec->control_data;
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MLC
243 u8 value;
244
245 if (reg >= TWL6040_CACHEREGNUM)
246 return -EIO;
247
d17bf318
PU
248 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
249 value = twl6040_reg_read(twl6040, reg);
250 twl6040_write_reg_cache(codec, reg, value);
251 } else {
252 value = twl6040_read_reg_cache(codec, reg);
253 }
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254
255 return value;
256}
257
258/*
259 * write to the twl6040 register space
260 */
261static int twl6040_write(struct snd_soc_codec *codec,
262 unsigned int reg, unsigned int value)
263{
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MLC
264 struct twl6040 *twl6040 = codec->control_data;
265
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266 if (reg >= TWL6040_CACHEREGNUM)
267 return -EIO;
268
269 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU
270 if (likely(reg < TWL6040_REG_SW_SHADOW))
271 return twl6040_reg_write(twl6040, reg, value);
272 else
273 return 0;
8ecbabd9
MLC
274}
275
a52762ee 276static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 277{
a52762ee
PU
278 struct twl6040 *twl6040 = codec->control_data;
279 u8 val;
280
281 val = twl6040_get_revid(twl6040);
282 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 283
2c27ff41
PU
284 /* Change chip defaults */
285 /* No imput selected for microphone amplifiers */
286 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
287 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU
288
289 /*
290 * We need to lower the default gain values, so the ramp code
291 * can work correctly for the first playback.
292 * This reduces the pop noise heard at the first playback.
293 */
294 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
295 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
296 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
297 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
298 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
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MLC
299}
300
a52762ee 301static void twl6040_restore_regs(struct snd_soc_codec *codec)
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MLC
302{
303 u8 *cache = codec->reg_cache;
304 int reg, i;
305
a52762ee
PU
306 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
307 reg = twl6040_restore_list[i];
8ecbabd9
MLC
308 twl6040_write(codec, reg, cache[reg]);
309 }
310}
311
1bf84759
MOC
312/*
313 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
314 */
315static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
316 unsigned int left_step, unsigned int right_step)
317{
318
319 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
320 struct twl6040_output *headset = &priv->headset;
321 int left_complete = 0, right_complete = 0;
322 u8 reg, val;
323
324 /* left channel */
325 left_step = (left_step > 0xF) ? 0xF : left_step;
326 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
327 val = (~reg & TWL6040_HSL_VOL_MASK);
328
329 if (headset->ramp == TWL6040_RAMP_UP) {
330 /* ramp step up */
331 if (val < headset->left_vol) {
1fbe9952
ACG
332 if (val + left_step > headset->left_vol)
333 val = headset->left_vol;
334 else
335 val += left_step;
336
1bf84759
MOC
337 reg &= ~TWL6040_HSL_VOL_MASK;
338 twl6040_write(codec, TWL6040_REG_HSGAIN,
339 (reg | (~val & TWL6040_HSL_VOL_MASK)));
340 } else {
341 left_complete = 1;
342 }
343 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
344 /* ramp step down */
345 if (val > 0x0) {
1fbe9952
ACG
346 if ((int)val - (int)left_step < 0)
347 val = 0;
348 else
349 val -= left_step;
350
1bf84759
MOC
351 reg &= ~TWL6040_HSL_VOL_MASK;
352 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
353 (~val & TWL6040_HSL_VOL_MASK));
354 } else {
355 left_complete = 1;
356 }
357 }
358
359 /* right channel */
360 right_step = (right_step > 0xF) ? 0xF : right_step;
361 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
362 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
363
364 if (headset->ramp == TWL6040_RAMP_UP) {
365 /* ramp step up */
366 if (val < headset->right_vol) {
1fbe9952
ACG
367 if (val + right_step > headset->right_vol)
368 val = headset->right_vol;
369 else
370 val += right_step;
371
1bf84759
MOC
372 reg &= ~TWL6040_HSR_VOL_MASK;
373 twl6040_write(codec, TWL6040_REG_HSGAIN,
374 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
375 } else {
376 right_complete = 1;
377 }
378 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
379 /* ramp step down */
380 if (val > 0x0) {
1fbe9952
ACG
381 if ((int)val - (int)right_step < 0)
382 val = 0;
383 else
384 val -= right_step;
385
1bf84759
MOC
386 reg &= ~TWL6040_HSR_VOL_MASK;
387 twl6040_write(codec, TWL6040_REG_HSGAIN,
388 reg | (~val << TWL6040_HSR_VOL_SHIFT));
389 } else {
390 right_complete = 1;
391 }
392 }
393
394 return left_complete & right_complete;
395}
396
397/*
398 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
399 */
400static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
401 unsigned int left_step, unsigned int right_step)
402{
403 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
404 struct twl6040_output *handsfree = &priv->handsfree;
405 int left_complete = 0, right_complete = 0;
406 u16 reg, val;
407
408 /* left channel */
409 left_step = (left_step > 0x1D) ? 0x1D : left_step;
410 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
411 reg = 0x1D - reg;
412 val = (reg & TWL6040_HF_VOL_MASK);
413 if (handsfree->ramp == TWL6040_RAMP_UP) {
414 /* ramp step up */
415 if (val < handsfree->left_vol) {
1fbe9952
ACG
416 if (val + left_step > handsfree->left_vol)
417 val = handsfree->left_vol;
418 else
419 val += left_step;
420
1bf84759
MOC
421 reg &= ~TWL6040_HF_VOL_MASK;
422 twl6040_write(codec, TWL6040_REG_HFLGAIN,
423 reg | (0x1D - val));
424 } else {
425 left_complete = 1;
426 }
427 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
428 /* ramp step down */
429 if (val > 0) {
1fbe9952
ACG
430 if ((int)val - (int)left_step < 0)
431 val = 0;
432 else
433 val -= left_step;
434
1bf84759
MOC
435 reg &= ~TWL6040_HF_VOL_MASK;
436 twl6040_write(codec, TWL6040_REG_HFLGAIN,
437 reg | (0x1D - val));
438 } else {
439 left_complete = 1;
440 }
441 }
442
443 /* right channel */
444 right_step = (right_step > 0x1D) ? 0x1D : right_step;
445 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
446 reg = 0x1D - reg;
447 val = (reg & TWL6040_HF_VOL_MASK);
448 if (handsfree->ramp == TWL6040_RAMP_UP) {
449 /* ramp step up */
450 if (val < handsfree->right_vol) {
1fbe9952
ACG
451 if (val + right_step > handsfree->right_vol)
452 val = handsfree->right_vol;
453 else
454 val += right_step;
455
1bf84759
MOC
456 reg &= ~TWL6040_HF_VOL_MASK;
457 twl6040_write(codec, TWL6040_REG_HFRGAIN,
458 reg | (0x1D - val));
459 } else {
460 right_complete = 1;
461 }
462 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
463 /* ramp step down */
464 if (val > 0) {
1fbe9952
ACG
465 if ((int)val - (int)right_step < 0)
466 val = 0;
467 else
468 val -= right_step;
469
1bf84759
MOC
470 reg &= ~TWL6040_HF_VOL_MASK;
471 twl6040_write(codec, TWL6040_REG_HFRGAIN,
472 reg | (0x1D - val));
473 }
474 }
475
476 return left_complete & right_complete;
477}
478
479/*
480 * This work ramps both output PGAs at stream start/stop time to
481 * minimise pop associated with DAPM power switching.
482 */
483static void twl6040_pga_hs_work(struct work_struct *work)
484{
485 struct twl6040_data *priv =
486 container_of(work, struct twl6040_data, hs_delayed_work.work);
487 struct snd_soc_codec *codec = priv->codec;
488 struct twl6040_output *headset = &priv->headset;
489 unsigned int delay = headset->step_delay;
490 int i, headset_complete;
491
492 /* do we need to ramp at all ? */
493 if (headset->ramp == TWL6040_RAMP_NONE)
494 return;
495
496 /* HS PGA volumes have 4 bits of resolution to ramp */
497 for (i = 0; i <= 16; i++) {
1fbe9952
ACG
498 headset_complete = twl6040_hs_ramp_step(codec,
499 headset->left_step,
500 headset->right_step);
1bf84759
MOC
501
502 /* ramp finished ? */
503 if (headset_complete)
504 break;
505
506 /*
507 * TODO: tune: delay is longer over 0dB
508 * as increases are larger.
509 */
510 if (i >= 8)
511 schedule_timeout_interruptible(msecs_to_jiffies(delay +
512 (delay >> 1)));
513 else
514 schedule_timeout_interruptible(msecs_to_jiffies(delay));
515 }
516
517 if (headset->ramp == TWL6040_RAMP_DOWN) {
518 headset->active = 0;
519 complete(&headset->ramp_done);
520 } else {
521 headset->active = 1;
522 }
523 headset->ramp = TWL6040_RAMP_NONE;
524}
525
526static void twl6040_pga_hf_work(struct work_struct *work)
527{
528 struct twl6040_data *priv =
529 container_of(work, struct twl6040_data, hf_delayed_work.work);
530 struct snd_soc_codec *codec = priv->codec;
531 struct twl6040_output *handsfree = &priv->handsfree;
532 unsigned int delay = handsfree->step_delay;
533 int i, handsfree_complete;
534
535 /* do we need to ramp at all ? */
536 if (handsfree->ramp == TWL6040_RAMP_NONE)
537 return;
538
539 /* HF PGA volumes have 5 bits of resolution to ramp */
540 for (i = 0; i <= 32; i++) {
1fbe9952
ACG
541 handsfree_complete = twl6040_hf_ramp_step(codec,
542 handsfree->left_step,
543 handsfree->right_step);
1bf84759
MOC
544
545 /* ramp finished ? */
546 if (handsfree_complete)
547 break;
548
549 /*
550 * TODO: tune: delay is longer over 0dB
551 * as increases are larger.
552 */
553 if (i >= 16)
554 schedule_timeout_interruptible(msecs_to_jiffies(delay +
555 (delay >> 1)));
556 else
557 schedule_timeout_interruptible(msecs_to_jiffies(delay));
558 }
559
560
561 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
562 handsfree->active = 0;
563 complete(&handsfree->ramp_done);
564 } else
565 handsfree->active = 1;
566 handsfree->ramp = TWL6040_RAMP_NONE;
567}
568
569static int pga_event(struct snd_soc_dapm_widget *w,
570 struct snd_kcontrol *kcontrol, int event)
571{
572 struct snd_soc_codec *codec = w->codec;
573 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
574 struct twl6040_output *out;
575 struct delayed_work *work;
576 struct workqueue_struct *queue;
577
578 switch (w->shift) {
579 case 2:
580 case 3:
581 out = &priv->headset;
582 work = &priv->hs_delayed_work;
583 queue = priv->hs_workqueue;
1fbe9952
ACG
584 out->left_step = priv->hs_left_step;
585 out->right_step = priv->hs_right_step;
1bf84759
MOC
586 out->step_delay = 5; /* 5 ms between volume ramp steps */
587 break;
588 case 4:
589 out = &priv->handsfree;
590 work = &priv->hf_delayed_work;
591 queue = priv->hf_workqueue;
1fbe9952
ACG
592 out->left_step = priv->hf_left_step;
593 out->right_step = priv->hf_right_step;
1bf84759
MOC
594 out->step_delay = 5; /* 5 ms between volume ramp steps */
595 if (SND_SOC_DAPM_EVENT_ON(event))
596 priv->non_lp++;
597 else
598 priv->non_lp--;
599 break;
600 default:
601 return -1;
602 }
603
604 switch (event) {
605 case SND_SOC_DAPM_POST_PMU:
606 if (out->active)
607 break;
608
609 /* don't use volume ramp for power-up */
610 out->left_step = out->left_vol;
611 out->right_step = out->right_vol;
612
613 if (!delayed_work_pending(work)) {
614 out->ramp = TWL6040_RAMP_UP;
615 queue_delayed_work(queue, work,
616 msecs_to_jiffies(1));
617 }
618 break;
619
620 case SND_SOC_DAPM_PRE_PMD:
621 if (!out->active)
622 break;
623
624 if (!delayed_work_pending(work)) {
625 /* use volume ramp for power-down */
1bf84759
MOC
626 out->ramp = TWL6040_RAMP_DOWN;
627 INIT_COMPLETION(out->ramp_done);
628
629 queue_delayed_work(queue, work,
630 msecs_to_jiffies(1));
631
632 wait_for_completion_timeout(&out->ramp_done,
633 msecs_to_jiffies(2000));
634 }
635 break;
636 }
637
638 return 0;
639}
640
8ecbabd9
MLC
641/* set headset dac and driver power mode */
642static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
643{
644 int hslctl, hsrctl;
645 int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
646
647 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
648 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
649
650 if (high_perf) {
651 hslctl &= ~mask;
652 hsrctl &= ~mask;
653 } else {
654 hslctl |= mask;
655 hsrctl |= mask;
656 }
657
658 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
659 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
660
661 return 0;
662}
663
0fad4ed7
JEC
664static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
665 struct snd_kcontrol *kcontrol, int event)
666{
667 msleep(1);
668 return 0;
669}
670
8ecbabd9
MLC
671static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
672 struct snd_kcontrol *kcontrol, int event)
673{
674 struct snd_soc_codec *codec = w->codec;
d4a8ca24 675 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 676 int ret = 0;
8ecbabd9 677
6bba63b6 678 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 679 priv->non_lp++;
6bba63b6
MLC
680 if (!strcmp(w->name, "Earphone Driver")) {
681 /* Earphone doesn't support low power mode */
682 priv->hs_power_mode_locked = 1;
683 ret = headset_power_mode(codec, 1);
684 }
685 } else {
8ecbabd9 686 priv->non_lp--;
6bba63b6
MLC
687 if (!strcmp(w->name, "Earphone Driver")) {
688 priv->hs_power_mode_locked = 0;
689 ret = headset_power_mode(codec, priv->hs_power_mode);
690 }
691 }
8ecbabd9 692
0fad4ed7
JEC
693 msleep(1);
694
6bba63b6 695 return ret;
8ecbabd9
MLC
696}
697
64ed9836
MB
698static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
699 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
700{
701 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
702 int status;
703
704 mutex_lock(&priv->mutex);
705
706 /* Sync status */
707 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
708 if (status & TWL6040_PLUGCOMP)
709 snd_soc_jack_report(jack, report, report);
710 else
711 snd_soc_jack_report(jack, 0, report);
712
713 mutex_unlock(&priv->mutex);
714}
715
716void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
717 struct snd_soc_jack *jack, int report)
718{
719 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
720 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
721
722 hs_jack->jack = jack;
723 hs_jack->report = report;
724
725 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
726}
727EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
728
729static void twl6040_accessory_work(struct work_struct *work)
730{
731 struct twl6040_data *priv = container_of(work,
732 struct twl6040_data, delayed_work.work);
733 struct snd_soc_codec *codec = priv->codec;
734 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
735
736 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
737}
738
8ecbabd9 739/* audio interrupt handler */
fb34d3d5 740static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
741{
742 struct snd_soc_codec *codec = data;
fb34d3d5 743 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 744 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
745 u8 intid;
746
fb34d3d5 747 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
cf370a5a
OM
748
749 if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT))
a2d2362e
JEC
750 queue_delayed_work(priv->workqueue, &priv->delayed_work,
751 msecs_to_jiffies(200));
cf370a5a 752
8ecbabd9
MLC
753 return IRQ_HANDLED;
754}
755
1bf84759
MOC
756static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
757 struct snd_ctl_elem_value *ucontrol)
758{
759 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
760 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
761 struct twl6040_output *out = NULL;
762 struct soc_mixer_control *mc =
763 (struct soc_mixer_control *)kcontrol->private_value;
764 int ret;
765 unsigned int reg = mc->reg;
766
767 /* For HS and HF we shadow the values and only actually write
768 * them out when active in order to ensure the amplifier comes on
769 * as quietly as possible. */
770 switch (reg) {
771 case TWL6040_REG_HSGAIN:
772 out = &twl6040_priv->headset;
773 break;
774 default:
775 break;
776 }
777
778 if (out) {
779 out->left_vol = ucontrol->value.integer.value[0];
780 out->right_vol = ucontrol->value.integer.value[1];
781 if (!out->active)
782 return 1;
783 }
784
785 ret = snd_soc_put_volsw(kcontrol, ucontrol);
786 if (ret < 0)
787 return ret;
788
789 return 1;
790}
791
792static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
793 struct snd_ctl_elem_value *ucontrol)
794{
795 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
796 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
797 struct twl6040_output *out = &twl6040_priv->headset;
798 struct soc_mixer_control *mc =
799 (struct soc_mixer_control *)kcontrol->private_value;
800 unsigned int reg = mc->reg;
801
802 switch (reg) {
803 case TWL6040_REG_HSGAIN:
804 out = &twl6040_priv->headset;
805 ucontrol->value.integer.value[0] = out->left_vol;
806 ucontrol->value.integer.value[1] = out->right_vol;
807 return 0;
808
809 default:
810 break;
811 }
812
813 return snd_soc_get_volsw(kcontrol, ucontrol);
814}
815
816static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
817 struct snd_ctl_elem_value *ucontrol)
818{
819 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
820 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
821 struct twl6040_output *out = NULL;
822 struct soc_mixer_control *mc =
823 (struct soc_mixer_control *)kcontrol->private_value;
824 int ret;
825 unsigned int reg = mc->reg;
826
827 /* For HS and HF we shadow the values and only actually write
828 * them out when active in order to ensure the amplifier comes on
829 * as quietly as possible. */
830 switch (reg) {
831 case TWL6040_REG_HFLGAIN:
832 case TWL6040_REG_HFRGAIN:
833 out = &twl6040_priv->handsfree;
834 break;
835 default:
836 break;
837 }
838
839 if (out) {
840 out->left_vol = ucontrol->value.integer.value[0];
841 out->right_vol = ucontrol->value.integer.value[1];
842 if (!out->active)
843 return 1;
844 }
845
846 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
847 if (ret < 0)
848 return ret;
849
850 return 1;
851}
852
853static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
854 struct snd_ctl_elem_value *ucontrol)
855{
856 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
857 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
858 struct twl6040_output *out = &twl6040_priv->handsfree;
859 struct soc_mixer_control *mc =
860 (struct soc_mixer_control *)kcontrol->private_value;
861 unsigned int reg = mc->reg;
862
863 /* If these are cached registers use the cache */
864 switch (reg) {
865 case TWL6040_REG_HFLGAIN:
866 case TWL6040_REG_HFRGAIN:
867 out = &twl6040_priv->handsfree;
868 ucontrol->value.integer.value[0] = out->left_vol;
869 ucontrol->value.integer.value[1] = out->right_vol;
870 return 0;
871
872 default:
873 break;
874 }
875
876 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
877}
878
879/* double control with volume update */
880#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
881 xinvert, tlv_array)\
882{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
883 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
884 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
885 .tlv.p = (tlv_array), \
886 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
887 .put = twl6040_put_volsw, \
888 .private_value = (unsigned long)&(struct soc_mixer_control) \
889 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
890 .max = xmax, .platform_max = xmax, .invert = xinvert} }
891
892/* double control with volume update */
893#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
894 xinvert, tlv_array)\
895{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
896 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
897 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
898 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
899 .tlv.p = (tlv_array), \
900 .info = snd_soc_info_volsw_2r, \
901 .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
902 .private_value = (unsigned long)&(struct soc_mixer_control) \
903 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
904 .rshift = xshift, .max = xmax, .invert = xinvert}, }
905
8ecbabd9
MLC
906/*
907 * MICATT volume control:
908 * from -6 to 0 dB in 6 dB steps
909 */
910static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
911
912/*
913 * MICGAIN volume control:
2763f45d 914 * from 6 to 30 dB in 6 dB steps
8ecbabd9 915 */
2763f45d 916static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 917
370a0314
JEC
918/*
919 * AFMGAIN volume control:
1f71a3ba 920 * from -18 to 24 dB in 6 dB steps
370a0314 921 */
1f71a3ba 922static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 923
8ecbabd9
MLC
924/*
925 * HSGAIN volume control:
926 * from -30 to 0 dB in 2 dB steps
927 */
928static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
929
930/*
931 * HFGAIN volume control:
932 * from -52 to 6 dB in 2 dB steps
933 */
934static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
935
871a05a7
JEC
936/*
937 * EPGAIN volume control:
938 * from -24 to 6 dB in 2 dB steps
939 */
940static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
941
8ecbabd9
MLC
942/* Left analog microphone selection */
943static const char *twl6040_amicl_texts[] =
944 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
945
946/* Right analog microphone selection */
947static const char *twl6040_amicr_texts[] =
948 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
949
950static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
951 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
952 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
953};
954
370a0314
JEC
955static const char *twl6040_hs_texts[] = {
956 "Off", "HS DAC", "Line-In amp"
957};
958
959static const struct soc_enum twl6040_hs_enum[] = {
960 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
961 twl6040_hs_texts),
962 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
963 twl6040_hs_texts),
964};
965
966static const char *twl6040_hf_texts[] = {
967 "Off", "HF DAC", "Line-In amp"
968};
969
970static const struct soc_enum twl6040_hf_enum[] = {
971 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
972 twl6040_hf_texts),
973 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
974 twl6040_hf_texts),
975};
976
8ecbabd9
MLC
977static const struct snd_kcontrol_new amicl_control =
978 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
979
980static const struct snd_kcontrol_new amicr_control =
981 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
982
983/* Headset DAC playback switches */
370a0314
JEC
984static const struct snd_kcontrol_new hsl_mux_controls =
985 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 986
370a0314
JEC
987static const struct snd_kcontrol_new hsr_mux_controls =
988 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
989
990/* Handsfree DAC playback switches */
370a0314
JEC
991static const struct snd_kcontrol_new hfl_mux_controls =
992 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 993
370a0314
JEC
994static const struct snd_kcontrol_new hfr_mux_controls =
995 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 996
317596a6
PU
997static const struct snd_kcontrol_new ep_path_enable_control =
998 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 999
fdb625ff
PU
1000static const struct snd_kcontrol_new auxl_switch_control =
1001 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
1002
1003static const struct snd_kcontrol_new auxr_switch_control =
1004 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
1005
6bba63b6 1006/* Headset power mode */
7cca6067 1007static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC
1008 "Low-Power", "High-Perfomance",
1009};
1010
7cca6067
PU
1011static const struct soc_enum twl6040_power_mode_enum =
1012 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
1013 twl6040_power_mode_texts);
6bba63b6
MLC
1014
1015static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
1016 struct snd_ctl_elem_value *ucontrol)
1017{
1018 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1019 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1020
1021 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
1022
1023 return 0;
1024}
1025
1026static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1030 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1031 int high_perf = ucontrol->value.enumerated.item[0];
1032 int ret = 0;
1033
1034 if (!priv->hs_power_mode_locked)
1035 ret = headset_power_mode(codec, high_perf);
1036
1037 if (!ret)
1038 priv->hs_power_mode = high_perf;
1039
1040 return ret;
1041}
1042
af958c72
PU
1043static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1047 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1048
1049 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1050
1051 return 0;
1052}
1053
1054static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1055 struct snd_ctl_elem_value *ucontrol)
1056{
1057 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1058 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1059
1060 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU
1061
1062 return 0;
1063}
1064
1065int twl6040_get_clk_id(struct snd_soc_codec *codec)
1066{
1067 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1068
ff593ca1 1069 return priv->pll_power_mode;
af958c72
PU
1070}
1071EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1072
8ecbabd9
MLC
1073static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1074 /* Capture gains */
1075 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1076 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1077 SOC_DOUBLE_TLV("Capture Volume",
1078 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1079
370a0314
JEC
1080 /* AFM gains */
1081 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1082 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1083
8ecbabd9 1084 /* Playback gains */
1bf84759 1085 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 1086 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 1087 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 1088 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC
1089 SOC_SINGLE_TLV("Earphone Playback Volume",
1090 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1091
7cca6067 1092 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC
1093 twl6040_headset_power_get_enum,
1094 twl6040_headset_power_put_enum),
af958c72
PU
1095
1096 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1097 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC
1098};
1099
1100static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1101 /* Inputs */
1102 SND_SOC_DAPM_INPUT("MAINMIC"),
1103 SND_SOC_DAPM_INPUT("HSMIC"),
1104 SND_SOC_DAPM_INPUT("SUBMIC"),
1105 SND_SOC_DAPM_INPUT("AFML"),
1106 SND_SOC_DAPM_INPUT("AFMR"),
1107
1108 /* Outputs */
1109 SND_SOC_DAPM_OUTPUT("HSOL"),
1110 SND_SOC_DAPM_OUTPUT("HSOR"),
1111 SND_SOC_DAPM_OUTPUT("HFL"),
1112 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1113 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU
1114 SND_SOC_DAPM_OUTPUT("AUXL"),
1115 SND_SOC_DAPM_OUTPUT("AUXR"),
8ecbabd9
MLC
1116
1117 /* Analog input muxes for the capture amplifiers */
1118 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1119 SND_SOC_NOPM, 0, 0, &amicl_control),
1120 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1121 SND_SOC_NOPM, 0, 0, &amicr_control),
1122
1123 /* Analog capture PGAs */
1124 SND_SOC_DAPM_PGA("MicAmpL",
1125 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1126 SND_SOC_DAPM_PGA("MicAmpR",
1127 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1128
370a0314
JEC
1129 /* Auxiliary FM PGAs */
1130 SND_SOC_DAPM_PGA("AFMAmpL",
1131 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1132 SND_SOC_DAPM_PGA("AFMAmpR",
1133 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1134
8ecbabd9
MLC
1135 /* ADCs */
1136 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1137 TWL6040_REG_MICLCTL, 2, 0),
1138 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1139 TWL6040_REG_MICRCTL, 2, 0),
1140
1141 /* Microphone bias */
1142 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1143 TWL6040_REG_AMICBCTL, 0, 0),
1144 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1145 TWL6040_REG_AMICBCTL, 4, 0),
1146 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1147 TWL6040_REG_DMICBCTL, 0, 0),
1148 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1149 TWL6040_REG_DMICBCTL, 4, 0),
1150
1151 /* DACs */
0fad4ed7
JEC
1152 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1153 TWL6040_REG_HSLCTL, 0, 0,
1154 twl6040_hs_dac_event,
1155 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1156 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1157 TWL6040_REG_HSRCTL, 0, 0,
1158 twl6040_hs_dac_event,
1159 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1160 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1161 TWL6040_REG_HFLCTL, 0, 0,
1162 twl6040_power_mode_event,
1163 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1164 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1165 TWL6040_REG_HFRCTL, 0, 0,
1166 twl6040_power_mode_event,
1167 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1168
df11ce29 1169 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1170 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1171 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC
1172 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1173 /* Analog playback Muxes */
45b0f60d 1174 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1175 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1176 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1177 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1178
317596a6
PU
1179 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1180 &ep_path_enable_control),
fdb625ff
PU
1181 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1182 &auxl_switch_control),
1183 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1184 &auxr_switch_control),
317596a6 1185
0fad4ed7 1186 /* Analog playback drivers */
df11ce29 1187 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1188 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
1bf84759
MOC
1189 pga_event,
1190 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1191 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1192 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
1bf84759
MOC
1193 pga_event,
1194 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1195 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759
MOC
1196 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
1197 pga_event,
1198 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1199 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759
MOC
1200 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
1201 pga_event,
1202 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU
1203 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1204 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
871a05a7
JEC
1205 twl6040_power_mode_event,
1206 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1207
1208 /* Analog playback PGAs */
df11ce29 1209 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1210 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1211 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC
1212 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1213
1214};
1215
1216static const struct snd_soc_dapm_route intercon[] = {
1217 /* Capture path */
1218 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1219 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1220 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1221
1222 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1223 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1224 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1225
1226 {"MicAmpL", NULL, "Analog Left Capture Route"},
1227 {"MicAmpR", NULL, "Analog Right Capture Route"},
1228
1229 {"ADC Left", NULL, "MicAmpL"},
1230 {"ADC Right", NULL, "MicAmpR"},
1231
370a0314 1232 /* AFM path */
5bf692d9
PU
1233 {"AFMAmpL", NULL, "AFML"},
1234 {"AFMAmpR", NULL, "AFMR"},
370a0314 1235
45b0f60d
PU
1236 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1237 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1238
45b0f60d
PU
1239 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1240 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1241
45b0f60d
PU
1242 {"HS Left Driver", NULL, "Headset Left Playback"},
1243 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1244
45b0f60d
PU
1245 {"HSOL", NULL, "HS Left Driver"},
1246 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1247
871a05a7 1248 /* Earphone playback path */
317596a6
PU
1249 {"Earphone Playback", "Switch", "HSDAC Left"},
1250 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC
1251 {"EP", NULL, "Earphone Driver"},
1252
df11ce29
PU
1253 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1254 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1255
df11ce29
PU
1256 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1257 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1258
df11ce29
PU
1259 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1260 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1261
df11ce29
PU
1262 {"HF Left Driver", NULL, "HF Left PGA"},
1263 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1264
df11ce29
PU
1265 {"HFL", NULL, "HF Left Driver"},
1266 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU
1267
1268 {"AUXL Playback", "Switch", "HF Left PGA"},
1269 {"AUXR Playback", "Switch", "HF Right PGA"},
1270
1271 {"AUXL", NULL, "AUXL Playback"},
1272 {"AUXR", NULL, "AUXR Playback"},
8ecbabd9
MLC
1273};
1274
1275static int twl6040_add_widgets(struct snd_soc_codec *codec)
1276{
ce6120cc 1277 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1278
ce6120cc
LG
1279 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1280 ARRAY_SIZE(twl6040_dapm_widgets));
1281 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1282 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC
1283
1284 return 0;
1285}
1286
8ecbabd9
MLC
1287static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1288 enum snd_soc_bias_level level)
1289{
fb34d3d5 1290 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1291 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1292 int ret;
1293
1294 switch (level) {
1295 case SND_SOC_BIAS_ON:
1296 break;
1297 case SND_SOC_BIAS_PREPARE:
1298 break;
1299 case SND_SOC_BIAS_STANDBY:
1300 if (priv->codec_powered)
1301 break;
1302
fb34d3d5
MLC
1303 ret = twl6040_power(twl6040, 1);
1304 if (ret)
1305 return ret;
8ecbabd9 1306
fb34d3d5 1307 priv->codec_powered = 1;
8ecbabd9 1308
a52762ee 1309 twl6040_restore_regs(codec);
65b7cecc
OM
1310
1311 /* Set external boost GPO */
1312 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1313 break;
1314 case SND_SOC_BIAS_OFF:
1315 if (!priv->codec_powered)
1316 break;
1317
fb34d3d5 1318 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1319 priv->codec_powered = 0;
1320 break;
1321 }
1322
ce6120cc 1323 codec->dapm.bias_level = level;
8ecbabd9
MLC
1324
1325 return 0;
1326}
1327
8ecbabd9
MLC
1328static int twl6040_startup(struct snd_pcm_substream *substream,
1329 struct snd_soc_dai *dai)
1330{
1331 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1332 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1333 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1334
8ecbabd9
MLC
1335 snd_pcm_hw_constraint_list(substream->runtime, 0,
1336 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1337 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC
1338
1339 return 0;
1340}
1341
1342static int twl6040_hw_params(struct snd_pcm_substream *substream,
1343 struct snd_pcm_hw_params *params,
1344 struct snd_soc_dai *dai)
1345{
1346 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1347 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1348 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1349 int rate;
1350
8ecbabd9
MLC
1351 rate = params_rate(params);
1352 switch (rate) {
60ea4cec
OM
1353 case 11250:
1354 case 22500:
1355 case 44100:
8ecbabd9 1356 case 88200:
753621c2
PU
1357 /* These rates are not supported when HPPLL is in use */
1358 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1359 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1360 rate);
1361 return -EINVAL;
1362 }
1363 /* Capture is not supported with 17.64MHz sysclk */
1364 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1365 dev_err(codec->dev,
1366 "capture mode is not supported at %dHz\n",
1367 rate);
1368 return -EINVAL;
1369 }
8ecbabd9
MLC
1370 priv->sysclk = 17640000;
1371 break;
60ea4cec
OM
1372 case 8000:
1373 case 16000:
1374 case 32000:
1375 case 48000:
8ecbabd9 1376 case 96000:
8ecbabd9
MLC
1377 priv->sysclk = 19200000;
1378 break;
1379 default:
1380 dev_err(codec->dev, "unsupported rate %d\n", rate);
1381 return -EINVAL;
1382 }
1383
8ecbabd9
MLC
1384 return 0;
1385}
1386
4e624d06
OM
1387static int twl6040_prepare(struct snd_pcm_substream *substream,
1388 struct snd_soc_dai *dai)
8ecbabd9
MLC
1389{
1390 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1391 struct snd_soc_codec *codec = rtd->codec;
753621c2 1392 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1393 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1394 int ret;
8ecbabd9 1395
4e624d06
OM
1396 if (!priv->sysclk) {
1397 dev_err(codec->dev,
1398 "no mclk configured, call set_sysclk() on init\n");
1399 return -EINVAL;
1400 }
1401
4e624d06 1402 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC
1403 dev_err(codec->dev,
1404 "some enabled paths aren't supported at %dHz\n",
1405 priv->sysclk);
1406 return -EPERM;
8ecbabd9 1407 }
753621c2
PU
1408
1409 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1410 if (ret) {
1411 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1412 return -EPERM;
1413 }
1414
8ecbabd9
MLC
1415 return 0;
1416}
1417
1418static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1419 int clk_id, unsigned int freq, int dir)
1420{
1421 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1422 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1423
1424 switch (clk_id) {
1425 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1426 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU
1427 priv->pll = clk_id;
1428 priv->clk_in = freq;
8ecbabd9
MLC
1429 break;
1430 default:
1431 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1432 return -EINVAL;
1433 }
1434
1435 return 0;
1436}
1437
1438static struct snd_soc_dai_ops twl6040_dai_ops = {
1439 .startup = twl6040_startup,
1440 .hw_params = twl6040_hw_params,
4e624d06 1441 .prepare = twl6040_prepare,
8ecbabd9
MLC
1442 .set_sysclk = twl6040_set_dai_sysclk,
1443};
1444
6510bdc3 1445static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1446{
d13f1fe0 1447 .name = "twl6040-legacy",
8ecbabd9
MLC
1448 .playback = {
1449 .stream_name = "Playback",
1450 .channels_min = 1,
cdd5054c 1451 .channels_max = 5,
21385eeb
PU
1452 .rates = TWL6040_RATES,
1453 .formats = TWL6040_FORMATS,
1454 },
1455 .capture = {
1456 .stream_name = "Capture",
1457 .channels_min = 1,
1458 .channels_max = 2,
8ecbabd9
MLC
1459 .rates = TWL6040_RATES,
1460 .formats = TWL6040_FORMATS,
1461 },
21385eeb
PU
1462 .ops = &twl6040_dai_ops,
1463},
6510bdc3
LG
1464{
1465 .name = "twl6040-ul",
8ecbabd9
MLC
1466 .capture = {
1467 .stream_name = "Capture",
1468 .channels_min = 1,
1469 .channels_max = 2,
1470 .rates = TWL6040_RATES,
1471 .formats = TWL6040_FORMATS,
1472 },
1473 .ops = &twl6040_dai_ops,
6510bdc3
LG
1474},
1475{
1476 .name = "twl6040-dl1",
8ecbabd9 1477 .playback = {
6510bdc3 1478 .stream_name = "Headset Playback",
8ecbabd9 1479 .channels_min = 1,
6510bdc3 1480 .channels_max = 2,
8ecbabd9
MLC
1481 .rates = TWL6040_RATES,
1482 .formats = TWL6040_FORMATS,
1483 },
6510bdc3
LG
1484 .ops = &twl6040_dai_ops,
1485},
1486{
1487 .name = "twl6040-dl2",
1488 .playback = {
1489 .stream_name = "Handsfree Playback",
8ecbabd9
MLC
1490 .channels_min = 1,
1491 .channels_max = 2,
1492 .rates = TWL6040_RATES,
1493 .formats = TWL6040_FORMATS,
1494 },
1495 .ops = &twl6040_dai_ops,
6510bdc3
LG
1496},
1497{
1498 .name = "twl6040-vib",
1499 .playback = {
1500 .stream_name = "Vibra Playback",
d8dd032d
PU
1501 .channels_min = 1,
1502 .channels_max = 1,
6510bdc3
LG
1503 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1504 .formats = TWL6040_FORMATS,
1505 },
1506 .ops = &twl6040_dai_ops,
1507},
8ecbabd9 1508};
8ecbabd9
MLC
1509
1510#ifdef CONFIG_PM
f0fba2ad 1511static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1512{
8ecbabd9
MLC
1513 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1514
1515 return 0;
1516}
1517
f0fba2ad 1518static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1519{
8ecbabd9 1520 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1521 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1522
1523 return 0;
1524}
1525#else
1526#define twl6040_suspend NULL
1527#define twl6040_resume NULL
1528#endif
1529
f0fba2ad 1530static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1531{
8ecbabd9 1532 struct twl6040_data *priv;
1fbe9952 1533 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU
1534 struct platform_device *pdev = container_of(codec->dev,
1535 struct platform_device, dev);
8ecbabd9
MLC
1536 int ret = 0;
1537
1538 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1539 if (priv == NULL)
1540 return -ENOMEM;
f0fba2ad 1541 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1542
a2d2362e 1543 priv->codec = codec;
fb34d3d5 1544 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1545
1fbe9952
ACG
1546 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1547 priv->hs_left_step = pdata->hs_left_step;
1548 priv->hs_right_step = pdata->hs_right_step;
1549 } else {
1550 priv->hs_left_step = 1;
1551 priv->hs_right_step = 1;
1552 }
99903ea2 1553
1fbe9952
ACG
1554 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1555 priv->hf_left_step = pdata->hf_left_step;
1556 priv->hf_right_step = pdata->hf_right_step;
1557 } else {
1558 priv->hf_left_step = 1;
1559 priv->hf_right_step = 1;
1560 }
99903ea2 1561
2a433b9d
PU
1562 priv->plug_irq = platform_get_irq(pdev, 0);
1563 if (priv->plug_irq < 0) {
1564 dev_err(codec->dev, "invalid irq\n");
1565 ret = -EINVAL;
1566 goto work_err;
1567 }
8ecbabd9 1568
a2d2362e 1569 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL
1570 if (!priv->workqueue) {
1571 ret = -ENOMEM;
a2d2362e 1572 goto work_err;
19aab08d 1573 }
a2d2362e
JEC
1574
1575 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1576
1577 mutex_init(&priv->mutex);
8ecbabd9 1578
1bf84759
MOC
1579 init_completion(&priv->headset.ramp_done);
1580 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1581
1bf84759
MOC
1582 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1583 if (priv->hf_workqueue == NULL) {
1584 ret = -ENOMEM;
fb34d3d5 1585 goto hfwq_err;
1bf84759
MOC
1586 }
1587 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1588 if (priv->hs_workqueue == NULL) {
1589 ret = -ENOMEM;
fb34d3d5 1590 goto hswq_err;
1bf84759
MOC
1591 }
1592
1593 INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
1594 INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
1595
2a433b9d
PU
1596 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1597 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC
1598 if (ret) {
1599 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1600 goto plugirq_err;
1601 }
1602
a52762ee 1603 twl6040_init_chip(codec);
fb34d3d5 1604
8ecbabd9
MLC
1605 /* power on device */
1606 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1607 if (ret)
1bf84759 1608 goto bias_err;
8ecbabd9 1609
f0fba2ad
LG
1610 snd_soc_add_controls(codec, twl6040_snd_controls,
1611 ARRAY_SIZE(twl6040_snd_controls));
1612 twl6040_add_widgets(codec);
8ecbabd9
MLC
1613
1614 return 0;
1615
1bf84759 1616bias_err:
2a433b9d 1617 free_irq(priv->plug_irq, codec);
fb34d3d5 1618plugirq_err:
1bf84759 1619 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1620hswq_err:
1bf84759 1621 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1622hfwq_err:
a2d2362e
JEC
1623 destroy_workqueue(priv->workqueue);
1624work_err:
8ecbabd9
MLC
1625 kfree(priv);
1626 return ret;
1627}
1628
f0fba2ad 1629static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1630{
f0fba2ad 1631 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1632
f0fba2ad 1633 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1634 free_irq(priv->plug_irq, codec);
a2d2362e 1635 destroy_workqueue(priv->workqueue);
1bf84759
MOC
1636 destroy_workqueue(priv->hf_workqueue);
1637 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1638 kfree(priv);
8ecbabd9 1639
f0fba2ad
LG
1640 return 0;
1641}
8ecbabd9 1642
f0fba2ad
LG
1643static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1644 .probe = twl6040_probe,
1645 .remove = twl6040_remove,
1646 .suspend = twl6040_suspend,
1647 .resume = twl6040_resume,
1648 .read = twl6040_read_reg_cache,
1649 .write = twl6040_write,
1650 .set_bias_level = twl6040_set_bias_level,
1651 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1652 .reg_word_size = sizeof(u8),
1653 .reg_cache_default = twl6040_reg,
1654};
1655
1656static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1657{
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LG
1658 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1659 twl6040_dai, ARRAY_SIZE(twl6040_dai));
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LG
1660}
1661
1662static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1663{
1664 snd_soc_unregister_codec(&pdev->dev);
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MLC
1665 return 0;
1666}
1667
1668static struct platform_driver twl6040_codec_driver = {
1669 .driver = {
f0fba2ad 1670 .name = "twl6040-codec",
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MLC
1671 .owner = THIS_MODULE,
1672 },
1673 .probe = twl6040_codec_probe,
1674 .remove = __devexit_p(twl6040_codec_remove),
1675};
1676
1677static int __init twl6040_codec_init(void)
1678{
1679 return platform_driver_register(&twl6040_codec_driver);
1680}
1681module_init(twl6040_codec_init);
1682
1683static void __exit twl6040_codec_exit(void)
1684{
1685 platform_driver_unregister(&twl6040_codec_driver);
1686}
1687module_exit(twl6040_codec_exit);
1688
1689MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1690MODULE_AUTHOR("Misael Lopez Cruz");
1691MODULE_LICENSE("GPL");
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