ASoC: pxa: allocate the SSP DMA parameters in startup
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC
1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
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MLC
31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
e48b46ba 36#include <sound/soc-dapm.h>
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MLC
37#include <sound/initval.h>
38#include <sound/tlv.h>
39
40#include "twl6040.h"
41
60ea4cec 42#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
1bf84759
MOC
43#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
44
45#define TWL6040_OUTHS_0dB 0x00
46#define TWL6040_OUTHS_M30dB 0x0F
47#define TWL6040_OUTHF_0dB 0x03
48#define TWL6040_OUTHF_M52dB 0x1D
49
50#define TWL6040_RAMP_NONE 0
51#define TWL6040_RAMP_UP 1
52#define TWL6040_RAMP_DOWN 2
53
54#define TWL6040_HSL_VOL_MASK 0x0F
55#define TWL6040_HSL_VOL_SHIFT 0
56#define TWL6040_HSR_VOL_MASK 0xF0
57#define TWL6040_HSR_VOL_SHIFT 4
58#define TWL6040_HF_VOL_MASK 0x1F
59#define TWL6040_HF_VOL_SHIFT 0
60
d17bf318
PU
61/* Shadow register used by the driver */
62#define TWL6040_REG_SW_SHADOW 0x2F
63#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
64
317596a6
PU
65/* TWL6040_REG_SW_SHADOW (0x2F) fields */
66#define TWL6040_EAR_PATH_ENABLE 0x01
67
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MOC
68struct twl6040_output {
69 u16 active;
70 u16 left_vol;
71 u16 right_vol;
72 u16 left_step;
73 u16 right_step;
74 unsigned int step_delay;
75 u16 ramp;
e71a5e5a 76 struct delayed_work work;
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MOC
77 struct completion ramp_done;
78};
8ecbabd9 79
a2d2362e
JEC
80struct twl6040_jack_data {
81 struct snd_soc_jack *jack;
46dd0b93 82 struct delayed_work work;
a2d2362e
JEC
83 int report;
84};
85
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MLC
86/* codec private data */
87struct twl6040_data {
2a433b9d 88 int plug_irq;
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89 int codec_powered;
90 int pll;
af958c72 91 int pll_power_mode;
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MLC
92 int hs_power_mode;
93 int hs_power_mode_locked;
fb34d3d5 94 unsigned int clk_in;
8ecbabd9 95 unsigned int sysclk;
1fbe9952
ACG
96 u16 hs_left_step;
97 u16 hs_right_step;
98 u16 hf_left_step;
99 u16 hf_right_step;
a2d2362e
JEC
100 struct twl6040_jack_data hs_jack;
101 struct snd_soc_codec *codec;
102 struct workqueue_struct *workqueue;
a2d2362e 103 struct mutex mutex;
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MOC
104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
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MLC
106};
107
108/*
109 * twl6040 register cache & default register settings
110 */
111static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU
112 0x00, /* not used 0x00 */
113 0x4B, /* REG_ASICID 0x01 (ro) */
114 0x00, /* REG_ASICREV 0x02 (ro) */
115 0x00, /* REG_INTID 0x03 */
116 0x00, /* REG_INTMR 0x04 */
117 0x00, /* REG_NCPCTRL 0x05 */
118 0x00, /* REG_LDOCTL 0x06 */
119 0x60, /* REG_HPPLLCTL 0x07 */
120 0x00, /* REG_LPPLLCTL 0x08 */
121 0x4A, /* REG_LPPLLDIV 0x09 */
122 0x00, /* REG_AMICBCTL 0x0A */
123 0x00, /* REG_DMICBCTL 0x0B */
124 0x00, /* REG_MICLCTL 0x0C */
125 0x00, /* REG_MICRCTL 0x0D */
126 0x00, /* REG_MICGAIN 0x0E */
127 0x1B, /* REG_LINEGAIN 0x0F */
128 0x00, /* REG_HSLCTL 0x10 */
129 0x00, /* REG_HSRCTL 0x11 */
130 0x00, /* REG_HSGAIN 0x12 */
131 0x00, /* REG_EARCTL 0x13 */
132 0x00, /* REG_HFLCTL 0x14 */
133 0x00, /* REG_HFLGAIN 0x15 */
134 0x00, /* REG_HFRCTL 0x16 */
135 0x00, /* REG_HFRGAIN 0x17 */
136 0x00, /* REG_VIBCTLL 0x18 */
137 0x00, /* REG_VIBDATL 0x19 */
138 0x00, /* REG_VIBCTLR 0x1A */
139 0x00, /* REG_VIBDATR 0x1B */
140 0x00, /* REG_HKCTL1 0x1C */
141 0x00, /* REG_HKCTL2 0x1D */
142 0x00, /* REG_GPOCTL 0x1E */
143 0x00, /* REG_ALB 0x1F */
144 0x00, /* REG_DLB 0x20 */
145 0x00, /* not used 0x21 */
146 0x00, /* not used 0x22 */
147 0x00, /* not used 0x23 */
148 0x00, /* not used 0x24 */
149 0x00, /* not used 0x25 */
150 0x00, /* not used 0x26 */
151 0x00, /* not used 0x27 */
152 0x00, /* REG_TRIM1 0x28 */
153 0x00, /* REG_TRIM2 0x29 */
154 0x00, /* REG_TRIM3 0x2A */
155 0x00, /* REG_HSOTRIM 0x2B */
156 0x00, /* REG_HFOTRIM 0x2C */
157 0x09, /* REG_ACCCTL 0x2D */
158 0x00, /* REG_STATUS 0x2E (ro) */
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PU
159
160 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
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MLC
161};
162
a52762ee
PU
163/* List of registers to be restored after power up */
164static const int twl6040_restore_list[] = {
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MLC
165 TWL6040_REG_MICLCTL,
166 TWL6040_REG_MICRCTL,
167 TWL6040_REG_MICGAIN,
168 TWL6040_REG_LINEGAIN,
169 TWL6040_REG_HSLCTL,
170 TWL6040_REG_HSRCTL,
171 TWL6040_REG_HSGAIN,
172 TWL6040_REG_EARCTL,
173 TWL6040_REG_HFLCTL,
174 TWL6040_REG_HFLGAIN,
175 TWL6040_REG_HFRCTL,
176 TWL6040_REG_HFRGAIN,
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MLC
177};
178
af958c72
PU
179/* set of rates for each pll: low-power and high-performance */
180static unsigned int lp_rates[] = {
181 8000,
182 11250,
183 16000,
184 22500,
185 32000,
186 44100,
187 48000,
188 88200,
189 96000,
190};
191
af958c72
PU
192static unsigned int hp_rates[] = {
193 8000,
194 16000,
195 32000,
196 48000,
197 96000,
198};
199
f53c346c
PU
200static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
201 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
202 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU
203};
204
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MLC
205/*
206 * read twl6040 register cache
207 */
208static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
209 unsigned int reg)
210{
211 u8 *cache = codec->reg_cache;
212
213 if (reg >= TWL6040_CACHEREGNUM)
214 return -EIO;
215
216 return cache[reg];
217}
218
219/*
220 * write twl6040 register cache
221 */
222static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
223 u8 reg, u8 value)
224{
225 u8 *cache = codec->reg_cache;
226
227 if (reg >= TWL6040_CACHEREGNUM)
228 return;
229 cache[reg] = value;
230}
231
232/*
233 * read from twl6040 hardware register
234 */
235static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
236 unsigned int reg)
237{
fb34d3d5 238 struct twl6040 *twl6040 = codec->control_data;
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MLC
239 u8 value;
240
241 if (reg >= TWL6040_CACHEREGNUM)
242 return -EIO;
243
d17bf318
PU
244 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
245 value = twl6040_reg_read(twl6040, reg);
246 twl6040_write_reg_cache(codec, reg, value);
247 } else {
248 value = twl6040_read_reg_cache(codec, reg);
249 }
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250
251 return value;
252}
253
254/*
255 * write to the twl6040 register space
256 */
257static int twl6040_write(struct snd_soc_codec *codec,
258 unsigned int reg, unsigned int value)
259{
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MLC
260 struct twl6040 *twl6040 = codec->control_data;
261
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MLC
262 if (reg >= TWL6040_CACHEREGNUM)
263 return -EIO;
264
265 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU
266 if (likely(reg < TWL6040_REG_SW_SHADOW))
267 return twl6040_reg_write(twl6040, reg, value);
268 else
269 return 0;
8ecbabd9
MLC
270}
271
a52762ee 272static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 273{
a52762ee
PU
274 struct twl6040 *twl6040 = codec->control_data;
275 u8 val;
276
f97217f1 277 /* Update reg_cache: ASICREV, and TRIM values */
a52762ee
PU
278 val = twl6040_get_revid(twl6040);
279 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 280
f97217f1
PU
281 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1);
282 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2);
283 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3);
284 twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM);
285 twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM);
286
2c27ff41
PU
287 /* Change chip defaults */
288 /* No imput selected for microphone amplifiers */
289 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
290 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU
291
292 /*
293 * We need to lower the default gain values, so the ramp code
294 * can work correctly for the first playback.
295 * This reduces the pop noise heard at the first playback.
296 */
297 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
298 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
299 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
300 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
301 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
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MLC
302}
303
a52762ee 304static void twl6040_restore_regs(struct snd_soc_codec *codec)
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MLC
305{
306 u8 *cache = codec->reg_cache;
307 int reg, i;
308
a52762ee
PU
309 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
310 reg = twl6040_restore_list[i];
8ecbabd9
MLC
311 twl6040_write(codec, reg, cache[reg]);
312 }
313}
314
1bf84759
MOC
315/*
316 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
317 */
318static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
319 unsigned int left_step, unsigned int right_step)
320{
321
322 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
323 struct twl6040_output *headset = &priv->headset;
324 int left_complete = 0, right_complete = 0;
325 u8 reg, val;
326
327 /* left channel */
328 left_step = (left_step > 0xF) ? 0xF : left_step;
329 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
330 val = (~reg & TWL6040_HSL_VOL_MASK);
331
332 if (headset->ramp == TWL6040_RAMP_UP) {
333 /* ramp step up */
334 if (val < headset->left_vol) {
1fbe9952
ACG
335 if (val + left_step > headset->left_vol)
336 val = headset->left_vol;
337 else
338 val += left_step;
339
1bf84759
MOC
340 reg &= ~TWL6040_HSL_VOL_MASK;
341 twl6040_write(codec, TWL6040_REG_HSGAIN,
342 (reg | (~val & TWL6040_HSL_VOL_MASK)));
343 } else {
344 left_complete = 1;
345 }
346 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
347 /* ramp step down */
348 if (val > 0x0) {
1fbe9952
ACG
349 if ((int)val - (int)left_step < 0)
350 val = 0;
351 else
352 val -= left_step;
353
1bf84759
MOC
354 reg &= ~TWL6040_HSL_VOL_MASK;
355 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
356 (~val & TWL6040_HSL_VOL_MASK));
357 } else {
358 left_complete = 1;
359 }
360 }
361
362 /* right channel */
363 right_step = (right_step > 0xF) ? 0xF : right_step;
364 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
365 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
366
367 if (headset->ramp == TWL6040_RAMP_UP) {
368 /* ramp step up */
369 if (val < headset->right_vol) {
1fbe9952
ACG
370 if (val + right_step > headset->right_vol)
371 val = headset->right_vol;
372 else
373 val += right_step;
374
1bf84759
MOC
375 reg &= ~TWL6040_HSR_VOL_MASK;
376 twl6040_write(codec, TWL6040_REG_HSGAIN,
377 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
378 } else {
379 right_complete = 1;
380 }
381 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
382 /* ramp step down */
383 if (val > 0x0) {
1fbe9952
ACG
384 if ((int)val - (int)right_step < 0)
385 val = 0;
386 else
387 val -= right_step;
388
1bf84759
MOC
389 reg &= ~TWL6040_HSR_VOL_MASK;
390 twl6040_write(codec, TWL6040_REG_HSGAIN,
391 reg | (~val << TWL6040_HSR_VOL_SHIFT));
392 } else {
393 right_complete = 1;
394 }
395 }
396
397 return left_complete & right_complete;
398}
399
400/*
401 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
402 */
403static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
404 unsigned int left_step, unsigned int right_step)
405{
406 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
407 struct twl6040_output *handsfree = &priv->handsfree;
408 int left_complete = 0, right_complete = 0;
409 u16 reg, val;
410
411 /* left channel */
412 left_step = (left_step > 0x1D) ? 0x1D : left_step;
413 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
414 reg = 0x1D - reg;
415 val = (reg & TWL6040_HF_VOL_MASK);
416 if (handsfree->ramp == TWL6040_RAMP_UP) {
417 /* ramp step up */
418 if (val < handsfree->left_vol) {
1fbe9952
ACG
419 if (val + left_step > handsfree->left_vol)
420 val = handsfree->left_vol;
421 else
422 val += left_step;
423
1bf84759
MOC
424 reg &= ~TWL6040_HF_VOL_MASK;
425 twl6040_write(codec, TWL6040_REG_HFLGAIN,
426 reg | (0x1D - val));
427 } else {
428 left_complete = 1;
429 }
430 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
431 /* ramp step down */
432 if (val > 0) {
1fbe9952
ACG
433 if ((int)val - (int)left_step < 0)
434 val = 0;
435 else
436 val -= left_step;
437
1bf84759
MOC
438 reg &= ~TWL6040_HF_VOL_MASK;
439 twl6040_write(codec, TWL6040_REG_HFLGAIN,
440 reg | (0x1D - val));
441 } else {
442 left_complete = 1;
443 }
444 }
445
446 /* right channel */
447 right_step = (right_step > 0x1D) ? 0x1D : right_step;
448 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
449 reg = 0x1D - reg;
450 val = (reg & TWL6040_HF_VOL_MASK);
451 if (handsfree->ramp == TWL6040_RAMP_UP) {
452 /* ramp step up */
453 if (val < handsfree->right_vol) {
1fbe9952
ACG
454 if (val + right_step > handsfree->right_vol)
455 val = handsfree->right_vol;
456 else
457 val += right_step;
458
1bf84759
MOC
459 reg &= ~TWL6040_HF_VOL_MASK;
460 twl6040_write(codec, TWL6040_REG_HFRGAIN,
461 reg | (0x1D - val));
462 } else {
463 right_complete = 1;
464 }
465 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
466 /* ramp step down */
467 if (val > 0) {
1fbe9952
ACG
468 if ((int)val - (int)right_step < 0)
469 val = 0;
470 else
471 val -= right_step;
472
1bf84759
MOC
473 reg &= ~TWL6040_HF_VOL_MASK;
474 twl6040_write(codec, TWL6040_REG_HFRGAIN,
475 reg | (0x1D - val));
476 }
477 }
478
479 return left_complete & right_complete;
480}
481
482/*
483 * This work ramps both output PGAs at stream start/stop time to
484 * minimise pop associated with DAPM power switching.
485 */
486static void twl6040_pga_hs_work(struct work_struct *work)
487{
488 struct twl6040_data *priv =
e71a5e5a 489 container_of(work, struct twl6040_data, headset.work.work);
1bf84759
MOC
490 struct snd_soc_codec *codec = priv->codec;
491 struct twl6040_output *headset = &priv->headset;
1bf84759
MOC
492 int i, headset_complete;
493
494 /* do we need to ramp at all ? */
495 if (headset->ramp == TWL6040_RAMP_NONE)
496 return;
497
93eebc69
PU
498 /* HS PGA gain range: 0x0 - 0xf (0 - 15) */
499 for (i = 0; i < 16; i++) {
1fbe9952
ACG
500 headset_complete = twl6040_hs_ramp_step(codec,
501 headset->left_step,
502 headset->right_step);
1bf84759
MOC
503
504 /* ramp finished ? */
505 if (headset_complete)
506 break;
507
8ff1e170
PU
508 schedule_timeout_interruptible(
509 msecs_to_jiffies(headset->step_delay));
1bf84759
MOC
510 }
511
512 if (headset->ramp == TWL6040_RAMP_DOWN) {
513 headset->active = 0;
514 complete(&headset->ramp_done);
515 } else {
516 headset->active = 1;
517 }
518 headset->ramp = TWL6040_RAMP_NONE;
519}
520
521static void twl6040_pga_hf_work(struct work_struct *work)
522{
523 struct twl6040_data *priv =
e71a5e5a 524 container_of(work, struct twl6040_data, handsfree.work.work);
1bf84759
MOC
525 struct snd_soc_codec *codec = priv->codec;
526 struct twl6040_output *handsfree = &priv->handsfree;
1bf84759
MOC
527 int i, handsfree_complete;
528
529 /* do we need to ramp at all ? */
530 if (handsfree->ramp == TWL6040_RAMP_NONE)
531 return;
532
93eebc69
PU
533 /*
534 * HF PGA gain range: 0x00 - 0x1d (0 - 29) */
535 for (i = 0; i < 30; i++) {
1fbe9952
ACG
536 handsfree_complete = twl6040_hf_ramp_step(codec,
537 handsfree->left_step,
538 handsfree->right_step);
1bf84759
MOC
539
540 /* ramp finished ? */
541 if (handsfree_complete)
542 break;
543
4d64bdca
PU
544 schedule_timeout_interruptible(
545 msecs_to_jiffies(handsfree->step_delay));
1bf84759
MOC
546 }
547
548
549 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
550 handsfree->active = 0;
551 complete(&handsfree->ramp_done);
552 } else
553 handsfree->active = 1;
554 handsfree->ramp = TWL6040_RAMP_NONE;
555}
556
eb6b71e7 557static int out_drv_event(struct snd_soc_dapm_widget *w,
1bf84759
MOC
558 struct snd_kcontrol *kcontrol, int event)
559{
560 struct snd_soc_codec *codec = w->codec;
561 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
562 struct twl6040_output *out;
563 struct delayed_work *work;
1bf84759
MOC
564
565 switch (w->shift) {
6fbb32d1 566 case 2: /* Headset output driver */
1bf84759 567 out = &priv->headset;
009d196b
PU
568 work = &out->work;
569 /*
570 * Make sure, that we do not mess up variables for already
571 * executing work.
572 */
573 cancel_delayed_work_sync(work);
574
1fbe9952
ACG
575 out->left_step = priv->hs_left_step;
576 out->right_step = priv->hs_right_step;
1bf84759
MOC
577 out->step_delay = 5; /* 5 ms between volume ramp steps */
578 break;
6fbb32d1 579 case 4: /* Handsfree output driver */
1bf84759 580 out = &priv->handsfree;
009d196b
PU
581 work = &out->work;
582 /*
583 * Make sure, that we do not mess up variables for already
584 * executing work.
585 */
586 cancel_delayed_work_sync(work);
587
1fbe9952
ACG
588 out->left_step = priv->hf_left_step;
589 out->right_step = priv->hf_right_step;
1bf84759 590 out->step_delay = 5; /* 5 ms between volume ramp steps */
1bf84759
MOC
591 break;
592 default:
593 return -1;
594 }
595
596 switch (event) {
597 case SND_SOC_DAPM_POST_PMU:
598 if (out->active)
599 break;
600
601 /* don't use volume ramp for power-up */
009d196b 602 out->ramp = TWL6040_RAMP_UP;
1bf84759
MOC
603 out->left_step = out->left_vol;
604 out->right_step = out->right_vol;
605
009d196b 606 queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1));
1bf84759
MOC
607 break;
608
609 case SND_SOC_DAPM_PRE_PMD:
610 if (!out->active)
611 break;
612
009d196b
PU
613 /* use volume ramp for power-down */
614 out->ramp = TWL6040_RAMP_DOWN;
615 INIT_COMPLETION(out->ramp_done);
1bf84759 616
009d196b 617 queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1));
1bf84759 618
009d196b
PU
619 wait_for_completion_timeout(&out->ramp_done,
620 msecs_to_jiffies(2000));
1bf84759
MOC
621 break;
622 }
623
624 return 0;
625}
626
8ecbabd9
MLC
627/* set headset dac and driver power mode */
628static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
629{
630 int hslctl, hsrctl;
ab6cf139 631 int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
8ecbabd9
MLC
632
633 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
634 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
635
636 if (high_perf) {
637 hslctl &= ~mask;
638 hsrctl &= ~mask;
639 } else {
640 hslctl |= mask;
641 hsrctl |= mask;
642 }
643
644 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
645 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
646
647 return 0;
648}
649
0fad4ed7
JEC
650static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
651 struct snd_kcontrol *kcontrol, int event)
652{
33b6816c
PU
653 struct snd_soc_codec *codec = w->codec;
654 u8 hslctl, hsrctl;
655
656 /*
657 * Workaround for Headset DC offset caused pop noise:
658 * Both HS DAC need to be turned on (before the HS driver) and off at
659 * the same time.
660 */
661 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
662 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
663 if (SND_SOC_DAPM_EVENT_ON(event)) {
664 hslctl |= TWL6040_HSDACENA;
665 hsrctl |= TWL6040_HSDACENA;
666 } else {
667 hslctl &= ~TWL6040_HSDACENA;
668 hsrctl &= ~TWL6040_HSDACENA;
669 }
670 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
671 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
672
0fad4ed7
JEC
673 msleep(1);
674 return 0;
675}
676
694b0001 677static int twl6040_ep_drv_event(struct snd_soc_dapm_widget *w,
8ecbabd9
MLC
678 struct snd_kcontrol *kcontrol, int event)
679{
680 struct snd_soc_codec *codec = w->codec;
d4a8ca24 681 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 682 int ret = 0;
8ecbabd9 683
6bba63b6 684 if (SND_SOC_DAPM_EVENT_ON(event)) {
fac2f3e4
PU
685 /* Earphone doesn't support low power mode */
686 priv->hs_power_mode_locked = 1;
687 ret = headset_power_mode(codec, 1);
6bba63b6 688 } else {
fac2f3e4
PU
689 priv->hs_power_mode_locked = 0;
690 ret = headset_power_mode(codec, priv->hs_power_mode);
6bba63b6 691 }
8ecbabd9 692
0fad4ed7
JEC
693 msleep(1);
694
6bba63b6 695 return ret;
8ecbabd9
MLC
696}
697
64ed9836
MB
698static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
699 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
700{
701 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
702 int status;
703
704 mutex_lock(&priv->mutex);
705
706 /* Sync status */
707 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
708 if (status & TWL6040_PLUGCOMP)
709 snd_soc_jack_report(jack, report, report);
710 else
711 snd_soc_jack_report(jack, 0, report);
712
713 mutex_unlock(&priv->mutex);
714}
715
716void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
717 struct snd_soc_jack *jack, int report)
718{
719 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
720 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
721
722 hs_jack->jack = jack;
723 hs_jack->report = report;
724
725 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
726}
727EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
728
729static void twl6040_accessory_work(struct work_struct *work)
730{
731 struct twl6040_data *priv = container_of(work,
46dd0b93 732 struct twl6040_data, hs_jack.work.work);
a2d2362e
JEC
733 struct snd_soc_codec *codec = priv->codec;
734 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
735
736 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
737}
738
8ecbabd9 739/* audio interrupt handler */
fb34d3d5 740static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
741{
742 struct snd_soc_codec *codec = data;
d4a8ca24 743 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
cf370a5a 744
46dd0b93 745 queue_delayed_work(priv->workqueue, &priv->hs_jack.work,
f34c6606 746 msecs_to_jiffies(200));
cf370a5a 747
8ecbabd9
MLC
748 return IRQ_HANDLED;
749}
750
1bf84759
MOC
751static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
752 struct snd_ctl_elem_value *ucontrol)
753{
754 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
755 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
756 struct twl6040_output *out = NULL;
757 struct soc_mixer_control *mc =
758 (struct soc_mixer_control *)kcontrol->private_value;
db382da5 759 int ret;
1bf84759
MOC
760
761 /* For HS and HF we shadow the values and only actually write
762 * them out when active in order to ensure the amplifier comes on
763 * as quietly as possible. */
a8cc7189 764 switch (mc->reg) {
1bf84759
MOC
765 case TWL6040_REG_HSGAIN:
766 out = &twl6040_priv->headset;
767 break;
a8cc7189
PU
768 case TWL6040_REG_HFLGAIN:
769 out = &twl6040_priv->handsfree;
770 break;
1bf84759 771 default:
a0acf47f
PU
772 dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n",
773 __func__, mc->reg);
bfd3d4e9 774 return -EINVAL;
1bf84759
MOC
775 }
776
bfd3d4e9
PU
777 out->left_vol = ucontrol->value.integer.value[0];
778 out->right_vol = ucontrol->value.integer.value[1];
779 if (!out->active)
780 return 1;
1bf84759 781
db382da5 782 ret = snd_soc_put_volsw(kcontrol, ucontrol);
1bf84759
MOC
783 if (ret < 0)
784 return ret;
785
786 return 1;
787}
788
789static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol)
791{
792 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
793 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
794 struct twl6040_output *out = &twl6040_priv->headset;
795 struct soc_mixer_control *mc =
796 (struct soc_mixer_control *)kcontrol->private_value;
1bf84759 797
a8cc7189 798 switch (mc->reg) {
1bf84759
MOC
799 case TWL6040_REG_HSGAIN:
800 out = &twl6040_priv->headset;
1bf84759 801 break;
1bf84759 802 case TWL6040_REG_HFLGAIN:
1bf84759
MOC
803 out = &twl6040_priv->handsfree;
804 break;
805 default:
e49b6833
PU
806 dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n",
807 __func__, mc->reg);
808 return -EINVAL;
1bf84759
MOC
809 }
810
e49b6833
PU
811 ucontrol->value.integer.value[0] = out->left_vol;
812 ucontrol->value.integer.value[1] = out->right_vol;
813 return 0;
1bf84759
MOC
814}
815
67c34130
PU
816static int twl6040_soc_dapm_put_vibra_enum(struct snd_kcontrol *kcontrol,
817 struct snd_ctl_elem_value *ucontrol)
818{
819 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
820 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
821 struct snd_soc_codec *codec = widget->codec;
822 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
823 unsigned int val;
824
825 /* Do not allow changes while Input/FF efect is running */
826 val = twl6040_read_reg_volatile(codec, e->reg);
827 if (val & TWL6040_VIBENA && !(val & TWL6040_VIBSEL))
828 return -EBUSY;
829
830 return snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
831}
832
8ecbabd9
MLC
833/*
834 * MICATT volume control:
835 * from -6 to 0 dB in 6 dB steps
836 */
837static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
838
839/*
840 * MICGAIN volume control:
2763f45d 841 * from 6 to 30 dB in 6 dB steps
8ecbabd9 842 */
2763f45d 843static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 844
370a0314
JEC
845/*
846 * AFMGAIN volume control:
1f71a3ba 847 * from -18 to 24 dB in 6 dB steps
370a0314 848 */
1f71a3ba 849static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 850
8ecbabd9
MLC
851/*
852 * HSGAIN volume control:
853 * from -30 to 0 dB in 2 dB steps
854 */
855static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
856
857/*
858 * HFGAIN volume control:
859 * from -52 to 6 dB in 2 dB steps
860 */
861static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
862
871a05a7
JEC
863/*
864 * EPGAIN volume control:
865 * from -24 to 6 dB in 2 dB steps
866 */
867static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
868
8ecbabd9
MLC
869/* Left analog microphone selection */
870static const char *twl6040_amicl_texts[] =
871 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
872
873/* Right analog microphone selection */
874static const char *twl6040_amicr_texts[] =
875 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
876
877static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
878 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
879 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
880};
881
370a0314
JEC
882static const char *twl6040_hs_texts[] = {
883 "Off", "HS DAC", "Line-In amp"
884};
885
886static const struct soc_enum twl6040_hs_enum[] = {
887 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
888 twl6040_hs_texts),
889 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
890 twl6040_hs_texts),
891};
892
893static const char *twl6040_hf_texts[] = {
894 "Off", "HF DAC", "Line-In amp"
895};
896
897static const struct soc_enum twl6040_hf_enum[] = {
898 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
899 twl6040_hf_texts),
900 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
901 twl6040_hf_texts),
902};
903
67c34130
PU
904static const char *twl6040_vibrapath_texts[] = {
905 "Input FF", "Audio PDM"
906};
907
908static const struct soc_enum twl6040_vibra_enum[] = {
909 SOC_ENUM_SINGLE(TWL6040_REG_VIBCTLL, 1,
910 ARRAY_SIZE(twl6040_vibrapath_texts),
911 twl6040_vibrapath_texts),
912 SOC_ENUM_SINGLE(TWL6040_REG_VIBCTLR, 1,
913 ARRAY_SIZE(twl6040_vibrapath_texts),
914 twl6040_vibrapath_texts),
915};
916
8ecbabd9
MLC
917static const struct snd_kcontrol_new amicl_control =
918 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
919
920static const struct snd_kcontrol_new amicr_control =
921 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
922
923/* Headset DAC playback switches */
370a0314
JEC
924static const struct snd_kcontrol_new hsl_mux_controls =
925 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 926
370a0314
JEC
927static const struct snd_kcontrol_new hsr_mux_controls =
928 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
929
930/* Handsfree DAC playback switches */
370a0314
JEC
931static const struct snd_kcontrol_new hfl_mux_controls =
932 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 933
370a0314
JEC
934static const struct snd_kcontrol_new hfr_mux_controls =
935 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 936
317596a6
PU
937static const struct snd_kcontrol_new ep_path_enable_control =
938 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 939
fdb625ff
PU
940static const struct snd_kcontrol_new auxl_switch_control =
941 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
942
943static const struct snd_kcontrol_new auxr_switch_control =
944 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
945
67c34130
PU
946/* Vibra playback switches */
947static const struct snd_kcontrol_new vibral_mux_controls =
948 SOC_DAPM_ENUM_EXT("Route", twl6040_vibra_enum[0],
949 snd_soc_dapm_get_enum_double,
950 twl6040_soc_dapm_put_vibra_enum);
951
952static const struct snd_kcontrol_new vibrar_mux_controls =
953 SOC_DAPM_ENUM_EXT("Route", twl6040_vibra_enum[1],
954 snd_soc_dapm_get_enum_double,
955 twl6040_soc_dapm_put_vibra_enum);
956
6bba63b6 957/* Headset power mode */
7cca6067 958static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC
959 "Low-Power", "High-Perfomance",
960};
961
7cca6067
PU
962static const struct soc_enum twl6040_power_mode_enum =
963 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
964 twl6040_power_mode_texts);
6bba63b6
MLC
965
966static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
967 struct snd_ctl_elem_value *ucontrol)
968{
969 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
970 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
971
972 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
973
974 return 0;
975}
976
977static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
978 struct snd_ctl_elem_value *ucontrol)
979{
980 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
981 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
982 int high_perf = ucontrol->value.enumerated.item[0];
983 int ret = 0;
984
985 if (!priv->hs_power_mode_locked)
986 ret = headset_power_mode(codec, high_perf);
987
988 if (!ret)
989 priv->hs_power_mode = high_perf;
990
991 return ret;
992}
993
af958c72
PU
994static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
995 struct snd_ctl_elem_value *ucontrol)
996{
997 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
998 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
999
1000 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1001
1002 return 0;
1003}
1004
1005static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1006 struct snd_ctl_elem_value *ucontrol)
1007{
1008 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1009 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1010
1011 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU
1012
1013 return 0;
1014}
1015
e48b46ba
LG
1016int twl6040_get_dl1_gain(struct snd_soc_codec *codec)
1017{
1018 struct snd_soc_dapm_context *dapm = &codec->dapm;
1019
1020 if (snd_soc_dapm_get_pin_status(dapm, "EP"))
1021 return -1; /* -1dB */
1022
1023 if (snd_soc_dapm_get_pin_status(dapm, "HSOR") ||
1024 snd_soc_dapm_get_pin_status(dapm, "HSOL")) {
1025
1026 u8 val = snd_soc_read(codec, TWL6040_REG_HSLCTL);
1027 if (val & TWL6040_HSDACMODE)
1028 /* HSDACL in LP mode */
1029 return -8; /* -8dB */
1030 else
1031 /* HSDACL in HP mode */
1032 return -1; /* -1dB */
1033 }
1034 return 0; /* 0dB */
1035}
1036EXPORT_SYMBOL_GPL(twl6040_get_dl1_gain);
1037
af958c72
PU
1038int twl6040_get_clk_id(struct snd_soc_codec *codec)
1039{
1040 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1041
ff593ca1 1042 return priv->pll_power_mode;
af958c72
PU
1043}
1044EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1045
db4aabcc
PU
1046int twl6040_get_trim_value(struct snd_soc_codec *codec, enum twl6040_trim trim)
1047{
1048 if (unlikely(trim >= TWL6040_TRIM_INVAL))
1049 return -EINVAL;
1050
1051 return twl6040_read_reg_cache(codec, TWL6040_REG_TRIM1 + trim);
1052}
1053EXPORT_SYMBOL_GPL(twl6040_get_trim_value);
1054
08656910
LG
1055int twl6040_get_hs_step_size(struct snd_soc_codec *codec)
1056{
1057 struct twl6040 *twl6040 = codec->control_data;
1058
1059 if (twl6040_get_revid(twl6040) < TWL6040_REV_ES1_2)
1060 /* For ES under ES_1.3 HS step is 2 mV */
1061 return 2;
1062 else
1063 /* For ES_1.3 HS step is 1 mV */
1064 return 1;
1065}
1066EXPORT_SYMBOL_GPL(twl6040_get_hs_step_size);
1067
8ecbabd9
MLC
1068static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1069 /* Capture gains */
1070 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1071 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1072 SOC_DOUBLE_TLV("Capture Volume",
1073 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1074
370a0314
JEC
1075 /* AFM gains */
1076 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1077 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1078
8ecbabd9 1079 /* Playback gains */
0f9887d1
PU
1080 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1081 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, twl6040_get_volsw,
1082 twl6040_put_volsw, hs_tlv),
1083 SOC_DOUBLE_R_EXT_TLV("Handsfree Playback Volume",
1084 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1,
1085 twl6040_get_volsw, twl6040_put_volsw, hf_tlv),
871a05a7
JEC
1086 SOC_SINGLE_TLV("Earphone Playback Volume",
1087 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1088
7cca6067 1089 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC
1090 twl6040_headset_power_get_enum,
1091 twl6040_headset_power_put_enum),
af958c72
PU
1092
1093 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1094 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC
1095};
1096
1097static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1098 /* Inputs */
1099 SND_SOC_DAPM_INPUT("MAINMIC"),
1100 SND_SOC_DAPM_INPUT("HSMIC"),
1101 SND_SOC_DAPM_INPUT("SUBMIC"),
1102 SND_SOC_DAPM_INPUT("AFML"),
1103 SND_SOC_DAPM_INPUT("AFMR"),
1104
1105 /* Outputs */
1106 SND_SOC_DAPM_OUTPUT("HSOL"),
1107 SND_SOC_DAPM_OUTPUT("HSOR"),
1108 SND_SOC_DAPM_OUTPUT("HFL"),
1109 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1110 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU
1111 SND_SOC_DAPM_OUTPUT("AUXL"),
1112 SND_SOC_DAPM_OUTPUT("AUXR"),
67c34130
PU
1113 SND_SOC_DAPM_OUTPUT("VIBRAL"),
1114 SND_SOC_DAPM_OUTPUT("VIBRAR"),
8ecbabd9
MLC
1115
1116 /* Analog input muxes for the capture amplifiers */
1117 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1118 SND_SOC_NOPM, 0, 0, &amicl_control),
1119 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1120 SND_SOC_NOPM, 0, 0, &amicr_control),
1121
1122 /* Analog capture PGAs */
1123 SND_SOC_DAPM_PGA("MicAmpL",
1124 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1125 SND_SOC_DAPM_PGA("MicAmpR",
1126 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1127
370a0314
JEC
1128 /* Auxiliary FM PGAs */
1129 SND_SOC_DAPM_PGA("AFMAmpL",
1130 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1131 SND_SOC_DAPM_PGA("AFMAmpR",
1132 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1133
8ecbabd9
MLC
1134 /* ADCs */
1135 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1136 TWL6040_REG_MICLCTL, 2, 0),
1137 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1138 TWL6040_REG_MICRCTL, 2, 0),
1139
1140 /* Microphone bias */
778cee7a
PU
1141 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1142 TWL6040_REG_AMICBCTL, 0, 0, NULL, 0),
1143 SND_SOC_DAPM_SUPPLY("Main Mic Bias",
1144 TWL6040_REG_AMICBCTL, 4, 0, NULL, 0),
1145 SND_SOC_DAPM_SUPPLY("Digital Mic1 Bias",
1146 TWL6040_REG_DMICBCTL, 0, 0, NULL, 0),
1147 SND_SOC_DAPM_SUPPLY("Digital Mic2 Bias",
1148 TWL6040_REG_DMICBCTL, 4, 0, NULL, 0),
8ecbabd9
MLC
1149
1150 /* DACs */
33b6816c
PU
1151 SND_SOC_DAPM_DAC("HSDAC Left", "Headset Playback", SND_SOC_NOPM, 0, 0),
1152 SND_SOC_DAPM_DAC("HSDAC Right", "Headset Playback", SND_SOC_NOPM, 0, 0),
fac2f3e4
PU
1153 SND_SOC_DAPM_DAC("HFDAC Left", "Handsfree Playback",
1154 TWL6040_REG_HFLCTL, 0, 0),
1155 SND_SOC_DAPM_DAC("HFDAC Right", "Handsfree Playback",
1156 TWL6040_REG_HFRCTL, 0, 0),
67c34130
PU
1157 /* Virtual DAC for vibra path (DL4 channel) */
1158 SND_SOC_DAPM_DAC("VIBRA DAC", "Vibra Playback",
1159 SND_SOC_NOPM, 0, 0),
8ecbabd9 1160
df11ce29 1161 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1162 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1163 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC
1164 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1165 /* Analog playback Muxes */
45b0f60d 1166 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1167 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1168 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1169 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1170
67c34130
PU
1171 SND_SOC_DAPM_MUX("Vibra Left Playback", SND_SOC_NOPM, 0, 0,
1172 &vibral_mux_controls),
1173 SND_SOC_DAPM_MUX("Vibra Right Playback", SND_SOC_NOPM, 0, 0,
1174 &vibrar_mux_controls),
1175
317596a6
PU
1176 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1177 &ep_path_enable_control),
fdb625ff
PU
1178 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1179 &auxl_switch_control),
1180 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1181 &auxr_switch_control),
317596a6 1182
0fad4ed7 1183 /* Analog playback drivers */
df11ce29 1184 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1185 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
eb6b71e7 1186 out_drv_event,
1bf84759 1187 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1188 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1189 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
eb6b71e7 1190 out_drv_event,
1bf84759 1191 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1192 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759 1193 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
eb6b71e7 1194 out_drv_event,
1bf84759 1195 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1196 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759 1197 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
eb6b71e7 1198 out_drv_event,
1bf84759 1199 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU
1200 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1201 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
694b0001 1202 twl6040_ep_drv_event,
aa1a4108 1203 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
67c34130
PU
1204 SND_SOC_DAPM_OUT_DRV("Vibra Left Driver",
1205 TWL6040_REG_VIBCTLL, 0, 0, NULL, 0),
1206 SND_SOC_DAPM_OUT_DRV("Vibra Right Driver",
1207 TWL6040_REG_VIBCTLR, 0, 0, NULL, 0),
1208
1209 SND_SOC_DAPM_SUPPLY("Vibra Left Control", TWL6040_REG_VIBCTLL, 2, 0,
1210 NULL, 0),
1211 SND_SOC_DAPM_SUPPLY("Vibra Right Control", TWL6040_REG_VIBCTLR, 2, 0,
1212 NULL, 0),
33b6816c
PU
1213 SND_SOC_DAPM_SUPPLY_S("HSDAC Power", 1, SND_SOC_NOPM, 0, 0,
1214 twl6040_hs_dac_event,
1215 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1216
1217 /* Analog playback PGAs */
df11ce29 1218 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1219 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1220 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC
1221 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1222
1223};
1224
1225static const struct snd_soc_dapm_route intercon[] = {
1226 /* Capture path */
1227 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1228 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1229 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1230
1231 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1232 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1233 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1234
1235 {"MicAmpL", NULL, "Analog Left Capture Route"},
1236 {"MicAmpR", NULL, "Analog Right Capture Route"},
1237
1238 {"ADC Left", NULL, "MicAmpL"},
1239 {"ADC Right", NULL, "MicAmpR"},
1240
370a0314 1241 /* AFM path */
5bf692d9
PU
1242 {"AFMAmpL", NULL, "AFML"},
1243 {"AFMAmpR", NULL, "AFMR"},
370a0314 1244
33b6816c
PU
1245 {"HSDAC Left", NULL, "HSDAC Power"},
1246 {"HSDAC Right", NULL, "HSDAC Power"},
1247
45b0f60d
PU
1248 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1249 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1250
45b0f60d
PU
1251 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1252 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1253
45b0f60d
PU
1254 {"HS Left Driver", NULL, "Headset Left Playback"},
1255 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1256
45b0f60d
PU
1257 {"HSOL", NULL, "HS Left Driver"},
1258 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1259
871a05a7 1260 /* Earphone playback path */
317596a6
PU
1261 {"Earphone Playback", "Switch", "HSDAC Left"},
1262 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC
1263 {"EP", NULL, "Earphone Driver"},
1264
df11ce29
PU
1265 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1266 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1267
df11ce29
PU
1268 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1269 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1270
df11ce29
PU
1271 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1272 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1273
df11ce29
PU
1274 {"HF Left Driver", NULL, "HF Left PGA"},
1275 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1276
df11ce29
PU
1277 {"HFL", NULL, "HF Left Driver"},
1278 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU
1279
1280 {"AUXL Playback", "Switch", "HF Left PGA"},
1281 {"AUXR Playback", "Switch", "HF Right PGA"},
1282
1283 {"AUXL", NULL, "AUXL Playback"},
1284 {"AUXR", NULL, "AUXR Playback"},
67c34130
PU
1285
1286 /* Vibrator paths */
1287 {"Vibra Left Playback", "Audio PDM", "VIBRA DAC"},
1288 {"Vibra Right Playback", "Audio PDM", "VIBRA DAC"},
1289
1290 {"Vibra Left Driver", NULL, "Vibra Left Playback"},
1291 {"Vibra Right Driver", NULL, "Vibra Right Playback"},
1292 {"Vibra Left Driver", NULL, "Vibra Left Control"},
1293 {"Vibra Right Driver", NULL, "Vibra Right Control"},
1294
1295 {"VIBRAL", NULL, "Vibra Left Driver"},
1296 {"VIBRAR", NULL, "Vibra Right Driver"},
8ecbabd9
MLC
1297};
1298
8ecbabd9
MLC
1299static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1300 enum snd_soc_bias_level level)
1301{
fb34d3d5 1302 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1303 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1304 int ret;
1305
1306 switch (level) {
1307 case SND_SOC_BIAS_ON:
1308 break;
1309 case SND_SOC_BIAS_PREPARE:
1310 break;
1311 case SND_SOC_BIAS_STANDBY:
1312 if (priv->codec_powered)
1313 break;
1314
fb34d3d5
MLC
1315 ret = twl6040_power(twl6040, 1);
1316 if (ret)
1317 return ret;
8ecbabd9 1318
fb34d3d5 1319 priv->codec_powered = 1;
8ecbabd9 1320
a52762ee 1321 twl6040_restore_regs(codec);
65b7cecc
OM
1322
1323 /* Set external boost GPO */
1324 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1325 break;
1326 case SND_SOC_BIAS_OFF:
1327 if (!priv->codec_powered)
1328 break;
1329
fb34d3d5 1330 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1331 priv->codec_powered = 0;
1332 break;
1333 }
1334
ce6120cc 1335 codec->dapm.bias_level = level;
8ecbabd9
MLC
1336
1337 return 0;
1338}
1339
8ecbabd9
MLC
1340static int twl6040_startup(struct snd_pcm_substream *substream,
1341 struct snd_soc_dai *dai)
1342{
e6968a17 1343 struct snd_soc_codec *codec = dai->codec;
d4a8ca24 1344 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1345
8ecbabd9
MLC
1346 snd_pcm_hw_constraint_list(substream->runtime, 0,
1347 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1348 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC
1349
1350 return 0;
1351}
1352
1353static int twl6040_hw_params(struct snd_pcm_substream *substream,
1354 struct snd_pcm_hw_params *params,
1355 struct snd_soc_dai *dai)
1356{
e6968a17 1357 struct snd_soc_codec *codec = dai->codec;
d4a8ca24 1358 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1359 int rate;
1360
8ecbabd9
MLC
1361 rate = params_rate(params);
1362 switch (rate) {
60ea4cec
OM
1363 case 11250:
1364 case 22500:
1365 case 44100:
8ecbabd9 1366 case 88200:
753621c2
PU
1367 /* These rates are not supported when HPPLL is in use */
1368 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1369 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1370 rate);
1371 return -EINVAL;
1372 }
8ecbabd9
MLC
1373 priv->sysclk = 17640000;
1374 break;
60ea4cec
OM
1375 case 8000:
1376 case 16000:
1377 case 32000:
1378 case 48000:
8ecbabd9 1379 case 96000:
8ecbabd9
MLC
1380 priv->sysclk = 19200000;
1381 break;
1382 default:
1383 dev_err(codec->dev, "unsupported rate %d\n", rate);
1384 return -EINVAL;
1385 }
1386
8ecbabd9
MLC
1387 return 0;
1388}
1389
4e624d06
OM
1390static int twl6040_prepare(struct snd_pcm_substream *substream,
1391 struct snd_soc_dai *dai)
8ecbabd9 1392{
e6968a17 1393 struct snd_soc_codec *codec = dai->codec;
753621c2 1394 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1395 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1396 int ret;
8ecbabd9 1397
4e624d06
OM
1398 if (!priv->sysclk) {
1399 dev_err(codec->dev,
1400 "no mclk configured, call set_sysclk() on init\n");
1401 return -EINVAL;
1402 }
1403
753621c2
PU
1404 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1405 if (ret) {
1406 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1407 return -EPERM;
1408 }
1409
8ecbabd9
MLC
1410 return 0;
1411}
1412
1413static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1414 int clk_id, unsigned int freq, int dir)
1415{
1416 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1417 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1418
1419 switch (clk_id) {
1420 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1421 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU
1422 priv->pll = clk_id;
1423 priv->clk_in = freq;
8ecbabd9
MLC
1424 break;
1425 default:
1426 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1427 return -EINVAL;
1428 }
1429
1430 return 0;
1431}
1432
85e7652d 1433static const struct snd_soc_dai_ops twl6040_dai_ops = {
8ecbabd9
MLC
1434 .startup = twl6040_startup,
1435 .hw_params = twl6040_hw_params,
4e624d06 1436 .prepare = twl6040_prepare,
8ecbabd9
MLC
1437 .set_sysclk = twl6040_set_dai_sysclk,
1438};
1439
6510bdc3 1440static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1441{
d13f1fe0 1442 .name = "twl6040-legacy",
8ecbabd9
MLC
1443 .playback = {
1444 .stream_name = "Playback",
1445 .channels_min = 1,
cdd5054c 1446 .channels_max = 5,
21385eeb
PU
1447 .rates = TWL6040_RATES,
1448 .formats = TWL6040_FORMATS,
1449 },
1450 .capture = {
1451 .stream_name = "Capture",
1452 .channels_min = 1,
1453 .channels_max = 2,
8ecbabd9
MLC
1454 .rates = TWL6040_RATES,
1455 .formats = TWL6040_FORMATS,
1456 },
21385eeb
PU
1457 .ops = &twl6040_dai_ops,
1458},
6510bdc3
LG
1459{
1460 .name = "twl6040-ul",
8ecbabd9
MLC
1461 .capture = {
1462 .stream_name = "Capture",
1463 .channels_min = 1,
1464 .channels_max = 2,
1465 .rates = TWL6040_RATES,
1466 .formats = TWL6040_FORMATS,
1467 },
1468 .ops = &twl6040_dai_ops,
6510bdc3
LG
1469},
1470{
1471 .name = "twl6040-dl1",
8ecbabd9 1472 .playback = {
6510bdc3 1473 .stream_name = "Headset Playback",
8ecbabd9 1474 .channels_min = 1,
6510bdc3 1475 .channels_max = 2,
8ecbabd9
MLC
1476 .rates = TWL6040_RATES,
1477 .formats = TWL6040_FORMATS,
1478 },
6510bdc3
LG
1479 .ops = &twl6040_dai_ops,
1480},
1481{
1482 .name = "twl6040-dl2",
1483 .playback = {
1484 .stream_name = "Handsfree Playback",
8ecbabd9
MLC
1485 .channels_min = 1,
1486 .channels_max = 2,
1487 .rates = TWL6040_RATES,
1488 .formats = TWL6040_FORMATS,
1489 },
1490 .ops = &twl6040_dai_ops,
6510bdc3
LG
1491},
1492{
1493 .name = "twl6040-vib",
1494 .playback = {
1495 .stream_name = "Vibra Playback",
d8dd032d
PU
1496 .channels_min = 1,
1497 .channels_max = 1,
6510bdc3
LG
1498 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1499 .formats = TWL6040_FORMATS,
1500 },
1501 .ops = &twl6040_dai_ops,
1502},
8ecbabd9 1503};
8ecbabd9
MLC
1504
1505#ifdef CONFIG_PM
84b315ee 1506static int twl6040_suspend(struct snd_soc_codec *codec)
8ecbabd9 1507{
8ecbabd9
MLC
1508 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1509
1510 return 0;
1511}
1512
f0fba2ad 1513static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1514{
8ecbabd9 1515 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1516 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1517
1518 return 0;
1519}
1520#else
1521#define twl6040_suspend NULL
1522#define twl6040_resume NULL
1523#endif
1524
f0fba2ad 1525static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1526{
8ecbabd9 1527 struct twl6040_data *priv;
1fbe9952 1528 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU
1529 struct platform_device *pdev = container_of(codec->dev,
1530 struct platform_device, dev);
8ecbabd9
MLC
1531 int ret = 0;
1532
1533 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1534 if (priv == NULL)
1535 return -ENOMEM;
f0fba2ad 1536 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1537
a2d2362e 1538 priv->codec = codec;
fb34d3d5 1539 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1540
1fbe9952
ACG
1541 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1542 priv->hs_left_step = pdata->hs_left_step;
1543 priv->hs_right_step = pdata->hs_right_step;
1544 } else {
1545 priv->hs_left_step = 1;
1546 priv->hs_right_step = 1;
1547 }
99903ea2 1548
1fbe9952
ACG
1549 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1550 priv->hf_left_step = pdata->hf_left_step;
1551 priv->hf_right_step = pdata->hf_right_step;
1552 } else {
1553 priv->hf_left_step = 1;
1554 priv->hf_right_step = 1;
1555 }
99903ea2 1556
2a433b9d
PU
1557 priv->plug_irq = platform_get_irq(pdev, 0);
1558 if (priv->plug_irq < 0) {
1559 dev_err(codec->dev, "invalid irq\n");
1560 ret = -EINVAL;
1561 goto work_err;
1562 }
8ecbabd9 1563
a46737ae 1564 priv->workqueue = alloc_workqueue("twl6040-codec", 0, 0);
19aab08d
AL
1565 if (!priv->workqueue) {
1566 ret = -ENOMEM;
a2d2362e 1567 goto work_err;
19aab08d 1568 }
a2d2362e 1569
46dd0b93 1570 INIT_DELAYED_WORK(&priv->hs_jack.work, twl6040_accessory_work);
a46737ae
PU
1571 INIT_DELAYED_WORK(&priv->headset.work, twl6040_pga_hs_work);
1572 INIT_DELAYED_WORK(&priv->handsfree.work, twl6040_pga_hf_work);
a2d2362e
JEC
1573
1574 mutex_init(&priv->mutex);
8ecbabd9 1575
1bf84759
MOC
1576 init_completion(&priv->headset.ramp_done);
1577 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1578
2a433b9d
PU
1579 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1580 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC
1581 if (ret) {
1582 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1583 goto plugirq_err;
1584 }
1585
a52762ee 1586 twl6040_init_chip(codec);
fb34d3d5 1587
8ecbabd9
MLC
1588 /* power on device */
1589 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
a175fce0
PU
1590 if (!ret)
1591 return 0;
8ecbabd9 1592
a175fce0 1593 /* Error path */
2a433b9d 1594 free_irq(priv->plug_irq, codec);
fb34d3d5 1595plugirq_err:
a2d2362e
JEC
1596 destroy_workqueue(priv->workqueue);
1597work_err:
8ecbabd9
MLC
1598 kfree(priv);
1599 return ret;
1600}
1601
f0fba2ad 1602static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1603{
f0fba2ad 1604 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1605
f0fba2ad 1606 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1607 free_irq(priv->plug_irq, codec);
a2d2362e 1608 destroy_workqueue(priv->workqueue);
f0fba2ad 1609 kfree(priv);
8ecbabd9 1610
f0fba2ad
LG
1611 return 0;
1612}
8ecbabd9 1613
f0fba2ad
LG
1614static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1615 .probe = twl6040_probe,
1616 .remove = twl6040_remove,
1617 .suspend = twl6040_suspend,
1618 .resume = twl6040_resume,
1619 .read = twl6040_read_reg_cache,
1620 .write = twl6040_write,
1621 .set_bias_level = twl6040_set_bias_level,
1622 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1623 .reg_word_size = sizeof(u8),
1624 .reg_cache_default = twl6040_reg,
a5d3a21a 1625 .ignore_pmdown_time = true,
a175fce0
PU
1626
1627 .controls = twl6040_snd_controls,
1628 .num_controls = ARRAY_SIZE(twl6040_snd_controls),
1629 .dapm_widgets = twl6040_dapm_widgets,
1630 .num_dapm_widgets = ARRAY_SIZE(twl6040_dapm_widgets),
1631 .dapm_routes = intercon,
1632 .num_dapm_routes = ARRAY_SIZE(intercon),
f0fba2ad
LG
1633};
1634
1635static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1636{
6510bdc3
LG
1637 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1638 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG
1639}
1640
1641static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1642{
1643 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC
1644 return 0;
1645}
1646
1647static struct platform_driver twl6040_codec_driver = {
1648 .driver = {
f0fba2ad 1649 .name = "twl6040-codec",
8ecbabd9
MLC
1650 .owner = THIS_MODULE,
1651 },
1652 .probe = twl6040_codec_probe,
1653 .remove = __devexit_p(twl6040_codec_remove),
1654};
1655
5bbcc3c0 1656module_platform_driver(twl6040_codec_driver);
8ecbabd9
MLC
1657
1658MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1659MODULE_AUTHOR("Misael Lopez Cruz");
1660MODULE_LICENSE("GPL");
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