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ASoC: twl6040: Move delayed_work struct inside twl6040_output for HS/HF
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC		 1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
8ecbabd9
MLC		 31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
8ecbabd9
MLC		 36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
1bf84759
MOC		 42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
d17bf318
PU		 60/* Shadow register used by the driver */
61#define TWL6040_REG_SW_SHADOW 0x2F
62#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
63
317596a6
PU		 64/* TWL6040_REG_SW_SHADOW (0x2F) fields */
65#define TWL6040_EAR_PATH_ENABLE 0x01
66
1bf84759
MOC		 67struct twl6040_output {
68 u16 active;
69 u16 left_vol;
70 u16 right_vol;
71 u16 left_step;
72 u16 right_step;
73 unsigned int step_delay;
74 u16 ramp;
e71a5e5a 75 struct delayed_work work;
1bf84759
MOC		 76 struct completion ramp_done;
77};
8ecbabd9 78
a2d2362e
JEC		 79struct twl6040_jack_data {
80 struct snd_soc_jack *jack;
81 int report;
82};
83
8ecbabd9
MLC		 84/* codec private data */
85struct twl6040_data {
2a433b9d 86 int plug_irq;
8ecbabd9
MLC		 87 int codec_powered;
88 int pll;
89 int non_lp;
af958c72 90 int pll_power_mode;
6bba63b6
MLC		 91 int hs_power_mode;
92 int hs_power_mode_locked;
fb34d3d5 93 unsigned int clk_in;
8ecbabd9 94 unsigned int sysclk;
1fbe9952
ACG		 95 u16 hs_left_step;
96 u16 hs_right_step;
97 u16 hf_left_step;
98 u16 hf_right_step;
a2d2362e
JEC		 99 struct twl6040_jack_data hs_jack;
100 struct snd_soc_codec *codec;
101 struct workqueue_struct *workqueue;
102 struct delayed_work delayed_work;
103 struct mutex mutex;
1bf84759
MOC		 104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
106 struct workqueue_struct *hf_workqueue;
107 struct workqueue_struct *hs_workqueue;
8ecbabd9
MLC		 108};
109
110/*
111 * twl6040 register cache & default register settings
112 */
113static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU		 114 0x00, /* not used 0x00 */
115 0x4B, /* REG_ASICID 0x01 (ro) */
116 0x00, /* REG_ASICREV 0x02 (ro) */
117 0x00, /* REG_INTID 0x03 */
118 0x00, /* REG_INTMR 0x04 */
119 0x00, /* REG_NCPCTRL 0x05 */
120 0x00, /* REG_LDOCTL 0x06 */
121 0x60, /* REG_HPPLLCTL 0x07 */
122 0x00, /* REG_LPPLLCTL 0x08 */
123 0x4A, /* REG_LPPLLDIV 0x09 */
124 0x00, /* REG_AMICBCTL 0x0A */
125 0x00, /* REG_DMICBCTL 0x0B */
126 0x00, /* REG_MICLCTL 0x0C */
127 0x00, /* REG_MICRCTL 0x0D */
128 0x00, /* REG_MICGAIN 0x0E */
129 0x1B, /* REG_LINEGAIN 0x0F */
130 0x00, /* REG_HSLCTL 0x10 */
131 0x00, /* REG_HSRCTL 0x11 */
132 0x00, /* REG_HSGAIN 0x12 */
133 0x00, /* REG_EARCTL 0x13 */
134 0x00, /* REG_HFLCTL 0x14 */
135 0x00, /* REG_HFLGAIN 0x15 */
136 0x00, /* REG_HFRCTL 0x16 */
137 0x00, /* REG_HFRGAIN 0x17 */
138 0x00, /* REG_VIBCTLL 0x18 */
139 0x00, /* REG_VIBDATL 0x19 */
140 0x00, /* REG_VIBCTLR 0x1A */
141 0x00, /* REG_VIBDATR 0x1B */
142 0x00, /* REG_HKCTL1 0x1C */
143 0x00, /* REG_HKCTL2 0x1D */
144 0x00, /* REG_GPOCTL 0x1E */
145 0x00, /* REG_ALB 0x1F */
146 0x00, /* REG_DLB 0x20 */
147 0x00, /* not used 0x21 */
148 0x00, /* not used 0x22 */
149 0x00, /* not used 0x23 */
150 0x00, /* not used 0x24 */
151 0x00, /* not used 0x25 */
152 0x00, /* not used 0x26 */
153 0x00, /* not used 0x27 */
154 0x00, /* REG_TRIM1 0x28 */
155 0x00, /* REG_TRIM2 0x29 */
156 0x00, /* REG_TRIM3 0x2A */
157 0x00, /* REG_HSOTRIM 0x2B */
158 0x00, /* REG_HFOTRIM 0x2C */
159 0x09, /* REG_ACCCTL 0x2D */
160 0x00, /* REG_STATUS 0x2E (ro) */
d17bf318
PU		 161
162 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
8ecbabd9
MLC		 163};
164
a52762ee
PU		 165/* List of registers to be restored after power up */
166static const int twl6040_restore_list[] = {
8ecbabd9
MLC		 167 TWL6040_REG_MICLCTL,
168 TWL6040_REG_MICRCTL,
169 TWL6040_REG_MICGAIN,
170 TWL6040_REG_LINEGAIN,
171 TWL6040_REG_HSLCTL,
172 TWL6040_REG_HSRCTL,
173 TWL6040_REG_HSGAIN,
174 TWL6040_REG_EARCTL,
175 TWL6040_REG_HFLCTL,
176 TWL6040_REG_HFLGAIN,
177 TWL6040_REG_HFRCTL,
178 TWL6040_REG_HFRGAIN,
8ecbabd9
MLC		 179};
180
af958c72
PU		 181/* set of rates for each pll: low-power and high-performance */
182static unsigned int lp_rates[] = {
183 8000,
184 11250,
185 16000,
186 22500,
187 32000,
188 44100,
189 48000,
190 88200,
191 96000,
192};
193
af958c72
PU		 194static unsigned int hp_rates[] = {
195 8000,
196 16000,
197 32000,
198 48000,
199 96000,
200};
201
f53c346c
PU		 202static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
203 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
204 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU		 205};
206
8ecbabd9
MLC		 207/*
208 * read twl6040 register cache
209 */
210static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
211 unsigned int reg)
212{
213 u8 *cache = codec->reg_cache;
214
215 if (reg >= TWL6040_CACHEREGNUM)
216 return -EIO;
217
218 return cache[reg];
219}
220
221/*
222 * write twl6040 register cache
223 */
224static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
225 u8 reg, u8 value)
226{
227 u8 *cache = codec->reg_cache;
228
229 if (reg >= TWL6040_CACHEREGNUM)
230 return;
231 cache[reg] = value;
232}
233
234/*
235 * read from twl6040 hardware register
236 */
237static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
238 unsigned int reg)
239{
fb34d3d5 240 struct twl6040 *twl6040 = codec->control_data;
8ecbabd9
MLC		 241 u8 value;
242
243 if (reg >= TWL6040_CACHEREGNUM)
244 return -EIO;
245
d17bf318
PU		 246 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
247 value = twl6040_reg_read(twl6040, reg);
248 twl6040_write_reg_cache(codec, reg, value);
249 } else {
250 value = twl6040_read_reg_cache(codec, reg);
251 }
8ecbabd9
MLC		 252
253 return value;
254}
255
256/*
257 * write to the twl6040 register space
258 */
259static int twl6040_write(struct snd_soc_codec *codec,
260 unsigned int reg, unsigned int value)
261{
fb34d3d5
MLC		 262 struct twl6040 *twl6040 = codec->control_data;
263
8ecbabd9
MLC		 264 if (reg >= TWL6040_CACHEREGNUM)
265 return -EIO;
266
267 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU		 268 if (likely(reg < TWL6040_REG_SW_SHADOW))
269 return twl6040_reg_write(twl6040, reg, value);
270 else
271 return 0;
8ecbabd9
MLC		 272}
273
a52762ee 274static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 275{
a52762ee
PU		 276 struct twl6040 *twl6040 = codec->control_data;
277 u8 val;
278
f97217f1 279 /* Update reg_cache: ASICREV, and TRIM values */
a52762ee
PU		 280 val = twl6040_get_revid(twl6040);
281 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 282
f97217f1
PU		 283 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1);
284 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2);
285 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3);
286 twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM);
287 twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM);
288
2c27ff41
PU		 289 /* Change chip defaults */
290 /* No imput selected for microphone amplifiers */
291 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
292 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU		 293
294 /*
295 * We need to lower the default gain values, so the ramp code
296 * can work correctly for the first playback.
297 * This reduces the pop noise heard at the first playback.
298 */
299 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
300 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
301 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
302 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
303 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
8ecbabd9
MLC		 304}
305
a52762ee 306static void twl6040_restore_regs(struct snd_soc_codec *codec)
8ecbabd9
MLC		 307{
308 u8 *cache = codec->reg_cache;
309 int reg, i;
310
a52762ee
PU		 311 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
312 reg = twl6040_restore_list[i];
8ecbabd9
MLC		 313 twl6040_write(codec, reg, cache[reg]);
314 }
315}
316
1bf84759
MOC		 317/*
318 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
319 */
320static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
321 unsigned int left_step, unsigned int right_step)
322{
323
324 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
325 struct twl6040_output *headset = &priv->headset;
326 int left_complete = 0, right_complete = 0;
327 u8 reg, val;
328
329 /* left channel */
330 left_step = (left_step > 0xF) ? 0xF : left_step;
331 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
332 val = (~reg & TWL6040_HSL_VOL_MASK);
333
334 if (headset->ramp == TWL6040_RAMP_UP) {
335 /* ramp step up */
336 if (val < headset->left_vol) {
1fbe9952
ACG		 337 if (val + left_step > headset->left_vol)
338 val = headset->left_vol;
339 else
340 val += left_step;
341
1bf84759
MOC		 342 reg &= ~TWL6040_HSL_VOL_MASK;
343 twl6040_write(codec, TWL6040_REG_HSGAIN,
344 (reg | (~val & TWL6040_HSL_VOL_MASK)));
345 } else {
346 left_complete = 1;
347 }
348 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
349 /* ramp step down */
350 if (val > 0x0) {
1fbe9952
ACG		 351 if ((int)val - (int)left_step < 0)
352 val = 0;
353 else
354 val -= left_step;
355
1bf84759
MOC		 356 reg &= ~TWL6040_HSL_VOL_MASK;
357 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
358 (~val & TWL6040_HSL_VOL_MASK));
359 } else {
360 left_complete = 1;
361 }
362 }
363
364 /* right channel */
365 right_step = (right_step > 0xF) ? 0xF : right_step;
366 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
367 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
368
369 if (headset->ramp == TWL6040_RAMP_UP) {
370 /* ramp step up */
371 if (val < headset->right_vol) {
1fbe9952
ACG		 372 if (val + right_step > headset->right_vol)
373 val = headset->right_vol;
374 else
375 val += right_step;
376
1bf84759
MOC		 377 reg &= ~TWL6040_HSR_VOL_MASK;
378 twl6040_write(codec, TWL6040_REG_HSGAIN,
379 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
380 } else {
381 right_complete = 1;
382 }
383 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
384 /* ramp step down */
385 if (val > 0x0) {
1fbe9952
ACG		 386 if ((int)val - (int)right_step < 0)
387 val = 0;
388 else
389 val -= right_step;
390
1bf84759
MOC		 391 reg &= ~TWL6040_HSR_VOL_MASK;
392 twl6040_write(codec, TWL6040_REG_HSGAIN,
393 reg | (~val << TWL6040_HSR_VOL_SHIFT));
394 } else {
395 right_complete = 1;
396 }
397 }
398
399 return left_complete & right_complete;
400}
401
402/*
403 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
404 */
405static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
406 unsigned int left_step, unsigned int right_step)
407{
408 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
409 struct twl6040_output *handsfree = &priv->handsfree;
410 int left_complete = 0, right_complete = 0;
411 u16 reg, val;
412
413 /* left channel */
414 left_step = (left_step > 0x1D) ? 0x1D : left_step;
415 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
416 reg = 0x1D - reg;
417 val = (reg & TWL6040_HF_VOL_MASK);
418 if (handsfree->ramp == TWL6040_RAMP_UP) {
419 /* ramp step up */
420 if (val < handsfree->left_vol) {
1fbe9952
ACG		 421 if (val + left_step > handsfree->left_vol)
422 val = handsfree->left_vol;
423 else
424 val += left_step;
425
1bf84759
MOC		 426 reg &= ~TWL6040_HF_VOL_MASK;
427 twl6040_write(codec, TWL6040_REG_HFLGAIN,
428 reg | (0x1D - val));
429 } else {
430 left_complete = 1;
431 }
432 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
433 /* ramp step down */
434 if (val > 0) {
1fbe9952
ACG		 435 if ((int)val - (int)left_step < 0)
436 val = 0;
437 else
438 val -= left_step;
439
1bf84759
MOC		 440 reg &= ~TWL6040_HF_VOL_MASK;
441 twl6040_write(codec, TWL6040_REG_HFLGAIN,
442 reg | (0x1D - val));
443 } else {
444 left_complete = 1;
445 }
446 }
447
448 /* right channel */
449 right_step = (right_step > 0x1D) ? 0x1D : right_step;
450 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
451 reg = 0x1D - reg;
452 val = (reg & TWL6040_HF_VOL_MASK);
453 if (handsfree->ramp == TWL6040_RAMP_UP) {
454 /* ramp step up */
455 if (val < handsfree->right_vol) {
1fbe9952
ACG		 456 if (val + right_step > handsfree->right_vol)
457 val = handsfree->right_vol;
458 else
459 val += right_step;
460
1bf84759
MOC		 461 reg &= ~TWL6040_HF_VOL_MASK;
462 twl6040_write(codec, TWL6040_REG_HFRGAIN,
463 reg | (0x1D - val));
464 } else {
465 right_complete = 1;
466 }
467 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
468 /* ramp step down */
469 if (val > 0) {
1fbe9952
ACG		 470 if ((int)val - (int)right_step < 0)
471 val = 0;
472 else
473 val -= right_step;
474
1bf84759
MOC		 475 reg &= ~TWL6040_HF_VOL_MASK;
476 twl6040_write(codec, TWL6040_REG_HFRGAIN,
477 reg | (0x1D - val));
478 }
479 }
480
481 return left_complete & right_complete;
482}
483
484/*
485 * This work ramps both output PGAs at stream start/stop time to
486 * minimise pop associated with DAPM power switching.
487 */
488static void twl6040_pga_hs_work(struct work_struct *work)
489{
490 struct twl6040_data *priv =
e71a5e5a 491 container_of(work, struct twl6040_data, headset.work.work);
1bf84759
MOC		 492 struct snd_soc_codec *codec = priv->codec;
493 struct twl6040_output *headset = &priv->headset;
494 unsigned int delay = headset->step_delay;
495 int i, headset_complete;
496
497 /* do we need to ramp at all ? */
498 if (headset->ramp == TWL6040_RAMP_NONE)
499 return;
500
501 /* HS PGA volumes have 4 bits of resolution to ramp */
502 for (i = 0; i <= 16; i++) {
1fbe9952
ACG		 503 headset_complete = twl6040_hs_ramp_step(codec,
504 headset->left_step,
505 headset->right_step);
1bf84759
MOC		 506
507 /* ramp finished ? */
508 if (headset_complete)
509 break;
510
511 /*
512 * TODO: tune: delay is longer over 0dB
513 * as increases are larger.
514 */
515 if (i >= 8)
516 schedule_timeout_interruptible(msecs_to_jiffies(delay +
517 (delay >> 1)));
518 else
519 schedule_timeout_interruptible(msecs_to_jiffies(delay));
520 }
521
522 if (headset->ramp == TWL6040_RAMP_DOWN) {
523 headset->active = 0;
524 complete(&headset->ramp_done);
525 } else {
526 headset->active = 1;
527 }
528 headset->ramp = TWL6040_RAMP_NONE;
529}
530
531static void twl6040_pga_hf_work(struct work_struct *work)
532{
533 struct twl6040_data *priv =
e71a5e5a 534 container_of(work, struct twl6040_data, handsfree.work.work);
1bf84759
MOC		 535 struct snd_soc_codec *codec = priv->codec;
536 struct twl6040_output *handsfree = &priv->handsfree;
537 unsigned int delay = handsfree->step_delay;
538 int i, handsfree_complete;
539
540 /* do we need to ramp at all ? */
541 if (handsfree->ramp == TWL6040_RAMP_NONE)
542 return;
543
544 /* HF PGA volumes have 5 bits of resolution to ramp */
545 for (i = 0; i <= 32; i++) {
1fbe9952
ACG		 546 handsfree_complete = twl6040_hf_ramp_step(codec,
547 handsfree->left_step,
548 handsfree->right_step);
1bf84759
MOC		 549
550 /* ramp finished ? */
551 if (handsfree_complete)
552 break;
553
554 /*
555 * TODO: tune: delay is longer over 0dB
556 * as increases are larger.
557 */
558 if (i >= 16)
559 schedule_timeout_interruptible(msecs_to_jiffies(delay +
560 (delay >> 1)));
561 else
562 schedule_timeout_interruptible(msecs_to_jiffies(delay));
563 }
564
565
566 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
567 handsfree->active = 0;
568 complete(&handsfree->ramp_done);
569 } else
570 handsfree->active = 1;
571 handsfree->ramp = TWL6040_RAMP_NONE;
572}
573
eb6b71e7 574static int out_drv_event(struct snd_soc_dapm_widget *w,
1bf84759
MOC		 575 struct snd_kcontrol *kcontrol, int event)
576{
577 struct snd_soc_codec *codec = w->codec;
578 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
579 struct twl6040_output *out;
580 struct delayed_work *work;
581 struct workqueue_struct *queue;
582
583 switch (w->shift) {
584 case 2:
585 case 3:
586 out = &priv->headset;
1bf84759 587 queue = priv->hs_workqueue;
1fbe9952
ACG		 588 out->left_step = priv->hs_left_step;
589 out->right_step = priv->hs_right_step;
1bf84759
MOC		 590 out->step_delay = 5; /* 5 ms between volume ramp steps */
591 break;
592 case 4:
593 out = &priv->handsfree;
1bf84759 594 queue = priv->hf_workqueue;
1fbe9952
ACG		 595 out->left_step = priv->hf_left_step;
596 out->right_step = priv->hf_right_step;
1bf84759
MOC		 597 out->step_delay = 5; /* 5 ms between volume ramp steps */
598 if (SND_SOC_DAPM_EVENT_ON(event))
599 priv->non_lp++;
600 else
601 priv->non_lp--;
602 break;
603 default:
604 return -1;
605 }
606
e71a5e5a
PU		 607 work = &out->work;
608
1bf84759
MOC		 609 switch (event) {
610 case SND_SOC_DAPM_POST_PMU:
611 if (out->active)
612 break;
613
614 /* don't use volume ramp for power-up */
615 out->left_step = out->left_vol;
616 out->right_step = out->right_vol;
617
618 if (!delayed_work_pending(work)) {
619 out->ramp = TWL6040_RAMP_UP;
620 queue_delayed_work(queue, work,
621 msecs_to_jiffies(1));
622 }
623 break;
624
625 case SND_SOC_DAPM_PRE_PMD:
626 if (!out->active)
627 break;
628
629 if (!delayed_work_pending(work)) {
630 /* use volume ramp for power-down */
1bf84759
MOC		 631 out->ramp = TWL6040_RAMP_DOWN;
632 INIT_COMPLETION(out->ramp_done);
633
634 queue_delayed_work(queue, work,
635 msecs_to_jiffies(1));
636
637 wait_for_completion_timeout(&out->ramp_done,
638 msecs_to_jiffies(2000));
639 }
640 break;
641 }
642
643 return 0;
644}
645
8ecbabd9
MLC		 646/* set headset dac and driver power mode */
647static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
648{
649 int hslctl, hsrctl;
ab6cf139 650 int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
8ecbabd9
MLC		 651
652 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
653 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
654
655 if (high_perf) {
656 hslctl &= ~mask;
657 hsrctl &= ~mask;
658 } else {
659 hslctl |= mask;
660 hsrctl |= mask;
661 }
662
663 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
664 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
665
666 return 0;
667}
668
0fad4ed7
JEC		 669static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
670 struct snd_kcontrol *kcontrol, int event)
671{
672 msleep(1);
673 return 0;
674}
675
8ecbabd9
MLC		 676static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
677 struct snd_kcontrol *kcontrol, int event)
678{
679 struct snd_soc_codec *codec = w->codec;
d4a8ca24 680 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 681 int ret = 0;
8ecbabd9 682
6bba63b6 683 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 684 priv->non_lp++;
6bba63b6
MLC		 685 if (!strcmp(w->name, "Earphone Driver")) {
686 /* Earphone doesn't support low power mode */
687 priv->hs_power_mode_locked = 1;
688 ret = headset_power_mode(codec, 1);
689 }
690 } else {
8ecbabd9 691 priv->non_lp--;
6bba63b6
MLC		 692 if (!strcmp(w->name, "Earphone Driver")) {
693 priv->hs_power_mode_locked = 0;
694 ret = headset_power_mode(codec, priv->hs_power_mode);
695 }
696 }
8ecbabd9 697
0fad4ed7
JEC		 698 msleep(1);
699
6bba63b6 700 return ret;
8ecbabd9
MLC		 701}
702
64ed9836
MB		 703static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
704 struct snd_soc_jack *jack, int report)
a2d2362e
JEC		 705{
706 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
707 int status;
708
709 mutex_lock(&priv->mutex);
710
711 /* Sync status */
712 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
713 if (status & TWL6040_PLUGCOMP)
714 snd_soc_jack_report(jack, report, report);
715 else
716 snd_soc_jack_report(jack, 0, report);
717
718 mutex_unlock(&priv->mutex);
719}
720
721void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
722 struct snd_soc_jack *jack, int report)
723{
724 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
725 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
726
727 hs_jack->jack = jack;
728 hs_jack->report = report;
729
730 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
731}
732EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
733
734static void twl6040_accessory_work(struct work_struct *work)
735{
736 struct twl6040_data *priv = container_of(work,
737 struct twl6040_data, delayed_work.work);
738 struct snd_soc_codec *codec = priv->codec;
739 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
740
741 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
742}
743
8ecbabd9 744/* audio interrupt handler */
fb34d3d5 745static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC		 746{
747 struct snd_soc_codec *codec = data;
d4a8ca24 748 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
cf370a5a 749
f34c6606
PU		 750 queue_delayed_work(priv->workqueue, &priv->delayed_work,
751 msecs_to_jiffies(200));
cf370a5a 752
8ecbabd9
MLC		 753 return IRQ_HANDLED;
754}
755
1bf84759
MOC		 756static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
757 struct snd_ctl_elem_value *ucontrol)
758{
759 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
760 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
761 struct twl6040_output *out = NULL;
762 struct soc_mixer_control *mc =
763 (struct soc_mixer_control *)kcontrol->private_value;
764 int ret;
1bf84759
MOC		 765
766 /* For HS and HF we shadow the values and only actually write
767 * them out when active in order to ensure the amplifier comes on
768 * as quietly as possible. */
a8cc7189 769 switch (mc->reg) {
1bf84759
MOC		 770 case TWL6040_REG_HSGAIN:
771 out = &twl6040_priv->headset;
772 break;
a8cc7189
PU		 773 case TWL6040_REG_HFLGAIN:
774 out = &twl6040_priv->handsfree;
775 break;
1bf84759
MOC		 776 default:
777 break;
778 }
779
780 if (out) {
781 out->left_vol = ucontrol->value.integer.value[0];
782 out->right_vol = ucontrol->value.integer.value[1];
783 if (!out->active)
784 return 1;
785 }
786
a8cc7189
PU		 787 /* call the appropriate handler depending on the rreg */
788 if (mc->rreg)
789 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
790 else
791 ret = snd_soc_put_volsw(kcontrol, ucontrol);
792
1bf84759
MOC		 793 if (ret < 0)
794 return ret;
795
796 return 1;
797}
798
799static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
800 struct snd_ctl_elem_value *ucontrol)
801{
802 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
803 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
804 struct twl6040_output *out = &twl6040_priv->headset;
805 struct soc_mixer_control *mc =
806 (struct soc_mixer_control *)kcontrol->private_value;
1bf84759 807
a8cc7189 808 switch (mc->reg) {
1bf84759
MOC		 809 case TWL6040_REG_HSGAIN:
810 out = &twl6040_priv->headset;
1bf84759 811 break;
1bf84759 812 case TWL6040_REG_HFLGAIN:
1bf84759
MOC		 813 out = &twl6040_priv->handsfree;
814 break;
815 default:
816 break;
817 }
818
819 if (out) {
1bf84759
MOC		 820 ucontrol->value.integer.value[0] = out->left_vol;
821 ucontrol->value.integer.value[1] = out->right_vol;
822 return 0;
1bf84759
MOC		 823 }
824
a8cc7189
PU		 825 /* call the appropriate handler depending on the rreg */
826 if (mc->rreg)
827 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
828 else
829 return snd_soc_get_volsw(kcontrol, ucontrol);
1bf84759
MOC		 830}
831
832/* double control with volume update */
833#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
834 xinvert, tlv_array)\
835{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
836 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
837 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
838 .tlv.p = (tlv_array), \
839 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
840 .put = twl6040_put_volsw, \
841 .private_value = (unsigned long)&(struct soc_mixer_control) \
842 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
843 .max = xmax, .platform_max = xmax, .invert = xinvert} }
844
845/* double control with volume update */
846#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
847 xinvert, tlv_array)\
848{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
849 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
850 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
851 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
852 .tlv.p = (tlv_array), \
853 .info = snd_soc_info_volsw_2r, \
a8cc7189 854 .get = twl6040_get_volsw, .put = twl6040_put_volsw, \
1bf84759
MOC		 855 .private_value = (unsigned long)&(struct soc_mixer_control) \
856 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
857 .rshift = xshift, .max = xmax, .invert = xinvert}, }
858
8ecbabd9
MLC		 859/*
860 * MICATT volume control:
861 * from -6 to 0 dB in 6 dB steps
862 */
863static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
864
865/*
866 * MICGAIN volume control:
2763f45d 867 * from 6 to 30 dB in 6 dB steps
8ecbabd9 868 */
2763f45d 869static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 870
370a0314
JEC		 871/*
872 * AFMGAIN volume control:
1f71a3ba 873 * from -18 to 24 dB in 6 dB steps
370a0314 874 */
1f71a3ba 875static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 876
8ecbabd9
MLC		 877/*
878 * HSGAIN volume control:
879 * from -30 to 0 dB in 2 dB steps
880 */
881static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
882
883/*
884 * HFGAIN volume control:
885 * from -52 to 6 dB in 2 dB steps
886 */
887static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
888
871a05a7
JEC		 889/*
890 * EPGAIN volume control:
891 * from -24 to 6 dB in 2 dB steps
892 */
893static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
894
8ecbabd9
MLC		 895/* Left analog microphone selection */
896static const char *twl6040_amicl_texts[] =
897 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
898
899/* Right analog microphone selection */
900static const char *twl6040_amicr_texts[] =
901 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
902
903static const struct soc_enum twl6040_enum[] = {
cb973d78
FM		 904 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
905 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC		 906};
907
370a0314
JEC		 908static const char *twl6040_hs_texts[] = {
909 "Off", "HS DAC", "Line-In amp"
910};
911
912static const struct soc_enum twl6040_hs_enum[] = {
913 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
914 twl6040_hs_texts),
915 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
916 twl6040_hs_texts),
917};
918
919static const char *twl6040_hf_texts[] = {
920 "Off", "HF DAC", "Line-In amp"
921};
922
923static const struct soc_enum twl6040_hf_enum[] = {
924 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
925 twl6040_hf_texts),
926 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
927 twl6040_hf_texts),
928};
929
8ecbabd9
MLC		 930static const struct snd_kcontrol_new amicl_control =
931 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
932
933static const struct snd_kcontrol_new amicr_control =
934 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
935
936/* Headset DAC playback switches */
370a0314
JEC		 937static const struct snd_kcontrol_new hsl_mux_controls =
938 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 939
370a0314
JEC		 940static const struct snd_kcontrol_new hsr_mux_controls =
941 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC		 942
943/* Handsfree DAC playback switches */
370a0314
JEC		 944static const struct snd_kcontrol_new hfl_mux_controls =
945 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 946
370a0314
JEC		 947static const struct snd_kcontrol_new hfr_mux_controls =
948 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 949
317596a6
PU		 950static const struct snd_kcontrol_new ep_path_enable_control =
951 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 952
fdb625ff
PU		 953static const struct snd_kcontrol_new auxl_switch_control =
954 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
955
956static const struct snd_kcontrol_new auxr_switch_control =
957 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
958
6bba63b6 959/* Headset power mode */
7cca6067 960static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC		 961 "Low-Power", "High-Perfomance",
962};
963
7cca6067
PU		 964static const struct soc_enum twl6040_power_mode_enum =
965 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
966 twl6040_power_mode_texts);
6bba63b6
MLC		 967
968static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
969 struct snd_ctl_elem_value *ucontrol)
970{
971 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
972 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
973
974 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
975
976 return 0;
977}
978
979static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
980 struct snd_ctl_elem_value *ucontrol)
981{
982 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
983 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
984 int high_perf = ucontrol->value.enumerated.item[0];
985 int ret = 0;
986
987 if (!priv->hs_power_mode_locked)
988 ret = headset_power_mode(codec, high_perf);
989
990 if (!ret)
991 priv->hs_power_mode = high_perf;
992
993 return ret;
994}
995
af958c72
PU		 996static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
997 struct snd_ctl_elem_value *ucontrol)
998{
999 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1000 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1001
1002 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1003
1004 return 0;
1005}
1006
1007static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1008 struct snd_ctl_elem_value *ucontrol)
1009{
1010 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1011 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1012
1013 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU		 1014
1015 return 0;
1016}
1017
1018int twl6040_get_clk_id(struct snd_soc_codec *codec)
1019{
1020 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1021
ff593ca1 1022 return priv->pll_power_mode;
af958c72
PU		 1023}
1024EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1025
db4aabcc
PU		 1026int twl6040_get_trim_value(struct snd_soc_codec *codec, enum twl6040_trim trim)
1027{
1028 if (unlikely(trim >= TWL6040_TRIM_INVAL))
1029 return -EINVAL;
1030
1031 return twl6040_read_reg_cache(codec, TWL6040_REG_TRIM1 + trim);
1032}
1033EXPORT_SYMBOL_GPL(twl6040_get_trim_value);
1034
8ecbabd9
MLC		 1035static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1036 /* Capture gains */
1037 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1038 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1039 SOC_DOUBLE_TLV("Capture Volume",
1040 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1041
370a0314
JEC		 1042 /* AFM gains */
1043 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1044 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1045
8ecbabd9 1046 /* Playback gains */
1bf84759 1047 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 1048 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 1049 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 1050 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC		 1051 SOC_SINGLE_TLV("Earphone Playback Volume",
1052 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1053
7cca6067 1054 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC		 1055 twl6040_headset_power_get_enum,
1056 twl6040_headset_power_put_enum),
af958c72
PU		 1057
1058 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1059 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC		 1060};
1061
1062static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1063 /* Inputs */
1064 SND_SOC_DAPM_INPUT("MAINMIC"),
1065 SND_SOC_DAPM_INPUT("HSMIC"),
1066 SND_SOC_DAPM_INPUT("SUBMIC"),
1067 SND_SOC_DAPM_INPUT("AFML"),
1068 SND_SOC_DAPM_INPUT("AFMR"),
1069
1070 /* Outputs */
1071 SND_SOC_DAPM_OUTPUT("HSOL"),
1072 SND_SOC_DAPM_OUTPUT("HSOR"),
1073 SND_SOC_DAPM_OUTPUT("HFL"),
1074 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1075 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU		 1076 SND_SOC_DAPM_OUTPUT("AUXL"),
1077 SND_SOC_DAPM_OUTPUT("AUXR"),
8ecbabd9
MLC		 1078
1079 /* Analog input muxes for the capture amplifiers */
1080 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1081 SND_SOC_NOPM, 0, 0, &amicl_control),
1082 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1083 SND_SOC_NOPM, 0, 0, &amicr_control),
1084
1085 /* Analog capture PGAs */
1086 SND_SOC_DAPM_PGA("MicAmpL",
1087 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1088 SND_SOC_DAPM_PGA("MicAmpR",
1089 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1090
370a0314
JEC		 1091 /* Auxiliary FM PGAs */
1092 SND_SOC_DAPM_PGA("AFMAmpL",
1093 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1094 SND_SOC_DAPM_PGA("AFMAmpR",
1095 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1096
8ecbabd9
MLC		 1097 /* ADCs */
1098 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1099 TWL6040_REG_MICLCTL, 2, 0),
1100 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1101 TWL6040_REG_MICRCTL, 2, 0),
1102
1103 /* Microphone bias */
1104 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1105 TWL6040_REG_AMICBCTL, 0, 0),
1106 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1107 TWL6040_REG_AMICBCTL, 4, 0),
1108 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1109 TWL6040_REG_DMICBCTL, 0, 0),
1110 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1111 TWL6040_REG_DMICBCTL, 4, 0),
1112
1113 /* DACs */
0fad4ed7
JEC		 1114 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1115 TWL6040_REG_HSLCTL, 0, 0,
1116 twl6040_hs_dac_event,
1117 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1118 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1119 TWL6040_REG_HSRCTL, 0, 0,
1120 twl6040_hs_dac_event,
1121 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 1122 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1123 TWL6040_REG_HFLCTL, 0, 0,
1124 twl6040_power_mode_event,
1125 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1126 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1127 TWL6040_REG_HFRCTL, 0, 0,
1128 twl6040_power_mode_event,
1129 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1130
df11ce29 1131 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1132 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1133 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC		 1134 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1135 /* Analog playback Muxes */
45b0f60d 1136 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1137 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1138 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1139 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1140
317596a6
PU		 1141 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1142 &ep_path_enable_control),
fdb625ff
PU		 1143 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1144 &auxl_switch_control),
1145 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1146 &auxr_switch_control),
317596a6 1147
0fad4ed7 1148 /* Analog playback drivers */
df11ce29 1149 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1150 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
eb6b71e7 1151 out_drv_event,
1bf84759 1152 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1153 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1154 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
eb6b71e7 1155 out_drv_event,
1bf84759 1156 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1157 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759 1158 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
eb6b71e7 1159 out_drv_event,
1bf84759 1160 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1161 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759 1162 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
eb6b71e7 1163 out_drv_event,
1bf84759 1164 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU		 1165 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1166 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
871a05a7
JEC		 1167 twl6040_power_mode_event,
1168 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 1169
1170 /* Analog playback PGAs */
df11ce29 1171 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1172 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1173 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC		 1174 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1175
1176};
1177
1178static const struct snd_soc_dapm_route intercon[] = {
1179 /* Capture path */
1180 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1181 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1182 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1183
1184 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1185 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1186 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1187
1188 {"MicAmpL", NULL, "Analog Left Capture Route"},
1189 {"MicAmpR", NULL, "Analog Right Capture Route"},
1190
1191 {"ADC Left", NULL, "MicAmpL"},
1192 {"ADC Right", NULL, "MicAmpR"},
1193
370a0314 1194 /* AFM path */
5bf692d9
PU		 1195 {"AFMAmpL", NULL, "AFML"},
1196 {"AFMAmpR", NULL, "AFMR"},
370a0314 1197
45b0f60d
PU		 1198 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1199 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1200
45b0f60d
PU		 1201 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1202 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1203
45b0f60d
PU		 1204 {"HS Left Driver", NULL, "Headset Left Playback"},
1205 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1206
45b0f60d
PU		 1207 {"HSOL", NULL, "HS Left Driver"},
1208 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1209
871a05a7 1210 /* Earphone playback path */
317596a6
PU		 1211 {"Earphone Playback", "Switch", "HSDAC Left"},
1212 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC		 1213 {"EP", NULL, "Earphone Driver"},
1214
df11ce29
PU		 1215 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1216 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1217
df11ce29
PU		 1218 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1219 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1220
df11ce29
PU		 1221 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1222 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1223
df11ce29
PU		 1224 {"HF Left Driver", NULL, "HF Left PGA"},
1225 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1226
df11ce29
PU		 1227 {"HFL", NULL, "HF Left Driver"},
1228 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU		 1229
1230 {"AUXL Playback", "Switch", "HF Left PGA"},
1231 {"AUXR Playback", "Switch", "HF Right PGA"},
1232
1233 {"AUXL", NULL, "AUXL Playback"},
1234 {"AUXR", NULL, "AUXR Playback"},
8ecbabd9
MLC		 1235};
1236
1237static int twl6040_add_widgets(struct snd_soc_codec *codec)
1238{
ce6120cc 1239 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1240
ce6120cc
LG		 1241 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1242 ARRAY_SIZE(twl6040_dapm_widgets));
1243 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1244 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC		 1245
1246 return 0;
1247}
1248
8ecbabd9
MLC		 1249static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1250 enum snd_soc_bias_level level)
1251{
fb34d3d5 1252 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1253 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1254 int ret;
1255
1256 switch (level) {
1257 case SND_SOC_BIAS_ON:
1258 break;
1259 case SND_SOC_BIAS_PREPARE:
1260 break;
1261 case SND_SOC_BIAS_STANDBY:
1262 if (priv->codec_powered)
1263 break;
1264
fb34d3d5
MLC		 1265 ret = twl6040_power(twl6040, 1);
1266 if (ret)
1267 return ret;
8ecbabd9 1268
fb34d3d5 1269 priv->codec_powered = 1;
8ecbabd9 1270
a52762ee 1271 twl6040_restore_regs(codec);
65b7cecc
OM		 1272
1273 /* Set external boost GPO */
1274 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC		 1275 break;
1276 case SND_SOC_BIAS_OFF:
1277 if (!priv->codec_powered)
1278 break;
1279
fb34d3d5 1280 twl6040_power(twl6040, 0);
8ecbabd9
MLC		 1281 priv->codec_powered = 0;
1282 break;
1283 }
1284
ce6120cc 1285 codec->dapm.bias_level = level;
8ecbabd9
MLC		 1286
1287 return 0;
1288}
1289
8ecbabd9
MLC		 1290static int twl6040_startup(struct snd_pcm_substream *substream,
1291 struct snd_soc_dai *dai)
1292{
1293 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1294 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1295 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1296
8ecbabd9
MLC		 1297 snd_pcm_hw_constraint_list(substream->runtime, 0,
1298 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1299 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC		 1300
1301 return 0;
1302}
1303
1304static int twl6040_hw_params(struct snd_pcm_substream *substream,
1305 struct snd_pcm_hw_params *params,
1306 struct snd_soc_dai *dai)
1307{
1308 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1309 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1310 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1311 int rate;
1312
8ecbabd9
MLC		 1313 rate = params_rate(params);
1314 switch (rate) {
60ea4cec
OM		 1315 case 11250:
1316 case 22500:
1317 case 44100:
8ecbabd9 1318 case 88200:
753621c2
PU		 1319 /* These rates are not supported when HPPLL is in use */
1320 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1321 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1322 rate);
1323 return -EINVAL;
1324 }
1325 /* Capture is not supported with 17.64MHz sysclk */
1326 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1327 dev_err(codec->dev,
1328 "capture mode is not supported at %dHz\n",
1329 rate);
1330 return -EINVAL;
1331 }
8ecbabd9
MLC		 1332 priv->sysclk = 17640000;
1333 break;
60ea4cec
OM		 1334 case 8000:
1335 case 16000:
1336 case 32000:
1337 case 48000:
8ecbabd9 1338 case 96000:
8ecbabd9
MLC		 1339 priv->sysclk = 19200000;
1340 break;
1341 default:
1342 dev_err(codec->dev, "unsupported rate %d\n", rate);
1343 return -EINVAL;
1344 }
1345
8ecbabd9
MLC		 1346 return 0;
1347}
1348
4e624d06
OM		 1349static int twl6040_prepare(struct snd_pcm_substream *substream,
1350 struct snd_soc_dai *dai)
8ecbabd9
MLC		 1351{
1352 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1353 struct snd_soc_codec *codec = rtd->codec;
753621c2 1354 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1355 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1356 int ret;
8ecbabd9 1357
4e624d06
OM		 1358 if (!priv->sysclk) {
1359 dev_err(codec->dev,
1360 "no mclk configured, call set_sysclk() on init\n");
1361 return -EINVAL;
1362 }
1363
4e624d06 1364 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC		 1365 dev_err(codec->dev,
1366 "some enabled paths aren't supported at %dHz\n",
1367 priv->sysclk);
1368 return -EPERM;
8ecbabd9 1369 }
753621c2
PU		 1370
1371 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1372 if (ret) {
1373 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1374 return -EPERM;
1375 }
1376
8ecbabd9
MLC		 1377 return 0;
1378}
1379
1380static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1381 int clk_id, unsigned int freq, int dir)
1382{
1383 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1384 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1385
1386 switch (clk_id) {
1387 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1388 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU		 1389 priv->pll = clk_id;
1390 priv->clk_in = freq;
8ecbabd9
MLC		 1391 break;
1392 default:
1393 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1394 return -EINVAL;
1395 }
1396
1397 return 0;
1398}
1399
1400static struct snd_soc_dai_ops twl6040_dai_ops = {
1401 .startup = twl6040_startup,
1402 .hw_params = twl6040_hw_params,
4e624d06 1403 .prepare = twl6040_prepare,
8ecbabd9
MLC		 1404 .set_sysclk = twl6040_set_dai_sysclk,
1405};
1406
6510bdc3 1407static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1408{
d13f1fe0 1409 .name = "twl6040-legacy",
8ecbabd9
MLC		 1410 .playback = {
1411 .stream_name = "Playback",
1412 .channels_min = 1,
cdd5054c 1413 .channels_max = 5,
21385eeb
PU		 1414 .rates = TWL6040_RATES,
1415 .formats = TWL6040_FORMATS,
1416 },
1417 .capture = {
1418 .stream_name = "Capture",
1419 .channels_min = 1,
1420 .channels_max = 2,
8ecbabd9
MLC		 1421 .rates = TWL6040_RATES,
1422 .formats = TWL6040_FORMATS,
1423 },
21385eeb
PU		 1424 .ops = &twl6040_dai_ops,
1425},
6510bdc3
LG		 1426{
1427 .name = "twl6040-ul",
8ecbabd9
MLC		 1428 .capture = {
1429 .stream_name = "Capture",
1430 .channels_min = 1,
1431 .channels_max = 2,
1432 .rates = TWL6040_RATES,
1433 .formats = TWL6040_FORMATS,
1434 },
1435 .ops = &twl6040_dai_ops,
6510bdc3
LG		 1436},
1437{
1438 .name = "twl6040-dl1",
8ecbabd9 1439 .playback = {
6510bdc3 1440 .stream_name = "Headset Playback",
8ecbabd9 1441 .channels_min = 1,
6510bdc3 1442 .channels_max = 2,
8ecbabd9
MLC		 1443 .rates = TWL6040_RATES,
1444 .formats = TWL6040_FORMATS,
1445 },
6510bdc3
LG		 1446 .ops = &twl6040_dai_ops,
1447},
1448{
1449 .name = "twl6040-dl2",
1450 .playback = {
1451 .stream_name = "Handsfree Playback",
8ecbabd9
MLC		 1452 .channels_min = 1,
1453 .channels_max = 2,
1454 .rates = TWL6040_RATES,
1455 .formats = TWL6040_FORMATS,
1456 },
1457 .ops = &twl6040_dai_ops,
6510bdc3
LG		 1458},
1459{
1460 .name = "twl6040-vib",
1461 .playback = {
1462 .stream_name = "Vibra Playback",
d8dd032d
PU		 1463 .channels_min = 1,
1464 .channels_max = 1,
6510bdc3
LG		 1465 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1466 .formats = TWL6040_FORMATS,
1467 },
1468 .ops = &twl6040_dai_ops,
1469},
8ecbabd9 1470};
8ecbabd9
MLC		 1471
1472#ifdef CONFIG_PM
f0fba2ad 1473static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1474{
8ecbabd9
MLC		 1475 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1476
1477 return 0;
1478}
1479
f0fba2ad 1480static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1481{
8ecbabd9 1482 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1483 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC		 1484
1485 return 0;
1486}
1487#else
1488#define twl6040_suspend NULL
1489#define twl6040_resume NULL
1490#endif
1491
f0fba2ad 1492static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1493{
8ecbabd9 1494 struct twl6040_data *priv;
1fbe9952 1495 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU		 1496 struct platform_device *pdev = container_of(codec->dev,
1497 struct platform_device, dev);
8ecbabd9
MLC		 1498 int ret = 0;
1499
1500 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1501 if (priv == NULL)
1502 return -ENOMEM;
f0fba2ad 1503 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1504
a2d2362e 1505 priv->codec = codec;
fb34d3d5 1506 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1507
1fbe9952
ACG		 1508 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1509 priv->hs_left_step = pdata->hs_left_step;
1510 priv->hs_right_step = pdata->hs_right_step;
1511 } else {
1512 priv->hs_left_step = 1;
1513 priv->hs_right_step = 1;
1514 }
99903ea2 1515
1fbe9952
ACG		 1516 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1517 priv->hf_left_step = pdata->hf_left_step;
1518 priv->hf_right_step = pdata->hf_right_step;
1519 } else {
1520 priv->hf_left_step = 1;
1521 priv->hf_right_step = 1;
1522 }
99903ea2 1523
2a433b9d
PU		 1524 priv->plug_irq = platform_get_irq(pdev, 0);
1525 if (priv->plug_irq < 0) {
1526 dev_err(codec->dev, "invalid irq\n");
1527 ret = -EINVAL;
1528 goto work_err;
1529 }
8ecbabd9 1530
a2d2362e 1531 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL		 1532 if (!priv->workqueue) {
1533 ret = -ENOMEM;
a2d2362e 1534 goto work_err;
19aab08d 1535 }
a2d2362e
JEC		 1536
1537 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1538
1539 mutex_init(&priv->mutex);
8ecbabd9 1540
1bf84759
MOC		 1541 init_completion(&priv->headset.ramp_done);
1542 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1543
1bf84759
MOC		 1544 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1545 if (priv->hf_workqueue == NULL) {
1546 ret = -ENOMEM;
fb34d3d5 1547 goto hfwq_err;
1bf84759
MOC		 1548 }
1549 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1550 if (priv->hs_workqueue == NULL) {
1551 ret = -ENOMEM;
fb34d3d5 1552 goto hswq_err;
1bf84759
MOC		 1553 }
1554
e71a5e5a
PU		 1555 INIT_DELAYED_WORK(&priv->headset.work, twl6040_pga_hs_work);
1556 INIT_DELAYED_WORK(&priv->handsfree.work, twl6040_pga_hf_work);
1bf84759 1557
2a433b9d
PU		 1558 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1559 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC		 1560 if (ret) {
1561 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1562 goto plugirq_err;
1563 }
1564
a52762ee 1565 twl6040_init_chip(codec);
fb34d3d5 1566
8ecbabd9
MLC		 1567 /* power on device */
1568 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1569 if (ret)
1bf84759 1570 goto bias_err;
8ecbabd9 1571
f0fba2ad
LG		 1572 snd_soc_add_controls(codec, twl6040_snd_controls,
1573 ARRAY_SIZE(twl6040_snd_controls));
1574 twl6040_add_widgets(codec);
8ecbabd9
MLC		 1575
1576 return 0;
1577
1bf84759 1578bias_err:
2a433b9d 1579 free_irq(priv->plug_irq, codec);
fb34d3d5 1580plugirq_err:
1bf84759 1581 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1582hswq_err:
1bf84759 1583 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1584hfwq_err:
a2d2362e
JEC		 1585 destroy_workqueue(priv->workqueue);
1586work_err:
8ecbabd9
MLC		 1587 kfree(priv);
1588 return ret;
1589}
1590
f0fba2ad 1591static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1592{
f0fba2ad 1593 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1594
f0fba2ad 1595 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1596 free_irq(priv->plug_irq, codec);
a2d2362e 1597 destroy_workqueue(priv->workqueue);
1bf84759
MOC		 1598 destroy_workqueue(priv->hf_workqueue);
1599 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1600 kfree(priv);
8ecbabd9 1601
f0fba2ad
LG		 1602 return 0;
1603}
8ecbabd9 1604
f0fba2ad
LG		 1605static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1606 .probe = twl6040_probe,
1607 .remove = twl6040_remove,
1608 .suspend = twl6040_suspend,
1609 .resume = twl6040_resume,
1610 .read = twl6040_read_reg_cache,
1611 .write = twl6040_write,
1612 .set_bias_level = twl6040_set_bias_level,
1613 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1614 .reg_word_size = sizeof(u8),
1615 .reg_cache_default = twl6040_reg,
1616};
1617
1618static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1619{
6510bdc3
LG		 1620 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1621 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG		 1622}
1623
1624static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1625{
1626 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC		 1627 return 0;
1628}
1629
1630static struct platform_driver twl6040_codec_driver = {
1631 .driver = {
f0fba2ad 1632 .name = "twl6040-codec",
8ecbabd9
MLC		 1633 .owner = THIS_MODULE,
1634 },
1635 .probe = twl6040_codec_probe,
1636 .remove = __devexit_p(twl6040_codec_remove),
1637};
1638
1639static int __init twl6040_codec_init(void)
1640{
1641 return platform_driver_register(&twl6040_codec_driver);
1642}
1643module_init(twl6040_codec_init);
1644
1645static void __exit twl6040_codec_exit(void)
1646{
1647 platform_driver_unregister(&twl6040_codec_driver);
1648}
1649module_exit(twl6040_codec_exit);
1650
1651MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1652MODULE_AUTHOR("Misael Lopez Cruz");
1653MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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