ASoC: twl6040: Remove Capture restriction for 17.64MHz sysclk
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC
1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
8ecbabd9
MLC
31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
8ecbabd9
MLC
36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
1bf84759
MOC
42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
d17bf318
PU
60/* Shadow register used by the driver */
61#define TWL6040_REG_SW_SHADOW 0x2F
62#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
63
317596a6
PU
64/* TWL6040_REG_SW_SHADOW (0x2F) fields */
65#define TWL6040_EAR_PATH_ENABLE 0x01
66
1bf84759
MOC
67struct twl6040_output {
68 u16 active;
69 u16 left_vol;
70 u16 right_vol;
71 u16 left_step;
72 u16 right_step;
73 unsigned int step_delay;
74 u16 ramp;
e71a5e5a 75 struct delayed_work work;
1bf84759
MOC
76 struct completion ramp_done;
77};
8ecbabd9 78
a2d2362e
JEC
79struct twl6040_jack_data {
80 struct snd_soc_jack *jack;
46dd0b93 81 struct delayed_work work;
a2d2362e
JEC
82 int report;
83};
84
8ecbabd9
MLC
85/* codec private data */
86struct twl6040_data {
2a433b9d 87 int plug_irq;
8ecbabd9
MLC
88 int codec_powered;
89 int pll;
90 int non_lp;
af958c72 91 int pll_power_mode;
6bba63b6
MLC
92 int hs_power_mode;
93 int hs_power_mode_locked;
fb34d3d5 94 unsigned int clk_in;
8ecbabd9 95 unsigned int sysclk;
1fbe9952
ACG
96 u16 hs_left_step;
97 u16 hs_right_step;
98 u16 hf_left_step;
99 u16 hf_right_step;
a2d2362e
JEC
100 struct twl6040_jack_data hs_jack;
101 struct snd_soc_codec *codec;
102 struct workqueue_struct *workqueue;
a2d2362e 103 struct mutex mutex;
1bf84759
MOC
104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
8ecbabd9
MLC
106};
107
108/*
109 * twl6040 register cache & default register settings
110 */
111static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU
112 0x00, /* not used 0x00 */
113 0x4B, /* REG_ASICID 0x01 (ro) */
114 0x00, /* REG_ASICREV 0x02 (ro) */
115 0x00, /* REG_INTID 0x03 */
116 0x00, /* REG_INTMR 0x04 */
117 0x00, /* REG_NCPCTRL 0x05 */
118 0x00, /* REG_LDOCTL 0x06 */
119 0x60, /* REG_HPPLLCTL 0x07 */
120 0x00, /* REG_LPPLLCTL 0x08 */
121 0x4A, /* REG_LPPLLDIV 0x09 */
122 0x00, /* REG_AMICBCTL 0x0A */
123 0x00, /* REG_DMICBCTL 0x0B */
124 0x00, /* REG_MICLCTL 0x0C */
125 0x00, /* REG_MICRCTL 0x0D */
126 0x00, /* REG_MICGAIN 0x0E */
127 0x1B, /* REG_LINEGAIN 0x0F */
128 0x00, /* REG_HSLCTL 0x10 */
129 0x00, /* REG_HSRCTL 0x11 */
130 0x00, /* REG_HSGAIN 0x12 */
131 0x00, /* REG_EARCTL 0x13 */
132 0x00, /* REG_HFLCTL 0x14 */
133 0x00, /* REG_HFLGAIN 0x15 */
134 0x00, /* REG_HFRCTL 0x16 */
135 0x00, /* REG_HFRGAIN 0x17 */
136 0x00, /* REG_VIBCTLL 0x18 */
137 0x00, /* REG_VIBDATL 0x19 */
138 0x00, /* REG_VIBCTLR 0x1A */
139 0x00, /* REG_VIBDATR 0x1B */
140 0x00, /* REG_HKCTL1 0x1C */
141 0x00, /* REG_HKCTL2 0x1D */
142 0x00, /* REG_GPOCTL 0x1E */
143 0x00, /* REG_ALB 0x1F */
144 0x00, /* REG_DLB 0x20 */
145 0x00, /* not used 0x21 */
146 0x00, /* not used 0x22 */
147 0x00, /* not used 0x23 */
148 0x00, /* not used 0x24 */
149 0x00, /* not used 0x25 */
150 0x00, /* not used 0x26 */
151 0x00, /* not used 0x27 */
152 0x00, /* REG_TRIM1 0x28 */
153 0x00, /* REG_TRIM2 0x29 */
154 0x00, /* REG_TRIM3 0x2A */
155 0x00, /* REG_HSOTRIM 0x2B */
156 0x00, /* REG_HFOTRIM 0x2C */
157 0x09, /* REG_ACCCTL 0x2D */
158 0x00, /* REG_STATUS 0x2E (ro) */
d17bf318
PU
159
160 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
8ecbabd9
MLC
161};
162
a52762ee
PU
163/* List of registers to be restored after power up */
164static const int twl6040_restore_list[] = {
8ecbabd9
MLC
165 TWL6040_REG_MICLCTL,
166 TWL6040_REG_MICRCTL,
167 TWL6040_REG_MICGAIN,
168 TWL6040_REG_LINEGAIN,
169 TWL6040_REG_HSLCTL,
170 TWL6040_REG_HSRCTL,
171 TWL6040_REG_HSGAIN,
172 TWL6040_REG_EARCTL,
173 TWL6040_REG_HFLCTL,
174 TWL6040_REG_HFLGAIN,
175 TWL6040_REG_HFRCTL,
176 TWL6040_REG_HFRGAIN,
8ecbabd9
MLC
177};
178
af958c72
PU
179/* set of rates for each pll: low-power and high-performance */
180static unsigned int lp_rates[] = {
181 8000,
182 11250,
183 16000,
184 22500,
185 32000,
186 44100,
187 48000,
188 88200,
189 96000,
190};
191
af958c72
PU
192static unsigned int hp_rates[] = {
193 8000,
194 16000,
195 32000,
196 48000,
197 96000,
198};
199
f53c346c
PU
200static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
201 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
202 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU
203};
204
8ecbabd9
MLC
205/*
206 * read twl6040 register cache
207 */
208static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
209 unsigned int reg)
210{
211 u8 *cache = codec->reg_cache;
212
213 if (reg >= TWL6040_CACHEREGNUM)
214 return -EIO;
215
216 return cache[reg];
217}
218
219/*
220 * write twl6040 register cache
221 */
222static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
223 u8 reg, u8 value)
224{
225 u8 *cache = codec->reg_cache;
226
227 if (reg >= TWL6040_CACHEREGNUM)
228 return;
229 cache[reg] = value;
230}
231
232/*
233 * read from twl6040 hardware register
234 */
235static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
236 unsigned int reg)
237{
fb34d3d5 238 struct twl6040 *twl6040 = codec->control_data;
8ecbabd9
MLC
239 u8 value;
240
241 if (reg >= TWL6040_CACHEREGNUM)
242 return -EIO;
243
d17bf318
PU
244 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
245 value = twl6040_reg_read(twl6040, reg);
246 twl6040_write_reg_cache(codec, reg, value);
247 } else {
248 value = twl6040_read_reg_cache(codec, reg);
249 }
8ecbabd9
MLC
250
251 return value;
252}
253
254/*
255 * write to the twl6040 register space
256 */
257static int twl6040_write(struct snd_soc_codec *codec,
258 unsigned int reg, unsigned int value)
259{
fb34d3d5
MLC
260 struct twl6040 *twl6040 = codec->control_data;
261
8ecbabd9
MLC
262 if (reg >= TWL6040_CACHEREGNUM)
263 return -EIO;
264
265 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU
266 if (likely(reg < TWL6040_REG_SW_SHADOW))
267 return twl6040_reg_write(twl6040, reg, value);
268 else
269 return 0;
8ecbabd9
MLC
270}
271
a52762ee 272static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 273{
a52762ee
PU
274 struct twl6040 *twl6040 = codec->control_data;
275 u8 val;
276
f97217f1 277 /* Update reg_cache: ASICREV, and TRIM values */
a52762ee
PU
278 val = twl6040_get_revid(twl6040);
279 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 280
f97217f1
PU
281 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1);
282 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2);
283 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3);
284 twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM);
285 twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM);
286
2c27ff41
PU
287 /* Change chip defaults */
288 /* No imput selected for microphone amplifiers */
289 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
290 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU
291
292 /*
293 * We need to lower the default gain values, so the ramp code
294 * can work correctly for the first playback.
295 * This reduces the pop noise heard at the first playback.
296 */
297 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
298 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
299 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
300 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
301 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
8ecbabd9
MLC
302}
303
a52762ee 304static void twl6040_restore_regs(struct snd_soc_codec *codec)
8ecbabd9
MLC
305{
306 u8 *cache = codec->reg_cache;
307 int reg, i;
308
a52762ee
PU
309 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
310 reg = twl6040_restore_list[i];
8ecbabd9
MLC
311 twl6040_write(codec, reg, cache[reg]);
312 }
313}
314
1bf84759
MOC
315/*
316 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
317 */
318static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
319 unsigned int left_step, unsigned int right_step)
320{
321
322 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
323 struct twl6040_output *headset = &priv->headset;
324 int left_complete = 0, right_complete = 0;
325 u8 reg, val;
326
327 /* left channel */
328 left_step = (left_step > 0xF) ? 0xF : left_step;
329 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
330 val = (~reg & TWL6040_HSL_VOL_MASK);
331
332 if (headset->ramp == TWL6040_RAMP_UP) {
333 /* ramp step up */
334 if (val < headset->left_vol) {
1fbe9952
ACG
335 if (val + left_step > headset->left_vol)
336 val = headset->left_vol;
337 else
338 val += left_step;
339
1bf84759
MOC
340 reg &= ~TWL6040_HSL_VOL_MASK;
341 twl6040_write(codec, TWL6040_REG_HSGAIN,
342 (reg | (~val & TWL6040_HSL_VOL_MASK)));
343 } else {
344 left_complete = 1;
345 }
346 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
347 /* ramp step down */
348 if (val > 0x0) {
1fbe9952
ACG
349 if ((int)val - (int)left_step < 0)
350 val = 0;
351 else
352 val -= left_step;
353
1bf84759
MOC
354 reg &= ~TWL6040_HSL_VOL_MASK;
355 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
356 (~val & TWL6040_HSL_VOL_MASK));
357 } else {
358 left_complete = 1;
359 }
360 }
361
362 /* right channel */
363 right_step = (right_step > 0xF) ? 0xF : right_step;
364 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
365 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
366
367 if (headset->ramp == TWL6040_RAMP_UP) {
368 /* ramp step up */
369 if (val < headset->right_vol) {
1fbe9952
ACG
370 if (val + right_step > headset->right_vol)
371 val = headset->right_vol;
372 else
373 val += right_step;
374
1bf84759
MOC
375 reg &= ~TWL6040_HSR_VOL_MASK;
376 twl6040_write(codec, TWL6040_REG_HSGAIN,
377 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
378 } else {
379 right_complete = 1;
380 }
381 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
382 /* ramp step down */
383 if (val > 0x0) {
1fbe9952
ACG
384 if ((int)val - (int)right_step < 0)
385 val = 0;
386 else
387 val -= right_step;
388
1bf84759
MOC
389 reg &= ~TWL6040_HSR_VOL_MASK;
390 twl6040_write(codec, TWL6040_REG_HSGAIN,
391 reg | (~val << TWL6040_HSR_VOL_SHIFT));
392 } else {
393 right_complete = 1;
394 }
395 }
396
397 return left_complete & right_complete;
398}
399
400/*
401 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
402 */
403static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
404 unsigned int left_step, unsigned int right_step)
405{
406 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
407 struct twl6040_output *handsfree = &priv->handsfree;
408 int left_complete = 0, right_complete = 0;
409 u16 reg, val;
410
411 /* left channel */
412 left_step = (left_step > 0x1D) ? 0x1D : left_step;
413 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
414 reg = 0x1D - reg;
415 val = (reg & TWL6040_HF_VOL_MASK);
416 if (handsfree->ramp == TWL6040_RAMP_UP) {
417 /* ramp step up */
418 if (val < handsfree->left_vol) {
1fbe9952
ACG
419 if (val + left_step > handsfree->left_vol)
420 val = handsfree->left_vol;
421 else
422 val += left_step;
423
1bf84759
MOC
424 reg &= ~TWL6040_HF_VOL_MASK;
425 twl6040_write(codec, TWL6040_REG_HFLGAIN,
426 reg | (0x1D - val));
427 } else {
428 left_complete = 1;
429 }
430 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
431 /* ramp step down */
432 if (val > 0) {
1fbe9952
ACG
433 if ((int)val - (int)left_step < 0)
434 val = 0;
435 else
436 val -= left_step;
437
1bf84759
MOC
438 reg &= ~TWL6040_HF_VOL_MASK;
439 twl6040_write(codec, TWL6040_REG_HFLGAIN,
440 reg | (0x1D - val));
441 } else {
442 left_complete = 1;
443 }
444 }
445
446 /* right channel */
447 right_step = (right_step > 0x1D) ? 0x1D : right_step;
448 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
449 reg = 0x1D - reg;
450 val = (reg & TWL6040_HF_VOL_MASK);
451 if (handsfree->ramp == TWL6040_RAMP_UP) {
452 /* ramp step up */
453 if (val < handsfree->right_vol) {
1fbe9952
ACG
454 if (val + right_step > handsfree->right_vol)
455 val = handsfree->right_vol;
456 else
457 val += right_step;
458
1bf84759
MOC
459 reg &= ~TWL6040_HF_VOL_MASK;
460 twl6040_write(codec, TWL6040_REG_HFRGAIN,
461 reg | (0x1D - val));
462 } else {
463 right_complete = 1;
464 }
465 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
466 /* ramp step down */
467 if (val > 0) {
1fbe9952
ACG
468 if ((int)val - (int)right_step < 0)
469 val = 0;
470 else
471 val -= right_step;
472
1bf84759
MOC
473 reg &= ~TWL6040_HF_VOL_MASK;
474 twl6040_write(codec, TWL6040_REG_HFRGAIN,
475 reg | (0x1D - val));
476 }
477 }
478
479 return left_complete & right_complete;
480}
481
482/*
483 * This work ramps both output PGAs at stream start/stop time to
484 * minimise pop associated with DAPM power switching.
485 */
486static void twl6040_pga_hs_work(struct work_struct *work)
487{
488 struct twl6040_data *priv =
e71a5e5a 489 container_of(work, struct twl6040_data, headset.work.work);
1bf84759
MOC
490 struct snd_soc_codec *codec = priv->codec;
491 struct twl6040_output *headset = &priv->headset;
1bf84759
MOC
492 int i, headset_complete;
493
494 /* do we need to ramp at all ? */
495 if (headset->ramp == TWL6040_RAMP_NONE)
496 return;
497
93eebc69
PU
498 /* HS PGA gain range: 0x0 - 0xf (0 - 15) */
499 for (i = 0; i < 16; i++) {
1fbe9952
ACG
500 headset_complete = twl6040_hs_ramp_step(codec,
501 headset->left_step,
502 headset->right_step);
1bf84759
MOC
503
504 /* ramp finished ? */
505 if (headset_complete)
506 break;
507
8ff1e170
PU
508 schedule_timeout_interruptible(
509 msecs_to_jiffies(headset->step_delay));
1bf84759
MOC
510 }
511
512 if (headset->ramp == TWL6040_RAMP_DOWN) {
513 headset->active = 0;
514 complete(&headset->ramp_done);
515 } else {
516 headset->active = 1;
517 }
518 headset->ramp = TWL6040_RAMP_NONE;
519}
520
521static void twl6040_pga_hf_work(struct work_struct *work)
522{
523 struct twl6040_data *priv =
e71a5e5a 524 container_of(work, struct twl6040_data, handsfree.work.work);
1bf84759
MOC
525 struct snd_soc_codec *codec = priv->codec;
526 struct twl6040_output *handsfree = &priv->handsfree;
1bf84759
MOC
527 int i, handsfree_complete;
528
529 /* do we need to ramp at all ? */
530 if (handsfree->ramp == TWL6040_RAMP_NONE)
531 return;
532
93eebc69
PU
533 /*
534 * HF PGA gain range: 0x00 - 0x1d (0 - 29) */
535 for (i = 0; i < 30; i++) {
1fbe9952
ACG
536 handsfree_complete = twl6040_hf_ramp_step(codec,
537 handsfree->left_step,
538 handsfree->right_step);
1bf84759
MOC
539
540 /* ramp finished ? */
541 if (handsfree_complete)
542 break;
543
4d64bdca
PU
544 schedule_timeout_interruptible(
545 msecs_to_jiffies(handsfree->step_delay));
1bf84759
MOC
546 }
547
548
549 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
550 handsfree->active = 0;
551 complete(&handsfree->ramp_done);
552 } else
553 handsfree->active = 1;
554 handsfree->ramp = TWL6040_RAMP_NONE;
555}
556
eb6b71e7 557static int out_drv_event(struct snd_soc_dapm_widget *w,
1bf84759
MOC
558 struct snd_kcontrol *kcontrol, int event)
559{
560 struct snd_soc_codec *codec = w->codec;
561 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
562 struct twl6040_output *out;
563 struct delayed_work *work;
1bf84759
MOC
564
565 switch (w->shift) {
6fbb32d1 566 case 2: /* Headset output driver */
1bf84759 567 out = &priv->headset;
009d196b
PU
568 work = &out->work;
569 /*
570 * Make sure, that we do not mess up variables for already
571 * executing work.
572 */
573 cancel_delayed_work_sync(work);
574
1fbe9952
ACG
575 out->left_step = priv->hs_left_step;
576 out->right_step = priv->hs_right_step;
1bf84759
MOC
577 out->step_delay = 5; /* 5 ms between volume ramp steps */
578 break;
6fbb32d1 579 case 4: /* Handsfree output driver */
1bf84759 580 out = &priv->handsfree;
009d196b
PU
581 work = &out->work;
582 /*
583 * Make sure, that we do not mess up variables for already
584 * executing work.
585 */
586 cancel_delayed_work_sync(work);
587
1fbe9952
ACG
588 out->left_step = priv->hf_left_step;
589 out->right_step = priv->hf_right_step;
1bf84759
MOC
590 out->step_delay = 5; /* 5 ms between volume ramp steps */
591 if (SND_SOC_DAPM_EVENT_ON(event))
592 priv->non_lp++;
593 else
594 priv->non_lp--;
595 break;
596 default:
597 return -1;
598 }
599
600 switch (event) {
601 case SND_SOC_DAPM_POST_PMU:
602 if (out->active)
603 break;
604
605 /* don't use volume ramp for power-up */
009d196b 606 out->ramp = TWL6040_RAMP_UP;
1bf84759
MOC
607 out->left_step = out->left_vol;
608 out->right_step = out->right_vol;
609
009d196b 610 queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1));
1bf84759
MOC
611 break;
612
613 case SND_SOC_DAPM_PRE_PMD:
614 if (!out->active)
615 break;
616
009d196b
PU
617 /* use volume ramp for power-down */
618 out->ramp = TWL6040_RAMP_DOWN;
619 INIT_COMPLETION(out->ramp_done);
1bf84759 620
009d196b 621 queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1));
1bf84759 622
009d196b
PU
623 wait_for_completion_timeout(&out->ramp_done,
624 msecs_to_jiffies(2000));
1bf84759
MOC
625 break;
626 }
627
628 return 0;
629}
630
8ecbabd9
MLC
631/* set headset dac and driver power mode */
632static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
633{
634 int hslctl, hsrctl;
ab6cf139 635 int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
8ecbabd9
MLC
636
637 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
638 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
639
640 if (high_perf) {
641 hslctl &= ~mask;
642 hsrctl &= ~mask;
643 } else {
644 hslctl |= mask;
645 hsrctl |= mask;
646 }
647
648 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
649 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
650
651 return 0;
652}
653
0fad4ed7
JEC
654static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
655 struct snd_kcontrol *kcontrol, int event)
656{
33b6816c
PU
657 struct snd_soc_codec *codec = w->codec;
658 u8 hslctl, hsrctl;
659
660 /*
661 * Workaround for Headset DC offset caused pop noise:
662 * Both HS DAC need to be turned on (before the HS driver) and off at
663 * the same time.
664 */
665 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
666 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
667 if (SND_SOC_DAPM_EVENT_ON(event)) {
668 hslctl |= TWL6040_HSDACENA;
669 hsrctl |= TWL6040_HSDACENA;
670 } else {
671 hslctl &= ~TWL6040_HSDACENA;
672 hsrctl &= ~TWL6040_HSDACENA;
673 }
674 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
675 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
676
0fad4ed7
JEC
677 msleep(1);
678 return 0;
679}
680
8ecbabd9
MLC
681static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
682 struct snd_kcontrol *kcontrol, int event)
683{
684 struct snd_soc_codec *codec = w->codec;
d4a8ca24 685 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 686 int ret = 0;
8ecbabd9 687
6bba63b6 688 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 689 priv->non_lp++;
6bba63b6
MLC
690 if (!strcmp(w->name, "Earphone Driver")) {
691 /* Earphone doesn't support low power mode */
692 priv->hs_power_mode_locked = 1;
693 ret = headset_power_mode(codec, 1);
694 }
695 } else {
8ecbabd9 696 priv->non_lp--;
6bba63b6
MLC
697 if (!strcmp(w->name, "Earphone Driver")) {
698 priv->hs_power_mode_locked = 0;
699 ret = headset_power_mode(codec, priv->hs_power_mode);
700 }
701 }
8ecbabd9 702
0fad4ed7
JEC
703 msleep(1);
704
6bba63b6 705 return ret;
8ecbabd9
MLC
706}
707
64ed9836
MB
708static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
709 struct snd_soc_jack *jack, int report)
a2d2362e
JEC
710{
711 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
712 int status;
713
714 mutex_lock(&priv->mutex);
715
716 /* Sync status */
717 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
718 if (status & TWL6040_PLUGCOMP)
719 snd_soc_jack_report(jack, report, report);
720 else
721 snd_soc_jack_report(jack, 0, report);
722
723 mutex_unlock(&priv->mutex);
724}
725
726void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
727 struct snd_soc_jack *jack, int report)
728{
729 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
730 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
731
732 hs_jack->jack = jack;
733 hs_jack->report = report;
734
735 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
736}
737EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
738
739static void twl6040_accessory_work(struct work_struct *work)
740{
741 struct twl6040_data *priv = container_of(work,
46dd0b93 742 struct twl6040_data, hs_jack.work.work);
a2d2362e
JEC
743 struct snd_soc_codec *codec = priv->codec;
744 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
745
746 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
747}
748
8ecbabd9 749/* audio interrupt handler */
fb34d3d5 750static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC
751{
752 struct snd_soc_codec *codec = data;
d4a8ca24 753 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
cf370a5a 754
46dd0b93 755 queue_delayed_work(priv->workqueue, &priv->hs_jack.work,
f34c6606 756 msecs_to_jiffies(200));
cf370a5a 757
8ecbabd9
MLC
758 return IRQ_HANDLED;
759}
760
1bf84759
MOC
761static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
762 struct snd_ctl_elem_value *ucontrol)
763{
764 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
765 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
766 struct twl6040_output *out = NULL;
767 struct soc_mixer_control *mc =
768 (struct soc_mixer_control *)kcontrol->private_value;
db382da5 769 int ret;
1bf84759
MOC
770
771 /* For HS and HF we shadow the values and only actually write
772 * them out when active in order to ensure the amplifier comes on
773 * as quietly as possible. */
a8cc7189 774 switch (mc->reg) {
1bf84759
MOC
775 case TWL6040_REG_HSGAIN:
776 out = &twl6040_priv->headset;
777 break;
a8cc7189
PU
778 case TWL6040_REG_HFLGAIN:
779 out = &twl6040_priv->handsfree;
780 break;
1bf84759 781 default:
a0acf47f
PU
782 dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n",
783 __func__, mc->reg);
bfd3d4e9 784 return -EINVAL;
1bf84759
MOC
785 }
786
bfd3d4e9
PU
787 out->left_vol = ucontrol->value.integer.value[0];
788 out->right_vol = ucontrol->value.integer.value[1];
789 if (!out->active)
790 return 1;
1bf84759 791
db382da5 792 ret = snd_soc_put_volsw(kcontrol, ucontrol);
1bf84759
MOC
793 if (ret < 0)
794 return ret;
795
796 return 1;
797}
798
799static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
800 struct snd_ctl_elem_value *ucontrol)
801{
802 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
803 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
804 struct twl6040_output *out = &twl6040_priv->headset;
805 struct soc_mixer_control *mc =
806 (struct soc_mixer_control *)kcontrol->private_value;
1bf84759 807
a8cc7189 808 switch (mc->reg) {
1bf84759
MOC
809 case TWL6040_REG_HSGAIN:
810 out = &twl6040_priv->headset;
1bf84759 811 break;
1bf84759 812 case TWL6040_REG_HFLGAIN:
1bf84759
MOC
813 out = &twl6040_priv->handsfree;
814 break;
815 default:
e49b6833
PU
816 dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n",
817 __func__, mc->reg);
818 return -EINVAL;
1bf84759
MOC
819 }
820
e49b6833
PU
821 ucontrol->value.integer.value[0] = out->left_vol;
822 ucontrol->value.integer.value[1] = out->right_vol;
823 return 0;
1bf84759
MOC
824}
825
67c34130
PU
826static int twl6040_soc_dapm_put_vibra_enum(struct snd_kcontrol *kcontrol,
827 struct snd_ctl_elem_value *ucontrol)
828{
829 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
830 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
831 struct snd_soc_codec *codec = widget->codec;
832 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
833 unsigned int val;
834
835 /* Do not allow changes while Input/FF efect is running */
836 val = twl6040_read_reg_volatile(codec, e->reg);
837 if (val & TWL6040_VIBENA && !(val & TWL6040_VIBSEL))
838 return -EBUSY;
839
840 return snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
841}
842
8ecbabd9
MLC
843/*
844 * MICATT volume control:
845 * from -6 to 0 dB in 6 dB steps
846 */
847static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
848
849/*
850 * MICGAIN volume control:
2763f45d 851 * from 6 to 30 dB in 6 dB steps
8ecbabd9 852 */
2763f45d 853static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 854
370a0314
JEC
855/*
856 * AFMGAIN volume control:
1f71a3ba 857 * from -18 to 24 dB in 6 dB steps
370a0314 858 */
1f71a3ba 859static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 860
8ecbabd9
MLC
861/*
862 * HSGAIN volume control:
863 * from -30 to 0 dB in 2 dB steps
864 */
865static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
866
867/*
868 * HFGAIN volume control:
869 * from -52 to 6 dB in 2 dB steps
870 */
871static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
872
871a05a7
JEC
873/*
874 * EPGAIN volume control:
875 * from -24 to 6 dB in 2 dB steps
876 */
877static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
878
8ecbabd9
MLC
879/* Left analog microphone selection */
880static const char *twl6040_amicl_texts[] =
881 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
882
883/* Right analog microphone selection */
884static const char *twl6040_amicr_texts[] =
885 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
886
887static const struct soc_enum twl6040_enum[] = {
cb973d78
FM
888 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
889 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC
890};
891
370a0314
JEC
892static const char *twl6040_hs_texts[] = {
893 "Off", "HS DAC", "Line-In amp"
894};
895
896static const struct soc_enum twl6040_hs_enum[] = {
897 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
898 twl6040_hs_texts),
899 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
900 twl6040_hs_texts),
901};
902
903static const char *twl6040_hf_texts[] = {
904 "Off", "HF DAC", "Line-In amp"
905};
906
907static const struct soc_enum twl6040_hf_enum[] = {
908 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
909 twl6040_hf_texts),
910 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
911 twl6040_hf_texts),
912};
913
67c34130
PU
914static const char *twl6040_vibrapath_texts[] = {
915 "Input FF", "Audio PDM"
916};
917
918static const struct soc_enum twl6040_vibra_enum[] = {
919 SOC_ENUM_SINGLE(TWL6040_REG_VIBCTLL, 1,
920 ARRAY_SIZE(twl6040_vibrapath_texts),
921 twl6040_vibrapath_texts),
922 SOC_ENUM_SINGLE(TWL6040_REG_VIBCTLR, 1,
923 ARRAY_SIZE(twl6040_vibrapath_texts),
924 twl6040_vibrapath_texts),
925};
926
8ecbabd9
MLC
927static const struct snd_kcontrol_new amicl_control =
928 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
929
930static const struct snd_kcontrol_new amicr_control =
931 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
932
933/* Headset DAC playback switches */
370a0314
JEC
934static const struct snd_kcontrol_new hsl_mux_controls =
935 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 936
370a0314
JEC
937static const struct snd_kcontrol_new hsr_mux_controls =
938 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC
939
940/* Handsfree DAC playback switches */
370a0314
JEC
941static const struct snd_kcontrol_new hfl_mux_controls =
942 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 943
370a0314
JEC
944static const struct snd_kcontrol_new hfr_mux_controls =
945 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 946
317596a6
PU
947static const struct snd_kcontrol_new ep_path_enable_control =
948 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 949
fdb625ff
PU
950static const struct snd_kcontrol_new auxl_switch_control =
951 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
952
953static const struct snd_kcontrol_new auxr_switch_control =
954 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
955
67c34130
PU
956/* Vibra playback switches */
957static const struct snd_kcontrol_new vibral_mux_controls =
958 SOC_DAPM_ENUM_EXT("Route", twl6040_vibra_enum[0],
959 snd_soc_dapm_get_enum_double,
960 twl6040_soc_dapm_put_vibra_enum);
961
962static const struct snd_kcontrol_new vibrar_mux_controls =
963 SOC_DAPM_ENUM_EXT("Route", twl6040_vibra_enum[1],
964 snd_soc_dapm_get_enum_double,
965 twl6040_soc_dapm_put_vibra_enum);
966
6bba63b6 967/* Headset power mode */
7cca6067 968static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC
969 "Low-Power", "High-Perfomance",
970};
971
7cca6067
PU
972static const struct soc_enum twl6040_power_mode_enum =
973 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
974 twl6040_power_mode_texts);
6bba63b6
MLC
975
976static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
977 struct snd_ctl_elem_value *ucontrol)
978{
979 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
980 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
981
982 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
983
984 return 0;
985}
986
987static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
988 struct snd_ctl_elem_value *ucontrol)
989{
990 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
991 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
992 int high_perf = ucontrol->value.enumerated.item[0];
993 int ret = 0;
994
995 if (!priv->hs_power_mode_locked)
996 ret = headset_power_mode(codec, high_perf);
997
998 if (!ret)
999 priv->hs_power_mode = high_perf;
1000
1001 return ret;
1002}
1003
af958c72
PU
1004static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
1005 struct snd_ctl_elem_value *ucontrol)
1006{
1007 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1008 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1009
1010 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1011
1012 return 0;
1013}
1014
1015static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1016 struct snd_ctl_elem_value *ucontrol)
1017{
1018 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1019 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1020
1021 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU
1022
1023 return 0;
1024}
1025
1026int twl6040_get_clk_id(struct snd_soc_codec *codec)
1027{
1028 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1029
ff593ca1 1030 return priv->pll_power_mode;
af958c72
PU
1031}
1032EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1033
db4aabcc
PU
1034int twl6040_get_trim_value(struct snd_soc_codec *codec, enum twl6040_trim trim)
1035{
1036 if (unlikely(trim >= TWL6040_TRIM_INVAL))
1037 return -EINVAL;
1038
1039 return twl6040_read_reg_cache(codec, TWL6040_REG_TRIM1 + trim);
1040}
1041EXPORT_SYMBOL_GPL(twl6040_get_trim_value);
1042
8ecbabd9
MLC
1043static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1044 /* Capture gains */
1045 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1046 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1047 SOC_DOUBLE_TLV("Capture Volume",
1048 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1049
370a0314
JEC
1050 /* AFM gains */
1051 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1052 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1053
8ecbabd9 1054 /* Playback gains */
0f9887d1
PU
1055 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1056 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, twl6040_get_volsw,
1057 twl6040_put_volsw, hs_tlv),
1058 SOC_DOUBLE_R_EXT_TLV("Handsfree Playback Volume",
1059 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1,
1060 twl6040_get_volsw, twl6040_put_volsw, hf_tlv),
871a05a7
JEC
1061 SOC_SINGLE_TLV("Earphone Playback Volume",
1062 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1063
7cca6067 1064 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC
1065 twl6040_headset_power_get_enum,
1066 twl6040_headset_power_put_enum),
af958c72
PU
1067
1068 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1069 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC
1070};
1071
1072static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1073 /* Inputs */
1074 SND_SOC_DAPM_INPUT("MAINMIC"),
1075 SND_SOC_DAPM_INPUT("HSMIC"),
1076 SND_SOC_DAPM_INPUT("SUBMIC"),
1077 SND_SOC_DAPM_INPUT("AFML"),
1078 SND_SOC_DAPM_INPUT("AFMR"),
1079
1080 /* Outputs */
1081 SND_SOC_DAPM_OUTPUT("HSOL"),
1082 SND_SOC_DAPM_OUTPUT("HSOR"),
1083 SND_SOC_DAPM_OUTPUT("HFL"),
1084 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1085 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU
1086 SND_SOC_DAPM_OUTPUT("AUXL"),
1087 SND_SOC_DAPM_OUTPUT("AUXR"),
67c34130
PU
1088 SND_SOC_DAPM_OUTPUT("VIBRAL"),
1089 SND_SOC_DAPM_OUTPUT("VIBRAR"),
8ecbabd9
MLC
1090
1091 /* Analog input muxes for the capture amplifiers */
1092 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1093 SND_SOC_NOPM, 0, 0, &amicl_control),
1094 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1095 SND_SOC_NOPM, 0, 0, &amicr_control),
1096
1097 /* Analog capture PGAs */
1098 SND_SOC_DAPM_PGA("MicAmpL",
1099 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1100 SND_SOC_DAPM_PGA("MicAmpR",
1101 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1102
370a0314
JEC
1103 /* Auxiliary FM PGAs */
1104 SND_SOC_DAPM_PGA("AFMAmpL",
1105 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1106 SND_SOC_DAPM_PGA("AFMAmpR",
1107 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1108
8ecbabd9
MLC
1109 /* ADCs */
1110 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1111 TWL6040_REG_MICLCTL, 2, 0),
1112 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1113 TWL6040_REG_MICRCTL, 2, 0),
1114
1115 /* Microphone bias */
1116 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1117 TWL6040_REG_AMICBCTL, 0, 0),
1118 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1119 TWL6040_REG_AMICBCTL, 4, 0),
1120 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1121 TWL6040_REG_DMICBCTL, 0, 0),
1122 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1123 TWL6040_REG_DMICBCTL, 4, 0),
1124
1125 /* DACs */
33b6816c
PU
1126 SND_SOC_DAPM_DAC("HSDAC Left", "Headset Playback", SND_SOC_NOPM, 0, 0),
1127 SND_SOC_DAPM_DAC("HSDAC Right", "Headset Playback", SND_SOC_NOPM, 0, 0),
8ecbabd9
MLC
1128 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1129 TWL6040_REG_HFLCTL, 0, 0,
1130 twl6040_power_mode_event,
1131 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1132 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1133 TWL6040_REG_HFRCTL, 0, 0,
1134 twl6040_power_mode_event,
1135 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
67c34130
PU
1136 /* Virtual DAC for vibra path (DL4 channel) */
1137 SND_SOC_DAPM_DAC("VIBRA DAC", "Vibra Playback",
1138 SND_SOC_NOPM, 0, 0),
8ecbabd9 1139
df11ce29 1140 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1141 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1142 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC
1143 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1144 /* Analog playback Muxes */
45b0f60d 1145 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1146 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1147 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1148 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1149
67c34130
PU
1150 SND_SOC_DAPM_MUX("Vibra Left Playback", SND_SOC_NOPM, 0, 0,
1151 &vibral_mux_controls),
1152 SND_SOC_DAPM_MUX("Vibra Right Playback", SND_SOC_NOPM, 0, 0,
1153 &vibrar_mux_controls),
1154
317596a6
PU
1155 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1156 &ep_path_enable_control),
fdb625ff
PU
1157 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1158 &auxl_switch_control),
1159 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1160 &auxr_switch_control),
317596a6 1161
0fad4ed7 1162 /* Analog playback drivers */
df11ce29 1163 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1164 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
eb6b71e7 1165 out_drv_event,
1bf84759 1166 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1167 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1168 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
eb6b71e7 1169 out_drv_event,
1bf84759 1170 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1171 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759 1172 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
eb6b71e7 1173 out_drv_event,
1bf84759 1174 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1175 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759 1176 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
eb6b71e7 1177 out_drv_event,
1bf84759 1178 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU
1179 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1180 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
871a05a7
JEC
1181 twl6040_power_mode_event,
1182 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
67c34130
PU
1183 SND_SOC_DAPM_OUT_DRV("Vibra Left Driver",
1184 TWL6040_REG_VIBCTLL, 0, 0, NULL, 0),
1185 SND_SOC_DAPM_OUT_DRV("Vibra Right Driver",
1186 TWL6040_REG_VIBCTLR, 0, 0, NULL, 0),
1187
1188 SND_SOC_DAPM_SUPPLY("Vibra Left Control", TWL6040_REG_VIBCTLL, 2, 0,
1189 NULL, 0),
1190 SND_SOC_DAPM_SUPPLY("Vibra Right Control", TWL6040_REG_VIBCTLR, 2, 0,
1191 NULL, 0),
33b6816c
PU
1192 SND_SOC_DAPM_SUPPLY_S("HSDAC Power", 1, SND_SOC_NOPM, 0, 0,
1193 twl6040_hs_dac_event,
1194 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC
1195
1196 /* Analog playback PGAs */
df11ce29 1197 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1198 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1199 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC
1200 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1201
1202};
1203
1204static const struct snd_soc_dapm_route intercon[] = {
1205 /* Capture path */
1206 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1207 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1208 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1209
1210 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1211 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1212 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1213
1214 {"MicAmpL", NULL, "Analog Left Capture Route"},
1215 {"MicAmpR", NULL, "Analog Right Capture Route"},
1216
1217 {"ADC Left", NULL, "MicAmpL"},
1218 {"ADC Right", NULL, "MicAmpR"},
1219
370a0314 1220 /* AFM path */
5bf692d9
PU
1221 {"AFMAmpL", NULL, "AFML"},
1222 {"AFMAmpR", NULL, "AFMR"},
370a0314 1223
33b6816c
PU
1224 {"HSDAC Left", NULL, "HSDAC Power"},
1225 {"HSDAC Right", NULL, "HSDAC Power"},
1226
45b0f60d
PU
1227 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1228 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1229
45b0f60d
PU
1230 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1231 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1232
45b0f60d
PU
1233 {"HS Left Driver", NULL, "Headset Left Playback"},
1234 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1235
45b0f60d
PU
1236 {"HSOL", NULL, "HS Left Driver"},
1237 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1238
871a05a7 1239 /* Earphone playback path */
317596a6
PU
1240 {"Earphone Playback", "Switch", "HSDAC Left"},
1241 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC
1242 {"EP", NULL, "Earphone Driver"},
1243
df11ce29
PU
1244 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1245 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1246
df11ce29
PU
1247 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1248 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1249
df11ce29
PU
1250 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1251 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1252
df11ce29
PU
1253 {"HF Left Driver", NULL, "HF Left PGA"},
1254 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1255
df11ce29
PU
1256 {"HFL", NULL, "HF Left Driver"},
1257 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU
1258
1259 {"AUXL Playback", "Switch", "HF Left PGA"},
1260 {"AUXR Playback", "Switch", "HF Right PGA"},
1261
1262 {"AUXL", NULL, "AUXL Playback"},
1263 {"AUXR", NULL, "AUXR Playback"},
67c34130
PU
1264
1265 /* Vibrator paths */
1266 {"Vibra Left Playback", "Audio PDM", "VIBRA DAC"},
1267 {"Vibra Right Playback", "Audio PDM", "VIBRA DAC"},
1268
1269 {"Vibra Left Driver", NULL, "Vibra Left Playback"},
1270 {"Vibra Right Driver", NULL, "Vibra Right Playback"},
1271 {"Vibra Left Driver", NULL, "Vibra Left Control"},
1272 {"Vibra Right Driver", NULL, "Vibra Right Control"},
1273
1274 {"VIBRAL", NULL, "Vibra Left Driver"},
1275 {"VIBRAR", NULL, "Vibra Right Driver"},
8ecbabd9
MLC
1276};
1277
8ecbabd9
MLC
1278static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1279 enum snd_soc_bias_level level)
1280{
fb34d3d5 1281 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1282 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1283 int ret;
1284
1285 switch (level) {
1286 case SND_SOC_BIAS_ON:
1287 break;
1288 case SND_SOC_BIAS_PREPARE:
1289 break;
1290 case SND_SOC_BIAS_STANDBY:
1291 if (priv->codec_powered)
1292 break;
1293
fb34d3d5
MLC
1294 ret = twl6040_power(twl6040, 1);
1295 if (ret)
1296 return ret;
8ecbabd9 1297
fb34d3d5 1298 priv->codec_powered = 1;
8ecbabd9 1299
a52762ee 1300 twl6040_restore_regs(codec);
65b7cecc
OM
1301
1302 /* Set external boost GPO */
1303 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC
1304 break;
1305 case SND_SOC_BIAS_OFF:
1306 if (!priv->codec_powered)
1307 break;
1308
fb34d3d5 1309 twl6040_power(twl6040, 0);
8ecbabd9
MLC
1310 priv->codec_powered = 0;
1311 break;
1312 }
1313
ce6120cc 1314 codec->dapm.bias_level = level;
8ecbabd9
MLC
1315
1316 return 0;
1317}
1318
8ecbabd9
MLC
1319static int twl6040_startup(struct snd_pcm_substream *substream,
1320 struct snd_soc_dai *dai)
1321{
1322 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1323 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1324 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1325
8ecbabd9
MLC
1326 snd_pcm_hw_constraint_list(substream->runtime, 0,
1327 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1328 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC
1329
1330 return 0;
1331}
1332
1333static int twl6040_hw_params(struct snd_pcm_substream *substream,
1334 struct snd_pcm_hw_params *params,
1335 struct snd_soc_dai *dai)
1336{
1337 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1338 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1339 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1340 int rate;
1341
8ecbabd9
MLC
1342 rate = params_rate(params);
1343 switch (rate) {
60ea4cec
OM
1344 case 11250:
1345 case 22500:
1346 case 44100:
8ecbabd9 1347 case 88200:
753621c2
PU
1348 /* These rates are not supported when HPPLL is in use */
1349 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1350 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1351 rate);
1352 return -EINVAL;
1353 }
8ecbabd9
MLC
1354 priv->sysclk = 17640000;
1355 break;
60ea4cec
OM
1356 case 8000:
1357 case 16000:
1358 case 32000:
1359 case 48000:
8ecbabd9 1360 case 96000:
8ecbabd9
MLC
1361 priv->sysclk = 19200000;
1362 break;
1363 default:
1364 dev_err(codec->dev, "unsupported rate %d\n", rate);
1365 return -EINVAL;
1366 }
1367
8ecbabd9
MLC
1368 return 0;
1369}
1370
4e624d06
OM
1371static int twl6040_prepare(struct snd_pcm_substream *substream,
1372 struct snd_soc_dai *dai)
8ecbabd9
MLC
1373{
1374 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1375 struct snd_soc_codec *codec = rtd->codec;
753621c2 1376 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1377 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1378 int ret;
8ecbabd9 1379
4e624d06
OM
1380 if (!priv->sysclk) {
1381 dev_err(codec->dev,
1382 "no mclk configured, call set_sysclk() on init\n");
1383 return -EINVAL;
1384 }
1385
4e624d06 1386 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC
1387 dev_err(codec->dev,
1388 "some enabled paths aren't supported at %dHz\n",
1389 priv->sysclk);
1390 return -EPERM;
8ecbabd9 1391 }
753621c2
PU
1392
1393 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1394 if (ret) {
1395 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1396 return -EPERM;
1397 }
1398
8ecbabd9
MLC
1399 return 0;
1400}
1401
1402static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1403 int clk_id, unsigned int freq, int dir)
1404{
1405 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1406 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC
1407
1408 switch (clk_id) {
1409 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1410 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU
1411 priv->pll = clk_id;
1412 priv->clk_in = freq;
8ecbabd9
MLC
1413 break;
1414 default:
1415 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1416 return -EINVAL;
1417 }
1418
1419 return 0;
1420}
1421
1422static struct snd_soc_dai_ops twl6040_dai_ops = {
1423 .startup = twl6040_startup,
1424 .hw_params = twl6040_hw_params,
4e624d06 1425 .prepare = twl6040_prepare,
8ecbabd9
MLC
1426 .set_sysclk = twl6040_set_dai_sysclk,
1427};
1428
6510bdc3 1429static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1430{
d13f1fe0 1431 .name = "twl6040-legacy",
8ecbabd9
MLC
1432 .playback = {
1433 .stream_name = "Playback",
1434 .channels_min = 1,
cdd5054c 1435 .channels_max = 5,
21385eeb
PU
1436 .rates = TWL6040_RATES,
1437 .formats = TWL6040_FORMATS,
1438 },
1439 .capture = {
1440 .stream_name = "Capture",
1441 .channels_min = 1,
1442 .channels_max = 2,
8ecbabd9
MLC
1443 .rates = TWL6040_RATES,
1444 .formats = TWL6040_FORMATS,
1445 },
21385eeb
PU
1446 .ops = &twl6040_dai_ops,
1447},
6510bdc3
LG
1448{
1449 .name = "twl6040-ul",
8ecbabd9
MLC
1450 .capture = {
1451 .stream_name = "Capture",
1452 .channels_min = 1,
1453 .channels_max = 2,
1454 .rates = TWL6040_RATES,
1455 .formats = TWL6040_FORMATS,
1456 },
1457 .ops = &twl6040_dai_ops,
6510bdc3
LG
1458},
1459{
1460 .name = "twl6040-dl1",
8ecbabd9 1461 .playback = {
6510bdc3 1462 .stream_name = "Headset Playback",
8ecbabd9 1463 .channels_min = 1,
6510bdc3 1464 .channels_max = 2,
8ecbabd9
MLC
1465 .rates = TWL6040_RATES,
1466 .formats = TWL6040_FORMATS,
1467 },
6510bdc3
LG
1468 .ops = &twl6040_dai_ops,
1469},
1470{
1471 .name = "twl6040-dl2",
1472 .playback = {
1473 .stream_name = "Handsfree Playback",
8ecbabd9
MLC
1474 .channels_min = 1,
1475 .channels_max = 2,
1476 .rates = TWL6040_RATES,
1477 .formats = TWL6040_FORMATS,
1478 },
1479 .ops = &twl6040_dai_ops,
6510bdc3
LG
1480},
1481{
1482 .name = "twl6040-vib",
1483 .playback = {
1484 .stream_name = "Vibra Playback",
d8dd032d
PU
1485 .channels_min = 1,
1486 .channels_max = 1,
6510bdc3
LG
1487 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1488 .formats = TWL6040_FORMATS,
1489 },
1490 .ops = &twl6040_dai_ops,
1491},
8ecbabd9 1492};
8ecbabd9
MLC
1493
1494#ifdef CONFIG_PM
f0fba2ad 1495static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1496{
8ecbabd9
MLC
1497 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1498
1499 return 0;
1500}
1501
f0fba2ad 1502static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1503{
8ecbabd9 1504 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1505 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC
1506
1507 return 0;
1508}
1509#else
1510#define twl6040_suspend NULL
1511#define twl6040_resume NULL
1512#endif
1513
f0fba2ad 1514static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1515{
8ecbabd9 1516 struct twl6040_data *priv;
1fbe9952 1517 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU
1518 struct platform_device *pdev = container_of(codec->dev,
1519 struct platform_device, dev);
8ecbabd9
MLC
1520 int ret = 0;
1521
1522 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1523 if (priv == NULL)
1524 return -ENOMEM;
f0fba2ad 1525 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1526
a2d2362e 1527 priv->codec = codec;
fb34d3d5 1528 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1529
1fbe9952
ACG
1530 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1531 priv->hs_left_step = pdata->hs_left_step;
1532 priv->hs_right_step = pdata->hs_right_step;
1533 } else {
1534 priv->hs_left_step = 1;
1535 priv->hs_right_step = 1;
1536 }
99903ea2 1537
1fbe9952
ACG
1538 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1539 priv->hf_left_step = pdata->hf_left_step;
1540 priv->hf_right_step = pdata->hf_right_step;
1541 } else {
1542 priv->hf_left_step = 1;
1543 priv->hf_right_step = 1;
1544 }
99903ea2 1545
2a433b9d
PU
1546 priv->plug_irq = platform_get_irq(pdev, 0);
1547 if (priv->plug_irq < 0) {
1548 dev_err(codec->dev, "invalid irq\n");
1549 ret = -EINVAL;
1550 goto work_err;
1551 }
8ecbabd9 1552
a46737ae 1553 priv->workqueue = alloc_workqueue("twl6040-codec", 0, 0);
19aab08d
AL
1554 if (!priv->workqueue) {
1555 ret = -ENOMEM;
a2d2362e 1556 goto work_err;
19aab08d 1557 }
a2d2362e 1558
46dd0b93 1559 INIT_DELAYED_WORK(&priv->hs_jack.work, twl6040_accessory_work);
a46737ae
PU
1560 INIT_DELAYED_WORK(&priv->headset.work, twl6040_pga_hs_work);
1561 INIT_DELAYED_WORK(&priv->handsfree.work, twl6040_pga_hf_work);
a2d2362e
JEC
1562
1563 mutex_init(&priv->mutex);
8ecbabd9 1564
1bf84759
MOC
1565 init_completion(&priv->headset.ramp_done);
1566 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1567
2a433b9d
PU
1568 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1569 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC
1570 if (ret) {
1571 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1572 goto plugirq_err;
1573 }
1574
a52762ee 1575 twl6040_init_chip(codec);
fb34d3d5 1576
8ecbabd9
MLC
1577 /* power on device */
1578 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
a175fce0
PU
1579 if (!ret)
1580 return 0;
8ecbabd9 1581
a175fce0 1582 /* Error path */
2a433b9d 1583 free_irq(priv->plug_irq, codec);
fb34d3d5 1584plugirq_err:
a2d2362e
JEC
1585 destroy_workqueue(priv->workqueue);
1586work_err:
8ecbabd9
MLC
1587 kfree(priv);
1588 return ret;
1589}
1590
f0fba2ad 1591static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1592{
f0fba2ad 1593 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1594
f0fba2ad 1595 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1596 free_irq(priv->plug_irq, codec);
a2d2362e 1597 destroy_workqueue(priv->workqueue);
f0fba2ad 1598 kfree(priv);
8ecbabd9 1599
f0fba2ad
LG
1600 return 0;
1601}
8ecbabd9 1602
f0fba2ad
LG
1603static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1604 .probe = twl6040_probe,
1605 .remove = twl6040_remove,
1606 .suspend = twl6040_suspend,
1607 .resume = twl6040_resume,
1608 .read = twl6040_read_reg_cache,
1609 .write = twl6040_write,
1610 .set_bias_level = twl6040_set_bias_level,
1611 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1612 .reg_word_size = sizeof(u8),
1613 .reg_cache_default = twl6040_reg,
a175fce0
PU
1614
1615 .controls = twl6040_snd_controls,
1616 .num_controls = ARRAY_SIZE(twl6040_snd_controls),
1617 .dapm_widgets = twl6040_dapm_widgets,
1618 .num_dapm_widgets = ARRAY_SIZE(twl6040_dapm_widgets),
1619 .dapm_routes = intercon,
1620 .num_dapm_routes = ARRAY_SIZE(intercon),
f0fba2ad
LG
1621};
1622
1623static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1624{
6510bdc3
LG
1625 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1626 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG
1627}
1628
1629static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1630{
1631 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC
1632 return 0;
1633}
1634
1635static struct platform_driver twl6040_codec_driver = {
1636 .driver = {
f0fba2ad 1637 .name = "twl6040-codec",
8ecbabd9
MLC
1638 .owner = THIS_MODULE,
1639 },
1640 .probe = twl6040_codec_probe,
1641 .remove = __devexit_p(twl6040_codec_remove),
1642};
1643
1644static int __init twl6040_codec_init(void)
1645{
1646 return platform_driver_register(&twl6040_codec_driver);
1647}
1648module_init(twl6040_codec_init);
1649
1650static void __exit twl6040_codec_exit(void)
1651{
1652 platform_driver_unregister(&twl6040_codec_driver);
1653}
1654module_exit(twl6040_codec_exit);
1655
1656MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1657MODULE_AUTHOR("Misael Lopez Cruz");
1658MODULE_LICENSE("GPL");
This page took 0.208023 seconds and 5 git commands to generate.