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ASoC: twl6040: Read the TRIM values from the chip
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC		 1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
8ecbabd9 27#include <linux/platform_device.h>
68b40cc4 28#include <linux/slab.h>
8ecbabd9 29#include <linux/i2c/twl.h>
fb34d3d5 30#include <linux/mfd/twl6040.h>
8ecbabd9
MLC		 31
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
8ecbabd9
MLC		 36#include <sound/initval.h>
37#include <sound/tlv.h>
38
39#include "twl6040.h"
40
60ea4cec 41#define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
1bf84759
MOC		 42#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
43
44#define TWL6040_OUTHS_0dB 0x00
45#define TWL6040_OUTHS_M30dB 0x0F
46#define TWL6040_OUTHF_0dB 0x03
47#define TWL6040_OUTHF_M52dB 0x1D
48
49#define TWL6040_RAMP_NONE 0
50#define TWL6040_RAMP_UP 1
51#define TWL6040_RAMP_DOWN 2
52
53#define TWL6040_HSL_VOL_MASK 0x0F
54#define TWL6040_HSL_VOL_SHIFT 0
55#define TWL6040_HSR_VOL_MASK 0xF0
56#define TWL6040_HSR_VOL_SHIFT 4
57#define TWL6040_HF_VOL_MASK 0x1F
58#define TWL6040_HF_VOL_SHIFT 0
59
d17bf318
PU		 60/* Shadow register used by the driver */
61#define TWL6040_REG_SW_SHADOW 0x2F
62#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1)
63
317596a6
PU		 64/* TWL6040_REG_SW_SHADOW (0x2F) fields */
65#define TWL6040_EAR_PATH_ENABLE 0x01
66
1bf84759
MOC		 67struct twl6040_output {
68 u16 active;
69 u16 left_vol;
70 u16 right_vol;
71 u16 left_step;
72 u16 right_step;
73 unsigned int step_delay;
74 u16 ramp;
75 u16 mute;
76 struct completion ramp_done;
77};
8ecbabd9 78
a2d2362e
JEC		 79struct twl6040_jack_data {
80 struct snd_soc_jack *jack;
81 int report;
82};
83
8ecbabd9
MLC		 84/* codec private data */
85struct twl6040_data {
2a433b9d 86 int plug_irq;
8ecbabd9
MLC		 87 int codec_powered;
88 int pll;
89 int non_lp;
af958c72 90 int pll_power_mode;
6bba63b6
MLC		 91 int hs_power_mode;
92 int hs_power_mode_locked;
fb34d3d5 93 unsigned int clk_in;
8ecbabd9 94 unsigned int sysclk;
1fbe9952
ACG		 95 u16 hs_left_step;
96 u16 hs_right_step;
97 u16 hf_left_step;
98 u16 hf_right_step;
a2d2362e
JEC		 99 struct twl6040_jack_data hs_jack;
100 struct snd_soc_codec *codec;
101 struct workqueue_struct *workqueue;
102 struct delayed_work delayed_work;
103 struct mutex mutex;
1bf84759
MOC		 104 struct twl6040_output headset;
105 struct twl6040_output handsfree;
106 struct workqueue_struct *hf_workqueue;
107 struct workqueue_struct *hs_workqueue;
108 struct delayed_work hs_delayed_work;
109 struct delayed_work hf_delayed_work;
8ecbabd9
MLC		 110};
111
112/*
113 * twl6040 register cache & default register settings
114 */
115static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
4548dc3c
PU		 116 0x00, /* not used 0x00 */
117 0x4B, /* REG_ASICID 0x01 (ro) */
118 0x00, /* REG_ASICREV 0x02 (ro) */
119 0x00, /* REG_INTID 0x03 */
120 0x00, /* REG_INTMR 0x04 */
121 0x00, /* REG_NCPCTRL 0x05 */
122 0x00, /* REG_LDOCTL 0x06 */
123 0x60, /* REG_HPPLLCTL 0x07 */
124 0x00, /* REG_LPPLLCTL 0x08 */
125 0x4A, /* REG_LPPLLDIV 0x09 */
126 0x00, /* REG_AMICBCTL 0x0A */
127 0x00, /* REG_DMICBCTL 0x0B */
128 0x00, /* REG_MICLCTL 0x0C */
129 0x00, /* REG_MICRCTL 0x0D */
130 0x00, /* REG_MICGAIN 0x0E */
131 0x1B, /* REG_LINEGAIN 0x0F */
132 0x00, /* REG_HSLCTL 0x10 */
133 0x00, /* REG_HSRCTL 0x11 */
134 0x00, /* REG_HSGAIN 0x12 */
135 0x00, /* REG_EARCTL 0x13 */
136 0x00, /* REG_HFLCTL 0x14 */
137 0x00, /* REG_HFLGAIN 0x15 */
138 0x00, /* REG_HFRCTL 0x16 */
139 0x00, /* REG_HFRGAIN 0x17 */
140 0x00, /* REG_VIBCTLL 0x18 */
141 0x00, /* REG_VIBDATL 0x19 */
142 0x00, /* REG_VIBCTLR 0x1A */
143 0x00, /* REG_VIBDATR 0x1B */
144 0x00, /* REG_HKCTL1 0x1C */
145 0x00, /* REG_HKCTL2 0x1D */
146 0x00, /* REG_GPOCTL 0x1E */
147 0x00, /* REG_ALB 0x1F */
148 0x00, /* REG_DLB 0x20 */
149 0x00, /* not used 0x21 */
150 0x00, /* not used 0x22 */
151 0x00, /* not used 0x23 */
152 0x00, /* not used 0x24 */
153 0x00, /* not used 0x25 */
154 0x00, /* not used 0x26 */
155 0x00, /* not used 0x27 */
156 0x00, /* REG_TRIM1 0x28 */
157 0x00, /* REG_TRIM2 0x29 */
158 0x00, /* REG_TRIM3 0x2A */
159 0x00, /* REG_HSOTRIM 0x2B */
160 0x00, /* REG_HFOTRIM 0x2C */
161 0x09, /* REG_ACCCTL 0x2D */
162 0x00, /* REG_STATUS 0x2E (ro) */
d17bf318
PU		 163
164 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */
8ecbabd9
MLC		 165};
166
a52762ee
PU		 167/* List of registers to be restored after power up */
168static const int twl6040_restore_list[] = {
8ecbabd9
MLC		 169 TWL6040_REG_MICLCTL,
170 TWL6040_REG_MICRCTL,
171 TWL6040_REG_MICGAIN,
172 TWL6040_REG_LINEGAIN,
173 TWL6040_REG_HSLCTL,
174 TWL6040_REG_HSRCTL,
175 TWL6040_REG_HSGAIN,
176 TWL6040_REG_EARCTL,
177 TWL6040_REG_HFLCTL,
178 TWL6040_REG_HFLGAIN,
179 TWL6040_REG_HFRCTL,
180 TWL6040_REG_HFRGAIN,
8ecbabd9
MLC		 181};
182
af958c72
PU		 183/* set of rates for each pll: low-power and high-performance */
184static unsigned int lp_rates[] = {
185 8000,
186 11250,
187 16000,
188 22500,
189 32000,
190 44100,
191 48000,
192 88200,
193 96000,
194};
195
af958c72
PU		 196static unsigned int hp_rates[] = {
197 8000,
198 16000,
199 32000,
200 48000,
201 96000,
202};
203
f53c346c
PU		 204static struct snd_pcm_hw_constraint_list sysclk_constraints[] = {
205 { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, },
206 { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, },
af958c72
PU		 207};
208
8ecbabd9
MLC		 209/*
210 * read twl6040 register cache
211 */
212static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
213 unsigned int reg)
214{
215 u8 *cache = codec->reg_cache;
216
217 if (reg >= TWL6040_CACHEREGNUM)
218 return -EIO;
219
220 return cache[reg];
221}
222
223/*
224 * write twl6040 register cache
225 */
226static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
227 u8 reg, u8 value)
228{
229 u8 *cache = codec->reg_cache;
230
231 if (reg >= TWL6040_CACHEREGNUM)
232 return;
233 cache[reg] = value;
234}
235
236/*
237 * read from twl6040 hardware register
238 */
239static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
240 unsigned int reg)
241{
fb34d3d5 242 struct twl6040 *twl6040 = codec->control_data;
8ecbabd9
MLC		 243 u8 value;
244
245 if (reg >= TWL6040_CACHEREGNUM)
246 return -EIO;
247
d17bf318
PU		 248 if (likely(reg < TWL6040_REG_SW_SHADOW)) {
249 value = twl6040_reg_read(twl6040, reg);
250 twl6040_write_reg_cache(codec, reg, value);
251 } else {
252 value = twl6040_read_reg_cache(codec, reg);
253 }
8ecbabd9
MLC		 254
255 return value;
256}
257
258/*
259 * write to the twl6040 register space
260 */
261static int twl6040_write(struct snd_soc_codec *codec,
262 unsigned int reg, unsigned int value)
263{
fb34d3d5
MLC		 264 struct twl6040 *twl6040 = codec->control_data;
265
8ecbabd9
MLC		 266 if (reg >= TWL6040_CACHEREGNUM)
267 return -EIO;
268
269 twl6040_write_reg_cache(codec, reg, value);
d17bf318
PU		 270 if (likely(reg < TWL6040_REG_SW_SHADOW))
271 return twl6040_reg_write(twl6040, reg, value);
272 else
273 return 0;
8ecbabd9
MLC		 274}
275
a52762ee 276static void twl6040_init_chip(struct snd_soc_codec *codec)
8ecbabd9 277{
a52762ee
PU		 278 struct twl6040 *twl6040 = codec->control_data;
279 u8 val;
280
f97217f1 281 /* Update reg_cache: ASICREV, and TRIM values */
a52762ee
PU		 282 val = twl6040_get_revid(twl6040);
283 twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val);
8ecbabd9 284
f97217f1
PU		 285 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1);
286 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2);
287 twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3);
288 twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM);
289 twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM);
290
2c27ff41
PU		 291 /* Change chip defaults */
292 /* No imput selected for microphone amplifiers */
293 twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18);
294 twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18);
3acef685
PU		 295
296 /*
297 * We need to lower the default gain values, so the ramp code
298 * can work correctly for the first playback.
299 * This reduces the pop noise heard at the first playback.
300 */
301 twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff);
302 twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e);
303 twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d);
304 twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d);
305 twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0);
8ecbabd9
MLC		 306}
307
a52762ee 308static void twl6040_restore_regs(struct snd_soc_codec *codec)
8ecbabd9
MLC		 309{
310 u8 *cache = codec->reg_cache;
311 int reg, i;
312
a52762ee
PU		 313 for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) {
314 reg = twl6040_restore_list[i];
8ecbabd9
MLC		 315 twl6040_write(codec, reg, cache[reg]);
316 }
317}
318
1bf84759
MOC		 319/*
320 * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
321 */
322static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
323 unsigned int left_step, unsigned int right_step)
324{
325
326 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
327 struct twl6040_output *headset = &priv->headset;
328 int left_complete = 0, right_complete = 0;
329 u8 reg, val;
330
331 /* left channel */
332 left_step = (left_step > 0xF) ? 0xF : left_step;
333 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
334 val = (~reg & TWL6040_HSL_VOL_MASK);
335
336 if (headset->ramp == TWL6040_RAMP_UP) {
337 /* ramp step up */
338 if (val < headset->left_vol) {
1fbe9952
ACG		 339 if (val + left_step > headset->left_vol)
340 val = headset->left_vol;
341 else
342 val += left_step;
343
1bf84759
MOC		 344 reg &= ~TWL6040_HSL_VOL_MASK;
345 twl6040_write(codec, TWL6040_REG_HSGAIN,
346 (reg | (~val & TWL6040_HSL_VOL_MASK)));
347 } else {
348 left_complete = 1;
349 }
350 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
351 /* ramp step down */
352 if (val > 0x0) {
1fbe9952
ACG		 353 if ((int)val - (int)left_step < 0)
354 val = 0;
355 else
356 val -= left_step;
357
1bf84759
MOC		 358 reg &= ~TWL6040_HSL_VOL_MASK;
359 twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
360 (~val & TWL6040_HSL_VOL_MASK));
361 } else {
362 left_complete = 1;
363 }
364 }
365
366 /* right channel */
367 right_step = (right_step > 0xF) ? 0xF : right_step;
368 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
369 val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
370
371 if (headset->ramp == TWL6040_RAMP_UP) {
372 /* ramp step up */
373 if (val < headset->right_vol) {
1fbe9952
ACG		 374 if (val + right_step > headset->right_vol)
375 val = headset->right_vol;
376 else
377 val += right_step;
378
1bf84759
MOC		 379 reg &= ~TWL6040_HSR_VOL_MASK;
380 twl6040_write(codec, TWL6040_REG_HSGAIN,
381 (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
382 } else {
383 right_complete = 1;
384 }
385 } else if (headset->ramp == TWL6040_RAMP_DOWN) {
386 /* ramp step down */
387 if (val > 0x0) {
1fbe9952
ACG		 388 if ((int)val - (int)right_step < 0)
389 val = 0;
390 else
391 val -= right_step;
392
1bf84759
MOC		 393 reg &= ~TWL6040_HSR_VOL_MASK;
394 twl6040_write(codec, TWL6040_REG_HSGAIN,
395 reg | (~val << TWL6040_HSR_VOL_SHIFT));
396 } else {
397 right_complete = 1;
398 }
399 }
400
401 return left_complete & right_complete;
402}
403
404/*
405 * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
406 */
407static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
408 unsigned int left_step, unsigned int right_step)
409{
410 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
411 struct twl6040_output *handsfree = &priv->handsfree;
412 int left_complete = 0, right_complete = 0;
413 u16 reg, val;
414
415 /* left channel */
416 left_step = (left_step > 0x1D) ? 0x1D : left_step;
417 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
418 reg = 0x1D - reg;
419 val = (reg & TWL6040_HF_VOL_MASK);
420 if (handsfree->ramp == TWL6040_RAMP_UP) {
421 /* ramp step up */
422 if (val < handsfree->left_vol) {
1fbe9952
ACG		 423 if (val + left_step > handsfree->left_vol)
424 val = handsfree->left_vol;
425 else
426 val += left_step;
427
1bf84759
MOC		 428 reg &= ~TWL6040_HF_VOL_MASK;
429 twl6040_write(codec, TWL6040_REG_HFLGAIN,
430 reg | (0x1D - val));
431 } else {
432 left_complete = 1;
433 }
434 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
435 /* ramp step down */
436 if (val > 0) {
1fbe9952
ACG		 437 if ((int)val - (int)left_step < 0)
438 val = 0;
439 else
440 val -= left_step;
441
1bf84759
MOC		 442 reg &= ~TWL6040_HF_VOL_MASK;
443 twl6040_write(codec, TWL6040_REG_HFLGAIN,
444 reg | (0x1D - val));
445 } else {
446 left_complete = 1;
447 }
448 }
449
450 /* right channel */
451 right_step = (right_step > 0x1D) ? 0x1D : right_step;
452 reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
453 reg = 0x1D - reg;
454 val = (reg & TWL6040_HF_VOL_MASK);
455 if (handsfree->ramp == TWL6040_RAMP_UP) {
456 /* ramp step up */
457 if (val < handsfree->right_vol) {
1fbe9952
ACG		 458 if (val + right_step > handsfree->right_vol)
459 val = handsfree->right_vol;
460 else
461 val += right_step;
462
1bf84759
MOC		 463 reg &= ~TWL6040_HF_VOL_MASK;
464 twl6040_write(codec, TWL6040_REG_HFRGAIN,
465 reg | (0x1D - val));
466 } else {
467 right_complete = 1;
468 }
469 } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
470 /* ramp step down */
471 if (val > 0) {
1fbe9952
ACG		 472 if ((int)val - (int)right_step < 0)
473 val = 0;
474 else
475 val -= right_step;
476
1bf84759
MOC		 477 reg &= ~TWL6040_HF_VOL_MASK;
478 twl6040_write(codec, TWL6040_REG_HFRGAIN,
479 reg | (0x1D - val));
480 }
481 }
482
483 return left_complete & right_complete;
484}
485
486/*
487 * This work ramps both output PGAs at stream start/stop time to
488 * minimise pop associated with DAPM power switching.
489 */
490static void twl6040_pga_hs_work(struct work_struct *work)
491{
492 struct twl6040_data *priv =
493 container_of(work, struct twl6040_data, hs_delayed_work.work);
494 struct snd_soc_codec *codec = priv->codec;
495 struct twl6040_output *headset = &priv->headset;
496 unsigned int delay = headset->step_delay;
497 int i, headset_complete;
498
499 /* do we need to ramp at all ? */
500 if (headset->ramp == TWL6040_RAMP_NONE)
501 return;
502
503 /* HS PGA volumes have 4 bits of resolution to ramp */
504 for (i = 0; i <= 16; i++) {
1fbe9952
ACG		 505 headset_complete = twl6040_hs_ramp_step(codec,
506 headset->left_step,
507 headset->right_step);
1bf84759
MOC		 508
509 /* ramp finished ? */
510 if (headset_complete)
511 break;
512
513 /*
514 * TODO: tune: delay is longer over 0dB
515 * as increases are larger.
516 */
517 if (i >= 8)
518 schedule_timeout_interruptible(msecs_to_jiffies(delay +
519 (delay >> 1)));
520 else
521 schedule_timeout_interruptible(msecs_to_jiffies(delay));
522 }
523
524 if (headset->ramp == TWL6040_RAMP_DOWN) {
525 headset->active = 0;
526 complete(&headset->ramp_done);
527 } else {
528 headset->active = 1;
529 }
530 headset->ramp = TWL6040_RAMP_NONE;
531}
532
533static void twl6040_pga_hf_work(struct work_struct *work)
534{
535 struct twl6040_data *priv =
536 container_of(work, struct twl6040_data, hf_delayed_work.work);
537 struct snd_soc_codec *codec = priv->codec;
538 struct twl6040_output *handsfree = &priv->handsfree;
539 unsigned int delay = handsfree->step_delay;
540 int i, handsfree_complete;
541
542 /* do we need to ramp at all ? */
543 if (handsfree->ramp == TWL6040_RAMP_NONE)
544 return;
545
546 /* HF PGA volumes have 5 bits of resolution to ramp */
547 for (i = 0; i <= 32; i++) {
1fbe9952
ACG		 548 handsfree_complete = twl6040_hf_ramp_step(codec,
549 handsfree->left_step,
550 handsfree->right_step);
1bf84759
MOC		 551
552 /* ramp finished ? */
553 if (handsfree_complete)
554 break;
555
556 /*
557 * TODO: tune: delay is longer over 0dB
558 * as increases are larger.
559 */
560 if (i >= 16)
561 schedule_timeout_interruptible(msecs_to_jiffies(delay +
562 (delay >> 1)));
563 else
564 schedule_timeout_interruptible(msecs_to_jiffies(delay));
565 }
566
567
568 if (handsfree->ramp == TWL6040_RAMP_DOWN) {
569 handsfree->active = 0;
570 complete(&handsfree->ramp_done);
571 } else
572 handsfree->active = 1;
573 handsfree->ramp = TWL6040_RAMP_NONE;
574}
575
576static int pga_event(struct snd_soc_dapm_widget *w,
577 struct snd_kcontrol *kcontrol, int event)
578{
579 struct snd_soc_codec *codec = w->codec;
580 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
581 struct twl6040_output *out;
582 struct delayed_work *work;
583 struct workqueue_struct *queue;
584
585 switch (w->shift) {
586 case 2:
587 case 3:
588 out = &priv->headset;
589 work = &priv->hs_delayed_work;
590 queue = priv->hs_workqueue;
1fbe9952
ACG		 591 out->left_step = priv->hs_left_step;
592 out->right_step = priv->hs_right_step;
1bf84759
MOC		 593 out->step_delay = 5; /* 5 ms between volume ramp steps */
594 break;
595 case 4:
596 out = &priv->handsfree;
597 work = &priv->hf_delayed_work;
598 queue = priv->hf_workqueue;
1fbe9952
ACG		 599 out->left_step = priv->hf_left_step;
600 out->right_step = priv->hf_right_step;
1bf84759
MOC		 601 out->step_delay = 5; /* 5 ms between volume ramp steps */
602 if (SND_SOC_DAPM_EVENT_ON(event))
603 priv->non_lp++;
604 else
605 priv->non_lp--;
606 break;
607 default:
608 return -1;
609 }
610
611 switch (event) {
612 case SND_SOC_DAPM_POST_PMU:
613 if (out->active)
614 break;
615
616 /* don't use volume ramp for power-up */
617 out->left_step = out->left_vol;
618 out->right_step = out->right_vol;
619
620 if (!delayed_work_pending(work)) {
621 out->ramp = TWL6040_RAMP_UP;
622 queue_delayed_work(queue, work,
623 msecs_to_jiffies(1));
624 }
625 break;
626
627 case SND_SOC_DAPM_PRE_PMD:
628 if (!out->active)
629 break;
630
631 if (!delayed_work_pending(work)) {
632 /* use volume ramp for power-down */
1bf84759
MOC		 633 out->ramp = TWL6040_RAMP_DOWN;
634 INIT_COMPLETION(out->ramp_done);
635
636 queue_delayed_work(queue, work,
637 msecs_to_jiffies(1));
638
639 wait_for_completion_timeout(&out->ramp_done,
640 msecs_to_jiffies(2000));
641 }
642 break;
643 }
644
645 return 0;
646}
647
8ecbabd9
MLC		 648/* set headset dac and driver power mode */
649static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
650{
651 int hslctl, hsrctl;
ab6cf139 652 int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
8ecbabd9
MLC		 653
654 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
655 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
656
657 if (high_perf) {
658 hslctl &= ~mask;
659 hsrctl &= ~mask;
660 } else {
661 hslctl |= mask;
662 hsrctl |= mask;
663 }
664
665 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
666 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
667
668 return 0;
669}
670
0fad4ed7
JEC		 671static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
672 struct snd_kcontrol *kcontrol, int event)
673{
674 msleep(1);
675 return 0;
676}
677
8ecbabd9
MLC		 678static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
679 struct snd_kcontrol *kcontrol, int event)
680{
681 struct snd_soc_codec *codec = w->codec;
d4a8ca24 682 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
6bba63b6 683 int ret = 0;
8ecbabd9 684
6bba63b6 685 if (SND_SOC_DAPM_EVENT_ON(event)) {
8ecbabd9 686 priv->non_lp++;
6bba63b6
MLC		 687 if (!strcmp(w->name, "Earphone Driver")) {
688 /* Earphone doesn't support low power mode */
689 priv->hs_power_mode_locked = 1;
690 ret = headset_power_mode(codec, 1);
691 }
692 } else {
8ecbabd9 693 priv->non_lp--;
6bba63b6
MLC		 694 if (!strcmp(w->name, "Earphone Driver")) {
695 priv->hs_power_mode_locked = 0;
696 ret = headset_power_mode(codec, priv->hs_power_mode);
697 }
698 }
8ecbabd9 699
0fad4ed7
JEC		 700 msleep(1);
701
6bba63b6 702 return ret;
8ecbabd9
MLC		 703}
704
64ed9836
MB		 705static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
706 struct snd_soc_jack *jack, int report)
a2d2362e
JEC		 707{
708 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
709 int status;
710
711 mutex_lock(&priv->mutex);
712
713 /* Sync status */
714 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
715 if (status & TWL6040_PLUGCOMP)
716 snd_soc_jack_report(jack, report, report);
717 else
718 snd_soc_jack_report(jack, 0, report);
719
720 mutex_unlock(&priv->mutex);
721}
722
723void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
724 struct snd_soc_jack *jack, int report)
725{
726 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
727 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
728
729 hs_jack->jack = jack;
730 hs_jack->report = report;
731
732 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
733}
734EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
735
736static void twl6040_accessory_work(struct work_struct *work)
737{
738 struct twl6040_data *priv = container_of(work,
739 struct twl6040_data, delayed_work.work);
740 struct snd_soc_codec *codec = priv->codec;
741 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
742
743 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
744}
745
8ecbabd9 746/* audio interrupt handler */
fb34d3d5 747static irqreturn_t twl6040_audio_handler(int irq, void *data)
8ecbabd9
MLC		 748{
749 struct snd_soc_codec *codec = data;
d4a8ca24 750 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
cf370a5a 751
f34c6606
PU		 752 queue_delayed_work(priv->workqueue, &priv->delayed_work,
753 msecs_to_jiffies(200));
cf370a5a 754
8ecbabd9
MLC		 755 return IRQ_HANDLED;
756}
757
1bf84759
MOC		 758static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
759 struct snd_ctl_elem_value *ucontrol)
760{
761 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
762 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
763 struct twl6040_output *out = NULL;
764 struct soc_mixer_control *mc =
765 (struct soc_mixer_control *)kcontrol->private_value;
766 int ret;
767 unsigned int reg = mc->reg;
768
769 /* For HS and HF we shadow the values and only actually write
770 * them out when active in order to ensure the amplifier comes on
771 * as quietly as possible. */
772 switch (reg) {
773 case TWL6040_REG_HSGAIN:
774 out = &twl6040_priv->headset;
775 break;
776 default:
777 break;
778 }
779
780 if (out) {
781 out->left_vol = ucontrol->value.integer.value[0];
782 out->right_vol = ucontrol->value.integer.value[1];
783 if (!out->active)
784 return 1;
785 }
786
787 ret = snd_soc_put_volsw(kcontrol, ucontrol);
788 if (ret < 0)
789 return ret;
790
791 return 1;
792}
793
794static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
795 struct snd_ctl_elem_value *ucontrol)
796{
797 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
798 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
799 struct twl6040_output *out = &twl6040_priv->headset;
800 struct soc_mixer_control *mc =
801 (struct soc_mixer_control *)kcontrol->private_value;
802 unsigned int reg = mc->reg;
803
804 switch (reg) {
805 case TWL6040_REG_HSGAIN:
806 out = &twl6040_priv->headset;
807 ucontrol->value.integer.value[0] = out->left_vol;
808 ucontrol->value.integer.value[1] = out->right_vol;
809 return 0;
810
811 default:
812 break;
813 }
814
815 return snd_soc_get_volsw(kcontrol, ucontrol);
816}
817
818static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
819 struct snd_ctl_elem_value *ucontrol)
820{
821 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
822 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
823 struct twl6040_output *out = NULL;
824 struct soc_mixer_control *mc =
825 (struct soc_mixer_control *)kcontrol->private_value;
826 int ret;
827 unsigned int reg = mc->reg;
828
829 /* For HS and HF we shadow the values and only actually write
830 * them out when active in order to ensure the amplifier comes on
831 * as quietly as possible. */
832 switch (reg) {
833 case TWL6040_REG_HFLGAIN:
834 case TWL6040_REG_HFRGAIN:
835 out = &twl6040_priv->handsfree;
836 break;
837 default:
838 break;
839 }
840
841 if (out) {
842 out->left_vol = ucontrol->value.integer.value[0];
843 out->right_vol = ucontrol->value.integer.value[1];
844 if (!out->active)
845 return 1;
846 }
847
848 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
849 if (ret < 0)
850 return ret;
851
852 return 1;
853}
854
855static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857{
858 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
859 struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
860 struct twl6040_output *out = &twl6040_priv->handsfree;
861 struct soc_mixer_control *mc =
862 (struct soc_mixer_control *)kcontrol->private_value;
863 unsigned int reg = mc->reg;
864
865 /* If these are cached registers use the cache */
866 switch (reg) {
867 case TWL6040_REG_HFLGAIN:
868 case TWL6040_REG_HFRGAIN:
869 out = &twl6040_priv->handsfree;
870 ucontrol->value.integer.value[0] = out->left_vol;
871 ucontrol->value.integer.value[1] = out->right_vol;
872 return 0;
873
874 default:
875 break;
876 }
877
878 return snd_soc_get_volsw_2r(kcontrol, ucontrol);
879}
880
881/* double control with volume update */
882#define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
883 xinvert, tlv_array)\
884{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
885 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
886 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
887 .tlv.p = (tlv_array), \
888 .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
889 .put = twl6040_put_volsw, \
890 .private_value = (unsigned long)&(struct soc_mixer_control) \
891 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
892 .max = xmax, .platform_max = xmax, .invert = xinvert} }
893
894/* double control with volume update */
895#define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
896 xinvert, tlv_array)\
897{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
898 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
899 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
900 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
901 .tlv.p = (tlv_array), \
902 .info = snd_soc_info_volsw_2r, \
903 .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
904 .private_value = (unsigned long)&(struct soc_mixer_control) \
905 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
906 .rshift = xshift, .max = xmax, .invert = xinvert}, }
907
8ecbabd9
MLC		 908/*
909 * MICATT volume control:
910 * from -6 to 0 dB in 6 dB steps
911 */
912static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
913
914/*
915 * MICGAIN volume control:
2763f45d 916 * from 6 to 30 dB in 6 dB steps
8ecbabd9 917 */
2763f45d 918static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
8ecbabd9 919
370a0314
JEC		 920/*
921 * AFMGAIN volume control:
1f71a3ba 922 * from -18 to 24 dB in 6 dB steps
370a0314 923 */
1f71a3ba 924static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0);
370a0314 925
8ecbabd9
MLC		 926/*
927 * HSGAIN volume control:
928 * from -30 to 0 dB in 2 dB steps
929 */
930static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
931
932/*
933 * HFGAIN volume control:
934 * from -52 to 6 dB in 2 dB steps
935 */
936static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
937
871a05a7
JEC		 938/*
939 * EPGAIN volume control:
940 * from -24 to 6 dB in 2 dB steps
941 */
942static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
943
8ecbabd9
MLC		 944/* Left analog microphone selection */
945static const char *twl6040_amicl_texts[] =
946 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
947
948/* Right analog microphone selection */
949static const char *twl6040_amicr_texts[] =
950 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
951
952static const struct soc_enum twl6040_enum[] = {
cb973d78
FM		 953 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
954 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
8ecbabd9
MLC		 955};
956
370a0314
JEC		 957static const char *twl6040_hs_texts[] = {
958 "Off", "HS DAC", "Line-In amp"
959};
960
961static const struct soc_enum twl6040_hs_enum[] = {
962 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
963 twl6040_hs_texts),
964 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
965 twl6040_hs_texts),
966};
967
968static const char *twl6040_hf_texts[] = {
969 "Off", "HF DAC", "Line-In amp"
970};
971
972static const struct soc_enum twl6040_hf_enum[] = {
973 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
974 twl6040_hf_texts),
975 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
976 twl6040_hf_texts),
977};
978
8ecbabd9
MLC		 979static const struct snd_kcontrol_new amicl_control =
980 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
981
982static const struct snd_kcontrol_new amicr_control =
983 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
984
985/* Headset DAC playback switches */
370a0314
JEC		 986static const struct snd_kcontrol_new hsl_mux_controls =
987 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 988
370a0314
JEC		 989static const struct snd_kcontrol_new hsr_mux_controls =
990 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC		 991
992/* Handsfree DAC playback switches */
370a0314
JEC		 993static const struct snd_kcontrol_new hfl_mux_controls =
994 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 995
370a0314
JEC		 996static const struct snd_kcontrol_new hfr_mux_controls =
997 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 998
317596a6
PU		 999static const struct snd_kcontrol_new ep_path_enable_control =
1000 SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0);
871a05a7 1001
fdb625ff
PU		 1002static const struct snd_kcontrol_new auxl_switch_control =
1003 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0);
1004
1005static const struct snd_kcontrol_new auxr_switch_control =
1006 SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0);
1007
6bba63b6 1008/* Headset power mode */
7cca6067 1009static const char *twl6040_power_mode_texts[] = {
6bba63b6
MLC		 1010 "Low-Power", "High-Perfomance",
1011};
1012
7cca6067
PU		 1013static const struct soc_enum twl6040_power_mode_enum =
1014 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts),
1015 twl6040_power_mode_texts);
6bba63b6
MLC		 1016
1017static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol,
1018 struct snd_ctl_elem_value *ucontrol)
1019{
1020 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1021 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1022
1023 ucontrol->value.enumerated.item[0] = priv->hs_power_mode;
1024
1025 return 0;
1026}
1027
1028static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol,
1029 struct snd_ctl_elem_value *ucontrol)
1030{
1031 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1032 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1033 int high_perf = ucontrol->value.enumerated.item[0];
1034 int ret = 0;
1035
1036 if (!priv->hs_power_mode_locked)
1037 ret = headset_power_mode(codec, high_perf);
1038
1039 if (!ret)
1040 priv->hs_power_mode = high_perf;
1041
1042 return ret;
1043}
1044
af958c72
PU		 1045static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol,
1046 struct snd_ctl_elem_value *ucontrol)
1047{
1048 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1049 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1050
1051 ucontrol->value.enumerated.item[0] = priv->pll_power_mode;
1052
1053 return 0;
1054}
1055
1056static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_value *ucontrol)
1058{
1059 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1060 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1061
1062 priv->pll_power_mode = ucontrol->value.enumerated.item[0];
af958c72
PU		 1063
1064 return 0;
1065}
1066
1067int twl6040_get_clk_id(struct snd_soc_codec *codec)
1068{
1069 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
1070
ff593ca1 1071 return priv->pll_power_mode;
af958c72
PU		 1072}
1073EXPORT_SYMBOL_GPL(twl6040_get_clk_id);
1074
8ecbabd9
MLC		 1075static const struct snd_kcontrol_new twl6040_snd_controls[] = {
1076 /* Capture gains */
1077 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
1078 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
1079 SOC_DOUBLE_TLV("Capture Volume",
1080 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
1081
370a0314
JEC		 1082 /* AFM gains */
1083 SOC_DOUBLE_TLV("Aux FM Volume",
1f71a3ba 1084 TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv),
370a0314 1085
8ecbabd9 1086 /* Playback gains */
1bf84759 1087 SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
8ecbabd9 1088 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
1bf84759 1089 SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
8ecbabd9 1090 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC		 1091 SOC_SINGLE_TLV("Earphone Playback Volume",
1092 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
6bba63b6 1093
7cca6067 1094 SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum,
6bba63b6
MLC		 1095 twl6040_headset_power_get_enum,
1096 twl6040_headset_power_put_enum),
af958c72
PU		 1097
1098 SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum,
1099 twl6040_pll_get_enum, twl6040_pll_put_enum),
8ecbabd9
MLC		 1100};
1101
1102static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
1103 /* Inputs */
1104 SND_SOC_DAPM_INPUT("MAINMIC"),
1105 SND_SOC_DAPM_INPUT("HSMIC"),
1106 SND_SOC_DAPM_INPUT("SUBMIC"),
1107 SND_SOC_DAPM_INPUT("AFML"),
1108 SND_SOC_DAPM_INPUT("AFMR"),
1109
1110 /* Outputs */
1111 SND_SOC_DAPM_OUTPUT("HSOL"),
1112 SND_SOC_DAPM_OUTPUT("HSOR"),
1113 SND_SOC_DAPM_OUTPUT("HFL"),
1114 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 1115 SND_SOC_DAPM_OUTPUT("EP"),
fdb625ff
PU		 1116 SND_SOC_DAPM_OUTPUT("AUXL"),
1117 SND_SOC_DAPM_OUTPUT("AUXR"),
8ecbabd9
MLC		 1118
1119 /* Analog input muxes for the capture amplifiers */
1120 SND_SOC_DAPM_MUX("Analog Left Capture Route",
1121 SND_SOC_NOPM, 0, 0, &amicl_control),
1122 SND_SOC_DAPM_MUX("Analog Right Capture Route",
1123 SND_SOC_NOPM, 0, 0, &amicr_control),
1124
1125 /* Analog capture PGAs */
1126 SND_SOC_DAPM_PGA("MicAmpL",
1127 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
1128 SND_SOC_DAPM_PGA("MicAmpR",
1129 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
1130
370a0314
JEC		 1131 /* Auxiliary FM PGAs */
1132 SND_SOC_DAPM_PGA("AFMAmpL",
1133 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
1134 SND_SOC_DAPM_PGA("AFMAmpR",
1135 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
1136
8ecbabd9
MLC		 1137 /* ADCs */
1138 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
1139 TWL6040_REG_MICLCTL, 2, 0),
1140 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
1141 TWL6040_REG_MICRCTL, 2, 0),
1142
1143 /* Microphone bias */
1144 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
1145 TWL6040_REG_AMICBCTL, 0, 0),
1146 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
1147 TWL6040_REG_AMICBCTL, 4, 0),
1148 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
1149 TWL6040_REG_DMICBCTL, 0, 0),
1150 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
1151 TWL6040_REG_DMICBCTL, 4, 0),
1152
1153 /* DACs */
0fad4ed7
JEC		 1154 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
1155 TWL6040_REG_HSLCTL, 0, 0,
1156 twl6040_hs_dac_event,
1157 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1158 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
1159 TWL6040_REG_HSRCTL, 0, 0,
1160 twl6040_hs_dac_event,
1161 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 1162 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
1163 TWL6040_REG_HFLCTL, 0, 0,
1164 twl6040_power_mode_event,
1165 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1166 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
1167 TWL6040_REG_HFRCTL, 0, 0,
1168 twl6040_power_mode_event,
1169 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1170
df11ce29 1171 SND_SOC_DAPM_MUX("Handsfree Left Playback",
370a0314 1172 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
df11ce29 1173 SND_SOC_DAPM_MUX("Handsfree Right Playback",
370a0314
JEC		 1174 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
1175 /* Analog playback Muxes */
45b0f60d 1176 SND_SOC_DAPM_MUX("Headset Left Playback",
370a0314 1177 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
45b0f60d 1178 SND_SOC_DAPM_MUX("Headset Right Playback",
370a0314 1179 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 1180
317596a6
PU		 1181 SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
1182 &ep_path_enable_control),
fdb625ff
PU		 1183 SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0,
1184 &auxl_switch_control),
1185 SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0,
1186 &auxr_switch_control),
317596a6 1187
0fad4ed7 1188 /* Analog playback drivers */
df11ce29 1189 SND_SOC_DAPM_OUT_DRV_E("HF Left Driver",
0fad4ed7 1190 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
1bf84759
MOC		 1191 pga_event,
1192 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
df11ce29 1193 SND_SOC_DAPM_OUT_DRV_E("HF Right Driver",
0fad4ed7 1194 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
1bf84759
MOC		 1195 pga_event,
1196 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1197 SND_SOC_DAPM_OUT_DRV_E("HS Left Driver",
1bf84759
MOC		 1198 TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
1199 pga_event,
1200 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
45b0f60d 1201 SND_SOC_DAPM_OUT_DRV_E("HS Right Driver",
1bf84759
MOC		 1202 TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
1203 pga_event,
1204 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
317596a6
PU		 1205 SND_SOC_DAPM_OUT_DRV_E("Earphone Driver",
1206 TWL6040_REG_EARCTL, 0, 0, NULL, 0,
871a05a7
JEC		 1207 twl6040_power_mode_event,
1208 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 1209
1210 /* Analog playback PGAs */
df11ce29 1211 SND_SOC_DAPM_PGA("HF Left PGA",
8ecbabd9 1212 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
df11ce29 1213 SND_SOC_DAPM_PGA("HF Right PGA",
8ecbabd9
MLC		 1214 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
1215
1216};
1217
1218static const struct snd_soc_dapm_route intercon[] = {
1219 /* Capture path */
1220 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
1221 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
1222 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
1223
1224 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
1225 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
1226 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
1227
1228 {"MicAmpL", NULL, "Analog Left Capture Route"},
1229 {"MicAmpR", NULL, "Analog Right Capture Route"},
1230
1231 {"ADC Left", NULL, "MicAmpL"},
1232 {"ADC Right", NULL, "MicAmpR"},
1233
370a0314 1234 /* AFM path */
5bf692d9
PU		 1235 {"AFMAmpL", NULL, "AFML"},
1236 {"AFMAmpR", NULL, "AFMR"},
370a0314 1237
45b0f60d
PU		 1238 {"Headset Left Playback", "HS DAC", "HSDAC Left"},
1239 {"Headset Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 1240
45b0f60d
PU		 1241 {"Headset Right Playback", "HS DAC", "HSDAC Right"},
1242 {"Headset Right Playback", "Line-In amp", "AFMAmpR"},
370a0314 1243
45b0f60d
PU		 1244 {"HS Left Driver", NULL, "Headset Left Playback"},
1245 {"HS Right Driver", NULL, "Headset Right Playback"},
8ecbabd9 1246
45b0f60d
PU		 1247 {"HSOL", NULL, "HS Left Driver"},
1248 {"HSOR", NULL, "HS Right Driver"},
8ecbabd9 1249
871a05a7 1250 /* Earphone playback path */
317596a6
PU		 1251 {"Earphone Playback", "Switch", "HSDAC Left"},
1252 {"Earphone Driver", NULL, "Earphone Playback"},
871a05a7
JEC		 1253 {"EP", NULL, "Earphone Driver"},
1254
df11ce29
PU		 1255 {"Handsfree Left Playback", "HF DAC", "HFDAC Left"},
1256 {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"},
370a0314 1257
df11ce29
PU		 1258 {"Handsfree Right Playback", "HF DAC", "HFDAC Right"},
1259 {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 1260
df11ce29
PU		 1261 {"HF Left PGA", NULL, "Handsfree Left Playback"},
1262 {"HF Right PGA", NULL, "Handsfree Right Playback"},
8ecbabd9 1263
df11ce29
PU		 1264 {"HF Left Driver", NULL, "HF Left PGA"},
1265 {"HF Right Driver", NULL, "HF Right PGA"},
8ecbabd9 1266
df11ce29
PU		 1267 {"HFL", NULL, "HF Left Driver"},
1268 {"HFR", NULL, "HF Right Driver"},
fdb625ff
PU		 1269
1270 {"AUXL Playback", "Switch", "HF Left PGA"},
1271 {"AUXR Playback", "Switch", "HF Right PGA"},
1272
1273 {"AUXL", NULL, "AUXL Playback"},
1274 {"AUXR", NULL, "AUXR Playback"},
8ecbabd9
MLC		 1275};
1276
1277static int twl6040_add_widgets(struct snd_soc_codec *codec)
1278{
ce6120cc 1279 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 1280
ce6120cc
LG		 1281 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
1282 ARRAY_SIZE(twl6040_dapm_widgets));
1283 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1284 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC		 1285
1286 return 0;
1287}
1288
8ecbabd9
MLC		 1289static int twl6040_set_bias_level(struct snd_soc_codec *codec,
1290 enum snd_soc_bias_level level)
1291{
fb34d3d5 1292 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1293 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1294 int ret;
1295
1296 switch (level) {
1297 case SND_SOC_BIAS_ON:
1298 break;
1299 case SND_SOC_BIAS_PREPARE:
1300 break;
1301 case SND_SOC_BIAS_STANDBY:
1302 if (priv->codec_powered)
1303 break;
1304
fb34d3d5
MLC		 1305 ret = twl6040_power(twl6040, 1);
1306 if (ret)
1307 return ret;
8ecbabd9 1308
fb34d3d5 1309 priv->codec_powered = 1;
8ecbabd9 1310
a52762ee 1311 twl6040_restore_regs(codec);
65b7cecc
OM		 1312
1313 /* Set external boost GPO */
1314 twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
8ecbabd9
MLC		 1315 break;
1316 case SND_SOC_BIAS_OFF:
1317 if (!priv->codec_powered)
1318 break;
1319
fb34d3d5 1320 twl6040_power(twl6040, 0);
8ecbabd9
MLC		 1321 priv->codec_powered = 0;
1322 break;
1323 }
1324
ce6120cc 1325 codec->dapm.bias_level = level;
8ecbabd9
MLC		 1326
1327 return 0;
1328}
1329
8ecbabd9
MLC		 1330static int twl6040_startup(struct snd_pcm_substream *substream,
1331 struct snd_soc_dai *dai)
1332{
1333 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1334 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1335 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1336
8ecbabd9
MLC		 1337 snd_pcm_hw_constraint_list(substream->runtime, 0,
1338 SNDRV_PCM_HW_PARAM_RATE,
f53c346c 1339 &sysclk_constraints[priv->pll_power_mode]);
8ecbabd9
MLC		 1340
1341 return 0;
1342}
1343
1344static int twl6040_hw_params(struct snd_pcm_substream *substream,
1345 struct snd_pcm_hw_params *params,
1346 struct snd_soc_dai *dai)
1347{
1348 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1349 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 1350 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1351 int rate;
1352
8ecbabd9
MLC		 1353 rate = params_rate(params);
1354 switch (rate) {
60ea4cec
OM		 1355 case 11250:
1356 case 22500:
1357 case 44100:
8ecbabd9 1358 case 88200:
753621c2
PU		 1359 /* These rates are not supported when HPPLL is in use */
1360 if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) {
1361 dev_err(codec->dev, "HPPLL does not support rate %d\n",
1362 rate);
1363 return -EINVAL;
1364 }
1365 /* Capture is not supported with 17.64MHz sysclk */
1366 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1367 dev_err(codec->dev,
1368 "capture mode is not supported at %dHz\n",
1369 rate);
1370 return -EINVAL;
1371 }
8ecbabd9
MLC		 1372 priv->sysclk = 17640000;
1373 break;
60ea4cec
OM		 1374 case 8000:
1375 case 16000:
1376 case 32000:
1377 case 48000:
8ecbabd9 1378 case 96000:
8ecbabd9
MLC		 1379 priv->sysclk = 19200000;
1380 break;
1381 default:
1382 dev_err(codec->dev, "unsupported rate %d\n", rate);
1383 return -EINVAL;
1384 }
1385
8ecbabd9
MLC		 1386 return 0;
1387}
1388
4e624d06
OM		 1389static int twl6040_prepare(struct snd_pcm_substream *substream,
1390 struct snd_soc_dai *dai)
8ecbabd9
MLC		 1391{
1392 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1393 struct snd_soc_codec *codec = rtd->codec;
753621c2 1394 struct twl6040 *twl6040 = codec->control_data;
d4a8ca24 1395 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
753621c2 1396 int ret;
8ecbabd9 1397
4e624d06
OM		 1398 if (!priv->sysclk) {
1399 dev_err(codec->dev,
1400 "no mclk configured, call set_sysclk() on init\n");
1401 return -EINVAL;
1402 }
1403
4e624d06 1404 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC		 1405 dev_err(codec->dev,
1406 "some enabled paths aren't supported at %dHz\n",
1407 priv->sysclk);
1408 return -EPERM;
8ecbabd9 1409 }
753621c2
PU		 1410
1411 ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk);
1412 if (ret) {
1413 dev_err(codec->dev, "Can not set PLL (%d)\n", ret);
1414 return -EPERM;
1415 }
1416
8ecbabd9
MLC		 1417 return 0;
1418}
1419
1420static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1421 int clk_id, unsigned int freq, int dir)
1422{
1423 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 1424 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1425
1426 switch (clk_id) {
1427 case TWL6040_SYSCLK_SEL_LPPLL:
8ecbabd9 1428 case TWL6040_SYSCLK_SEL_HPPLL:
753621c2
PU		 1429 priv->pll = clk_id;
1430 priv->clk_in = freq;
8ecbabd9
MLC		 1431 break;
1432 default:
1433 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1434 return -EINVAL;
1435 }
1436
1437 return 0;
1438}
1439
1440static struct snd_soc_dai_ops twl6040_dai_ops = {
1441 .startup = twl6040_startup,
1442 .hw_params = twl6040_hw_params,
4e624d06 1443 .prepare = twl6040_prepare,
8ecbabd9
MLC		 1444 .set_sysclk = twl6040_set_dai_sysclk,
1445};
1446
6510bdc3 1447static struct snd_soc_dai_driver twl6040_dai[] = {
21385eeb 1448{
d13f1fe0 1449 .name = "twl6040-legacy",
8ecbabd9
MLC		 1450 .playback = {
1451 .stream_name = "Playback",
1452 .channels_min = 1,
cdd5054c 1453 .channels_max = 5,
21385eeb
PU		 1454 .rates = TWL6040_RATES,
1455 .formats = TWL6040_FORMATS,
1456 },
1457 .capture = {
1458 .stream_name = "Capture",
1459 .channels_min = 1,
1460 .channels_max = 2,
8ecbabd9
MLC		 1461 .rates = TWL6040_RATES,
1462 .formats = TWL6040_FORMATS,
1463 },
21385eeb
PU		 1464 .ops = &twl6040_dai_ops,
1465},
6510bdc3
LG		 1466{
1467 .name = "twl6040-ul",
8ecbabd9
MLC		 1468 .capture = {
1469 .stream_name = "Capture",
1470 .channels_min = 1,
1471 .channels_max = 2,
1472 .rates = TWL6040_RATES,
1473 .formats = TWL6040_FORMATS,
1474 },
1475 .ops = &twl6040_dai_ops,
6510bdc3
LG		 1476},
1477{
1478 .name = "twl6040-dl1",
8ecbabd9 1479 .playback = {
6510bdc3 1480 .stream_name = "Headset Playback",
8ecbabd9 1481 .channels_min = 1,
6510bdc3 1482 .channels_max = 2,
8ecbabd9
MLC		 1483 .rates = TWL6040_RATES,
1484 .formats = TWL6040_FORMATS,
1485 },
6510bdc3
LG		 1486 .ops = &twl6040_dai_ops,
1487},
1488{
1489 .name = "twl6040-dl2",
1490 .playback = {
1491 .stream_name = "Handsfree Playback",
8ecbabd9
MLC		 1492 .channels_min = 1,
1493 .channels_max = 2,
1494 .rates = TWL6040_RATES,
1495 .formats = TWL6040_FORMATS,
1496 },
1497 .ops = &twl6040_dai_ops,
6510bdc3
LG		 1498},
1499{
1500 .name = "twl6040-vib",
1501 .playback = {
1502 .stream_name = "Vibra Playback",
d8dd032d
PU		 1503 .channels_min = 1,
1504 .channels_max = 1,
6510bdc3
LG		 1505 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1506 .formats = TWL6040_FORMATS,
1507 },
1508 .ops = &twl6040_dai_ops,
1509},
8ecbabd9 1510};
8ecbabd9
MLC		 1511
1512#ifdef CONFIG_PM
f0fba2ad 1513static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1514{
8ecbabd9
MLC		 1515 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1516
1517 return 0;
1518}
1519
f0fba2ad 1520static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1521{
8ecbabd9 1522 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1523 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC		 1524
1525 return 0;
1526}
1527#else
1528#define twl6040_suspend NULL
1529#define twl6040_resume NULL
1530#endif
1531
f0fba2ad 1532static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1533{
8ecbabd9 1534 struct twl6040_data *priv;
1fbe9952 1535 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
2a433b9d
PU		 1536 struct platform_device *pdev = container_of(codec->dev,
1537 struct platform_device, dev);
8ecbabd9
MLC		 1538 int ret = 0;
1539
1540 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1541 if (priv == NULL)
1542 return -ENOMEM;
f0fba2ad 1543 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1544
a2d2362e 1545 priv->codec = codec;
fb34d3d5 1546 codec->control_data = dev_get_drvdata(codec->dev->parent);
a2d2362e 1547
1fbe9952
ACG		 1548 if (pdata && pdata->hs_left_step && pdata->hs_right_step) {
1549 priv->hs_left_step = pdata->hs_left_step;
1550 priv->hs_right_step = pdata->hs_right_step;
1551 } else {
1552 priv->hs_left_step = 1;
1553 priv->hs_right_step = 1;
1554 }
99903ea2 1555
1fbe9952
ACG		 1556 if (pdata && pdata->hf_left_step && pdata->hf_right_step) {
1557 priv->hf_left_step = pdata->hf_left_step;
1558 priv->hf_right_step = pdata->hf_right_step;
1559 } else {
1560 priv->hf_left_step = 1;
1561 priv->hf_right_step = 1;
1562 }
99903ea2 1563
2a433b9d
PU		 1564 priv->plug_irq = platform_get_irq(pdev, 0);
1565 if (priv->plug_irq < 0) {
1566 dev_err(codec->dev, "invalid irq\n");
1567 ret = -EINVAL;
1568 goto work_err;
1569 }
8ecbabd9 1570
a2d2362e 1571 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
19aab08d
AL		 1572 if (!priv->workqueue) {
1573 ret = -ENOMEM;
a2d2362e 1574 goto work_err;
19aab08d 1575 }
a2d2362e
JEC		 1576
1577 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1578
1579 mutex_init(&priv->mutex);
8ecbabd9 1580
1bf84759
MOC		 1581 init_completion(&priv->headset.ramp_done);
1582 init_completion(&priv->handsfree.ramp_done);
8ecbabd9 1583
1bf84759
MOC		 1584 priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
1585 if (priv->hf_workqueue == NULL) {
1586 ret = -ENOMEM;
fb34d3d5 1587 goto hfwq_err;
1bf84759
MOC		 1588 }
1589 priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
1590 if (priv->hs_workqueue == NULL) {
1591 ret = -ENOMEM;
fb34d3d5 1592 goto hswq_err;
1bf84759
MOC		 1593 }
1594
1595 INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
1596 INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
1597
2a433b9d
PU		 1598 ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler,
1599 0, "twl6040_irq_plug", codec);
fb34d3d5
MLC		 1600 if (ret) {
1601 dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret);
1602 goto plugirq_err;
1603 }
1604
a52762ee 1605 twl6040_init_chip(codec);
fb34d3d5 1606
8ecbabd9
MLC		 1607 /* power on device */
1608 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1609 if (ret)
1bf84759 1610 goto bias_err;
8ecbabd9 1611
f0fba2ad
LG		 1612 snd_soc_add_controls(codec, twl6040_snd_controls,
1613 ARRAY_SIZE(twl6040_snd_controls));
1614 twl6040_add_widgets(codec);
8ecbabd9
MLC		 1615
1616 return 0;
1617
1bf84759 1618bias_err:
2a433b9d 1619 free_irq(priv->plug_irq, codec);
fb34d3d5 1620plugirq_err:
1bf84759 1621 destroy_workqueue(priv->hs_workqueue);
fb34d3d5 1622hswq_err:
1bf84759 1623 destroy_workqueue(priv->hf_workqueue);
fb34d3d5 1624hfwq_err:
a2d2362e
JEC		 1625 destroy_workqueue(priv->workqueue);
1626work_err:
8ecbabd9
MLC		 1627 kfree(priv);
1628 return ret;
1629}
1630
f0fba2ad 1631static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1632{
f0fba2ad 1633 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 1634
f0fba2ad 1635 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
2a433b9d 1636 free_irq(priv->plug_irq, codec);
a2d2362e 1637 destroy_workqueue(priv->workqueue);
1bf84759
MOC		 1638 destroy_workqueue(priv->hf_workqueue);
1639 destroy_workqueue(priv->hs_workqueue);
f0fba2ad 1640 kfree(priv);
8ecbabd9 1641
f0fba2ad
LG		 1642 return 0;
1643}
8ecbabd9 1644
f0fba2ad
LG		 1645static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1646 .probe = twl6040_probe,
1647 .remove = twl6040_remove,
1648 .suspend = twl6040_suspend,
1649 .resume = twl6040_resume,
1650 .read = twl6040_read_reg_cache,
1651 .write = twl6040_write,
1652 .set_bias_level = twl6040_set_bias_level,
1653 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1654 .reg_word_size = sizeof(u8),
1655 .reg_cache_default = twl6040_reg,
1656};
1657
1658static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1659{
6510bdc3
LG		 1660 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040,
1661 twl6040_dai, ARRAY_SIZE(twl6040_dai));
f0fba2ad
LG		 1662}
1663
1664static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1665{
1666 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC		 1667 return 0;
1668}
1669
1670static struct platform_driver twl6040_codec_driver = {
1671 .driver = {
f0fba2ad 1672 .name = "twl6040-codec",
8ecbabd9
MLC		 1673 .owner = THIS_MODULE,
1674 },
1675 .probe = twl6040_codec_probe,
1676 .remove = __devexit_p(twl6040_codec_remove),
1677};
1678
1679static int __init twl6040_codec_init(void)
1680{
1681 return platform_driver_register(&twl6040_codec_driver);
1682}
1683module_init(twl6040_codec_init);
1684
1685static void __exit twl6040_codec_exit(void)
1686{
1687 platform_driver_unregister(&twl6040_codec_driver);
1688}
1689module_exit(twl6040_codec_exit);
1690
1691MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1692MODULE_AUTHOR("Misael Lopez Cruz");
1693MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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