Commit | Line | Data |
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8ecbabd9 MLC |
1 | /* |
2 | * ALSA SoC TWL6040 codec driver | |
3 | * | |
4 | * Author: Misael Lopez Cruz <x0052729@ti.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
18 | * 02110-1301 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/pm.h> | |
8ecbabd9 | 27 | #include <linux/platform_device.h> |
68b40cc4 | 28 | #include <linux/slab.h> |
8ecbabd9 | 29 | #include <linux/i2c/twl.h> |
fb34d3d5 | 30 | #include <linux/mfd/twl6040.h> |
8ecbabd9 MLC |
31 | |
32 | #include <sound/core.h> | |
33 | #include <sound/pcm.h> | |
34 | #include <sound/pcm_params.h> | |
35 | #include <sound/soc.h> | |
8ecbabd9 MLC |
36 | #include <sound/initval.h> |
37 | #include <sound/tlv.h> | |
38 | ||
39 | #include "twl6040.h" | |
40 | ||
60ea4cec | 41 | #define TWL6040_RATES SNDRV_PCM_RATE_8000_96000 |
1bf84759 MOC |
42 | #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) |
43 | ||
44 | #define TWL6040_OUTHS_0dB 0x00 | |
45 | #define TWL6040_OUTHS_M30dB 0x0F | |
46 | #define TWL6040_OUTHF_0dB 0x03 | |
47 | #define TWL6040_OUTHF_M52dB 0x1D | |
48 | ||
49 | #define TWL6040_RAMP_NONE 0 | |
50 | #define TWL6040_RAMP_UP 1 | |
51 | #define TWL6040_RAMP_DOWN 2 | |
52 | ||
53 | #define TWL6040_HSL_VOL_MASK 0x0F | |
54 | #define TWL6040_HSL_VOL_SHIFT 0 | |
55 | #define TWL6040_HSR_VOL_MASK 0xF0 | |
56 | #define TWL6040_HSR_VOL_SHIFT 4 | |
57 | #define TWL6040_HF_VOL_MASK 0x1F | |
58 | #define TWL6040_HF_VOL_SHIFT 0 | |
59 | ||
d17bf318 PU |
60 | /* Shadow register used by the driver */ |
61 | #define TWL6040_REG_SW_SHADOW 0x2F | |
62 | #define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1) | |
63 | ||
317596a6 PU |
64 | /* TWL6040_REG_SW_SHADOW (0x2F) fields */ |
65 | #define TWL6040_EAR_PATH_ENABLE 0x01 | |
66 | ||
1bf84759 MOC |
67 | struct twl6040_output { |
68 | u16 active; | |
69 | u16 left_vol; | |
70 | u16 right_vol; | |
71 | u16 left_step; | |
72 | u16 right_step; | |
73 | unsigned int step_delay; | |
74 | u16 ramp; | |
e71a5e5a | 75 | struct delayed_work work; |
1bf84759 MOC |
76 | struct completion ramp_done; |
77 | }; | |
8ecbabd9 | 78 | |
a2d2362e JEC |
79 | struct twl6040_jack_data { |
80 | struct snd_soc_jack *jack; | |
46dd0b93 | 81 | struct delayed_work work; |
a2d2362e JEC |
82 | int report; |
83 | }; | |
84 | ||
8ecbabd9 MLC |
85 | /* codec private data */ |
86 | struct twl6040_data { | |
2a433b9d | 87 | int plug_irq; |
8ecbabd9 MLC |
88 | int codec_powered; |
89 | int pll; | |
af958c72 | 90 | int pll_power_mode; |
6bba63b6 MLC |
91 | int hs_power_mode; |
92 | int hs_power_mode_locked; | |
fb34d3d5 | 93 | unsigned int clk_in; |
8ecbabd9 | 94 | unsigned int sysclk; |
1fbe9952 ACG |
95 | u16 hs_left_step; |
96 | u16 hs_right_step; | |
97 | u16 hf_left_step; | |
98 | u16 hf_right_step; | |
a2d2362e JEC |
99 | struct twl6040_jack_data hs_jack; |
100 | struct snd_soc_codec *codec; | |
101 | struct workqueue_struct *workqueue; | |
a2d2362e | 102 | struct mutex mutex; |
1bf84759 MOC |
103 | struct twl6040_output headset; |
104 | struct twl6040_output handsfree; | |
8ecbabd9 MLC |
105 | }; |
106 | ||
107 | /* | |
108 | * twl6040 register cache & default register settings | |
109 | */ | |
110 | static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { | |
4548dc3c PU |
111 | 0x00, /* not used 0x00 */ |
112 | 0x4B, /* REG_ASICID 0x01 (ro) */ | |
113 | 0x00, /* REG_ASICREV 0x02 (ro) */ | |
114 | 0x00, /* REG_INTID 0x03 */ | |
115 | 0x00, /* REG_INTMR 0x04 */ | |
116 | 0x00, /* REG_NCPCTRL 0x05 */ | |
117 | 0x00, /* REG_LDOCTL 0x06 */ | |
118 | 0x60, /* REG_HPPLLCTL 0x07 */ | |
119 | 0x00, /* REG_LPPLLCTL 0x08 */ | |
120 | 0x4A, /* REG_LPPLLDIV 0x09 */ | |
121 | 0x00, /* REG_AMICBCTL 0x0A */ | |
122 | 0x00, /* REG_DMICBCTL 0x0B */ | |
123 | 0x00, /* REG_MICLCTL 0x0C */ | |
124 | 0x00, /* REG_MICRCTL 0x0D */ | |
125 | 0x00, /* REG_MICGAIN 0x0E */ | |
126 | 0x1B, /* REG_LINEGAIN 0x0F */ | |
127 | 0x00, /* REG_HSLCTL 0x10 */ | |
128 | 0x00, /* REG_HSRCTL 0x11 */ | |
129 | 0x00, /* REG_HSGAIN 0x12 */ | |
130 | 0x00, /* REG_EARCTL 0x13 */ | |
131 | 0x00, /* REG_HFLCTL 0x14 */ | |
132 | 0x00, /* REG_HFLGAIN 0x15 */ | |
133 | 0x00, /* REG_HFRCTL 0x16 */ | |
134 | 0x00, /* REG_HFRGAIN 0x17 */ | |
135 | 0x00, /* REG_VIBCTLL 0x18 */ | |
136 | 0x00, /* REG_VIBDATL 0x19 */ | |
137 | 0x00, /* REG_VIBCTLR 0x1A */ | |
138 | 0x00, /* REG_VIBDATR 0x1B */ | |
139 | 0x00, /* REG_HKCTL1 0x1C */ | |
140 | 0x00, /* REG_HKCTL2 0x1D */ | |
141 | 0x00, /* REG_GPOCTL 0x1E */ | |
142 | 0x00, /* REG_ALB 0x1F */ | |
143 | 0x00, /* REG_DLB 0x20 */ | |
144 | 0x00, /* not used 0x21 */ | |
145 | 0x00, /* not used 0x22 */ | |
146 | 0x00, /* not used 0x23 */ | |
147 | 0x00, /* not used 0x24 */ | |
148 | 0x00, /* not used 0x25 */ | |
149 | 0x00, /* not used 0x26 */ | |
150 | 0x00, /* not used 0x27 */ | |
151 | 0x00, /* REG_TRIM1 0x28 */ | |
152 | 0x00, /* REG_TRIM2 0x29 */ | |
153 | 0x00, /* REG_TRIM3 0x2A */ | |
154 | 0x00, /* REG_HSOTRIM 0x2B */ | |
155 | 0x00, /* REG_HFOTRIM 0x2C */ | |
156 | 0x09, /* REG_ACCCTL 0x2D */ | |
157 | 0x00, /* REG_STATUS 0x2E (ro) */ | |
d17bf318 PU |
158 | |
159 | 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */ | |
8ecbabd9 MLC |
160 | }; |
161 | ||
a52762ee PU |
162 | /* List of registers to be restored after power up */ |
163 | static const int twl6040_restore_list[] = { | |
8ecbabd9 MLC |
164 | TWL6040_REG_MICLCTL, |
165 | TWL6040_REG_MICRCTL, | |
166 | TWL6040_REG_MICGAIN, | |
167 | TWL6040_REG_LINEGAIN, | |
168 | TWL6040_REG_HSLCTL, | |
169 | TWL6040_REG_HSRCTL, | |
170 | TWL6040_REG_HSGAIN, | |
171 | TWL6040_REG_EARCTL, | |
172 | TWL6040_REG_HFLCTL, | |
173 | TWL6040_REG_HFLGAIN, | |
174 | TWL6040_REG_HFRCTL, | |
175 | TWL6040_REG_HFRGAIN, | |
8ecbabd9 MLC |
176 | }; |
177 | ||
af958c72 PU |
178 | /* set of rates for each pll: low-power and high-performance */ |
179 | static unsigned int lp_rates[] = { | |
180 | 8000, | |
181 | 11250, | |
182 | 16000, | |
183 | 22500, | |
184 | 32000, | |
185 | 44100, | |
186 | 48000, | |
187 | 88200, | |
188 | 96000, | |
189 | }; | |
190 | ||
af958c72 PU |
191 | static unsigned int hp_rates[] = { |
192 | 8000, | |
193 | 16000, | |
194 | 32000, | |
195 | 48000, | |
196 | 96000, | |
197 | }; | |
198 | ||
f53c346c PU |
199 | static struct snd_pcm_hw_constraint_list sysclk_constraints[] = { |
200 | { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, }, | |
201 | { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, }, | |
af958c72 PU |
202 | }; |
203 | ||
8ecbabd9 MLC |
204 | /* |
205 | * read twl6040 register cache | |
206 | */ | |
207 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, | |
208 | unsigned int reg) | |
209 | { | |
210 | u8 *cache = codec->reg_cache; | |
211 | ||
212 | if (reg >= TWL6040_CACHEREGNUM) | |
213 | return -EIO; | |
214 | ||
215 | return cache[reg]; | |
216 | } | |
217 | ||
218 | /* | |
219 | * write twl6040 register cache | |
220 | */ | |
221 | static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, | |
222 | u8 reg, u8 value) | |
223 | { | |
224 | u8 *cache = codec->reg_cache; | |
225 | ||
226 | if (reg >= TWL6040_CACHEREGNUM) | |
227 | return; | |
228 | cache[reg] = value; | |
229 | } | |
230 | ||
231 | /* | |
232 | * read from twl6040 hardware register | |
233 | */ | |
234 | static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, | |
235 | unsigned int reg) | |
236 | { | |
fb34d3d5 | 237 | struct twl6040 *twl6040 = codec->control_data; |
8ecbabd9 MLC |
238 | u8 value; |
239 | ||
240 | if (reg >= TWL6040_CACHEREGNUM) | |
241 | return -EIO; | |
242 | ||
d17bf318 PU |
243 | if (likely(reg < TWL6040_REG_SW_SHADOW)) { |
244 | value = twl6040_reg_read(twl6040, reg); | |
245 | twl6040_write_reg_cache(codec, reg, value); | |
246 | } else { | |
247 | value = twl6040_read_reg_cache(codec, reg); | |
248 | } | |
8ecbabd9 MLC |
249 | |
250 | return value; | |
251 | } | |
252 | ||
253 | /* | |
254 | * write to the twl6040 register space | |
255 | */ | |
256 | static int twl6040_write(struct snd_soc_codec *codec, | |
257 | unsigned int reg, unsigned int value) | |
258 | { | |
fb34d3d5 MLC |
259 | struct twl6040 *twl6040 = codec->control_data; |
260 | ||
8ecbabd9 MLC |
261 | if (reg >= TWL6040_CACHEREGNUM) |
262 | return -EIO; | |
263 | ||
264 | twl6040_write_reg_cache(codec, reg, value); | |
d17bf318 PU |
265 | if (likely(reg < TWL6040_REG_SW_SHADOW)) |
266 | return twl6040_reg_write(twl6040, reg, value); | |
267 | else | |
268 | return 0; | |
8ecbabd9 MLC |
269 | } |
270 | ||
a52762ee | 271 | static void twl6040_init_chip(struct snd_soc_codec *codec) |
8ecbabd9 | 272 | { |
a52762ee PU |
273 | struct twl6040 *twl6040 = codec->control_data; |
274 | u8 val; | |
275 | ||
f97217f1 | 276 | /* Update reg_cache: ASICREV, and TRIM values */ |
a52762ee PU |
277 | val = twl6040_get_revid(twl6040); |
278 | twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val); | |
8ecbabd9 | 279 | |
f97217f1 PU |
280 | twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1); |
281 | twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2); | |
282 | twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3); | |
283 | twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM); | |
284 | twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM); | |
285 | ||
2c27ff41 PU |
286 | /* Change chip defaults */ |
287 | /* No imput selected for microphone amplifiers */ | |
288 | twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18); | |
289 | twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18); | |
3acef685 PU |
290 | |
291 | /* | |
292 | * We need to lower the default gain values, so the ramp code | |
293 | * can work correctly for the first playback. | |
294 | * This reduces the pop noise heard at the first playback. | |
295 | */ | |
296 | twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff); | |
297 | twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e); | |
298 | twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d); | |
299 | twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d); | |
300 | twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0); | |
8ecbabd9 MLC |
301 | } |
302 | ||
a52762ee | 303 | static void twl6040_restore_regs(struct snd_soc_codec *codec) |
8ecbabd9 MLC |
304 | { |
305 | u8 *cache = codec->reg_cache; | |
306 | int reg, i; | |
307 | ||
a52762ee PU |
308 | for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) { |
309 | reg = twl6040_restore_list[i]; | |
8ecbabd9 MLC |
310 | twl6040_write(codec, reg, cache[reg]); |
311 | } | |
312 | } | |
313 | ||
1bf84759 MOC |
314 | /* |
315 | * Ramp HS PGA volume to minimise pops at stream startup and shutdown. | |
316 | */ | |
317 | static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec, | |
318 | unsigned int left_step, unsigned int right_step) | |
319 | { | |
320 | ||
321 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
322 | struct twl6040_output *headset = &priv->headset; | |
323 | int left_complete = 0, right_complete = 0; | |
324 | u8 reg, val; | |
325 | ||
326 | /* left channel */ | |
327 | left_step = (left_step > 0xF) ? 0xF : left_step; | |
328 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN); | |
329 | val = (~reg & TWL6040_HSL_VOL_MASK); | |
330 | ||
331 | if (headset->ramp == TWL6040_RAMP_UP) { | |
332 | /* ramp step up */ | |
333 | if (val < headset->left_vol) { | |
1fbe9952 ACG |
334 | if (val + left_step > headset->left_vol) |
335 | val = headset->left_vol; | |
336 | else | |
337 | val += left_step; | |
338 | ||
1bf84759 MOC |
339 | reg &= ~TWL6040_HSL_VOL_MASK; |
340 | twl6040_write(codec, TWL6040_REG_HSGAIN, | |
341 | (reg | (~val & TWL6040_HSL_VOL_MASK))); | |
342 | } else { | |
343 | left_complete = 1; | |
344 | } | |
345 | } else if (headset->ramp == TWL6040_RAMP_DOWN) { | |
346 | /* ramp step down */ | |
347 | if (val > 0x0) { | |
1fbe9952 ACG |
348 | if ((int)val - (int)left_step < 0) |
349 | val = 0; | |
350 | else | |
351 | val -= left_step; | |
352 | ||
1bf84759 MOC |
353 | reg &= ~TWL6040_HSL_VOL_MASK; |
354 | twl6040_write(codec, TWL6040_REG_HSGAIN, reg | | |
355 | (~val & TWL6040_HSL_VOL_MASK)); | |
356 | } else { | |
357 | left_complete = 1; | |
358 | } | |
359 | } | |
360 | ||
361 | /* right channel */ | |
362 | right_step = (right_step > 0xF) ? 0xF : right_step; | |
363 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN); | |
364 | val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT; | |
365 | ||
366 | if (headset->ramp == TWL6040_RAMP_UP) { | |
367 | /* ramp step up */ | |
368 | if (val < headset->right_vol) { | |
1fbe9952 ACG |
369 | if (val + right_step > headset->right_vol) |
370 | val = headset->right_vol; | |
371 | else | |
372 | val += right_step; | |
373 | ||
1bf84759 MOC |
374 | reg &= ~TWL6040_HSR_VOL_MASK; |
375 | twl6040_write(codec, TWL6040_REG_HSGAIN, | |
376 | (reg | (~val << TWL6040_HSR_VOL_SHIFT))); | |
377 | } else { | |
378 | right_complete = 1; | |
379 | } | |
380 | } else if (headset->ramp == TWL6040_RAMP_DOWN) { | |
381 | /* ramp step down */ | |
382 | if (val > 0x0) { | |
1fbe9952 ACG |
383 | if ((int)val - (int)right_step < 0) |
384 | val = 0; | |
385 | else | |
386 | val -= right_step; | |
387 | ||
1bf84759 MOC |
388 | reg &= ~TWL6040_HSR_VOL_MASK; |
389 | twl6040_write(codec, TWL6040_REG_HSGAIN, | |
390 | reg | (~val << TWL6040_HSR_VOL_SHIFT)); | |
391 | } else { | |
392 | right_complete = 1; | |
393 | } | |
394 | } | |
395 | ||
396 | return left_complete & right_complete; | |
397 | } | |
398 | ||
399 | /* | |
400 | * Ramp HF PGA volume to minimise pops at stream startup and shutdown. | |
401 | */ | |
402 | static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec, | |
403 | unsigned int left_step, unsigned int right_step) | |
404 | { | |
405 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
406 | struct twl6040_output *handsfree = &priv->handsfree; | |
407 | int left_complete = 0, right_complete = 0; | |
408 | u16 reg, val; | |
409 | ||
410 | /* left channel */ | |
411 | left_step = (left_step > 0x1D) ? 0x1D : left_step; | |
412 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN); | |
413 | reg = 0x1D - reg; | |
414 | val = (reg & TWL6040_HF_VOL_MASK); | |
415 | if (handsfree->ramp == TWL6040_RAMP_UP) { | |
416 | /* ramp step up */ | |
417 | if (val < handsfree->left_vol) { | |
1fbe9952 ACG |
418 | if (val + left_step > handsfree->left_vol) |
419 | val = handsfree->left_vol; | |
420 | else | |
421 | val += left_step; | |
422 | ||
1bf84759 MOC |
423 | reg &= ~TWL6040_HF_VOL_MASK; |
424 | twl6040_write(codec, TWL6040_REG_HFLGAIN, | |
425 | reg | (0x1D - val)); | |
426 | } else { | |
427 | left_complete = 1; | |
428 | } | |
429 | } else if (handsfree->ramp == TWL6040_RAMP_DOWN) { | |
430 | /* ramp step down */ | |
431 | if (val > 0) { | |
1fbe9952 ACG |
432 | if ((int)val - (int)left_step < 0) |
433 | val = 0; | |
434 | else | |
435 | val -= left_step; | |
436 | ||
1bf84759 MOC |
437 | reg &= ~TWL6040_HF_VOL_MASK; |
438 | twl6040_write(codec, TWL6040_REG_HFLGAIN, | |
439 | reg | (0x1D - val)); | |
440 | } else { | |
441 | left_complete = 1; | |
442 | } | |
443 | } | |
444 | ||
445 | /* right channel */ | |
446 | right_step = (right_step > 0x1D) ? 0x1D : right_step; | |
447 | reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN); | |
448 | reg = 0x1D - reg; | |
449 | val = (reg & TWL6040_HF_VOL_MASK); | |
450 | if (handsfree->ramp == TWL6040_RAMP_UP) { | |
451 | /* ramp step up */ | |
452 | if (val < handsfree->right_vol) { | |
1fbe9952 ACG |
453 | if (val + right_step > handsfree->right_vol) |
454 | val = handsfree->right_vol; | |
455 | else | |
456 | val += right_step; | |
457 | ||
1bf84759 MOC |
458 | reg &= ~TWL6040_HF_VOL_MASK; |
459 | twl6040_write(codec, TWL6040_REG_HFRGAIN, | |
460 | reg | (0x1D - val)); | |
461 | } else { | |
462 | right_complete = 1; | |
463 | } | |
464 | } else if (handsfree->ramp == TWL6040_RAMP_DOWN) { | |
465 | /* ramp step down */ | |
466 | if (val > 0) { | |
1fbe9952 ACG |
467 | if ((int)val - (int)right_step < 0) |
468 | val = 0; | |
469 | else | |
470 | val -= right_step; | |
471 | ||
1bf84759 MOC |
472 | reg &= ~TWL6040_HF_VOL_MASK; |
473 | twl6040_write(codec, TWL6040_REG_HFRGAIN, | |
474 | reg | (0x1D - val)); | |
475 | } | |
476 | } | |
477 | ||
478 | return left_complete & right_complete; | |
479 | } | |
480 | ||
481 | /* | |
482 | * This work ramps both output PGAs at stream start/stop time to | |
483 | * minimise pop associated with DAPM power switching. | |
484 | */ | |
485 | static void twl6040_pga_hs_work(struct work_struct *work) | |
486 | { | |
487 | struct twl6040_data *priv = | |
e71a5e5a | 488 | container_of(work, struct twl6040_data, headset.work.work); |
1bf84759 MOC |
489 | struct snd_soc_codec *codec = priv->codec; |
490 | struct twl6040_output *headset = &priv->headset; | |
1bf84759 MOC |
491 | int i, headset_complete; |
492 | ||
493 | /* do we need to ramp at all ? */ | |
494 | if (headset->ramp == TWL6040_RAMP_NONE) | |
495 | return; | |
496 | ||
93eebc69 PU |
497 | /* HS PGA gain range: 0x0 - 0xf (0 - 15) */ |
498 | for (i = 0; i < 16; i++) { | |
1fbe9952 ACG |
499 | headset_complete = twl6040_hs_ramp_step(codec, |
500 | headset->left_step, | |
501 | headset->right_step); | |
1bf84759 MOC |
502 | |
503 | /* ramp finished ? */ | |
504 | if (headset_complete) | |
505 | break; | |
506 | ||
8ff1e170 PU |
507 | schedule_timeout_interruptible( |
508 | msecs_to_jiffies(headset->step_delay)); | |
1bf84759 MOC |
509 | } |
510 | ||
511 | if (headset->ramp == TWL6040_RAMP_DOWN) { | |
512 | headset->active = 0; | |
513 | complete(&headset->ramp_done); | |
514 | } else { | |
515 | headset->active = 1; | |
516 | } | |
517 | headset->ramp = TWL6040_RAMP_NONE; | |
518 | } | |
519 | ||
520 | static void twl6040_pga_hf_work(struct work_struct *work) | |
521 | { | |
522 | struct twl6040_data *priv = | |
e71a5e5a | 523 | container_of(work, struct twl6040_data, handsfree.work.work); |
1bf84759 MOC |
524 | struct snd_soc_codec *codec = priv->codec; |
525 | struct twl6040_output *handsfree = &priv->handsfree; | |
1bf84759 MOC |
526 | int i, handsfree_complete; |
527 | ||
528 | /* do we need to ramp at all ? */ | |
529 | if (handsfree->ramp == TWL6040_RAMP_NONE) | |
530 | return; | |
531 | ||
93eebc69 PU |
532 | /* |
533 | * HF PGA gain range: 0x00 - 0x1d (0 - 29) */ | |
534 | for (i = 0; i < 30; i++) { | |
1fbe9952 ACG |
535 | handsfree_complete = twl6040_hf_ramp_step(codec, |
536 | handsfree->left_step, | |
537 | handsfree->right_step); | |
1bf84759 MOC |
538 | |
539 | /* ramp finished ? */ | |
540 | if (handsfree_complete) | |
541 | break; | |
542 | ||
4d64bdca PU |
543 | schedule_timeout_interruptible( |
544 | msecs_to_jiffies(handsfree->step_delay)); | |
1bf84759 MOC |
545 | } |
546 | ||
547 | ||
548 | if (handsfree->ramp == TWL6040_RAMP_DOWN) { | |
549 | handsfree->active = 0; | |
550 | complete(&handsfree->ramp_done); | |
551 | } else | |
552 | handsfree->active = 1; | |
553 | handsfree->ramp = TWL6040_RAMP_NONE; | |
554 | } | |
555 | ||
eb6b71e7 | 556 | static int out_drv_event(struct snd_soc_dapm_widget *w, |
1bf84759 MOC |
557 | struct snd_kcontrol *kcontrol, int event) |
558 | { | |
559 | struct snd_soc_codec *codec = w->codec; | |
560 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
561 | struct twl6040_output *out; | |
562 | struct delayed_work *work; | |
1bf84759 MOC |
563 | |
564 | switch (w->shift) { | |
6fbb32d1 | 565 | case 2: /* Headset output driver */ |
1bf84759 | 566 | out = &priv->headset; |
009d196b PU |
567 | work = &out->work; |
568 | /* | |
569 | * Make sure, that we do not mess up variables for already | |
570 | * executing work. | |
571 | */ | |
572 | cancel_delayed_work_sync(work); | |
573 | ||
1fbe9952 ACG |
574 | out->left_step = priv->hs_left_step; |
575 | out->right_step = priv->hs_right_step; | |
1bf84759 MOC |
576 | out->step_delay = 5; /* 5 ms between volume ramp steps */ |
577 | break; | |
6fbb32d1 | 578 | case 4: /* Handsfree output driver */ |
1bf84759 | 579 | out = &priv->handsfree; |
009d196b PU |
580 | work = &out->work; |
581 | /* | |
582 | * Make sure, that we do not mess up variables for already | |
583 | * executing work. | |
584 | */ | |
585 | cancel_delayed_work_sync(work); | |
586 | ||
1fbe9952 ACG |
587 | out->left_step = priv->hf_left_step; |
588 | out->right_step = priv->hf_right_step; | |
1bf84759 | 589 | out->step_delay = 5; /* 5 ms between volume ramp steps */ |
1bf84759 MOC |
590 | break; |
591 | default: | |
592 | return -1; | |
593 | } | |
594 | ||
595 | switch (event) { | |
596 | case SND_SOC_DAPM_POST_PMU: | |
597 | if (out->active) | |
598 | break; | |
599 | ||
600 | /* don't use volume ramp for power-up */ | |
009d196b | 601 | out->ramp = TWL6040_RAMP_UP; |
1bf84759 MOC |
602 | out->left_step = out->left_vol; |
603 | out->right_step = out->right_vol; | |
604 | ||
009d196b | 605 | queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1)); |
1bf84759 MOC |
606 | break; |
607 | ||
608 | case SND_SOC_DAPM_PRE_PMD: | |
609 | if (!out->active) | |
610 | break; | |
611 | ||
009d196b PU |
612 | /* use volume ramp for power-down */ |
613 | out->ramp = TWL6040_RAMP_DOWN; | |
614 | INIT_COMPLETION(out->ramp_done); | |
1bf84759 | 615 | |
009d196b | 616 | queue_delayed_work(priv->workqueue, work, msecs_to_jiffies(1)); |
1bf84759 | 617 | |
009d196b PU |
618 | wait_for_completion_timeout(&out->ramp_done, |
619 | msecs_to_jiffies(2000)); | |
1bf84759 MOC |
620 | break; |
621 | } | |
622 | ||
623 | return 0; | |
624 | } | |
625 | ||
8ecbabd9 MLC |
626 | /* set headset dac and driver power mode */ |
627 | static int headset_power_mode(struct snd_soc_codec *codec, int high_perf) | |
628 | { | |
629 | int hslctl, hsrctl; | |
ab6cf139 | 630 | int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE; |
8ecbabd9 MLC |
631 | |
632 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | |
633 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | |
634 | ||
635 | if (high_perf) { | |
636 | hslctl &= ~mask; | |
637 | hsrctl &= ~mask; | |
638 | } else { | |
639 | hslctl |= mask; | |
640 | hsrctl |= mask; | |
641 | } | |
642 | ||
643 | twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl); | |
644 | twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl); | |
645 | ||
646 | return 0; | |
647 | } | |
648 | ||
0fad4ed7 JEC |
649 | static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w, |
650 | struct snd_kcontrol *kcontrol, int event) | |
651 | { | |
33b6816c PU |
652 | struct snd_soc_codec *codec = w->codec; |
653 | u8 hslctl, hsrctl; | |
654 | ||
655 | /* | |
656 | * Workaround for Headset DC offset caused pop noise: | |
657 | * Both HS DAC need to be turned on (before the HS driver) and off at | |
658 | * the same time. | |
659 | */ | |
660 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | |
661 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | |
662 | if (SND_SOC_DAPM_EVENT_ON(event)) { | |
663 | hslctl |= TWL6040_HSDACENA; | |
664 | hsrctl |= TWL6040_HSDACENA; | |
665 | } else { | |
666 | hslctl &= ~TWL6040_HSDACENA; | |
667 | hsrctl &= ~TWL6040_HSDACENA; | |
668 | } | |
669 | twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl); | |
670 | twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl); | |
671 | ||
0fad4ed7 JEC |
672 | msleep(1); |
673 | return 0; | |
674 | } | |
675 | ||
8ecbabd9 MLC |
676 | static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w, |
677 | struct snd_kcontrol *kcontrol, int event) | |
678 | { | |
679 | struct snd_soc_codec *codec = w->codec; | |
d4a8ca24 | 680 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
6bba63b6 | 681 | int ret = 0; |
8ecbabd9 | 682 | |
6bba63b6 | 683 | if (SND_SOC_DAPM_EVENT_ON(event)) { |
fac2f3e4 PU |
684 | /* Earphone doesn't support low power mode */ |
685 | priv->hs_power_mode_locked = 1; | |
686 | ret = headset_power_mode(codec, 1); | |
6bba63b6 | 687 | } else { |
fac2f3e4 PU |
688 | priv->hs_power_mode_locked = 0; |
689 | ret = headset_power_mode(codec, priv->hs_power_mode); | |
6bba63b6 | 690 | } |
8ecbabd9 | 691 | |
0fad4ed7 JEC |
692 | msleep(1); |
693 | ||
6bba63b6 | 694 | return ret; |
8ecbabd9 MLC |
695 | } |
696 | ||
64ed9836 MB |
697 | static void twl6040_hs_jack_report(struct snd_soc_codec *codec, |
698 | struct snd_soc_jack *jack, int report) | |
a2d2362e JEC |
699 | { |
700 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
701 | int status; | |
702 | ||
703 | mutex_lock(&priv->mutex); | |
704 | ||
705 | /* Sync status */ | |
706 | status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS); | |
707 | if (status & TWL6040_PLUGCOMP) | |
708 | snd_soc_jack_report(jack, report, report); | |
709 | else | |
710 | snd_soc_jack_report(jack, 0, report); | |
711 | ||
712 | mutex_unlock(&priv->mutex); | |
713 | } | |
714 | ||
715 | void twl6040_hs_jack_detect(struct snd_soc_codec *codec, | |
716 | struct snd_soc_jack *jack, int report) | |
717 | { | |
718 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
719 | struct twl6040_jack_data *hs_jack = &priv->hs_jack; | |
720 | ||
721 | hs_jack->jack = jack; | |
722 | hs_jack->report = report; | |
723 | ||
724 | twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report); | |
725 | } | |
726 | EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect); | |
727 | ||
728 | static void twl6040_accessory_work(struct work_struct *work) | |
729 | { | |
730 | struct twl6040_data *priv = container_of(work, | |
46dd0b93 | 731 | struct twl6040_data, hs_jack.work.work); |
a2d2362e JEC |
732 | struct snd_soc_codec *codec = priv->codec; |
733 | struct twl6040_jack_data *hs_jack = &priv->hs_jack; | |
734 | ||
735 | twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report); | |
736 | } | |
737 | ||
8ecbabd9 | 738 | /* audio interrupt handler */ |
fb34d3d5 | 739 | static irqreturn_t twl6040_audio_handler(int irq, void *data) |
8ecbabd9 MLC |
740 | { |
741 | struct snd_soc_codec *codec = data; | |
d4a8ca24 | 742 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
cf370a5a | 743 | |
46dd0b93 | 744 | queue_delayed_work(priv->workqueue, &priv->hs_jack.work, |
f34c6606 | 745 | msecs_to_jiffies(200)); |
cf370a5a | 746 | |
8ecbabd9 MLC |
747 | return IRQ_HANDLED; |
748 | } | |
749 | ||
1bf84759 MOC |
750 | static int twl6040_put_volsw(struct snd_kcontrol *kcontrol, |
751 | struct snd_ctl_elem_value *ucontrol) | |
752 | { | |
753 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
754 | struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec); | |
755 | struct twl6040_output *out = NULL; | |
756 | struct soc_mixer_control *mc = | |
757 | (struct soc_mixer_control *)kcontrol->private_value; | |
db382da5 | 758 | int ret; |
1bf84759 MOC |
759 | |
760 | /* For HS and HF we shadow the values and only actually write | |
761 | * them out when active in order to ensure the amplifier comes on | |
762 | * as quietly as possible. */ | |
a8cc7189 | 763 | switch (mc->reg) { |
1bf84759 MOC |
764 | case TWL6040_REG_HSGAIN: |
765 | out = &twl6040_priv->headset; | |
766 | break; | |
a8cc7189 PU |
767 | case TWL6040_REG_HFLGAIN: |
768 | out = &twl6040_priv->handsfree; | |
769 | break; | |
1bf84759 | 770 | default: |
a0acf47f PU |
771 | dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n", |
772 | __func__, mc->reg); | |
bfd3d4e9 | 773 | return -EINVAL; |
1bf84759 MOC |
774 | } |
775 | ||
bfd3d4e9 PU |
776 | out->left_vol = ucontrol->value.integer.value[0]; |
777 | out->right_vol = ucontrol->value.integer.value[1]; | |
778 | if (!out->active) | |
779 | return 1; | |
1bf84759 | 780 | |
db382da5 | 781 | ret = snd_soc_put_volsw(kcontrol, ucontrol); |
1bf84759 MOC |
782 | if (ret < 0) |
783 | return ret; | |
784 | ||
785 | return 1; | |
786 | } | |
787 | ||
788 | static int twl6040_get_volsw(struct snd_kcontrol *kcontrol, | |
789 | struct snd_ctl_elem_value *ucontrol) | |
790 | { | |
791 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
792 | struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec); | |
793 | struct twl6040_output *out = &twl6040_priv->headset; | |
794 | struct soc_mixer_control *mc = | |
795 | (struct soc_mixer_control *)kcontrol->private_value; | |
1bf84759 | 796 | |
a8cc7189 | 797 | switch (mc->reg) { |
1bf84759 MOC |
798 | case TWL6040_REG_HSGAIN: |
799 | out = &twl6040_priv->headset; | |
1bf84759 | 800 | break; |
1bf84759 | 801 | case TWL6040_REG_HFLGAIN: |
1bf84759 MOC |
802 | out = &twl6040_priv->handsfree; |
803 | break; | |
804 | default: | |
e49b6833 PU |
805 | dev_warn(codec->dev, "%s: Unexpected register: 0x%02x\n", |
806 | __func__, mc->reg); | |
807 | return -EINVAL; | |
1bf84759 MOC |
808 | } |
809 | ||
e49b6833 PU |
810 | ucontrol->value.integer.value[0] = out->left_vol; |
811 | ucontrol->value.integer.value[1] = out->right_vol; | |
812 | return 0; | |
1bf84759 MOC |
813 | } |
814 | ||
67c34130 PU |
815 | static int twl6040_soc_dapm_put_vibra_enum(struct snd_kcontrol *kcontrol, |
816 | struct snd_ctl_elem_value *ucontrol) | |
817 | { | |
818 | struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); | |
819 | struct snd_soc_dapm_widget *widget = wlist->widgets[0]; | |
820 | struct snd_soc_codec *codec = widget->codec; | |
821 | struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; | |
822 | unsigned int val; | |
823 | ||
824 | /* Do not allow changes while Input/FF efect is running */ | |
825 | val = twl6040_read_reg_volatile(codec, e->reg); | |
826 | if (val & TWL6040_VIBENA && !(val & TWL6040_VIBSEL)) | |
827 | return -EBUSY; | |
828 | ||
829 | return snd_soc_dapm_put_enum_double(kcontrol, ucontrol); | |
830 | } | |
831 | ||
8ecbabd9 MLC |
832 | /* |
833 | * MICATT volume control: | |
834 | * from -6 to 0 dB in 6 dB steps | |
835 | */ | |
836 | static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0); | |
837 | ||
838 | /* | |
839 | * MICGAIN volume control: | |
2763f45d | 840 | * from 6 to 30 dB in 6 dB steps |
8ecbabd9 | 841 | */ |
2763f45d | 842 | static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0); |
8ecbabd9 | 843 | |
370a0314 JEC |
844 | /* |
845 | * AFMGAIN volume control: | |
1f71a3ba | 846 | * from -18 to 24 dB in 6 dB steps |
370a0314 | 847 | */ |
1f71a3ba | 848 | static DECLARE_TLV_DB_SCALE(afm_amp_tlv, -1800, 600, 0); |
370a0314 | 849 | |
8ecbabd9 MLC |
850 | /* |
851 | * HSGAIN volume control: | |
852 | * from -30 to 0 dB in 2 dB steps | |
853 | */ | |
854 | static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0); | |
855 | ||
856 | /* | |
857 | * HFGAIN volume control: | |
858 | * from -52 to 6 dB in 2 dB steps | |
859 | */ | |
860 | static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0); | |
861 | ||
871a05a7 JEC |
862 | /* |
863 | * EPGAIN volume control: | |
864 | * from -24 to 6 dB in 2 dB steps | |
865 | */ | |
866 | static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0); | |
867 | ||
8ecbabd9 MLC |
868 | /* Left analog microphone selection */ |
869 | static const char *twl6040_amicl_texts[] = | |
870 | {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"}; | |
871 | ||
872 | /* Right analog microphone selection */ | |
873 | static const char *twl6040_amicr_texts[] = | |
874 | {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"}; | |
875 | ||
876 | static const struct soc_enum twl6040_enum[] = { | |
cb973d78 FM |
877 | SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts), |
878 | SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts), | |
8ecbabd9 MLC |
879 | }; |
880 | ||
370a0314 JEC |
881 | static const char *twl6040_hs_texts[] = { |
882 | "Off", "HS DAC", "Line-In amp" | |
883 | }; | |
884 | ||
885 | static const struct soc_enum twl6040_hs_enum[] = { | |
886 | SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts), | |
887 | twl6040_hs_texts), | |
888 | SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts), | |
889 | twl6040_hs_texts), | |
890 | }; | |
891 | ||
892 | static const char *twl6040_hf_texts[] = { | |
893 | "Off", "HF DAC", "Line-In amp" | |
894 | }; | |
895 | ||
896 | static const struct soc_enum twl6040_hf_enum[] = { | |
897 | SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts), | |
898 | twl6040_hf_texts), | |
899 | SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts), | |
900 | twl6040_hf_texts), | |
901 | }; | |
902 | ||
67c34130 PU |
903 | static const char *twl6040_vibrapath_texts[] = { |
904 | "Input FF", "Audio PDM" | |
905 | }; | |
906 | ||
907 | static const struct soc_enum twl6040_vibra_enum[] = { | |
908 | SOC_ENUM_SINGLE(TWL6040_REG_VIBCTLL, 1, | |
909 | ARRAY_SIZE(twl6040_vibrapath_texts), | |
910 | twl6040_vibrapath_texts), | |
911 | SOC_ENUM_SINGLE(TWL6040_REG_VIBCTLR, 1, | |
912 | ARRAY_SIZE(twl6040_vibrapath_texts), | |
913 | twl6040_vibrapath_texts), | |
914 | }; | |
915 | ||
8ecbabd9 MLC |
916 | static const struct snd_kcontrol_new amicl_control = |
917 | SOC_DAPM_ENUM("Route", twl6040_enum[0]); | |
918 | ||
919 | static const struct snd_kcontrol_new amicr_control = | |
920 | SOC_DAPM_ENUM("Route", twl6040_enum[1]); | |
921 | ||
922 | /* Headset DAC playback switches */ | |
370a0314 JEC |
923 | static const struct snd_kcontrol_new hsl_mux_controls = |
924 | SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]); | |
8ecbabd9 | 925 | |
370a0314 JEC |
926 | static const struct snd_kcontrol_new hsr_mux_controls = |
927 | SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]); | |
8ecbabd9 MLC |
928 | |
929 | /* Handsfree DAC playback switches */ | |
370a0314 JEC |
930 | static const struct snd_kcontrol_new hfl_mux_controls = |
931 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]); | |
8ecbabd9 | 932 | |
370a0314 JEC |
933 | static const struct snd_kcontrol_new hfr_mux_controls = |
934 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]); | |
8ecbabd9 | 935 | |
317596a6 PU |
936 | static const struct snd_kcontrol_new ep_path_enable_control = |
937 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0); | |
871a05a7 | 938 | |
fdb625ff PU |
939 | static const struct snd_kcontrol_new auxl_switch_control = |
940 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0); | |
941 | ||
942 | static const struct snd_kcontrol_new auxr_switch_control = | |
943 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 6, 1, 0); | |
944 | ||
67c34130 PU |
945 | /* Vibra playback switches */ |
946 | static const struct snd_kcontrol_new vibral_mux_controls = | |
947 | SOC_DAPM_ENUM_EXT("Route", twl6040_vibra_enum[0], | |
948 | snd_soc_dapm_get_enum_double, | |
949 | twl6040_soc_dapm_put_vibra_enum); | |
950 | ||
951 | static const struct snd_kcontrol_new vibrar_mux_controls = | |
952 | SOC_DAPM_ENUM_EXT("Route", twl6040_vibra_enum[1], | |
953 | snd_soc_dapm_get_enum_double, | |
954 | twl6040_soc_dapm_put_vibra_enum); | |
955 | ||
6bba63b6 | 956 | /* Headset power mode */ |
7cca6067 | 957 | static const char *twl6040_power_mode_texts[] = { |
6bba63b6 MLC |
958 | "Low-Power", "High-Perfomance", |
959 | }; | |
960 | ||
7cca6067 PU |
961 | static const struct soc_enum twl6040_power_mode_enum = |
962 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts), | |
963 | twl6040_power_mode_texts); | |
6bba63b6 MLC |
964 | |
965 | static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol, | |
966 | struct snd_ctl_elem_value *ucontrol) | |
967 | { | |
968 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
969 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
970 | ||
971 | ucontrol->value.enumerated.item[0] = priv->hs_power_mode; | |
972 | ||
973 | return 0; | |
974 | } | |
975 | ||
976 | static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol, | |
977 | struct snd_ctl_elem_value *ucontrol) | |
978 | { | |
979 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
980 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
981 | int high_perf = ucontrol->value.enumerated.item[0]; | |
982 | int ret = 0; | |
983 | ||
984 | if (!priv->hs_power_mode_locked) | |
985 | ret = headset_power_mode(codec, high_perf); | |
986 | ||
987 | if (!ret) | |
988 | priv->hs_power_mode = high_perf; | |
989 | ||
990 | return ret; | |
991 | } | |
992 | ||
af958c72 PU |
993 | static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol, |
994 | struct snd_ctl_elem_value *ucontrol) | |
995 | { | |
996 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
997 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
998 | ||
999 | ucontrol->value.enumerated.item[0] = priv->pll_power_mode; | |
1000 | ||
1001 | return 0; | |
1002 | } | |
1003 | ||
1004 | static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol, | |
1005 | struct snd_ctl_elem_value *ucontrol) | |
1006 | { | |
1007 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
1008 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
1009 | ||
1010 | priv->pll_power_mode = ucontrol->value.enumerated.item[0]; | |
af958c72 PU |
1011 | |
1012 | return 0; | |
1013 | } | |
1014 | ||
1015 | int twl6040_get_clk_id(struct snd_soc_codec *codec) | |
1016 | { | |
1017 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | |
1018 | ||
ff593ca1 | 1019 | return priv->pll_power_mode; |
af958c72 PU |
1020 | } |
1021 | EXPORT_SYMBOL_GPL(twl6040_get_clk_id); | |
1022 | ||
db4aabcc PU |
1023 | int twl6040_get_trim_value(struct snd_soc_codec *codec, enum twl6040_trim trim) |
1024 | { | |
1025 | if (unlikely(trim >= TWL6040_TRIM_INVAL)) | |
1026 | return -EINVAL; | |
1027 | ||
1028 | return twl6040_read_reg_cache(codec, TWL6040_REG_TRIM1 + trim); | |
1029 | } | |
1030 | EXPORT_SYMBOL_GPL(twl6040_get_trim_value); | |
1031 | ||
8ecbabd9 MLC |
1032 | static const struct snd_kcontrol_new twl6040_snd_controls[] = { |
1033 | /* Capture gains */ | |
1034 | SOC_DOUBLE_TLV("Capture Preamplifier Volume", | |
1035 | TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv), | |
1036 | SOC_DOUBLE_TLV("Capture Volume", | |
1037 | TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv), | |
1038 | ||
370a0314 JEC |
1039 | /* AFM gains */ |
1040 | SOC_DOUBLE_TLV("Aux FM Volume", | |
1f71a3ba | 1041 | TWL6040_REG_LINEGAIN, 0, 3, 7, 0, afm_amp_tlv), |
370a0314 | 1042 | |
8ecbabd9 | 1043 | /* Playback gains */ |
0f9887d1 PU |
1044 | SOC_DOUBLE_EXT_TLV("Headset Playback Volume", |
1045 | TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, twl6040_get_volsw, | |
1046 | twl6040_put_volsw, hs_tlv), | |
1047 | SOC_DOUBLE_R_EXT_TLV("Handsfree Playback Volume", | |
1048 | TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, | |
1049 | twl6040_get_volsw, twl6040_put_volsw, hf_tlv), | |
871a05a7 JEC |
1050 | SOC_SINGLE_TLV("Earphone Playback Volume", |
1051 | TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv), | |
6bba63b6 | 1052 | |
7cca6067 | 1053 | SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum, |
6bba63b6 MLC |
1054 | twl6040_headset_power_get_enum, |
1055 | twl6040_headset_power_put_enum), | |
af958c72 PU |
1056 | |
1057 | SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum, | |
1058 | twl6040_pll_get_enum, twl6040_pll_put_enum), | |
8ecbabd9 MLC |
1059 | }; |
1060 | ||
1061 | static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { | |
1062 | /* Inputs */ | |
1063 | SND_SOC_DAPM_INPUT("MAINMIC"), | |
1064 | SND_SOC_DAPM_INPUT("HSMIC"), | |
1065 | SND_SOC_DAPM_INPUT("SUBMIC"), | |
1066 | SND_SOC_DAPM_INPUT("AFML"), | |
1067 | SND_SOC_DAPM_INPUT("AFMR"), | |
1068 | ||
1069 | /* Outputs */ | |
1070 | SND_SOC_DAPM_OUTPUT("HSOL"), | |
1071 | SND_SOC_DAPM_OUTPUT("HSOR"), | |
1072 | SND_SOC_DAPM_OUTPUT("HFL"), | |
1073 | SND_SOC_DAPM_OUTPUT("HFR"), | |
871a05a7 | 1074 | SND_SOC_DAPM_OUTPUT("EP"), |
fdb625ff PU |
1075 | SND_SOC_DAPM_OUTPUT("AUXL"), |
1076 | SND_SOC_DAPM_OUTPUT("AUXR"), | |
67c34130 PU |
1077 | SND_SOC_DAPM_OUTPUT("VIBRAL"), |
1078 | SND_SOC_DAPM_OUTPUT("VIBRAR"), | |
8ecbabd9 MLC |
1079 | |
1080 | /* Analog input muxes for the capture amplifiers */ | |
1081 | SND_SOC_DAPM_MUX("Analog Left Capture Route", | |
1082 | SND_SOC_NOPM, 0, 0, &amicl_control), | |
1083 | SND_SOC_DAPM_MUX("Analog Right Capture Route", | |
1084 | SND_SOC_NOPM, 0, 0, &amicr_control), | |
1085 | ||
1086 | /* Analog capture PGAs */ | |
1087 | SND_SOC_DAPM_PGA("MicAmpL", | |
1088 | TWL6040_REG_MICLCTL, 0, 0, NULL, 0), | |
1089 | SND_SOC_DAPM_PGA("MicAmpR", | |
1090 | TWL6040_REG_MICRCTL, 0, 0, NULL, 0), | |
1091 | ||
370a0314 JEC |
1092 | /* Auxiliary FM PGAs */ |
1093 | SND_SOC_DAPM_PGA("AFMAmpL", | |
1094 | TWL6040_REG_MICLCTL, 1, 0, NULL, 0), | |
1095 | SND_SOC_DAPM_PGA("AFMAmpR", | |
1096 | TWL6040_REG_MICRCTL, 1, 0, NULL, 0), | |
1097 | ||
8ecbabd9 MLC |
1098 | /* ADCs */ |
1099 | SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture", | |
1100 | TWL6040_REG_MICLCTL, 2, 0), | |
1101 | SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture", | |
1102 | TWL6040_REG_MICRCTL, 2, 0), | |
1103 | ||
1104 | /* Microphone bias */ | |
1105 | SND_SOC_DAPM_MICBIAS("Headset Mic Bias", | |
1106 | TWL6040_REG_AMICBCTL, 0, 0), | |
1107 | SND_SOC_DAPM_MICBIAS("Main Mic Bias", | |
1108 | TWL6040_REG_AMICBCTL, 4, 0), | |
1109 | SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias", | |
1110 | TWL6040_REG_DMICBCTL, 0, 0), | |
1111 | SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias", | |
1112 | TWL6040_REG_DMICBCTL, 4, 0), | |
1113 | ||
1114 | /* DACs */ | |
33b6816c PU |
1115 | SND_SOC_DAPM_DAC("HSDAC Left", "Headset Playback", SND_SOC_NOPM, 0, 0), |
1116 | SND_SOC_DAPM_DAC("HSDAC Right", "Headset Playback", SND_SOC_NOPM, 0, 0), | |
fac2f3e4 PU |
1117 | SND_SOC_DAPM_DAC("HFDAC Left", "Handsfree Playback", |
1118 | TWL6040_REG_HFLCTL, 0, 0), | |
1119 | SND_SOC_DAPM_DAC("HFDAC Right", "Handsfree Playback", | |
1120 | TWL6040_REG_HFRCTL, 0, 0), | |
67c34130 PU |
1121 | /* Virtual DAC for vibra path (DL4 channel) */ |
1122 | SND_SOC_DAPM_DAC("VIBRA DAC", "Vibra Playback", | |
1123 | SND_SOC_NOPM, 0, 0), | |
8ecbabd9 | 1124 | |
df11ce29 | 1125 | SND_SOC_DAPM_MUX("Handsfree Left Playback", |
370a0314 | 1126 | SND_SOC_NOPM, 0, 0, &hfl_mux_controls), |
df11ce29 | 1127 | SND_SOC_DAPM_MUX("Handsfree Right Playback", |
370a0314 JEC |
1128 | SND_SOC_NOPM, 0, 0, &hfr_mux_controls), |
1129 | /* Analog playback Muxes */ | |
45b0f60d | 1130 | SND_SOC_DAPM_MUX("Headset Left Playback", |
370a0314 | 1131 | SND_SOC_NOPM, 0, 0, &hsl_mux_controls), |
45b0f60d | 1132 | SND_SOC_DAPM_MUX("Headset Right Playback", |
370a0314 | 1133 | SND_SOC_NOPM, 0, 0, &hsr_mux_controls), |
8ecbabd9 | 1134 | |
67c34130 PU |
1135 | SND_SOC_DAPM_MUX("Vibra Left Playback", SND_SOC_NOPM, 0, 0, |
1136 | &vibral_mux_controls), | |
1137 | SND_SOC_DAPM_MUX("Vibra Right Playback", SND_SOC_NOPM, 0, 0, | |
1138 | &vibrar_mux_controls), | |
1139 | ||
317596a6 PU |
1140 | SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0, |
1141 | &ep_path_enable_control), | |
fdb625ff PU |
1142 | SND_SOC_DAPM_SWITCH("AUXL Playback", SND_SOC_NOPM, 0, 0, |
1143 | &auxl_switch_control), | |
1144 | SND_SOC_DAPM_SWITCH("AUXR Playback", SND_SOC_NOPM, 0, 0, | |
1145 | &auxr_switch_control), | |
317596a6 | 1146 | |
0fad4ed7 | 1147 | /* Analog playback drivers */ |
df11ce29 | 1148 | SND_SOC_DAPM_OUT_DRV_E("HF Left Driver", |
0fad4ed7 | 1149 | TWL6040_REG_HFLCTL, 4, 0, NULL, 0, |
eb6b71e7 | 1150 | out_drv_event, |
1bf84759 | 1151 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
df11ce29 | 1152 | SND_SOC_DAPM_OUT_DRV_E("HF Right Driver", |
0fad4ed7 | 1153 | TWL6040_REG_HFRCTL, 4, 0, NULL, 0, |
eb6b71e7 | 1154 | out_drv_event, |
1bf84759 | 1155 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
45b0f60d | 1156 | SND_SOC_DAPM_OUT_DRV_E("HS Left Driver", |
1bf84759 | 1157 | TWL6040_REG_HSLCTL, 2, 0, NULL, 0, |
eb6b71e7 | 1158 | out_drv_event, |
1bf84759 | 1159 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
45b0f60d | 1160 | SND_SOC_DAPM_OUT_DRV_E("HS Right Driver", |
1bf84759 | 1161 | TWL6040_REG_HSRCTL, 2, 0, NULL, 0, |
eb6b71e7 | 1162 | out_drv_event, |
1bf84759 | 1163 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
317596a6 PU |
1164 | SND_SOC_DAPM_OUT_DRV_E("Earphone Driver", |
1165 | TWL6040_REG_EARCTL, 0, 0, NULL, 0, | |
871a05a7 JEC |
1166 | twl6040_power_mode_event, |
1167 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
67c34130 PU |
1168 | SND_SOC_DAPM_OUT_DRV("Vibra Left Driver", |
1169 | TWL6040_REG_VIBCTLL, 0, 0, NULL, 0), | |
1170 | SND_SOC_DAPM_OUT_DRV("Vibra Right Driver", | |
1171 | TWL6040_REG_VIBCTLR, 0, 0, NULL, 0), | |
1172 | ||
1173 | SND_SOC_DAPM_SUPPLY("Vibra Left Control", TWL6040_REG_VIBCTLL, 2, 0, | |
1174 | NULL, 0), | |
1175 | SND_SOC_DAPM_SUPPLY("Vibra Right Control", TWL6040_REG_VIBCTLR, 2, 0, | |
1176 | NULL, 0), | |
33b6816c PU |
1177 | SND_SOC_DAPM_SUPPLY_S("HSDAC Power", 1, SND_SOC_NOPM, 0, 0, |
1178 | twl6040_hs_dac_event, | |
1179 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
8ecbabd9 MLC |
1180 | |
1181 | /* Analog playback PGAs */ | |
df11ce29 | 1182 | SND_SOC_DAPM_PGA("HF Left PGA", |
8ecbabd9 | 1183 | TWL6040_REG_HFLCTL, 1, 0, NULL, 0), |
df11ce29 | 1184 | SND_SOC_DAPM_PGA("HF Right PGA", |
8ecbabd9 MLC |
1185 | TWL6040_REG_HFRCTL, 1, 0, NULL, 0), |
1186 | ||
1187 | }; | |
1188 | ||
1189 | static const struct snd_soc_dapm_route intercon[] = { | |
1190 | /* Capture path */ | |
1191 | {"Analog Left Capture Route", "Headset Mic", "HSMIC"}, | |
1192 | {"Analog Left Capture Route", "Main Mic", "MAINMIC"}, | |
1193 | {"Analog Left Capture Route", "Aux/FM Left", "AFML"}, | |
1194 | ||
1195 | {"Analog Right Capture Route", "Headset Mic", "HSMIC"}, | |
1196 | {"Analog Right Capture Route", "Sub Mic", "SUBMIC"}, | |
1197 | {"Analog Right Capture Route", "Aux/FM Right", "AFMR"}, | |
1198 | ||
1199 | {"MicAmpL", NULL, "Analog Left Capture Route"}, | |
1200 | {"MicAmpR", NULL, "Analog Right Capture Route"}, | |
1201 | ||
1202 | {"ADC Left", NULL, "MicAmpL"}, | |
1203 | {"ADC Right", NULL, "MicAmpR"}, | |
1204 | ||
370a0314 | 1205 | /* AFM path */ |
5bf692d9 PU |
1206 | {"AFMAmpL", NULL, "AFML"}, |
1207 | {"AFMAmpR", NULL, "AFMR"}, | |
370a0314 | 1208 | |
33b6816c PU |
1209 | {"HSDAC Left", NULL, "HSDAC Power"}, |
1210 | {"HSDAC Right", NULL, "HSDAC Power"}, | |
1211 | ||
45b0f60d PU |
1212 | {"Headset Left Playback", "HS DAC", "HSDAC Left"}, |
1213 | {"Headset Left Playback", "Line-In amp", "AFMAmpL"}, | |
8ecbabd9 | 1214 | |
45b0f60d PU |
1215 | {"Headset Right Playback", "HS DAC", "HSDAC Right"}, |
1216 | {"Headset Right Playback", "Line-In amp", "AFMAmpR"}, | |
370a0314 | 1217 | |
45b0f60d PU |
1218 | {"HS Left Driver", NULL, "Headset Left Playback"}, |
1219 | {"HS Right Driver", NULL, "Headset Right Playback"}, | |
8ecbabd9 | 1220 | |
45b0f60d PU |
1221 | {"HSOL", NULL, "HS Left Driver"}, |
1222 | {"HSOR", NULL, "HS Right Driver"}, | |
8ecbabd9 | 1223 | |
871a05a7 | 1224 | /* Earphone playback path */ |
317596a6 PU |
1225 | {"Earphone Playback", "Switch", "HSDAC Left"}, |
1226 | {"Earphone Driver", NULL, "Earphone Playback"}, | |
871a05a7 JEC |
1227 | {"EP", NULL, "Earphone Driver"}, |
1228 | ||
df11ce29 PU |
1229 | {"Handsfree Left Playback", "HF DAC", "HFDAC Left"}, |
1230 | {"Handsfree Left Playback", "Line-In amp", "AFMAmpL"}, | |
370a0314 | 1231 | |
df11ce29 PU |
1232 | {"Handsfree Right Playback", "HF DAC", "HFDAC Right"}, |
1233 | {"Handsfree Right Playback", "Line-In amp", "AFMAmpR"}, | |
8ecbabd9 | 1234 | |
df11ce29 PU |
1235 | {"HF Left PGA", NULL, "Handsfree Left Playback"}, |
1236 | {"HF Right PGA", NULL, "Handsfree Right Playback"}, | |
8ecbabd9 | 1237 | |
df11ce29 PU |
1238 | {"HF Left Driver", NULL, "HF Left PGA"}, |
1239 | {"HF Right Driver", NULL, "HF Right PGA"}, | |
8ecbabd9 | 1240 | |
df11ce29 PU |
1241 | {"HFL", NULL, "HF Left Driver"}, |
1242 | {"HFR", NULL, "HF Right Driver"}, | |
fdb625ff PU |
1243 | |
1244 | {"AUXL Playback", "Switch", "HF Left PGA"}, | |
1245 | {"AUXR Playback", "Switch", "HF Right PGA"}, | |
1246 | ||
1247 | {"AUXL", NULL, "AUXL Playback"}, | |
1248 | {"AUXR", NULL, "AUXR Playback"}, | |
67c34130 PU |
1249 | |
1250 | /* Vibrator paths */ | |
1251 | {"Vibra Left Playback", "Audio PDM", "VIBRA DAC"}, | |
1252 | {"Vibra Right Playback", "Audio PDM", "VIBRA DAC"}, | |
1253 | ||
1254 | {"Vibra Left Driver", NULL, "Vibra Left Playback"}, | |
1255 | {"Vibra Right Driver", NULL, "Vibra Right Playback"}, | |
1256 | {"Vibra Left Driver", NULL, "Vibra Left Control"}, | |
1257 | {"Vibra Right Driver", NULL, "Vibra Right Control"}, | |
1258 | ||
1259 | {"VIBRAL", NULL, "Vibra Left Driver"}, | |
1260 | {"VIBRAR", NULL, "Vibra Right Driver"}, | |
8ecbabd9 MLC |
1261 | }; |
1262 | ||
8ecbabd9 MLC |
1263 | static int twl6040_set_bias_level(struct snd_soc_codec *codec, |
1264 | enum snd_soc_bias_level level) | |
1265 | { | |
fb34d3d5 | 1266 | struct twl6040 *twl6040 = codec->control_data; |
d4a8ca24 | 1267 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
1268 | int ret; |
1269 | ||
1270 | switch (level) { | |
1271 | case SND_SOC_BIAS_ON: | |
1272 | break; | |
1273 | case SND_SOC_BIAS_PREPARE: | |
1274 | break; | |
1275 | case SND_SOC_BIAS_STANDBY: | |
1276 | if (priv->codec_powered) | |
1277 | break; | |
1278 | ||
fb34d3d5 MLC |
1279 | ret = twl6040_power(twl6040, 1); |
1280 | if (ret) | |
1281 | return ret; | |
8ecbabd9 | 1282 | |
fb34d3d5 | 1283 | priv->codec_powered = 1; |
8ecbabd9 | 1284 | |
a52762ee | 1285 | twl6040_restore_regs(codec); |
65b7cecc OM |
1286 | |
1287 | /* Set external boost GPO */ | |
1288 | twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02); | |
8ecbabd9 MLC |
1289 | break; |
1290 | case SND_SOC_BIAS_OFF: | |
1291 | if (!priv->codec_powered) | |
1292 | break; | |
1293 | ||
fb34d3d5 | 1294 | twl6040_power(twl6040, 0); |
8ecbabd9 MLC |
1295 | priv->codec_powered = 0; |
1296 | break; | |
1297 | } | |
1298 | ||
ce6120cc | 1299 | codec->dapm.bias_level = level; |
8ecbabd9 MLC |
1300 | |
1301 | return 0; | |
1302 | } | |
1303 | ||
8ecbabd9 MLC |
1304 | static int twl6040_startup(struct snd_pcm_substream *substream, |
1305 | struct snd_soc_dai *dai) | |
1306 | { | |
1307 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 1308 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 1309 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 1310 | |
8ecbabd9 MLC |
1311 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
1312 | SNDRV_PCM_HW_PARAM_RATE, | |
f53c346c | 1313 | &sysclk_constraints[priv->pll_power_mode]); |
8ecbabd9 MLC |
1314 | |
1315 | return 0; | |
1316 | } | |
1317 | ||
1318 | static int twl6040_hw_params(struct snd_pcm_substream *substream, | |
1319 | struct snd_pcm_hw_params *params, | |
1320 | struct snd_soc_dai *dai) | |
1321 | { | |
1322 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 1323 | struct snd_soc_codec *codec = rtd->codec; |
d4a8ca24 | 1324 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
1325 | int rate; |
1326 | ||
8ecbabd9 MLC |
1327 | rate = params_rate(params); |
1328 | switch (rate) { | |
60ea4cec OM |
1329 | case 11250: |
1330 | case 22500: | |
1331 | case 44100: | |
8ecbabd9 | 1332 | case 88200: |
753621c2 PU |
1333 | /* These rates are not supported when HPPLL is in use */ |
1334 | if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) { | |
1335 | dev_err(codec->dev, "HPPLL does not support rate %d\n", | |
1336 | rate); | |
1337 | return -EINVAL; | |
1338 | } | |
8ecbabd9 MLC |
1339 | priv->sysclk = 17640000; |
1340 | break; | |
60ea4cec OM |
1341 | case 8000: |
1342 | case 16000: | |
1343 | case 32000: | |
1344 | case 48000: | |
8ecbabd9 | 1345 | case 96000: |
8ecbabd9 MLC |
1346 | priv->sysclk = 19200000; |
1347 | break; | |
1348 | default: | |
1349 | dev_err(codec->dev, "unsupported rate %d\n", rate); | |
1350 | return -EINVAL; | |
1351 | } | |
1352 | ||
8ecbabd9 MLC |
1353 | return 0; |
1354 | } | |
1355 | ||
4e624d06 OM |
1356 | static int twl6040_prepare(struct snd_pcm_substream *substream, |
1357 | struct snd_soc_dai *dai) | |
8ecbabd9 MLC |
1358 | { |
1359 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 1360 | struct snd_soc_codec *codec = rtd->codec; |
753621c2 | 1361 | struct twl6040 *twl6040 = codec->control_data; |
d4a8ca24 | 1362 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
753621c2 | 1363 | int ret; |
8ecbabd9 | 1364 | |
4e624d06 OM |
1365 | if (!priv->sysclk) { |
1366 | dev_err(codec->dev, | |
1367 | "no mclk configured, call set_sysclk() on init\n"); | |
1368 | return -EINVAL; | |
1369 | } | |
1370 | ||
753621c2 PU |
1371 | ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk); |
1372 | if (ret) { | |
1373 | dev_err(codec->dev, "Can not set PLL (%d)\n", ret); | |
1374 | return -EPERM; | |
1375 | } | |
1376 | ||
8ecbabd9 MLC |
1377 | return 0; |
1378 | } | |
1379 | ||
1380 | static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
1381 | int clk_id, unsigned int freq, int dir) | |
1382 | { | |
1383 | struct snd_soc_codec *codec = codec_dai->codec; | |
d4a8ca24 | 1384 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 MLC |
1385 | |
1386 | switch (clk_id) { | |
1387 | case TWL6040_SYSCLK_SEL_LPPLL: | |
8ecbabd9 | 1388 | case TWL6040_SYSCLK_SEL_HPPLL: |
753621c2 PU |
1389 | priv->pll = clk_id; |
1390 | priv->clk_in = freq; | |
8ecbabd9 MLC |
1391 | break; |
1392 | default: | |
1393 | dev_err(codec->dev, "unknown clk_id %d\n", clk_id); | |
1394 | return -EINVAL; | |
1395 | } | |
1396 | ||
1397 | return 0; | |
1398 | } | |
1399 | ||
1400 | static struct snd_soc_dai_ops twl6040_dai_ops = { | |
1401 | .startup = twl6040_startup, | |
1402 | .hw_params = twl6040_hw_params, | |
4e624d06 | 1403 | .prepare = twl6040_prepare, |
8ecbabd9 MLC |
1404 | .set_sysclk = twl6040_set_dai_sysclk, |
1405 | }; | |
1406 | ||
6510bdc3 | 1407 | static struct snd_soc_dai_driver twl6040_dai[] = { |
21385eeb | 1408 | { |
d13f1fe0 | 1409 | .name = "twl6040-legacy", |
8ecbabd9 MLC |
1410 | .playback = { |
1411 | .stream_name = "Playback", | |
1412 | .channels_min = 1, | |
cdd5054c | 1413 | .channels_max = 5, |
21385eeb PU |
1414 | .rates = TWL6040_RATES, |
1415 | .formats = TWL6040_FORMATS, | |
1416 | }, | |
1417 | .capture = { | |
1418 | .stream_name = "Capture", | |
1419 | .channels_min = 1, | |
1420 | .channels_max = 2, | |
8ecbabd9 MLC |
1421 | .rates = TWL6040_RATES, |
1422 | .formats = TWL6040_FORMATS, | |
1423 | }, | |
21385eeb PU |
1424 | .ops = &twl6040_dai_ops, |
1425 | }, | |
6510bdc3 LG |
1426 | { |
1427 | .name = "twl6040-ul", | |
8ecbabd9 MLC |
1428 | .capture = { |
1429 | .stream_name = "Capture", | |
1430 | .channels_min = 1, | |
1431 | .channels_max = 2, | |
1432 | .rates = TWL6040_RATES, | |
1433 | .formats = TWL6040_FORMATS, | |
1434 | }, | |
1435 | .ops = &twl6040_dai_ops, | |
6510bdc3 LG |
1436 | }, |
1437 | { | |
1438 | .name = "twl6040-dl1", | |
8ecbabd9 | 1439 | .playback = { |
6510bdc3 | 1440 | .stream_name = "Headset Playback", |
8ecbabd9 | 1441 | .channels_min = 1, |
6510bdc3 | 1442 | .channels_max = 2, |
8ecbabd9 MLC |
1443 | .rates = TWL6040_RATES, |
1444 | .formats = TWL6040_FORMATS, | |
1445 | }, | |
6510bdc3 LG |
1446 | .ops = &twl6040_dai_ops, |
1447 | }, | |
1448 | { | |
1449 | .name = "twl6040-dl2", | |
1450 | .playback = { | |
1451 | .stream_name = "Handsfree Playback", | |
8ecbabd9 MLC |
1452 | .channels_min = 1, |
1453 | .channels_max = 2, | |
1454 | .rates = TWL6040_RATES, | |
1455 | .formats = TWL6040_FORMATS, | |
1456 | }, | |
1457 | .ops = &twl6040_dai_ops, | |
6510bdc3 LG |
1458 | }, |
1459 | { | |
1460 | .name = "twl6040-vib", | |
1461 | .playback = { | |
1462 | .stream_name = "Vibra Playback", | |
d8dd032d PU |
1463 | .channels_min = 1, |
1464 | .channels_max = 1, | |
6510bdc3 LG |
1465 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
1466 | .formats = TWL6040_FORMATS, | |
1467 | }, | |
1468 | .ops = &twl6040_dai_ops, | |
1469 | }, | |
8ecbabd9 | 1470 | }; |
8ecbabd9 MLC |
1471 | |
1472 | #ifdef CONFIG_PM | |
f0fba2ad | 1473 | static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state) |
8ecbabd9 | 1474 | { |
8ecbabd9 MLC |
1475 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1476 | ||
1477 | return 0; | |
1478 | } | |
1479 | ||
f0fba2ad | 1480 | static int twl6040_resume(struct snd_soc_codec *codec) |
8ecbabd9 | 1481 | { |
8ecbabd9 | 1482 | twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
6c311041 | 1483 | twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level); |
8ecbabd9 MLC |
1484 | |
1485 | return 0; | |
1486 | } | |
1487 | #else | |
1488 | #define twl6040_suspend NULL | |
1489 | #define twl6040_resume NULL | |
1490 | #endif | |
1491 | ||
f0fba2ad | 1492 | static int twl6040_probe(struct snd_soc_codec *codec) |
8ecbabd9 | 1493 | { |
8ecbabd9 | 1494 | struct twl6040_data *priv; |
1fbe9952 | 1495 | struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); |
2a433b9d PU |
1496 | struct platform_device *pdev = container_of(codec->dev, |
1497 | struct platform_device, dev); | |
8ecbabd9 MLC |
1498 | int ret = 0; |
1499 | ||
1500 | priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL); | |
1501 | if (priv == NULL) | |
1502 | return -ENOMEM; | |
f0fba2ad | 1503 | snd_soc_codec_set_drvdata(codec, priv); |
8ecbabd9 | 1504 | |
a2d2362e | 1505 | priv->codec = codec; |
fb34d3d5 | 1506 | codec->control_data = dev_get_drvdata(codec->dev->parent); |
a2d2362e | 1507 | |
1fbe9952 ACG |
1508 | if (pdata && pdata->hs_left_step && pdata->hs_right_step) { |
1509 | priv->hs_left_step = pdata->hs_left_step; | |
1510 | priv->hs_right_step = pdata->hs_right_step; | |
1511 | } else { | |
1512 | priv->hs_left_step = 1; | |
1513 | priv->hs_right_step = 1; | |
1514 | } | |
99903ea2 | 1515 | |
1fbe9952 ACG |
1516 | if (pdata && pdata->hf_left_step && pdata->hf_right_step) { |
1517 | priv->hf_left_step = pdata->hf_left_step; | |
1518 | priv->hf_right_step = pdata->hf_right_step; | |
1519 | } else { | |
1520 | priv->hf_left_step = 1; | |
1521 | priv->hf_right_step = 1; | |
1522 | } | |
99903ea2 | 1523 | |
2a433b9d PU |
1524 | priv->plug_irq = platform_get_irq(pdev, 0); |
1525 | if (priv->plug_irq < 0) { | |
1526 | dev_err(codec->dev, "invalid irq\n"); | |
1527 | ret = -EINVAL; | |
1528 | goto work_err; | |
1529 | } | |
8ecbabd9 | 1530 | |
a46737ae | 1531 | priv->workqueue = alloc_workqueue("twl6040-codec", 0, 0); |
19aab08d AL |
1532 | if (!priv->workqueue) { |
1533 | ret = -ENOMEM; | |
a2d2362e | 1534 | goto work_err; |
19aab08d | 1535 | } |
a2d2362e | 1536 | |
46dd0b93 | 1537 | INIT_DELAYED_WORK(&priv->hs_jack.work, twl6040_accessory_work); |
a46737ae PU |
1538 | INIT_DELAYED_WORK(&priv->headset.work, twl6040_pga_hs_work); |
1539 | INIT_DELAYED_WORK(&priv->handsfree.work, twl6040_pga_hf_work); | |
a2d2362e JEC |
1540 | |
1541 | mutex_init(&priv->mutex); | |
8ecbabd9 | 1542 | |
1bf84759 MOC |
1543 | init_completion(&priv->headset.ramp_done); |
1544 | init_completion(&priv->handsfree.ramp_done); | |
8ecbabd9 | 1545 | |
2a433b9d PU |
1546 | ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler, |
1547 | 0, "twl6040_irq_plug", codec); | |
fb34d3d5 MLC |
1548 | if (ret) { |
1549 | dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret); | |
1550 | goto plugirq_err; | |
1551 | } | |
1552 | ||
a52762ee | 1553 | twl6040_init_chip(codec); |
fb34d3d5 | 1554 | |
8ecbabd9 MLC |
1555 | /* power on device */ |
1556 | ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
a175fce0 PU |
1557 | if (!ret) |
1558 | return 0; | |
8ecbabd9 | 1559 | |
a175fce0 | 1560 | /* Error path */ |
2a433b9d | 1561 | free_irq(priv->plug_irq, codec); |
fb34d3d5 | 1562 | plugirq_err: |
a2d2362e JEC |
1563 | destroy_workqueue(priv->workqueue); |
1564 | work_err: | |
8ecbabd9 MLC |
1565 | kfree(priv); |
1566 | return ret; | |
1567 | } | |
1568 | ||
f0fba2ad | 1569 | static int twl6040_remove(struct snd_soc_codec *codec) |
8ecbabd9 | 1570 | { |
f0fba2ad | 1571 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
8ecbabd9 | 1572 | |
f0fba2ad | 1573 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); |
2a433b9d | 1574 | free_irq(priv->plug_irq, codec); |
a2d2362e | 1575 | destroy_workqueue(priv->workqueue); |
f0fba2ad | 1576 | kfree(priv); |
8ecbabd9 | 1577 | |
f0fba2ad LG |
1578 | return 0; |
1579 | } | |
8ecbabd9 | 1580 | |
f0fba2ad LG |
1581 | static struct snd_soc_codec_driver soc_codec_dev_twl6040 = { |
1582 | .probe = twl6040_probe, | |
1583 | .remove = twl6040_remove, | |
1584 | .suspend = twl6040_suspend, | |
1585 | .resume = twl6040_resume, | |
1586 | .read = twl6040_read_reg_cache, | |
1587 | .write = twl6040_write, | |
1588 | .set_bias_level = twl6040_set_bias_level, | |
1589 | .reg_cache_size = ARRAY_SIZE(twl6040_reg), | |
1590 | .reg_word_size = sizeof(u8), | |
1591 | .reg_cache_default = twl6040_reg, | |
a175fce0 PU |
1592 | |
1593 | .controls = twl6040_snd_controls, | |
1594 | .num_controls = ARRAY_SIZE(twl6040_snd_controls), | |
1595 | .dapm_widgets = twl6040_dapm_widgets, | |
1596 | .num_dapm_widgets = ARRAY_SIZE(twl6040_dapm_widgets), | |
1597 | .dapm_routes = intercon, | |
1598 | .num_dapm_routes = ARRAY_SIZE(intercon), | |
f0fba2ad LG |
1599 | }; |
1600 | ||
1601 | static int __devinit twl6040_codec_probe(struct platform_device *pdev) | |
1602 | { | |
6510bdc3 LG |
1603 | return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl6040, |
1604 | twl6040_dai, ARRAY_SIZE(twl6040_dai)); | |
f0fba2ad LG |
1605 | } |
1606 | ||
1607 | static int __devexit twl6040_codec_remove(struct platform_device *pdev) | |
1608 | { | |
1609 | snd_soc_unregister_codec(&pdev->dev); | |
8ecbabd9 MLC |
1610 | return 0; |
1611 | } | |
1612 | ||
1613 | static struct platform_driver twl6040_codec_driver = { | |
1614 | .driver = { | |
f0fba2ad | 1615 | .name = "twl6040-codec", |
8ecbabd9 MLC |
1616 | .owner = THIS_MODULE, |
1617 | }, | |
1618 | .probe = twl6040_codec_probe, | |
1619 | .remove = __devexit_p(twl6040_codec_remove), | |
1620 | }; | |
1621 | ||
1622 | static int __init twl6040_codec_init(void) | |
1623 | { | |
1624 | return platform_driver_register(&twl6040_codec_driver); | |
1625 | } | |
1626 | module_init(twl6040_codec_init); | |
1627 | ||
1628 | static void __exit twl6040_codec_exit(void) | |
1629 | { | |
1630 | platform_driver_unregister(&twl6040_codec_driver); | |
1631 | } | |
1632 | module_exit(twl6040_codec_exit); | |
1633 | ||
1634 | MODULE_DESCRIPTION("ASoC TWL6040 codec driver"); | |
1635 | MODULE_AUTHOR("Misael Lopez Cruz"); | |
1636 | MODULE_LICENSE("GPL"); |