Commit | Line | Data |
---|---|---|
8ecbabd9 MLC |
1 | /* |
2 | * ALSA SoC TWL6040 codec driver | |
3 | * | |
4 | * Author: Misael Lopez Cruz <x0052729@ti.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
18 | * 02110-1301 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #ifndef __TWL6040_H__ | |
23 | #define __TWL6040_H__ | |
24 | ||
25 | #define TWL6040_REG_ASICID 0x01 | |
26 | #define TWL6040_REG_ASICREV 0x02 | |
27 | #define TWL6040_REG_INTID 0x03 | |
28 | #define TWL6040_REG_INTMR 0x04 | |
29 | #define TWL6040_REG_NCPCTL 0x05 | |
30 | #define TWL6040_REG_LDOCTL 0x06 | |
31 | #define TWL6040_REG_HPPLLCTL 0x07 | |
32 | #define TWL6040_REG_LPPLLCTL 0x08 | |
33 | #define TWL6040_REG_LPPLLDIV 0x09 | |
34 | #define TWL6040_REG_AMICBCTL 0x0A | |
35 | #define TWL6040_REG_DMICBCTL 0x0B | |
36 | #define TWL6040_REG_MICLCTL 0x0C | |
37 | #define TWL6040_REG_MICRCTL 0x0D | |
38 | #define TWL6040_REG_MICGAIN 0x0E | |
39 | #define TWL6040_REG_LINEGAIN 0x0F | |
40 | #define TWL6040_REG_HSLCTL 0x10 | |
41 | #define TWL6040_REG_HSRCTL 0x11 | |
42 | #define TWL6040_REG_HSGAIN 0x12 | |
43 | #define TWL6040_REG_EARCTL 0x13 | |
44 | #define TWL6040_REG_HFLCTL 0x14 | |
45 | #define TWL6040_REG_HFLGAIN 0x15 | |
46 | #define TWL6040_REG_HFRCTL 0x16 | |
47 | #define TWL6040_REG_HFRGAIN 0x17 | |
48 | #define TWL6040_REG_VIBCTLL 0x18 | |
49 | #define TWL6040_REG_VIBDATL 0x19 | |
50 | #define TWL6040_REG_VIBCTLR 0x1A | |
51 | #define TWL6040_REG_VIBDATR 0x1B | |
52 | #define TWL6040_REG_HKCTL1 0x1C | |
53 | #define TWL6040_REG_HKCTL2 0x1D | |
54 | #define TWL6040_REG_GPOCTL 0x1E | |
55 | #define TWL6040_REG_ALB 0x1F | |
56 | #define TWL6040_REG_DLB 0x20 | |
57 | #define TWL6040_REG_TRIM1 0x28 | |
58 | #define TWL6040_REG_TRIM2 0x29 | |
59 | #define TWL6040_REG_TRIM3 0x2A | |
60 | #define TWL6040_REG_HSOTRIM 0x2B | |
61 | #define TWL6040_REG_HFOTRIM 0x2C | |
62 | #define TWL6040_REG_ACCCTL 0x2D | |
63 | #define TWL6040_REG_STATUS 0x2E | |
64 | ||
65 | #define TWL6040_CACHEREGNUM (TWL6040_REG_STATUS + 1) | |
66 | ||
67 | #define TWL6040_VIOREGNUM 18 | |
68 | #define TWL6040_VDDREGNUM 21 | |
69 | ||
70 | /* INTID (0x03) fields */ | |
71 | ||
72 | #define TWL6040_THINT 0x01 | |
73 | #define TWL6040_PLUGINT 0x02 | |
74 | #define TWL6040_UNPLUGINT 0x04 | |
75 | #define TWL6040_HOOKINT 0x08 | |
76 | #define TWL6040_HFINT 0x10 | |
77 | #define TWL6040_VIBINT 0x20 | |
78 | #define TWL6040_READYINT 0x40 | |
79 | ||
80 | /* INTMR (0x04) fields */ | |
81 | ||
82 | #define TWL6040_READYMSK 0x40 | |
83 | #define TWL6040_ALLINT_MSK 0x7B | |
84 | ||
85 | /* NCPCTL (0x05) fields */ | |
86 | ||
87 | #define TWL6040_NCPENA 0x01 | |
88 | #define TWL6040_NCPOPEN 0x40 | |
89 | ||
90 | /* LDOCTL (0x06) fields */ | |
91 | ||
92 | #define TWL6040_LSLDOENA 0x01 | |
93 | #define TWL6040_HSLDOENA 0x04 | |
94 | #define TWL6040_REFENA 0x40 | |
95 | #define TWL6040_OSCENA 0x80 | |
96 | ||
97 | /* HPPLLCTL (0x07) fields */ | |
98 | ||
99 | #define TWL6040_HPLLENA 0x01 | |
100 | #define TWL6040_HPLLRST 0x02 | |
101 | #define TWL6040_HPLLBP 0x04 | |
102 | #define TWL6040_HPLLSQRENA 0x08 | |
103 | #define TWL6040_HPLLSQRBP 0x10 | |
104 | #define TWL6040_MCLK_12000KHZ (0 << 5) | |
105 | #define TWL6040_MCLK_19200KHZ (1 << 5) | |
106 | #define TWL6040_MCLK_26000KHZ (2 << 5) | |
107 | #define TWL6040_MCLK_38400KHZ (3 << 5) | |
108 | #define TWL6040_MCLK_MSK 0x60 | |
109 | ||
110 | /* LPPLLCTL (0x08) fields */ | |
111 | ||
112 | #define TWL6040_LPLLENA 0x01 | |
113 | #define TWL6040_LPLLRST 0x02 | |
114 | #define TWL6040_LPLLSEL 0x04 | |
115 | #define TWL6040_LPLLFIN 0x08 | |
116 | #define TWL6040_HPLLSEL 0x10 | |
117 | ||
118 | /* HSLCTL (0x10) fields */ | |
119 | ||
120 | #define TWL6040_HSDACMODEL 0x02 | |
121 | #define TWL6040_HSDRVMODEL 0x08 | |
122 | ||
123 | /* HSRCTL (0x11) fields */ | |
124 | ||
125 | #define TWL6040_HSDACMODER 0x02 | |
126 | #define TWL6040_HSDRVMODER 0x08 | |
127 | ||
128 | /* ACCCTL (0x2D) fields */ | |
129 | ||
130 | #define TWL6040_RESETSPLIT 0x04 | |
131 | ||
132 | #define TWL6040_SYSCLK_SEL_LPPLL 1 | |
133 | #define TWL6040_SYSCLK_SEL_HPPLL 2 | |
134 | ||
135 | #define TWL6040_HPPLL_ID 1 | |
136 | #define TWL6040_LPPLL_ID 2 | |
137 | ||
8ecbabd9 | 138 | #endif /* End of __TWL6040_H__ */ |