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1dcf98ff MB |
1 | /* |
2 | * wm8523.c -- WM8523 ALSA SoC Audio driver | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/pm.h> | |
19 | #include <linux/i2c.h> | |
b9288f49 | 20 | #include <linux/regmap.h> |
1dcf98ff | 21 | #include <linux/regulator/consumer.h> |
5a0e3ad6 | 22 | #include <linux/slab.h> |
bf5a85be | 23 | #include <linux/of_device.h> |
1dcf98ff MB |
24 | #include <sound/core.h> |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
1dcf98ff MB |
28 | #include <sound/initval.h> |
29 | #include <sound/tlv.h> | |
30 | ||
31 | #include "wm8523.h" | |
32 | ||
1dcf98ff MB |
33 | #define WM8523_NUM_SUPPLIES 2 |
34 | static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = { | |
35 | "AVDD", | |
36 | "LINEVDD", | |
37 | }; | |
38 | ||
39 | #define WM8523_NUM_RATES 7 | |
40 | ||
41 | /* codec private data */ | |
42 | struct wm8523_priv { | |
b9288f49 | 43 | struct regmap *regmap; |
1dcf98ff MB |
44 | struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES]; |
45 | unsigned int sysclk; | |
46 | unsigned int rate_constraint_list[WM8523_NUM_RATES]; | |
47 | struct snd_pcm_hw_constraint_list rate_constraint; | |
48 | }; | |
49 | ||
b9288f49 MB |
50 | static const struct reg_default wm8523_reg_defaults[] = { |
51 | { 2, 0x0000 }, /* R2 - PSCTRL1 */ | |
52 | { 3, 0x1812 }, /* R3 - AIF_CTRL1 */ | |
53 | { 4, 0x0000 }, /* R4 - AIF_CTRL2 */ | |
54 | { 5, 0x0001 }, /* R5 - DAC_CTRL3 */ | |
55 | { 6, 0x0190 }, /* R6 - DAC_GAINL */ | |
56 | { 7, 0x0190 }, /* R7 - DAC_GAINR */ | |
57 | { 8, 0x0000 }, /* R8 - ZERO_DETECT */ | |
1dcf98ff MB |
58 | }; |
59 | ||
b9288f49 | 60 | static bool wm8523_volatile_register(struct device *dev, unsigned int reg) |
1dcf98ff MB |
61 | { |
62 | switch (reg) { | |
63 | case WM8523_DEVICE_ID: | |
64 | case WM8523_REVISION: | |
b9288f49 | 65 | return true; |
1dcf98ff | 66 | default: |
b9288f49 | 67 | return false; |
1dcf98ff MB |
68 | } |
69 | } | |
70 | ||
1dcf98ff MB |
71 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0); |
72 | ||
73 | static const char *wm8523_zd_count_text[] = { | |
74 | "1024", | |
75 | "2048", | |
76 | }; | |
77 | ||
fed08d94 TI |
78 | static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0, |
79 | wm8523_zd_count_text); | |
1dcf98ff | 80 | |
1661699a | 81 | static const struct snd_kcontrol_new wm8523_controls[] = { |
1dcf98ff MB |
82 | SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR, |
83 | 0, 448, 0, dac_tlv), | |
84 | SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0), | |
85 | SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0), | |
86 | SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1), | |
87 | SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0), | |
88 | SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0), | |
89 | SOC_ENUM("Zero Detect Count", wm8523_zc_count), | |
90 | }; | |
91 | ||
92 | static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = { | |
93 | SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0), | |
94 | SND_SOC_DAPM_OUTPUT("LINEVOUTL"), | |
95 | SND_SOC_DAPM_OUTPUT("LINEVOUTR"), | |
96 | }; | |
97 | ||
1661699a | 98 | static const struct snd_soc_dapm_route wm8523_dapm_routes[] = { |
1dcf98ff MB |
99 | { "LINEVOUTL", NULL, "DAC" }, |
100 | { "LINEVOUTR", NULL, "DAC" }, | |
101 | }; | |
102 | ||
1dcf98ff MB |
103 | static struct { |
104 | int value; | |
105 | int ratio; | |
106 | } lrclk_ratios[WM8523_NUM_RATES] = { | |
107 | { 1, 128 }, | |
108 | { 2, 192 }, | |
109 | { 3, 256 }, | |
110 | { 4, 384 }, | |
111 | { 5, 512 }, | |
112 | { 6, 768 }, | |
113 | { 7, 1152 }, | |
114 | }; | |
115 | ||
116 | static int wm8523_startup(struct snd_pcm_substream *substream, | |
117 | struct snd_soc_dai *dai) | |
118 | { | |
119 | struct snd_soc_codec *codec = dai->codec; | |
b2c812e2 | 120 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
121 | |
122 | /* The set of sample rates that can be supported depends on the | |
123 | * MCLK supplied to the CODEC - enforce this. | |
124 | */ | |
125 | if (!wm8523->sysclk) { | |
126 | dev_err(codec->dev, | |
127 | "No MCLK configured, call set_sysclk() on init\n"); | |
128 | return -EINVAL; | |
129 | } | |
130 | ||
1dcf98ff MB |
131 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
132 | SNDRV_PCM_HW_PARAM_RATE, | |
133 | &wm8523->rate_constraint); | |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
138 | static int wm8523_hw_params(struct snd_pcm_substream *substream, | |
139 | struct snd_pcm_hw_params *params, | |
140 | struct snd_soc_dai *dai) | |
141 | { | |
e6968a17 | 142 | struct snd_soc_codec *codec = dai->codec; |
b2c812e2 | 143 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff | 144 | int i; |
8d50e447 MB |
145 | u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); |
146 | u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2); | |
1dcf98ff MB |
147 | |
148 | /* Find a supported LRCLK ratio */ | |
149 | for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { | |
150 | if (wm8523->sysclk / params_rate(params) == | |
151 | lrclk_ratios[i].ratio) | |
152 | break; | |
153 | } | |
154 | ||
155 | /* Should never happen, should be handled by constraints */ | |
156 | if (i == ARRAY_SIZE(lrclk_ratios)) { | |
157 | dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n", | |
158 | wm8523->sysclk / params_rate(params)); | |
159 | return -EINVAL; | |
160 | } | |
161 | ||
162 | aifctrl2 &= ~WM8523_SR_MASK; | |
163 | aifctrl2 |= lrclk_ratios[i].value; | |
164 | ||
165 | aifctrl1 &= ~WM8523_WL_MASK; | |
3fafcc8e MB |
166 | switch (params_width(params)) { |
167 | case 16: | |
1dcf98ff | 168 | break; |
3fafcc8e | 169 | case 20: |
1dcf98ff MB |
170 | aifctrl1 |= 0x8; |
171 | break; | |
3fafcc8e | 172 | case 24: |
1dcf98ff MB |
173 | aifctrl1 |= 0x10; |
174 | break; | |
3fafcc8e | 175 | case 32: |
1dcf98ff MB |
176 | aifctrl1 |= 0x18; |
177 | break; | |
178 | } | |
179 | ||
8d50e447 MB |
180 | snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); |
181 | snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2); | |
1dcf98ff MB |
182 | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
187 | int clk_id, unsigned int freq, int dir) | |
188 | { | |
189 | struct snd_soc_codec *codec = codec_dai->codec; | |
b2c812e2 | 190 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
191 | unsigned int val; |
192 | int i; | |
193 | ||
194 | wm8523->sysclk = freq; | |
195 | ||
196 | wm8523->rate_constraint.count = 0; | |
197 | for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { | |
198 | val = freq / lrclk_ratios[i].ratio; | |
199 | /* Check that it's a standard rate since core can't | |
200 | * cope with others and having the odd rates confuses | |
201 | * constraint matching. | |
202 | */ | |
203 | switch (val) { | |
204 | case 8000: | |
205 | case 11025: | |
206 | case 16000: | |
207 | case 22050: | |
208 | case 32000: | |
209 | case 44100: | |
210 | case 48000: | |
211 | case 64000: | |
212 | case 88200: | |
213 | case 96000: | |
214 | case 176400: | |
215 | case 192000: | |
216 | dev_dbg(codec->dev, "Supported sample rate: %dHz\n", | |
217 | val); | |
218 | wm8523->rate_constraint_list[i] = val; | |
219 | wm8523->rate_constraint.count++; | |
220 | break; | |
221 | default: | |
222 | dev_dbg(codec->dev, "Skipping sample rate: %dHz\n", | |
223 | val); | |
224 | } | |
225 | } | |
226 | ||
227 | /* Need at least one supported rate... */ | |
228 | if (wm8523->rate_constraint.count == 0) | |
229 | return -EINVAL; | |
230 | ||
231 | return 0; | |
232 | } | |
233 | ||
234 | ||
235 | static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
236 | unsigned int fmt) | |
237 | { | |
238 | struct snd_soc_codec *codec = codec_dai->codec; | |
8d50e447 | 239 | u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); |
1dcf98ff MB |
240 | |
241 | aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK | | |
242 | WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK); | |
243 | ||
244 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
245 | case SND_SOC_DAIFMT_CBM_CFM: | |
246 | aifctrl1 |= WM8523_AIF_MSTR; | |
247 | break; | |
248 | case SND_SOC_DAIFMT_CBS_CFS: | |
249 | break; | |
250 | default: | |
251 | return -EINVAL; | |
252 | } | |
253 | ||
254 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
255 | case SND_SOC_DAIFMT_I2S: | |
256 | aifctrl1 |= 0x0002; | |
257 | break; | |
258 | case SND_SOC_DAIFMT_RIGHT_J: | |
259 | break; | |
260 | case SND_SOC_DAIFMT_LEFT_J: | |
261 | aifctrl1 |= 0x0001; | |
262 | break; | |
263 | case SND_SOC_DAIFMT_DSP_A: | |
264 | aifctrl1 |= 0x0003; | |
265 | break; | |
266 | case SND_SOC_DAIFMT_DSP_B: | |
267 | aifctrl1 |= 0x0023; | |
268 | break; | |
269 | default: | |
270 | return -EINVAL; | |
271 | } | |
272 | ||
273 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
274 | case SND_SOC_DAIFMT_NB_NF: | |
275 | break; | |
276 | case SND_SOC_DAIFMT_IB_IF: | |
277 | aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV; | |
278 | break; | |
279 | case SND_SOC_DAIFMT_IB_NF: | |
280 | aifctrl1 |= WM8523_BCLK_INV; | |
281 | break; | |
282 | case SND_SOC_DAIFMT_NB_IF: | |
283 | aifctrl1 |= WM8523_LRCLK_INV; | |
284 | break; | |
285 | default: | |
286 | return -EINVAL; | |
287 | } | |
288 | ||
8d50e447 | 289 | snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); |
1dcf98ff MB |
290 | |
291 | return 0; | |
292 | } | |
293 | ||
294 | static int wm8523_set_bias_level(struct snd_soc_codec *codec, | |
295 | enum snd_soc_bias_level level) | |
296 | { | |
b2c812e2 | 297 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
b9288f49 | 298 | int ret; |
1dcf98ff MB |
299 | |
300 | switch (level) { | |
301 | case SND_SOC_BIAS_ON: | |
302 | break; | |
303 | ||
304 | case SND_SOC_BIAS_PREPARE: | |
305 | /* Full power on */ | |
306 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
307 | WM8523_SYS_ENA_MASK, 3); | |
308 | break; | |
309 | ||
310 | case SND_SOC_BIAS_STANDBY: | |
7db634d9 | 311 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { |
1dcf98ff MB |
312 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), |
313 | wm8523->supplies); | |
314 | if (ret != 0) { | |
315 | dev_err(codec->dev, | |
316 | "Failed to enable supplies: %d\n", | |
317 | ret); | |
318 | return ret; | |
319 | } | |
320 | ||
b9288f49 MB |
321 | /* Sync back default/cached values */ |
322 | regcache_sync(wm8523->regmap); | |
323 | ||
1dcf98ff MB |
324 | /* Initial power up */ |
325 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
326 | WM8523_SYS_ENA_MASK, 1); | |
327 | ||
1dcf98ff MB |
328 | msleep(100); |
329 | } | |
330 | ||
331 | /* Power up to mute */ | |
332 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
333 | WM8523_SYS_ENA_MASK, 2); | |
334 | ||
335 | break; | |
336 | ||
337 | case SND_SOC_BIAS_OFF: | |
338 | /* The chip runs through the power down sequence for us. */ | |
339 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
340 | WM8523_SYS_ENA_MASK, 0); | |
341 | msleep(100); | |
342 | ||
343 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), | |
344 | wm8523->supplies); | |
345 | break; | |
346 | } | |
1dcf98ff MB |
347 | return 0; |
348 | } | |
349 | ||
350 | #define WM8523_RATES SNDRV_PCM_RATE_8000_192000 | |
351 | ||
352 | #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
353 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
354 | ||
85e7652d | 355 | static const struct snd_soc_dai_ops wm8523_dai_ops = { |
1dcf98ff MB |
356 | .startup = wm8523_startup, |
357 | .hw_params = wm8523_hw_params, | |
358 | .set_sysclk = wm8523_set_dai_sysclk, | |
359 | .set_fmt = wm8523_set_dai_fmt, | |
360 | }; | |
361 | ||
f0fba2ad LG |
362 | static struct snd_soc_dai_driver wm8523_dai = { |
363 | .name = "wm8523-hifi", | |
1dcf98ff MB |
364 | .playback = { |
365 | .stream_name = "Playback", | |
366 | .channels_min = 2, /* Mono modes not yet supported */ | |
367 | .channels_max = 2, | |
368 | .rates = WM8523_RATES, | |
369 | .formats = WM8523_FORMATS, | |
370 | }, | |
371 | .ops = &wm8523_dai_ops, | |
372 | }; | |
1dcf98ff | 373 | |
f0fba2ad | 374 | static int wm8523_probe(struct snd_soc_codec *codec) |
1dcf98ff | 375 | { |
f0fba2ad | 376 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
377 | |
378 | wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0]; | |
379 | wm8523->rate_constraint.count = | |
380 | ARRAY_SIZE(wm8523->rate_constraint_list); | |
381 | ||
1dcf98ff | 382 | /* Change some default settings - latch VU and enable ZC */ |
a1b3b5ee MB |
383 | snd_soc_update_bits(codec, WM8523_DAC_GAINR, |
384 | WM8523_DACR_VU, WM8523_DACR_VU); | |
385 | snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC); | |
1dcf98ff | 386 | |
f0fba2ad | 387 | return 0; |
1dcf98ff MB |
388 | } |
389 | ||
f0fba2ad LG |
390 | static struct snd_soc_codec_driver soc_codec_dev_wm8523 = { |
391 | .probe = wm8523_probe, | |
f0fba2ad | 392 | .set_bias_level = wm8523_set_bias_level, |
ca5e7c6a | 393 | .suspend_bias_off = true, |
1661699a MB |
394 | |
395 | .controls = wm8523_controls, | |
396 | .num_controls = ARRAY_SIZE(wm8523_controls), | |
397 | .dapm_widgets = wm8523_dapm_widgets, | |
398 | .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets), | |
399 | .dapm_routes = wm8523_dapm_routes, | |
400 | .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes), | |
f0fba2ad LG |
401 | }; |
402 | ||
bf5a85be MB |
403 | static const struct of_device_id wm8523_of_match[] = { |
404 | { .compatible = "wlf,wm8523" }, | |
405 | { }, | |
406 | }; | |
407 | ||
b9288f49 MB |
408 | static const struct regmap_config wm8523_regmap = { |
409 | .reg_bits = 8, | |
410 | .val_bits = 16, | |
411 | .max_register = WM8523_ZERO_DETECT, | |
412 | ||
413 | .reg_defaults = wm8523_reg_defaults, | |
414 | .num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults), | |
415 | .cache_type = REGCACHE_RBTREE, | |
416 | ||
417 | .volatile_reg = wm8523_volatile_register, | |
418 | }; | |
419 | ||
008ef947 | 420 | #if IS_ENABLED(CONFIG_I2C) |
7a79e94e BP |
421 | static int wm8523_i2c_probe(struct i2c_client *i2c, |
422 | const struct i2c_device_id *id) | |
1dcf98ff MB |
423 | { |
424 | struct wm8523_priv *wm8523; | |
59ac2149 | 425 | unsigned int val; |
719b0c59 | 426 | int ret, i; |
1dcf98ff | 427 | |
7d014db8 MB |
428 | wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv), |
429 | GFP_KERNEL); | |
1dcf98ff MB |
430 | if (wm8523 == NULL) |
431 | return -ENOMEM; | |
432 | ||
b9288f49 MB |
433 | wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap); |
434 | if (IS_ERR(wm8523->regmap)) { | |
435 | ret = PTR_ERR(wm8523->regmap); | |
436 | dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret); | |
437 | return ret; | |
438 | } | |
439 | ||
719b0c59 MB |
440 | for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++) |
441 | wm8523->supplies[i].supply = wm8523_supply_names[i]; | |
442 | ||
443 | ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies), | |
444 | wm8523->supplies); | |
445 | if (ret != 0) { | |
446 | dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); | |
447 | return ret; | |
448 | } | |
449 | ||
59ac2149 MB |
450 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), |
451 | wm8523->supplies); | |
452 | if (ret != 0) { | |
453 | dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); | |
454 | return ret; | |
455 | } | |
456 | ||
457 | ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val); | |
458 | if (ret < 0) { | |
459 | dev_err(&i2c->dev, "Failed to read ID register\n"); | |
460 | goto err_enable; | |
461 | } | |
462 | if (val != 0x8523) { | |
463 | dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret); | |
464 | ret = -EINVAL; | |
465 | goto err_enable; | |
466 | } | |
467 | ||
468 | ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val); | |
469 | if (ret < 0) { | |
470 | dev_err(&i2c->dev, "Failed to read revision register\n"); | |
471 | goto err_enable; | |
472 | } | |
473 | dev_info(&i2c->dev, "revision %c\n", | |
474 | (val & WM8523_CHIP_REV_MASK) + 'A'); | |
475 | ||
476 | ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523); | |
477 | if (ret != 0) { | |
478 | dev_err(&i2c->dev, "Failed to reset device: %d\n", ret); | |
479 | goto err_enable; | |
480 | } | |
481 | ||
482 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
483 | ||
1dcf98ff | 484 | i2c_set_clientdata(i2c, wm8523); |
1dcf98ff | 485 | |
f0fba2ad LG |
486 | ret = snd_soc_register_codec(&i2c->dev, |
487 | &soc_codec_dev_wm8523, &wm8523_dai, 1); | |
7d014db8 | 488 | |
f0fba2ad | 489 | return ret; |
1dcf98ff | 490 | |
59ac2149 MB |
491 | err_enable: |
492 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
493 | return ret; | |
1dcf98ff MB |
494 | } |
495 | ||
7a79e94e | 496 | static int wm8523_i2c_remove(struct i2c_client *client) |
1dcf98ff | 497 | { |
f0fba2ad | 498 | snd_soc_unregister_codec(&client->dev); |
1dcf98ff MB |
499 | return 0; |
500 | } | |
501 | ||
1dcf98ff MB |
502 | static const struct i2c_device_id wm8523_i2c_id[] = { |
503 | { "wm8523", 0 }, | |
504 | { } | |
505 | }; | |
506 | MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id); | |
507 | ||
508 | static struct i2c_driver wm8523_i2c_driver = { | |
509 | .driver = { | |
9665408e | 510 | .name = "wm8523", |
1dcf98ff | 511 | .owner = THIS_MODULE, |
bf5a85be | 512 | .of_match_table = wm8523_of_match, |
1dcf98ff MB |
513 | }, |
514 | .probe = wm8523_i2c_probe, | |
7a79e94e | 515 | .remove = wm8523_i2c_remove, |
1dcf98ff MB |
516 | .id_table = wm8523_i2c_id, |
517 | }; | |
518 | #endif | |
519 | ||
520 | static int __init wm8523_modinit(void) | |
521 | { | |
522 | int ret; | |
008ef947 | 523 | #if IS_ENABLED(CONFIG_I2C) |
1dcf98ff MB |
524 | ret = i2c_add_driver(&wm8523_i2c_driver); |
525 | if (ret != 0) { | |
526 | printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n", | |
527 | ret); | |
528 | } | |
529 | #endif | |
530 | return 0; | |
531 | } | |
532 | module_init(wm8523_modinit); | |
533 | ||
534 | static void __exit wm8523_exit(void) | |
535 | { | |
008ef947 | 536 | #if IS_ENABLED(CONFIG_I2C) |
1dcf98ff MB |
537 | i2c_del_driver(&wm8523_i2c_driver); |
538 | #endif | |
539 | } | |
540 | module_exit(wm8523_exit); | |
541 | ||
542 | MODULE_DESCRIPTION("ASoC WM8523 driver"); | |
543 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
544 | MODULE_LICENSE("GPL"); |