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1dcf98ff MB |
1 | /* |
2 | * wm8523.c -- WM8523 ALSA SoC Audio driver | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/pm.h> | |
19 | #include <linux/i2c.h> | |
b9288f49 | 20 | #include <linux/regmap.h> |
1dcf98ff | 21 | #include <linux/regulator/consumer.h> |
5a0e3ad6 | 22 | #include <linux/slab.h> |
bf5a85be | 23 | #include <linux/of_device.h> |
1dcf98ff MB |
24 | #include <sound/core.h> |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
1dcf98ff MB |
28 | #include <sound/initval.h> |
29 | #include <sound/tlv.h> | |
30 | ||
31 | #include "wm8523.h" | |
32 | ||
1dcf98ff MB |
33 | #define WM8523_NUM_SUPPLIES 2 |
34 | static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = { | |
35 | "AVDD", | |
36 | "LINEVDD", | |
37 | }; | |
38 | ||
39 | #define WM8523_NUM_RATES 7 | |
40 | ||
41 | /* codec private data */ | |
42 | struct wm8523_priv { | |
b9288f49 | 43 | struct regmap *regmap; |
1dcf98ff MB |
44 | struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES]; |
45 | unsigned int sysclk; | |
46 | unsigned int rate_constraint_list[WM8523_NUM_RATES]; | |
47 | struct snd_pcm_hw_constraint_list rate_constraint; | |
48 | }; | |
49 | ||
b9288f49 MB |
50 | static const struct reg_default wm8523_reg_defaults[] = { |
51 | { 2, 0x0000 }, /* R2 - PSCTRL1 */ | |
52 | { 3, 0x1812 }, /* R3 - AIF_CTRL1 */ | |
53 | { 4, 0x0000 }, /* R4 - AIF_CTRL2 */ | |
54 | { 5, 0x0001 }, /* R5 - DAC_CTRL3 */ | |
55 | { 6, 0x0190 }, /* R6 - DAC_GAINL */ | |
56 | { 7, 0x0190 }, /* R7 - DAC_GAINR */ | |
57 | { 8, 0x0000 }, /* R8 - ZERO_DETECT */ | |
1dcf98ff MB |
58 | }; |
59 | ||
b9288f49 | 60 | static bool wm8523_volatile_register(struct device *dev, unsigned int reg) |
1dcf98ff MB |
61 | { |
62 | switch (reg) { | |
63 | case WM8523_DEVICE_ID: | |
64 | case WM8523_REVISION: | |
b9288f49 | 65 | return true; |
1dcf98ff | 66 | default: |
b9288f49 | 67 | return false; |
1dcf98ff MB |
68 | } |
69 | } | |
70 | ||
1dcf98ff MB |
71 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0); |
72 | ||
73 | static const char *wm8523_zd_count_text[] = { | |
74 | "1024", | |
75 | "2048", | |
76 | }; | |
77 | ||
fed08d94 TI |
78 | static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0, |
79 | wm8523_zd_count_text); | |
1dcf98ff | 80 | |
1661699a | 81 | static const struct snd_kcontrol_new wm8523_controls[] = { |
1dcf98ff MB |
82 | SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR, |
83 | 0, 448, 0, dac_tlv), | |
84 | SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0), | |
85 | SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0), | |
86 | SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1), | |
87 | SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0), | |
88 | SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0), | |
89 | SOC_ENUM("Zero Detect Count", wm8523_zc_count), | |
90 | }; | |
91 | ||
92 | static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = { | |
93 | SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0), | |
94 | SND_SOC_DAPM_OUTPUT("LINEVOUTL"), | |
95 | SND_SOC_DAPM_OUTPUT("LINEVOUTR"), | |
96 | }; | |
97 | ||
1661699a | 98 | static const struct snd_soc_dapm_route wm8523_dapm_routes[] = { |
1dcf98ff MB |
99 | { "LINEVOUTL", NULL, "DAC" }, |
100 | { "LINEVOUTR", NULL, "DAC" }, | |
101 | }; | |
102 | ||
1dcf98ff MB |
103 | static struct { |
104 | int value; | |
105 | int ratio; | |
106 | } lrclk_ratios[WM8523_NUM_RATES] = { | |
107 | { 1, 128 }, | |
108 | { 2, 192 }, | |
109 | { 3, 256 }, | |
110 | { 4, 384 }, | |
111 | { 5, 512 }, | |
112 | { 6, 768 }, | |
113 | { 7, 1152 }, | |
114 | }; | |
115 | ||
ef5294fd JS |
116 | static struct { |
117 | int value; | |
118 | int ratio; | |
119 | } bclk_ratios[WM8523_NUM_RATES] = { | |
120 | { 2, 32 }, | |
121 | { 3, 64 }, | |
122 | { 4, 128 }, | |
123 | }; | |
124 | ||
1dcf98ff MB |
125 | static int wm8523_startup(struct snd_pcm_substream *substream, |
126 | struct snd_soc_dai *dai) | |
127 | { | |
128 | struct snd_soc_codec *codec = dai->codec; | |
b2c812e2 | 129 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
130 | |
131 | /* The set of sample rates that can be supported depends on the | |
132 | * MCLK supplied to the CODEC - enforce this. | |
133 | */ | |
134 | if (!wm8523->sysclk) { | |
135 | dev_err(codec->dev, | |
136 | "No MCLK configured, call set_sysclk() on init\n"); | |
137 | return -EINVAL; | |
138 | } | |
139 | ||
1dcf98ff MB |
140 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
141 | SNDRV_PCM_HW_PARAM_RATE, | |
142 | &wm8523->rate_constraint); | |
143 | ||
144 | return 0; | |
145 | } | |
146 | ||
147 | static int wm8523_hw_params(struct snd_pcm_substream *substream, | |
148 | struct snd_pcm_hw_params *params, | |
149 | struct snd_soc_dai *dai) | |
150 | { | |
e6968a17 | 151 | struct snd_soc_codec *codec = dai->codec; |
b2c812e2 | 152 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff | 153 | int i; |
8d50e447 MB |
154 | u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); |
155 | u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2); | |
1dcf98ff MB |
156 | |
157 | /* Find a supported LRCLK ratio */ | |
158 | for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { | |
159 | if (wm8523->sysclk / params_rate(params) == | |
160 | lrclk_ratios[i].ratio) | |
161 | break; | |
162 | } | |
163 | ||
164 | /* Should never happen, should be handled by constraints */ | |
165 | if (i == ARRAY_SIZE(lrclk_ratios)) { | |
166 | dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n", | |
167 | wm8523->sysclk / params_rate(params)); | |
168 | return -EINVAL; | |
169 | } | |
170 | ||
171 | aifctrl2 &= ~WM8523_SR_MASK; | |
172 | aifctrl2 |= lrclk_ratios[i].value; | |
173 | ||
ef5294fd JS |
174 | if (aifctrl1 & WM8523_AIF_MSTR) { |
175 | /* Find a fs->bclk ratio */ | |
176 | for (i = 0; i < ARRAY_SIZE(bclk_ratios); i++) | |
177 | if (params_width(params) * 2 <= bclk_ratios[i].ratio) | |
178 | break; | |
179 | ||
180 | if (i == ARRAY_SIZE(bclk_ratios)) { | |
181 | dev_err(codec->dev, | |
182 | "No matching BCLK/fs ratio for word length %d\n", | |
183 | params_width(params)); | |
184 | return -EINVAL; | |
185 | } | |
186 | ||
187 | aifctrl2 &= ~WM8523_BCLKDIV_MASK; | |
188 | aifctrl2 |= bclk_ratios[i].value << WM8523_BCLKDIV_SHIFT; | |
189 | } | |
190 | ||
1dcf98ff | 191 | aifctrl1 &= ~WM8523_WL_MASK; |
3fafcc8e MB |
192 | switch (params_width(params)) { |
193 | case 16: | |
1dcf98ff | 194 | break; |
3fafcc8e | 195 | case 20: |
1dcf98ff MB |
196 | aifctrl1 |= 0x8; |
197 | break; | |
3fafcc8e | 198 | case 24: |
1dcf98ff MB |
199 | aifctrl1 |= 0x10; |
200 | break; | |
3fafcc8e | 201 | case 32: |
1dcf98ff MB |
202 | aifctrl1 |= 0x18; |
203 | break; | |
204 | } | |
205 | ||
8d50e447 MB |
206 | snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); |
207 | snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2); | |
1dcf98ff MB |
208 | |
209 | return 0; | |
210 | } | |
211 | ||
212 | static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
213 | int clk_id, unsigned int freq, int dir) | |
214 | { | |
215 | struct snd_soc_codec *codec = codec_dai->codec; | |
b2c812e2 | 216 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
217 | unsigned int val; |
218 | int i; | |
219 | ||
220 | wm8523->sysclk = freq; | |
221 | ||
222 | wm8523->rate_constraint.count = 0; | |
223 | for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { | |
224 | val = freq / lrclk_ratios[i].ratio; | |
225 | /* Check that it's a standard rate since core can't | |
226 | * cope with others and having the odd rates confuses | |
227 | * constraint matching. | |
228 | */ | |
229 | switch (val) { | |
230 | case 8000: | |
231 | case 11025: | |
232 | case 16000: | |
233 | case 22050: | |
234 | case 32000: | |
235 | case 44100: | |
236 | case 48000: | |
237 | case 64000: | |
238 | case 88200: | |
239 | case 96000: | |
240 | case 176400: | |
241 | case 192000: | |
242 | dev_dbg(codec->dev, "Supported sample rate: %dHz\n", | |
243 | val); | |
244 | wm8523->rate_constraint_list[i] = val; | |
245 | wm8523->rate_constraint.count++; | |
246 | break; | |
247 | default: | |
248 | dev_dbg(codec->dev, "Skipping sample rate: %dHz\n", | |
249 | val); | |
250 | } | |
251 | } | |
252 | ||
253 | /* Need at least one supported rate... */ | |
254 | if (wm8523->rate_constraint.count == 0) | |
255 | return -EINVAL; | |
256 | ||
257 | return 0; | |
258 | } | |
259 | ||
260 | ||
261 | static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
262 | unsigned int fmt) | |
263 | { | |
264 | struct snd_soc_codec *codec = codec_dai->codec; | |
8d50e447 | 265 | u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); |
1dcf98ff MB |
266 | |
267 | aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK | | |
268 | WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK); | |
269 | ||
270 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
271 | case SND_SOC_DAIFMT_CBM_CFM: | |
272 | aifctrl1 |= WM8523_AIF_MSTR; | |
273 | break; | |
274 | case SND_SOC_DAIFMT_CBS_CFS: | |
275 | break; | |
276 | default: | |
277 | return -EINVAL; | |
278 | } | |
279 | ||
280 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
281 | case SND_SOC_DAIFMT_I2S: | |
282 | aifctrl1 |= 0x0002; | |
283 | break; | |
284 | case SND_SOC_DAIFMT_RIGHT_J: | |
285 | break; | |
286 | case SND_SOC_DAIFMT_LEFT_J: | |
287 | aifctrl1 |= 0x0001; | |
288 | break; | |
289 | case SND_SOC_DAIFMT_DSP_A: | |
290 | aifctrl1 |= 0x0003; | |
291 | break; | |
292 | case SND_SOC_DAIFMT_DSP_B: | |
293 | aifctrl1 |= 0x0023; | |
294 | break; | |
295 | default: | |
296 | return -EINVAL; | |
297 | } | |
298 | ||
299 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
300 | case SND_SOC_DAIFMT_NB_NF: | |
301 | break; | |
302 | case SND_SOC_DAIFMT_IB_IF: | |
303 | aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV; | |
304 | break; | |
305 | case SND_SOC_DAIFMT_IB_NF: | |
306 | aifctrl1 |= WM8523_BCLK_INV; | |
307 | break; | |
308 | case SND_SOC_DAIFMT_NB_IF: | |
309 | aifctrl1 |= WM8523_LRCLK_INV; | |
310 | break; | |
311 | default: | |
312 | return -EINVAL; | |
313 | } | |
314 | ||
8d50e447 | 315 | snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); |
1dcf98ff MB |
316 | |
317 | return 0; | |
318 | } | |
319 | ||
320 | static int wm8523_set_bias_level(struct snd_soc_codec *codec, | |
321 | enum snd_soc_bias_level level) | |
322 | { | |
b2c812e2 | 323 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
b9288f49 | 324 | int ret; |
1dcf98ff MB |
325 | |
326 | switch (level) { | |
327 | case SND_SOC_BIAS_ON: | |
328 | break; | |
329 | ||
330 | case SND_SOC_BIAS_PREPARE: | |
331 | /* Full power on */ | |
332 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
333 | WM8523_SYS_ENA_MASK, 3); | |
334 | break; | |
335 | ||
336 | case SND_SOC_BIAS_STANDBY: | |
7db634d9 | 337 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { |
1dcf98ff MB |
338 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), |
339 | wm8523->supplies); | |
340 | if (ret != 0) { | |
341 | dev_err(codec->dev, | |
342 | "Failed to enable supplies: %d\n", | |
343 | ret); | |
344 | return ret; | |
345 | } | |
346 | ||
b9288f49 MB |
347 | /* Sync back default/cached values */ |
348 | regcache_sync(wm8523->regmap); | |
349 | ||
1dcf98ff MB |
350 | /* Initial power up */ |
351 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
352 | WM8523_SYS_ENA_MASK, 1); | |
353 | ||
1dcf98ff MB |
354 | msleep(100); |
355 | } | |
356 | ||
357 | /* Power up to mute */ | |
358 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
359 | WM8523_SYS_ENA_MASK, 2); | |
360 | ||
361 | break; | |
362 | ||
363 | case SND_SOC_BIAS_OFF: | |
364 | /* The chip runs through the power down sequence for us. */ | |
365 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
366 | WM8523_SYS_ENA_MASK, 0); | |
367 | msleep(100); | |
368 | ||
369 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), | |
370 | wm8523->supplies); | |
371 | break; | |
372 | } | |
1dcf98ff MB |
373 | return 0; |
374 | } | |
375 | ||
376 | #define WM8523_RATES SNDRV_PCM_RATE_8000_192000 | |
377 | ||
378 | #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
379 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
380 | ||
85e7652d | 381 | static const struct snd_soc_dai_ops wm8523_dai_ops = { |
1dcf98ff MB |
382 | .startup = wm8523_startup, |
383 | .hw_params = wm8523_hw_params, | |
384 | .set_sysclk = wm8523_set_dai_sysclk, | |
385 | .set_fmt = wm8523_set_dai_fmt, | |
386 | }; | |
387 | ||
f0fba2ad LG |
388 | static struct snd_soc_dai_driver wm8523_dai = { |
389 | .name = "wm8523-hifi", | |
1dcf98ff MB |
390 | .playback = { |
391 | .stream_name = "Playback", | |
392 | .channels_min = 2, /* Mono modes not yet supported */ | |
393 | .channels_max = 2, | |
394 | .rates = WM8523_RATES, | |
395 | .formats = WM8523_FORMATS, | |
396 | }, | |
397 | .ops = &wm8523_dai_ops, | |
398 | }; | |
1dcf98ff | 399 | |
f0fba2ad | 400 | static int wm8523_probe(struct snd_soc_codec *codec) |
1dcf98ff | 401 | { |
f0fba2ad | 402 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
403 | |
404 | wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0]; | |
405 | wm8523->rate_constraint.count = | |
406 | ARRAY_SIZE(wm8523->rate_constraint_list); | |
407 | ||
1dcf98ff | 408 | /* Change some default settings - latch VU and enable ZC */ |
a1b3b5ee MB |
409 | snd_soc_update_bits(codec, WM8523_DAC_GAINR, |
410 | WM8523_DACR_VU, WM8523_DACR_VU); | |
411 | snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC); | |
1dcf98ff | 412 | |
f0fba2ad | 413 | return 0; |
1dcf98ff MB |
414 | } |
415 | ||
f0fba2ad LG |
416 | static struct snd_soc_codec_driver soc_codec_dev_wm8523 = { |
417 | .probe = wm8523_probe, | |
f0fba2ad | 418 | .set_bias_level = wm8523_set_bias_level, |
ca5e7c6a | 419 | .suspend_bias_off = true, |
1661699a MB |
420 | |
421 | .controls = wm8523_controls, | |
422 | .num_controls = ARRAY_SIZE(wm8523_controls), | |
423 | .dapm_widgets = wm8523_dapm_widgets, | |
424 | .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets), | |
425 | .dapm_routes = wm8523_dapm_routes, | |
426 | .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes), | |
f0fba2ad LG |
427 | }; |
428 | ||
bf5a85be MB |
429 | static const struct of_device_id wm8523_of_match[] = { |
430 | { .compatible = "wlf,wm8523" }, | |
431 | { }, | |
432 | }; | |
bf08f39e | 433 | MODULE_DEVICE_TABLE(of, wm8523_of_match); |
bf5a85be | 434 | |
b9288f49 MB |
435 | static const struct regmap_config wm8523_regmap = { |
436 | .reg_bits = 8, | |
437 | .val_bits = 16, | |
438 | .max_register = WM8523_ZERO_DETECT, | |
439 | ||
440 | .reg_defaults = wm8523_reg_defaults, | |
441 | .num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults), | |
442 | .cache_type = REGCACHE_RBTREE, | |
443 | ||
444 | .volatile_reg = wm8523_volatile_register, | |
445 | }; | |
446 | ||
008ef947 | 447 | #if IS_ENABLED(CONFIG_I2C) |
7a79e94e BP |
448 | static int wm8523_i2c_probe(struct i2c_client *i2c, |
449 | const struct i2c_device_id *id) | |
1dcf98ff MB |
450 | { |
451 | struct wm8523_priv *wm8523; | |
59ac2149 | 452 | unsigned int val; |
719b0c59 | 453 | int ret, i; |
1dcf98ff | 454 | |
7d014db8 MB |
455 | wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv), |
456 | GFP_KERNEL); | |
1dcf98ff MB |
457 | if (wm8523 == NULL) |
458 | return -ENOMEM; | |
459 | ||
b9288f49 MB |
460 | wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap); |
461 | if (IS_ERR(wm8523->regmap)) { | |
462 | ret = PTR_ERR(wm8523->regmap); | |
463 | dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret); | |
464 | return ret; | |
465 | } | |
466 | ||
719b0c59 MB |
467 | for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++) |
468 | wm8523->supplies[i].supply = wm8523_supply_names[i]; | |
469 | ||
470 | ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies), | |
471 | wm8523->supplies); | |
472 | if (ret != 0) { | |
473 | dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); | |
474 | return ret; | |
475 | } | |
476 | ||
59ac2149 MB |
477 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), |
478 | wm8523->supplies); | |
479 | if (ret != 0) { | |
480 | dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); | |
481 | return ret; | |
482 | } | |
483 | ||
484 | ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val); | |
485 | if (ret < 0) { | |
486 | dev_err(&i2c->dev, "Failed to read ID register\n"); | |
487 | goto err_enable; | |
488 | } | |
489 | if (val != 0x8523) { | |
490 | dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret); | |
491 | ret = -EINVAL; | |
492 | goto err_enable; | |
493 | } | |
494 | ||
495 | ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val); | |
496 | if (ret < 0) { | |
497 | dev_err(&i2c->dev, "Failed to read revision register\n"); | |
498 | goto err_enable; | |
499 | } | |
500 | dev_info(&i2c->dev, "revision %c\n", | |
501 | (val & WM8523_CHIP_REV_MASK) + 'A'); | |
502 | ||
503 | ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523); | |
504 | if (ret != 0) { | |
505 | dev_err(&i2c->dev, "Failed to reset device: %d\n", ret); | |
506 | goto err_enable; | |
507 | } | |
508 | ||
509 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
510 | ||
1dcf98ff | 511 | i2c_set_clientdata(i2c, wm8523); |
1dcf98ff | 512 | |
f0fba2ad LG |
513 | ret = snd_soc_register_codec(&i2c->dev, |
514 | &soc_codec_dev_wm8523, &wm8523_dai, 1); | |
7d014db8 | 515 | |
f0fba2ad | 516 | return ret; |
1dcf98ff | 517 | |
59ac2149 MB |
518 | err_enable: |
519 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
520 | return ret; | |
1dcf98ff MB |
521 | } |
522 | ||
7a79e94e | 523 | static int wm8523_i2c_remove(struct i2c_client *client) |
1dcf98ff | 524 | { |
f0fba2ad | 525 | snd_soc_unregister_codec(&client->dev); |
1dcf98ff MB |
526 | return 0; |
527 | } | |
528 | ||
1dcf98ff MB |
529 | static const struct i2c_device_id wm8523_i2c_id[] = { |
530 | { "wm8523", 0 }, | |
531 | { } | |
532 | }; | |
533 | MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id); | |
534 | ||
535 | static struct i2c_driver wm8523_i2c_driver = { | |
536 | .driver = { | |
9665408e | 537 | .name = "wm8523", |
bf5a85be | 538 | .of_match_table = wm8523_of_match, |
1dcf98ff MB |
539 | }, |
540 | .probe = wm8523_i2c_probe, | |
7a79e94e | 541 | .remove = wm8523_i2c_remove, |
1dcf98ff MB |
542 | .id_table = wm8523_i2c_id, |
543 | }; | |
544 | #endif | |
545 | ||
546 | static int __init wm8523_modinit(void) | |
547 | { | |
548 | int ret; | |
008ef947 | 549 | #if IS_ENABLED(CONFIG_I2C) |
1dcf98ff MB |
550 | ret = i2c_add_driver(&wm8523_i2c_driver); |
551 | if (ret != 0) { | |
552 | printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n", | |
553 | ret); | |
554 | } | |
555 | #endif | |
556 | return 0; | |
557 | } | |
558 | module_init(wm8523_modinit); | |
559 | ||
560 | static void __exit wm8523_exit(void) | |
561 | { | |
008ef947 | 562 | #if IS_ENABLED(CONFIG_I2C) |
1dcf98ff MB |
563 | i2c_del_driver(&wm8523_i2c_driver); |
564 | #endif | |
565 | } | |
566 | module_exit(wm8523_exit); | |
567 | ||
568 | MODULE_DESCRIPTION("ASoC WM8523 driver"); | |
569 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
570 | MODULE_LICENSE("GPL"); |