[deliverable/linux.git] / sound / soc / codecs / wm8523.c

/*
 * wm8523.c  --  WM8523 ALSA SoC Audio driver
 *
 * Copyright 2009 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#include "wm8523.h"

#define WM8523_NUM_SUPPLIES 2
static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	"AVDD",
	"LINEVDD",
};

#define WM8523_NUM_RATES 7

/* codec private data */
struct wm8523_priv {
	struct regmap *regmap;
	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	unsigned int sysclk;
	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	struct snd_pcm_hw_constraint_list rate_constraint;
};

static const struct reg_default wm8523_reg_defaults[] = {
	{ 2, 0x0000 },     /* R2 - PSCTRL1 */
	{ 3, 0x1812 },     /* R3 - AIF_CTRL1 */
	{ 4, 0x0000 },     /* R4 - AIF_CTRL2 */
	{ 5, 0x0001 },     /* R5 - DAC_CTRL3 */
	{ 6, 0x0190 },     /* R6 - DAC_GAINL */
	{ 7, 0x0190 },     /* R7 - DAC_GAINR */
	{ 8, 0x0000 },     /* R8 - ZERO_DETECT */
};

static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case WM8523_DEVICE_ID:
	case WM8523_REVISION:
		return true;
	default:
		return false;
	}
}

static int wm8523_reset(struct snd_soc_codec *codec)
{
	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
}

static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);

static const char *wm8523_zd_count_text[] = {
	"1024",
	"2048",
};

static const struct soc_enum wm8523_zc_count =
	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);

static const struct snd_kcontrol_new wm8523_controls[] = {
SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
		 0, 448, 0, dac_tlv),
SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
SOC_ENUM("Zero Detect Count", wm8523_zc_count),
};

static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
};

static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
	{ "LINEVOUTL", NULL, "DAC" },
	{ "LINEVOUTR", NULL, "DAC" },
};

static struct {
	int value;
	int ratio;
} lrclk_ratios[WM8523_NUM_RATES] = {
	{ 1, 128 },
	{ 2, 192 },
	{ 3, 256 },
	{ 4, 384 },
	{ 5, 512 },
	{ 6, 768 },
	{ 7, 1152 },
};

static int wm8523_startup(struct snd_pcm_substream *substream,
			  struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	/* The set of sample rates that can be supported depends on the
	 * MCLK supplied to the CODEC - enforce this.
	 */
	if (!wm8523->sysclk) {
		dev_err(codec->dev,
			"No MCLK configured, call set_sysclk() on init\n");
		return -EINVAL;
	}

	snd_pcm_hw_constraint_list(substream->runtime, 0,
				   SNDRV_PCM_HW_PARAM_RATE,
				   &wm8523->rate_constraint);

	return 0;
}

static int wm8523_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int i;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);

	/* Find a supported LRCLK ratio */
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		if (wm8523->sysclk / params_rate(params) ==
		    lrclk_ratios[i].ratio)
			break;
	}

	/* Should never happen, should be handled by constraints */
	if (i == ARRAY_SIZE(lrclk_ratios)) {
		dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
			wm8523->sysclk / params_rate(params));
		return -EINVAL;
	}

	aifctrl2 &= ~WM8523_SR_MASK;
	aifctrl2 |= lrclk_ratios[i].value;

	aifctrl1 &= ~WM8523_WL_MASK;
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S16_LE:
		break;
	case SNDRV_PCM_FORMAT_S20_3LE:
		aifctrl1 |= 0x8;
		break;
	case SNDRV_PCM_FORMAT_S24_LE:
		aifctrl1 |= 0x10;
		break;
	case SNDRV_PCM_FORMAT_S32_LE:
		aifctrl1 |= 0x18;
		break;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);

	return 0;
}

static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
		int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	unsigned int val;
	int i;

	wm8523->sysclk = freq;

	wm8523->rate_constraint.count = 0;
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		val = freq / lrclk_ratios[i].ratio;
		/* Check that it's a standard rate since core can't
		 * cope with others and having the odd rates confuses
		 * constraint matching.
		 */
		switch (val) {
		case 8000:
		case 11025:
		case 16000:
		case 22050:
		case 32000:
		case 44100:
		case 48000:
		case 64000:
		case 88200:
		case 96000:
		case 176400:
		case 192000:
			dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
				val);
			wm8523->rate_constraint_list[i] = val;
			wm8523->rate_constraint.count++;
			break;
		default:
			dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
				val);
		}
	}

	/* Need at least one supported rate... */
	if (wm8523->rate_constraint.count == 0)
		return -EINVAL;

	return 0;
}


static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
		unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);

	aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
		      WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		aifctrl1 |= WM8523_AIF_MSTR;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		aifctrl1 |= 0x0002;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		aifctrl1 |= 0x0001;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		aifctrl1 |= 0x0003;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		aifctrl1 |= 0x0023;
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		break;
	case SND_SOC_DAIFMT_IB_IF:
		aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
		break;
	case SND_SOC_DAIFMT_IB_NF:
		aifctrl1 |= WM8523_BCLK_INV;
		break;
	case SND_SOC_DAIFMT_NB_IF:
		aifctrl1 |= WM8523_LRCLK_INV;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);

	return 0;
}

static int wm8523_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int ret;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;

	case SND_SOC_BIAS_PREPARE:
		/* Full power on */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 3);
		break;

	case SND_SOC_BIAS_STANDBY:
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
			ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
						    wm8523->supplies);
			if (ret != 0) {
				dev_err(codec->dev,
					"Failed to enable supplies: %d\n",
					ret);
				return ret;
			}

			/* Sync back default/cached values */
			regcache_sync(wm8523->regmap);

			/* Initial power up */
			snd_soc_update_bits(codec, WM8523_PSCTRL1,
					    WM8523_SYS_ENA_MASK, 1);

			msleep(100);
		}

		/* Power up to mute */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 2);

		break;

	case SND_SOC_BIAS_OFF:
		/* The chip runs through the power down sequence for us. */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 0);
		msleep(100);

		regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
				       wm8523->supplies);
		break;
	}
	codec->dapm.bias_level = level;
	return 0;
}

#define WM8523_RATES SNDRV_PCM_RATE_8000_192000

#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

static const struct snd_soc_dai_ops wm8523_dai_ops = {
	.startup	= wm8523_startup,
	.hw_params	= wm8523_hw_params,
	.set_sysclk	= wm8523_set_dai_sysclk,
	.set_fmt	= wm8523_set_dai_fmt,
};

static struct snd_soc_dai_driver wm8523_dai = {
	.name = "wm8523-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,  /* Mono modes not yet supported */
		.channels_max = 2,
		.rates = WM8523_RATES,
		.formats = WM8523_FORMATS,
	},
	.ops = &wm8523_dai_ops,
};

#ifdef CONFIG_PM
static int wm8523_suspend(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static int wm8523_resume(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	return 0;
}
#else
#define wm8523_suspend NULL
#define wm8523_resume NULL
#endif

static int wm8523_probe(struct snd_soc_codec *codec)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int ret;

	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	wm8523->rate_constraint.count =
		ARRAY_SIZE(wm8523->rate_constraint_list);

	ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
				    wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
		goto err_get;
	}

	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read ID register\n");
		goto err_enable;
	}
	if (ret != 0x8523) {
		dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
		ret = -EINVAL;
		goto err_enable;
	}

	ret = snd_soc_read(codec, WM8523_REVISION);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read revision register\n");
		goto err_enable;
	}
	dev_info(codec->dev, "revision %c\n",
		 (ret & WM8523_CHIP_REV_MASK) + 'A');

	ret = wm8523_reset(codec);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to issue reset\n");
		goto err_enable;
	}

	/* Change some default settings - latch VU and enable ZC */
	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
			    WM8523_DACR_VU, WM8523_DACR_VU);
	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);

	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	/* Bias level configuration will have done an extra enable */
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	return 0;

err_enable:
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err_get:

	return ret;
}

static int wm8523_remove(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	.probe =	wm8523_probe,
	.remove =	wm8523_remove,
	.suspend =	wm8523_suspend,
	.resume =	wm8523_resume,
	.set_bias_level = wm8523_set_bias_level,

	.controls = wm8523_controls,
	.num_controls = ARRAY_SIZE(wm8523_controls),
	.dapm_widgets = wm8523_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
	.dapm_routes = wm8523_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
};

static const struct of_device_id wm8523_of_match[] = {
	{ .compatible = "wlf,wm8523" },
	{ },
};

static const struct regmap_config wm8523_regmap = {
	.reg_bits = 8,
	.val_bits = 16,
	.max_register = WM8523_ZERO_DETECT,

	.reg_defaults = wm8523_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
	.cache_type = REGCACHE_RBTREE,

	.volatile_reg = wm8523_volatile_register,
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct wm8523_priv *wm8523;
	int ret, i;

	wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
			      GFP_KERNEL);
	if (wm8523 == NULL)
		return -ENOMEM;

	wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
	if (IS_ERR(wm8523->regmap)) {
		ret = PTR_ERR(wm8523->regmap);
		dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
		return ret;
	}

	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
		wm8523->supplies[i].supply = wm8523_supply_names[i];

	ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
				      wm8523->supplies);
	if (ret != 0) {
		dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
		return ret;
	}

	i2c_set_clientdata(i2c, wm8523);

	ret =  snd_soc_register_codec(&i2c->dev,
			&soc_codec_dev_wm8523, &wm8523_dai, 1);

	return ret;

}

static __devexit int wm8523_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	return 0;
}

static const struct i2c_device_id wm8523_i2c_id[] = {
	{ "wm8523", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);

static struct i2c_driver wm8523_i2c_driver = {
	.driver = {
		.name = "wm8523",
		.owner = THIS_MODULE,
		.of_match_table = wm8523_of_match,
	},
	.probe =    wm8523_i2c_probe,
	.remove =   __devexit_p(wm8523_i2c_remove),
	.id_table = wm8523_i2c_id,
};
#endif

static int __init wm8523_modinit(void)
{
	int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&wm8523_i2c_driver);
	if (ret != 0) {
		printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
		       ret);
	}
#endif
	return 0;
}
module_init(wm8523_modinit);

static void __exit wm8523_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&wm8523_i2c_driver);
#endif
}
module_exit(wm8523_exit);

MODULE_DESCRIPTION("ASoC WM8523 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1dcf98ff MB	1	/*
	2	* wm8523.c -- WM8523 ALSA SoC Audio driver
	3	*
	4	* Copyright 2009 Wolfson Microelectronics plc
	5	*
	6	* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/pm.h>
	19	#include <linux/i2c.h>
b9288f49	20	#include <linux/regmap.h>
1dcf98ff	21	#include <linux/regulator/consumer.h>
5a0e3ad6	22	#include <linux/slab.h>
bf5a85be	23	#include <linux/of_device.h>
1dcf98ff MB	24	#include <sound/core.h>
	25	#include <sound/pcm.h>
	26	#include <sound/pcm_params.h>
	27	#include <sound/soc.h>
1dcf98ff MB	28	#include <sound/initval.h>
	29	#include <sound/tlv.h>
	30
	31	#include "wm8523.h"
	32
1dcf98ff MB	33	#define WM8523_NUM_SUPPLIES 2
	34	static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	35	"AVDD",
	36	"LINEVDD",
	37	};
	38
	39	#define WM8523_NUM_RATES 7
	40
	41	/* codec private data */
	42	struct wm8523_priv {
b9288f49	43	struct regmap *regmap;
1dcf98ff MB	44	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	45	unsigned int sysclk;
	46	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	47	struct snd_pcm_hw_constraint_list rate_constraint;
	48	};
	49
b9288f49 MB	50	static const struct reg_default wm8523_reg_defaults[] = {
	51	{ 2, 0x0000 }, /* R2 - PSCTRL1 */
	52	{ 3, 0x1812 }, /* R3 - AIF_CTRL1 */
	53	{ 4, 0x0000 }, /* R4 - AIF_CTRL2 */
	54	{ 5, 0x0001 }, /* R5 - DAC_CTRL3 */
	55	{ 6, 0x0190 }, /* R6 - DAC_GAINL */
	56	{ 7, 0x0190 }, /* R7 - DAC_GAINR */
	57	{ 8, 0x0000 }, /* R8 - ZERO_DETECT */
1dcf98ff MB	58	};
1dcf98ff MB	59
b9288f49	60	static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
1dcf98ff MB	61	{
	62	switch (reg) {
	63	case WM8523_DEVICE_ID:
	64	case WM8523_REVISION:
b9288f49	65	return true;
1dcf98ff	66	default:
b9288f49	67	return false;
1dcf98ff MB	68	}
	69	}
	70
1dcf98ff MB	71	static int wm8523_reset(struct snd_soc_codec *codec)
1dcf98ff MB	72	{
8d50e447	73	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
1dcf98ff MB	74	}
	75
	76	static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
	77
	78	static const char *wm8523_zd_count_text[] = {
	79	"1024",
	80	"2048",
	81	};
	82
	83	static const struct soc_enum wm8523_zc_count =
	84	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
	85
1661699a	86	static const struct snd_kcontrol_new wm8523_controls[] = {
1dcf98ff MB	87	SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
	88	0, 448, 0, dac_tlv),
	89	SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
	90	SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
	91	SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
	92	SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
	93	SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
	94	SOC_ENUM("Zero Detect Count", wm8523_zc_count),
	95	};
	96
	97	static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
	98	SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
	99	SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
	100	SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
	101	};
	102
1661699a	103	static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
1dcf98ff MB	104	{ "LINEVOUTL", NULL, "DAC" },
	105	{ "LINEVOUTR", NULL, "DAC" },
	106	};
	107
1dcf98ff MB	108	static struct {
	109	int value;
	110	int ratio;
	111	} lrclk_ratios[WM8523_NUM_RATES] = {
	112	{ 1, 128 },
	113	{ 2, 192 },
	114	{ 3, 256 },
	115	{ 4, 384 },
	116	{ 5, 512 },
	117	{ 6, 768 },
	118	{ 7, 1152 },
	119	};
	120
	121	static int wm8523_startup(struct snd_pcm_substream *substream,
	122	struct snd_soc_dai *dai)
	123	{
	124	struct snd_soc_codec *codec = dai->codec;
b2c812e2	125	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	126
	127	/* The set of sample rates that can be supported depends on the
	128	* MCLK supplied to the CODEC - enforce this.
	129	*/
	130	if (!wm8523->sysclk) {
	131	dev_err(codec->dev,
	132	"No MCLK configured, call set_sysclk() on init\n");
	133	return -EINVAL;
	134	}
	135
1dcf98ff MB	136	snd_pcm_hw_constraint_list(substream->runtime, 0,
	137	SNDRV_PCM_HW_PARAM_RATE,
	138	&wm8523->rate_constraint);
	139
	140	return 0;
	141	}
	142
	143	static int wm8523_hw_params(struct snd_pcm_substream *substream,
	144	struct snd_pcm_hw_params *params,
	145	struct snd_soc_dai *dai)
	146	{
e6968a17	147	struct snd_soc_codec *codec = dai->codec;
b2c812e2	148	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff	149	int i;
8d50e447 MB	150	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
8d50e447 MB	151	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
1dcf98ff MB	152
	153	/* Find a supported LRCLK ratio */
	154	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	155	if (wm8523->sysclk / params_rate(params) ==
	156	lrclk_ratios[i].ratio)
	157	break;
	158	}
	159
	160	/* Should never happen, should be handled by constraints */
	161	if (i == ARRAY_SIZE(lrclk_ratios)) {
	162	dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
	163	wm8523->sysclk / params_rate(params));
	164	return -EINVAL;
	165	}
	166
	167	aifctrl2 &= ~WM8523_SR_MASK;
	168	aifctrl2 \|= lrclk_ratios[i].value;
	169
	170	aifctrl1 &= ~WM8523_WL_MASK;
	171	switch (params_format(params)) {
	172	case SNDRV_PCM_FORMAT_S16_LE:
	173	break;
	174	case SNDRV_PCM_FORMAT_S20_3LE:
	175	aifctrl1 \|= 0x8;
	176	break;
	177	case SNDRV_PCM_FORMAT_S24_LE:
	178	aifctrl1 \|= 0x10;
	179	break;
	180	case SNDRV_PCM_FORMAT_S32_LE:
	181	aifctrl1 \|= 0x18;
	182	break;
	183	}
	184
8d50e447 MB	185	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
8d50e447 MB	186	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
1dcf98ff MB	187
	188	return 0;
	189	}
	190
	191	static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
	192	int clk_id, unsigned int freq, int dir)
	193	{
	194	struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2	195	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	196	unsigned int val;
	197	int i;
	198
	199	wm8523->sysclk = freq;
	200
	201	wm8523->rate_constraint.count = 0;
	202	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	203	val = freq / lrclk_ratios[i].ratio;
	204	/* Check that it's a standard rate since core can't
	205	* cope with others and having the odd rates confuses
	206	* constraint matching.
	207	*/
	208	switch (val) {
	209	case 8000:
	210	case 11025:
	211	case 16000:
	212	case 22050:
	213	case 32000:
	214	case 44100:
	215	case 48000:
	216	case 64000:
	217	case 88200:
	218	case 96000:
	219	case 176400:
	220	case 192000:
	221	dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
	222	val);
	223	wm8523->rate_constraint_list[i] = val;
	224	wm8523->rate_constraint.count++;
	225	break;
	226	default:
	227	dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
	228	val);
	229	}
	230	}
	231
	232	/* Need at least one supported rate... */
	233	if (wm8523->rate_constraint.count == 0)
	234	return -EINVAL;
	235
	236	return 0;
	237	}
	238
	239
	240	static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
	241	unsigned int fmt)
	242	{
	243	struct snd_soc_codec *codec = codec_dai->codec;
8d50e447	244	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
1dcf98ff MB	245
	246	aifctrl1 &= ~(WM8523_BCLK_INV_MASK \| WM8523_LRCLK_INV_MASK \|
	247	WM8523_FMT_MASK \| WM8523_AIF_MSTR_MASK);
	248
	249	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	250	case SND_SOC_DAIFMT_CBM_CFM:
	251	aifctrl1 \|= WM8523_AIF_MSTR;
	252	break;
	253	case SND_SOC_DAIFMT_CBS_CFS:
	254	break;
	255	default:
	256	return -EINVAL;
	257	}
	258
	259	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	260	case SND_SOC_DAIFMT_I2S:
	261	aifctrl1 \|= 0x0002;
	262	break;
	263	case SND_SOC_DAIFMT_RIGHT_J:
	264	break;
	265	case SND_SOC_DAIFMT_LEFT_J:
	266	aifctrl1 \|= 0x0001;
	267	break;
	268	case SND_SOC_DAIFMT_DSP_A:
	269	aifctrl1 \|= 0x0003;
	270	break;
	271	case SND_SOC_DAIFMT_DSP_B:
	272	aifctrl1 \|= 0x0023;
	273	break;
	274	default:
	275	return -EINVAL;
	276	}
	277
	278	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	279	case SND_SOC_DAIFMT_NB_NF:
	280	break;
	281	case SND_SOC_DAIFMT_IB_IF:
	282	aifctrl1 \|= WM8523_BCLK_INV \| WM8523_LRCLK_INV;
	283	break;
	284	case SND_SOC_DAIFMT_IB_NF:
	285	aifctrl1 \|= WM8523_BCLK_INV;
	286	break;
	287	case SND_SOC_DAIFMT_NB_IF:
	288	aifctrl1 \|= WM8523_LRCLK_INV;
	289	break;
	290	default:
	291	return -EINVAL;
	292	}
	293
8d50e447	294	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
1dcf98ff MB	295
	296	return 0;
	297	}
	298
	299	static int wm8523_set_bias_level(struct snd_soc_codec *codec,
	300	enum snd_soc_bias_level level)
	301	{
b2c812e2	302	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
b9288f49	303	int ret;
1dcf98ff MB	304
	305	switch (level) {
	306	case SND_SOC_BIAS_ON:
	307	break;
	308
	309	case SND_SOC_BIAS_PREPARE:
	310	/* Full power on */
	311	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	312	WM8523_SYS_ENA_MASK, 3);
	313	break;
	314
	315	case SND_SOC_BIAS_STANDBY:
ce6120cc	316	if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1dcf98ff MB	317	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	318	wm8523->supplies);
	319	if (ret != 0) {
	320	dev_err(codec->dev,
	321	"Failed to enable supplies: %d\n",
	322	ret);
	323	return ret;
	324	}
	325
b9288f49 MB	326	/* Sync back default/cached values */
	327	regcache_sync(wm8523->regmap);
	328
1dcf98ff MB	329	/* Initial power up */
	330	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	331	WM8523_SYS_ENA_MASK, 1);
	332
1dcf98ff MB	333	msleep(100);
	334	}
	335
	336	/* Power up to mute */
	337	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	338	WM8523_SYS_ENA_MASK, 2);
	339
	340	break;
	341
	342	case SND_SOC_BIAS_OFF:
	343	/* The chip runs through the power down sequence for us. */
	344	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	345	WM8523_SYS_ENA_MASK, 0);
	346	msleep(100);
	347
	348	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
	349	wm8523->supplies);
	350	break;
	351	}
ce6120cc	352	codec->dapm.bias_level = level;
1dcf98ff MB	353	return 0;
	354	}
	355
	356	#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
	357
	358	#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S20_3LE \|\
	359	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S32_LE)
	360
85e7652d	361	static const struct snd_soc_dai_ops wm8523_dai_ops = {
1dcf98ff MB	362	.startup = wm8523_startup,
	363	.hw_params = wm8523_hw_params,
	364	.set_sysclk = wm8523_set_dai_sysclk,
	365	.set_fmt = wm8523_set_dai_fmt,
	366	};
	367
f0fba2ad LG	368	static struct snd_soc_dai_driver wm8523_dai = {
f0fba2ad LG	369	.name = "wm8523-hifi",
1dcf98ff MB	370	.playback = {
	371	.stream_name = "Playback",
	372	.channels_min = 2, /* Mono modes not yet supported */
	373	.channels_max = 2,
	374	.rates = WM8523_RATES,
	375	.formats = WM8523_FORMATS,
	376	},
	377	.ops = &wm8523_dai_ops,
	378	};
1dcf98ff MB	379
1dcf98ff MB	380	#ifdef CONFIG_PM
84b315ee	381	static int wm8523_suspend(struct snd_soc_codec *codec)
1dcf98ff	382	{
1dcf98ff MB	383	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	384	return 0;
	385	}
	386
f0fba2ad	387	static int wm8523_resume(struct snd_soc_codec *codec)
1dcf98ff	388	{
1dcf98ff	389	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1dcf98ff MB	390	return 0;
	391	}
	392	#else
	393	#define wm8523_suspend NULL
	394	#define wm8523_resume NULL
	395	#endif
	396
f0fba2ad	397	static int wm8523_probe(struct snd_soc_codec *codec)
1dcf98ff	398	{
f0fba2ad	399	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
719b0c59	400	int ret;
1dcf98ff MB	401
	402	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	403	wm8523->rate_constraint.count =
	404	ARRAY_SIZE(wm8523->rate_constraint_list);
	405
b9288f49	406	ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
8d50e447 MB	407	if (ret != 0) {
8d50e447 MB	408	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad	409	return ret;
8d50e447 MB	410	}
8d50e447 MB	411
1dcf98ff MB	412	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	413	wm8523->supplies);
	414	if (ret != 0) {
	415	dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
	416	goto err_get;
	417	}
	418
8d50e447	419	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
1dcf98ff MB	420	if (ret < 0) {
	421	dev_err(codec->dev, "Failed to read ID register\n");
	422	goto err_enable;
	423	}
b9288f49	424	if (ret != 0x8523) {
1dcf98ff MB	425	dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
	426	ret = -EINVAL;
	427	goto err_enable;
	428	}
	429
8d50e447	430	ret = snd_soc_read(codec, WM8523_REVISION);
1dcf98ff MB	431	if (ret < 0) {
	432	dev_err(codec->dev, "Failed to read revision register\n");
	433	goto err_enable;
	434	}
	435	dev_info(codec->dev, "revision %c\n",
	436	(ret & WM8523_CHIP_REV_MASK) + 'A');
	437
	438	ret = wm8523_reset(codec);
	439	if (ret < 0) {
	440	dev_err(codec->dev, "Failed to issue reset\n");
	441	goto err_enable;
	442	}
	443
1dcf98ff	444	/* Change some default settings - latch VU and enable ZC */
a1b3b5ee MB	445	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
	446	WM8523_DACR_VU, WM8523_DACR_VU);
	447	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
1dcf98ff MB	448
	449	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	450
	451	/* Bias level configuration will have done an extra enable */
	452	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	453
1dcf98ff MB	454	return 0;
	455
	456	err_enable:
	457	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	458	err_get:
f0fba2ad	459
1dcf98ff MB	460	return ret;
	461	}
	462
f0fba2ad	463	static int wm8523_remove(struct snd_soc_codec *codec)
1dcf98ff	464	{
f0fba2ad	465	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
f0fba2ad	466	return 0;
1dcf98ff MB	467	}
1dcf98ff MB	468
f0fba2ad LG	469	static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	470	.probe = wm8523_probe,
	471	.remove = wm8523_remove,
	472	.suspend = wm8523_suspend,
	473	.resume = wm8523_resume,
	474	.set_bias_level = wm8523_set_bias_level,
1661699a MB	475
	476	.controls = wm8523_controls,
	477	.num_controls = ARRAY_SIZE(wm8523_controls),
	478	.dapm_widgets = wm8523_dapm_widgets,
	479	.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
	480	.dapm_routes = wm8523_dapm_routes,
	481	.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
f0fba2ad LG	482	};
f0fba2ad LG	483
bf5a85be MB	484	static const struct of_device_id wm8523_of_match[] = {
	485	{ .compatible = "wlf,wm8523" },
	486	{ },
	487	};
	488
b9288f49 MB	489	static const struct regmap_config wm8523_regmap = {
	490	.reg_bits = 8,
	491	.val_bits = 16,
	492	.max_register = WM8523_ZERO_DETECT,
	493
	494	.reg_defaults = wm8523_reg_defaults,
	495	.num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
	496	.cache_type = REGCACHE_RBTREE,
	497
	498	.volatile_reg = wm8523_volatile_register,
	499	};
	500
1dcf98ff MB	501	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	502	static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
	503	const struct i2c_device_id *id)
	504	{
	505	struct wm8523_priv *wm8523;
719b0c59	506	int ret, i;
1dcf98ff	507
7d014db8 MB	508	wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
7d014db8 MB	509	GFP_KERNEL);
1dcf98ff MB	510	if (wm8523 == NULL)
	511	return -ENOMEM;
	512
b9288f49 MB	513	wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
	514	if (IS_ERR(wm8523->regmap)) {
	515	ret = PTR_ERR(wm8523->regmap);
	516	dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
	517	return ret;
	518	}
	519
719b0c59 MB	520	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
	521	wm8523->supplies[i].supply = wm8523_supply_names[i];
	522
	523	ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
	524	wm8523->supplies);
	525	if (ret != 0) {
	526	dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
	527	return ret;
	528	}
	529
1dcf98ff	530	i2c_set_clientdata(i2c, wm8523);
1dcf98ff	531
f0fba2ad LG	532	ret = snd_soc_register_codec(&i2c->dev,
f0fba2ad LG	533	&soc_codec_dev_wm8523, &wm8523_dai, 1);
7d014db8	534
f0fba2ad	535	return ret;
1dcf98ff	536
1dcf98ff MB	537	}
	538
	539	static __devexit int wm8523_i2c_remove(struct i2c_client *client)
	540	{
f0fba2ad	541	snd_soc_unregister_codec(&client->dev);
1dcf98ff MB	542	return 0;
	543	}
	544
1dcf98ff MB	545	static const struct i2c_device_id wm8523_i2c_id[] = {
	546	{ "wm8523", 0 },
	547	{ }
	548	};
	549	MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
	550
	551	static struct i2c_driver wm8523_i2c_driver = {
	552	.driver = {
9665408e	553	.name = "wm8523",
1dcf98ff	554	.owner = THIS_MODULE,
bf5a85be	555	.of_match_table = wm8523_of_match,
1dcf98ff MB	556	},
	557	.probe = wm8523_i2c_probe,
	558	.remove = __devexit_p(wm8523_i2c_remove),
1dcf98ff MB	559	.id_table = wm8523_i2c_id,
	560	};
	561	#endif
	562
	563	static int __init wm8523_modinit(void)
	564	{
	565	int ret;
	566	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	567	ret = i2c_add_driver(&wm8523_i2c_driver);
	568	if (ret != 0) {
	569	printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
	570	ret);
	571	}
	572	#endif
	573	return 0;
	574	}
	575	module_init(wm8523_modinit);
	576
	577	static void __exit wm8523_exit(void)
	578	{
	579	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	580	i2c_del_driver(&wm8523_i2c_driver);
	581	#endif
	582	}
	583	module_exit(wm8523_exit);
	584
	585	MODULE_DESCRIPTION("ASoC WM8523 driver");
	586	MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
	587	MODULE_LICENSE("GPL");