[deliverable/linux.git] / sound / soc / codecs / wm8523.c

/*
 * wm8523.c  --  WM8523 ALSA SoC Audio driver
 *
 * Copyright 2009 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#include "wm8523.h"

#define WM8523_NUM_SUPPLIES 2
static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	"AVDD",
	"LINEVDD",
};

#define WM8523_NUM_RATES 7

/* codec private data */
struct wm8523_priv {
	struct regmap *regmap;
	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	unsigned int sysclk;
	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	struct snd_pcm_hw_constraint_list rate_constraint;
};

static const struct reg_default wm8523_reg_defaults[] = {
	{ 2, 0x0000 },     /* R2 - PSCTRL1 */
	{ 3, 0x1812 },     /* R3 - AIF_CTRL1 */
	{ 4, 0x0000 },     /* R4 - AIF_CTRL2 */
	{ 5, 0x0001 },     /* R5 - DAC_CTRL3 */
	{ 6, 0x0190 },     /* R6 - DAC_GAINL */
	{ 7, 0x0190 },     /* R7 - DAC_GAINR */
	{ 8, 0x0000 },     /* R8 - ZERO_DETECT */
};

static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case WM8523_DEVICE_ID:
	case WM8523_REVISION:
		return true;
	default:
		return false;
	}
}

static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);

static const char *wm8523_zd_count_text[] = {
	"1024",
	"2048",
};

static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0,
			    wm8523_zd_count_text);

static const struct snd_kcontrol_new wm8523_controls[] = {
SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
		 0, 448, 0, dac_tlv),
SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
SOC_ENUM("Zero Detect Count", wm8523_zc_count),
};

static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
};

static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
	{ "LINEVOUTL", NULL, "DAC" },
	{ "LINEVOUTR", NULL, "DAC" },
};

static struct {
	int value;
	int ratio;
} lrclk_ratios[WM8523_NUM_RATES] = {
	{ 1, 128 },
	{ 2, 192 },
	{ 3, 256 },
	{ 4, 384 },
	{ 5, 512 },
	{ 6, 768 },
	{ 7, 1152 },
};

static int wm8523_startup(struct snd_pcm_substream *substream,
			  struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	/* The set of sample rates that can be supported depends on the
	 * MCLK supplied to the CODEC - enforce this.
	 */
	if (!wm8523->sysclk) {
		dev_err(codec->dev,
			"No MCLK configured, call set_sysclk() on init\n");
		return -EINVAL;
	}

	snd_pcm_hw_constraint_list(substream->runtime, 0,
				   SNDRV_PCM_HW_PARAM_RATE,
				   &wm8523->rate_constraint);

	return 0;
}

static int wm8523_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int i;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);

	/* Find a supported LRCLK ratio */
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		if (wm8523->sysclk / params_rate(params) ==
		    lrclk_ratios[i].ratio)
			break;
	}

	/* Should never happen, should be handled by constraints */
	if (i == ARRAY_SIZE(lrclk_ratios)) {
		dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
			wm8523->sysclk / params_rate(params));
		return -EINVAL;
	}

	aifctrl2 &= ~WM8523_SR_MASK;
	aifctrl2 |= lrclk_ratios[i].value;

	aifctrl1 &= ~WM8523_WL_MASK;
	switch (params_width(params)) {
	case 16:
		break;
	case 20:
		aifctrl1 |= 0x8;
		break;
	case 24:
		aifctrl1 |= 0x10;
		break;
	case 32:
		aifctrl1 |= 0x18;
		break;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);

	return 0;
}

static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
		int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	unsigned int val;
	int i;

	wm8523->sysclk = freq;

	wm8523->rate_constraint.count = 0;
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		val = freq / lrclk_ratios[i].ratio;
		/* Check that it's a standard rate since core can't
		 * cope with others and having the odd rates confuses
		 * constraint matching.
		 */
		switch (val) {
		case 8000:
		case 11025:
		case 16000:
		case 22050:
		case 32000:
		case 44100:
		case 48000:
		case 64000:
		case 88200:
		case 96000:
		case 176400:
		case 192000:
			dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
				val);
			wm8523->rate_constraint_list[i] = val;
			wm8523->rate_constraint.count++;
			break;
		default:
			dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
				val);
		}
	}

	/* Need at least one supported rate... */
	if (wm8523->rate_constraint.count == 0)
		return -EINVAL;

	return 0;
}


static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
		unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);

	aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
		      WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		aifctrl1 |= WM8523_AIF_MSTR;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		aifctrl1 |= 0x0002;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		aifctrl1 |= 0x0001;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		aifctrl1 |= 0x0003;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		aifctrl1 |= 0x0023;
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		break;
	case SND_SOC_DAIFMT_IB_IF:
		aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
		break;
	case SND_SOC_DAIFMT_IB_NF:
		aifctrl1 |= WM8523_BCLK_INV;
		break;
	case SND_SOC_DAIFMT_NB_IF:
		aifctrl1 |= WM8523_LRCLK_INV;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);

	return 0;
}

static int wm8523_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int ret;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;

	case SND_SOC_BIAS_PREPARE:
		/* Full power on */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 3);
		break;

	case SND_SOC_BIAS_STANDBY:
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
			ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
						    wm8523->supplies);
			if (ret != 0) {
				dev_err(codec->dev,
					"Failed to enable supplies: %d\n",
					ret);
				return ret;
			}

			/* Sync back default/cached values */
			regcache_sync(wm8523->regmap);

			/* Initial power up */
			snd_soc_update_bits(codec, WM8523_PSCTRL1,
					    WM8523_SYS_ENA_MASK, 1);

			msleep(100);
		}

		/* Power up to mute */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 2);

		break;

	case SND_SOC_BIAS_OFF:
		/* The chip runs through the power down sequence for us. */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 0);
		msleep(100);

		regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
				       wm8523->supplies);
		break;
	}
	codec->dapm.bias_level = level;
	return 0;
}

#define WM8523_RATES SNDRV_PCM_RATE_8000_192000

#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

static const struct snd_soc_dai_ops wm8523_dai_ops = {
	.startup	= wm8523_startup,
	.hw_params	= wm8523_hw_params,
	.set_sysclk	= wm8523_set_dai_sysclk,
	.set_fmt	= wm8523_set_dai_fmt,
};

static struct snd_soc_dai_driver wm8523_dai = {
	.name = "wm8523-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,  /* Mono modes not yet supported */
		.channels_max = 2,
		.rates = WM8523_RATES,
		.formats = WM8523_FORMATS,
	},
	.ops = &wm8523_dai_ops,
};

#ifdef CONFIG_PM
static int wm8523_suspend(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static int wm8523_resume(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	return 0;
}
#else
#define wm8523_suspend NULL
#define wm8523_resume NULL
#endif

static int wm8523_probe(struct snd_soc_codec *codec)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	wm8523->rate_constraint.count =
		ARRAY_SIZE(wm8523->rate_constraint_list);

	/* Change some default settings - latch VU and enable ZC */
	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
			    WM8523_DACR_VU, WM8523_DACR_VU);
	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);

	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	return 0;
}

static int wm8523_remove(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	.probe =	wm8523_probe,
	.remove =	wm8523_remove,
	.suspend =	wm8523_suspend,
	.resume =	wm8523_resume,
	.set_bias_level = wm8523_set_bias_level,

	.controls = wm8523_controls,
	.num_controls = ARRAY_SIZE(wm8523_controls),
	.dapm_widgets = wm8523_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
	.dapm_routes = wm8523_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
};

static const struct of_device_id wm8523_of_match[] = {
	{ .compatible = "wlf,wm8523" },
	{ },
};

static const struct regmap_config wm8523_regmap = {
	.reg_bits = 8,
	.val_bits = 16,
	.max_register = WM8523_ZERO_DETECT,

	.reg_defaults = wm8523_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
	.cache_type = REGCACHE_RBTREE,

	.volatile_reg = wm8523_volatile_register,
};

#if IS_ENABLED(CONFIG_I2C)
static int wm8523_i2c_probe(struct i2c_client *i2c,
			    const struct i2c_device_id *id)
{
	struct wm8523_priv *wm8523;
	unsigned int val;
	int ret, i;

	wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
			      GFP_KERNEL);
	if (wm8523 == NULL)
		return -ENOMEM;

	wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
	if (IS_ERR(wm8523->regmap)) {
		ret = PTR_ERR(wm8523->regmap);
		dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
		return ret;
	}

	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
		wm8523->supplies[i].supply = wm8523_supply_names[i];

	ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
				      wm8523->supplies);
	if (ret != 0) {
		dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
		return ret;
	}

	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
				    wm8523->supplies);
	if (ret != 0) {
		dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
		return ret;
	}

	ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
	if (ret < 0) {
		dev_err(&i2c->dev, "Failed to read ID register\n");
		goto err_enable;
	}
	if (val != 0x8523) {
		dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
		ret = -EINVAL;
		goto err_enable;
	}

	ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
	if (ret < 0) {
		dev_err(&i2c->dev, "Failed to read revision register\n");
		goto err_enable;
	}
	dev_info(&i2c->dev, "revision %c\n",
		 (val & WM8523_CHIP_REV_MASK) + 'A');

	ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
	if (ret != 0) {
		dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
		goto err_enable;
	}

	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	i2c_set_clientdata(i2c, wm8523);

	ret =  snd_soc_register_codec(&i2c->dev,
			&soc_codec_dev_wm8523, &wm8523_dai, 1);

	return ret;

err_enable:
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	return ret;
}

static int wm8523_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	return 0;
}

static const struct i2c_device_id wm8523_i2c_id[] = {
	{ "wm8523", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);

static struct i2c_driver wm8523_i2c_driver = {
	.driver = {
		.name = "wm8523",
		.owner = THIS_MODULE,
		.of_match_table = wm8523_of_match,
	},
	.probe =    wm8523_i2c_probe,
	.remove =   wm8523_i2c_remove,
	.id_table = wm8523_i2c_id,
};
#endif

static int __init wm8523_modinit(void)
{
	int ret;
#if IS_ENABLED(CONFIG_I2C)
	ret = i2c_add_driver(&wm8523_i2c_driver);
	if (ret != 0) {
		printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
		       ret);
	}
#endif
	return 0;
}
module_init(wm8523_modinit);

static void __exit wm8523_exit(void)
{
#if IS_ENABLED(CONFIG_I2C)
	i2c_del_driver(&wm8523_i2c_driver);
#endif
}
module_exit(wm8523_exit);

MODULE_DESCRIPTION("ASoC WM8523 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1dcf98ff MB	1	/*
	2	* wm8523.c -- WM8523 ALSA SoC Audio driver
	3	*
	4	* Copyright 2009 Wolfson Microelectronics plc
	5	*
	6	* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/pm.h>
	19	#include <linux/i2c.h>
b9288f49	20	#include <linux/regmap.h>
1dcf98ff	21	#include <linux/regulator/consumer.h>
5a0e3ad6	22	#include <linux/slab.h>
bf5a85be	23	#include <linux/of_device.h>
1dcf98ff MB	24	#include <sound/core.h>
	25	#include <sound/pcm.h>
	26	#include <sound/pcm_params.h>
	27	#include <sound/soc.h>
1dcf98ff MB	28	#include <sound/initval.h>
	29	#include <sound/tlv.h>
	30
	31	#include "wm8523.h"
	32
1dcf98ff MB	33	#define WM8523_NUM_SUPPLIES 2
	34	static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	35	"AVDD",
	36	"LINEVDD",
	37	};
	38
	39	#define WM8523_NUM_RATES 7
	40
	41	/* codec private data */
	42	struct wm8523_priv {
b9288f49	43	struct regmap *regmap;
1dcf98ff MB	44	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	45	unsigned int sysclk;
	46	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	47	struct snd_pcm_hw_constraint_list rate_constraint;
	48	};
	49
b9288f49 MB	50	static const struct reg_default wm8523_reg_defaults[] = {
	51	{ 2, 0x0000 }, /* R2 - PSCTRL1 */
	52	{ 3, 0x1812 }, /* R3 - AIF_CTRL1 */
	53	{ 4, 0x0000 }, /* R4 - AIF_CTRL2 */
	54	{ 5, 0x0001 }, /* R5 - DAC_CTRL3 */
	55	{ 6, 0x0190 }, /* R6 - DAC_GAINL */
	56	{ 7, 0x0190 }, /* R7 - DAC_GAINR */
	57	{ 8, 0x0000 }, /* R8 - ZERO_DETECT */
1dcf98ff MB	58	};
1dcf98ff MB	59
b9288f49	60	static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
1dcf98ff MB	61	{
	62	switch (reg) {
	63	case WM8523_DEVICE_ID:
	64	case WM8523_REVISION:
b9288f49	65	return true;
1dcf98ff	66	default:
b9288f49	67	return false;
1dcf98ff MB	68	}
	69	}
	70
1dcf98ff MB	71	static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
	72
	73	static const char *wm8523_zd_count_text[] = {
	74	"1024",
	75	"2048",
	76	};
	77
fed08d94 TI	78	static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0,
fed08d94 TI	79	wm8523_zd_count_text);
1dcf98ff	80
1661699a	81	static const struct snd_kcontrol_new wm8523_controls[] = {
1dcf98ff MB	82	SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
	83	0, 448, 0, dac_tlv),
	84	SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
	85	SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
	86	SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
	87	SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
	88	SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
	89	SOC_ENUM("Zero Detect Count", wm8523_zc_count),
	90	};
	91
	92	static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
	93	SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
	94	SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
	95	SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
	96	};
	97
1661699a	98	static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
1dcf98ff MB	99	{ "LINEVOUTL", NULL, "DAC" },
	100	{ "LINEVOUTR", NULL, "DAC" },
	101	};
	102
1dcf98ff MB	103	static struct {
	104	int value;
	105	int ratio;
	106	} lrclk_ratios[WM8523_NUM_RATES] = {
	107	{ 1, 128 },
	108	{ 2, 192 },
	109	{ 3, 256 },
	110	{ 4, 384 },
	111	{ 5, 512 },
	112	{ 6, 768 },
	113	{ 7, 1152 },
	114	};
	115
	116	static int wm8523_startup(struct snd_pcm_substream *substream,
	117	struct snd_soc_dai *dai)
	118	{
	119	struct snd_soc_codec *codec = dai->codec;
b2c812e2	120	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	121
	122	/* The set of sample rates that can be supported depends on the
	123	* MCLK supplied to the CODEC - enforce this.
	124	*/
	125	if (!wm8523->sysclk) {
	126	dev_err(codec->dev,
	127	"No MCLK configured, call set_sysclk() on init\n");
	128	return -EINVAL;
	129	}
	130
1dcf98ff MB	131	snd_pcm_hw_constraint_list(substream->runtime, 0,
	132	SNDRV_PCM_HW_PARAM_RATE,
	133	&wm8523->rate_constraint);
	134
	135	return 0;
	136	}
	137
	138	static int wm8523_hw_params(struct snd_pcm_substream *substream,
	139	struct snd_pcm_hw_params *params,
	140	struct snd_soc_dai *dai)
	141	{
e6968a17	142	struct snd_soc_codec *codec = dai->codec;
b2c812e2	143	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff	144	int i;
8d50e447 MB	145	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
8d50e447 MB	146	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
1dcf98ff MB	147
	148	/* Find a supported LRCLK ratio */
	149	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	150	if (wm8523->sysclk / params_rate(params) ==
	151	lrclk_ratios[i].ratio)
	152	break;
	153	}
	154
	155	/* Should never happen, should be handled by constraints */
	156	if (i == ARRAY_SIZE(lrclk_ratios)) {
	157	dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
	158	wm8523->sysclk / params_rate(params));
	159	return -EINVAL;
	160	}
	161
	162	aifctrl2 &= ~WM8523_SR_MASK;
	163	aifctrl2 \|= lrclk_ratios[i].value;
	164
	165	aifctrl1 &= ~WM8523_WL_MASK;
3fafcc8e MB	166	switch (params_width(params)) {
3fafcc8e MB	167	case 16:
1dcf98ff	168	break;
3fafcc8e	169	case 20:
1dcf98ff MB	170	aifctrl1 \|= 0x8;
1dcf98ff MB	171	break;
3fafcc8e	172	case 24:
1dcf98ff MB	173	aifctrl1 \|= 0x10;
1dcf98ff MB	174	break;
3fafcc8e	175	case 32:
1dcf98ff MB	176	aifctrl1 \|= 0x18;
	177	break;
	178	}
	179
8d50e447 MB	180	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
8d50e447 MB	181	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
1dcf98ff MB	182
	183	return 0;
	184	}
	185
	186	static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
	187	int clk_id, unsigned int freq, int dir)
	188	{
	189	struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2	190	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	191	unsigned int val;
	192	int i;
	193
	194	wm8523->sysclk = freq;
	195
	196	wm8523->rate_constraint.count = 0;
	197	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	198	val = freq / lrclk_ratios[i].ratio;
	199	/* Check that it's a standard rate since core can't
	200	* cope with others and having the odd rates confuses
	201	* constraint matching.
	202	*/
	203	switch (val) {
	204	case 8000:
	205	case 11025:
	206	case 16000:
	207	case 22050:
	208	case 32000:
	209	case 44100:
	210	case 48000:
	211	case 64000:
	212	case 88200:
	213	case 96000:
	214	case 176400:
	215	case 192000:
	216	dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
	217	val);
	218	wm8523->rate_constraint_list[i] = val;
	219	wm8523->rate_constraint.count++;
	220	break;
	221	default:
	222	dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
	223	val);
	224	}
	225	}
	226
	227	/* Need at least one supported rate... */
	228	if (wm8523->rate_constraint.count == 0)
	229	return -EINVAL;
	230
	231	return 0;
	232	}
	233
	234
	235	static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
	236	unsigned int fmt)
	237	{
	238	struct snd_soc_codec *codec = codec_dai->codec;
8d50e447	239	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
1dcf98ff MB	240
	241	aifctrl1 &= ~(WM8523_BCLK_INV_MASK \| WM8523_LRCLK_INV_MASK \|
	242	WM8523_FMT_MASK \| WM8523_AIF_MSTR_MASK);
	243
	244	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	245	case SND_SOC_DAIFMT_CBM_CFM:
	246	aifctrl1 \|= WM8523_AIF_MSTR;
	247	break;
	248	case SND_SOC_DAIFMT_CBS_CFS:
	249	break;
	250	default:
	251	return -EINVAL;
	252	}
	253
	254	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	255	case SND_SOC_DAIFMT_I2S:
	256	aifctrl1 \|= 0x0002;
	257	break;
	258	case SND_SOC_DAIFMT_RIGHT_J:
	259	break;
	260	case SND_SOC_DAIFMT_LEFT_J:
	261	aifctrl1 \|= 0x0001;
	262	break;
	263	case SND_SOC_DAIFMT_DSP_A:
	264	aifctrl1 \|= 0x0003;
	265	break;
	266	case SND_SOC_DAIFMT_DSP_B:
	267	aifctrl1 \|= 0x0023;
	268	break;
	269	default:
	270	return -EINVAL;
	271	}
	272
	273	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	274	case SND_SOC_DAIFMT_NB_NF:
	275	break;
	276	case SND_SOC_DAIFMT_IB_IF:
	277	aifctrl1 \|= WM8523_BCLK_INV \| WM8523_LRCLK_INV;
	278	break;
	279	case SND_SOC_DAIFMT_IB_NF:
	280	aifctrl1 \|= WM8523_BCLK_INV;
	281	break;
	282	case SND_SOC_DAIFMT_NB_IF:
	283	aifctrl1 \|= WM8523_LRCLK_INV;
	284	break;
	285	default:
	286	return -EINVAL;
	287	}
	288
8d50e447	289	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
1dcf98ff MB	290
	291	return 0;
	292	}
	293
	294	static int wm8523_set_bias_level(struct snd_soc_codec *codec,
	295	enum snd_soc_bias_level level)
	296	{
b2c812e2	297	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
b9288f49	298	int ret;
1dcf98ff MB	299
	300	switch (level) {
	301	case SND_SOC_BIAS_ON:
	302	break;
	303
	304	case SND_SOC_BIAS_PREPARE:
	305	/* Full power on */
	306	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	307	WM8523_SYS_ENA_MASK, 3);
	308	break;
	309
	310	case SND_SOC_BIAS_STANDBY:
ce6120cc	311	if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1dcf98ff MB	312	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	313	wm8523->supplies);
	314	if (ret != 0) {
	315	dev_err(codec->dev,
	316	"Failed to enable supplies: %d\n",
	317	ret);
	318	return ret;
	319	}
	320
b9288f49 MB	321	/* Sync back default/cached values */
	322	regcache_sync(wm8523->regmap);
	323
1dcf98ff MB	324	/* Initial power up */
	325	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	326	WM8523_SYS_ENA_MASK, 1);
	327
1dcf98ff MB	328	msleep(100);
	329	}
	330
	331	/* Power up to mute */
	332	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	333	WM8523_SYS_ENA_MASK, 2);
	334
	335	break;
	336
	337	case SND_SOC_BIAS_OFF:
	338	/* The chip runs through the power down sequence for us. */
	339	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	340	WM8523_SYS_ENA_MASK, 0);
	341	msleep(100);
	342
	343	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
	344	wm8523->supplies);
	345	break;
	346	}
ce6120cc	347	codec->dapm.bias_level = level;
1dcf98ff MB	348	return 0;
	349	}
	350
	351	#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
	352
	353	#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S20_3LE \|\
	354	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S32_LE)
	355
85e7652d	356	static const struct snd_soc_dai_ops wm8523_dai_ops = {
1dcf98ff MB	357	.startup = wm8523_startup,
	358	.hw_params = wm8523_hw_params,
	359	.set_sysclk = wm8523_set_dai_sysclk,
	360	.set_fmt = wm8523_set_dai_fmt,
	361	};
	362
f0fba2ad LG	363	static struct snd_soc_dai_driver wm8523_dai = {
f0fba2ad LG	364	.name = "wm8523-hifi",
1dcf98ff MB	365	.playback = {
	366	.stream_name = "Playback",
	367	.channels_min = 2, /* Mono modes not yet supported */
	368	.channels_max = 2,
	369	.rates = WM8523_RATES,
	370	.formats = WM8523_FORMATS,
	371	},
	372	.ops = &wm8523_dai_ops,
	373	};
1dcf98ff MB	374
1dcf98ff MB	375	#ifdef CONFIG_PM
84b315ee	376	static int wm8523_suspend(struct snd_soc_codec *codec)
1dcf98ff	377	{
1dcf98ff MB	378	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	379	return 0;
	380	}
	381
f0fba2ad	382	static int wm8523_resume(struct snd_soc_codec *codec)
1dcf98ff	383	{
1dcf98ff	384	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1dcf98ff MB	385	return 0;
	386	}
	387	#else
	388	#define wm8523_suspend NULL
	389	#define wm8523_resume NULL
	390	#endif
	391
f0fba2ad	392	static int wm8523_probe(struct snd_soc_codec *codec)
1dcf98ff	393	{
f0fba2ad	394	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	395
	396	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	397	wm8523->rate_constraint.count =
	398	ARRAY_SIZE(wm8523->rate_constraint_list);
	399
1dcf98ff	400	/* Change some default settings - latch VU and enable ZC */
a1b3b5ee MB	401	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
	402	WM8523_DACR_VU, WM8523_DACR_VU);
	403	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
1dcf98ff MB	404
	405	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	406
1dcf98ff	407	return 0;
1dcf98ff MB	408	}
1dcf98ff MB	409
f0fba2ad	410	static int wm8523_remove(struct snd_soc_codec *codec)
1dcf98ff	411	{
f0fba2ad	412	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
f0fba2ad	413	return 0;
1dcf98ff MB	414	}
1dcf98ff MB	415
f0fba2ad LG	416	static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	417	.probe = wm8523_probe,
	418	.remove = wm8523_remove,
	419	.suspend = wm8523_suspend,
	420	.resume = wm8523_resume,
	421	.set_bias_level = wm8523_set_bias_level,
1661699a MB	422
	423	.controls = wm8523_controls,
	424	.num_controls = ARRAY_SIZE(wm8523_controls),
	425	.dapm_widgets = wm8523_dapm_widgets,
	426	.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
	427	.dapm_routes = wm8523_dapm_routes,
	428	.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
f0fba2ad LG	429	};
f0fba2ad LG	430
bf5a85be MB	431	static const struct of_device_id wm8523_of_match[] = {
	432	{ .compatible = "wlf,wm8523" },
	433	{ },
	434	};
	435
b9288f49 MB	436	static const struct regmap_config wm8523_regmap = {
	437	.reg_bits = 8,
	438	.val_bits = 16,
	439	.max_register = WM8523_ZERO_DETECT,
	440
	441	.reg_defaults = wm8523_reg_defaults,
	442	.num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
	443	.cache_type = REGCACHE_RBTREE,
	444
	445	.volatile_reg = wm8523_volatile_register,
	446	};
	447
008ef947	448	#if IS_ENABLED(CONFIG_I2C)
7a79e94e BP	449	static int wm8523_i2c_probe(struct i2c_client *i2c,
7a79e94e BP	450	const struct i2c_device_id *id)
1dcf98ff MB	451	{
1dcf98ff MB	452	struct wm8523_priv *wm8523;
59ac2149	453	unsigned int val;
719b0c59	454	int ret, i;
1dcf98ff	455
7d014db8 MB	456	wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
7d014db8 MB	457	GFP_KERNEL);
1dcf98ff MB	458	if (wm8523 == NULL)
	459	return -ENOMEM;
	460
b9288f49 MB	461	wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
	462	if (IS_ERR(wm8523->regmap)) {
	463	ret = PTR_ERR(wm8523->regmap);
	464	dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
	465	return ret;
	466	}
	467
719b0c59 MB	468	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
	469	wm8523->supplies[i].supply = wm8523_supply_names[i];
	470
	471	ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
	472	wm8523->supplies);
	473	if (ret != 0) {
	474	dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
	475	return ret;
	476	}
	477
59ac2149 MB	478	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	479	wm8523->supplies);
	480	if (ret != 0) {
	481	dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
	482	return ret;
	483	}
	484
	485	ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
	486	if (ret < 0) {
	487	dev_err(&i2c->dev, "Failed to read ID register\n");
	488	goto err_enable;
	489	}
	490	if (val != 0x8523) {
	491	dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
	492	ret = -EINVAL;
	493	goto err_enable;
	494	}
	495
	496	ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
	497	if (ret < 0) {
	498	dev_err(&i2c->dev, "Failed to read revision register\n");
	499	goto err_enable;
	500	}
	501	dev_info(&i2c->dev, "revision %c\n",
	502	(val & WM8523_CHIP_REV_MASK) + 'A');
	503
	504	ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
	505	if (ret != 0) {
	506	dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
	507	goto err_enable;
	508	}
	509
	510	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	511
1dcf98ff	512	i2c_set_clientdata(i2c, wm8523);
1dcf98ff	513
f0fba2ad LG	514	ret = snd_soc_register_codec(&i2c->dev,
f0fba2ad LG	515	&soc_codec_dev_wm8523, &wm8523_dai, 1);
7d014db8	516
f0fba2ad	517	return ret;
1dcf98ff	518
59ac2149 MB	519	err_enable:
	520	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	521	return ret;
1dcf98ff MB	522	}
1dcf98ff MB	523
7a79e94e	524	static int wm8523_i2c_remove(struct i2c_client *client)
1dcf98ff	525	{
f0fba2ad	526	snd_soc_unregister_codec(&client->dev);
1dcf98ff MB	527	return 0;
	528	}
	529
1dcf98ff MB	530	static const struct i2c_device_id wm8523_i2c_id[] = {
	531	{ "wm8523", 0 },
	532	{ }
	533	};
	534	MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
	535
	536	static struct i2c_driver wm8523_i2c_driver = {
	537	.driver = {
9665408e	538	.name = "wm8523",
1dcf98ff	539	.owner = THIS_MODULE,
bf5a85be	540	.of_match_table = wm8523_of_match,
1dcf98ff MB	541	},
1dcf98ff MB	542	.probe = wm8523_i2c_probe,
7a79e94e	543	.remove = wm8523_i2c_remove,
1dcf98ff MB	544	.id_table = wm8523_i2c_id,
	545	};
	546	#endif
	547
	548	static int __init wm8523_modinit(void)
	549	{
	550	int ret;
008ef947	551	#if IS_ENABLED(CONFIG_I2C)
1dcf98ff MB	552	ret = i2c_add_driver(&wm8523_i2c_driver);
	553	if (ret != 0) {
	554	printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
	555	ret);
	556	}
	557	#endif
	558	return 0;
	559	}
	560	module_init(wm8523_modinit);
	561
	562	static void __exit wm8523_exit(void)
	563	{
008ef947	564	#if IS_ENABLED(CONFIG_I2C)
1dcf98ff MB	565	i2c_del_driver(&wm8523_i2c_driver);
	566	#endif
	567	}
	568	module_exit(wm8523_exit);
	569
	570	MODULE_DESCRIPTION("ASoC WM8523 driver");
	571	MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
	572	MODULE_LICENSE("GPL");