[deliverable/linux.git] / sound / soc / codecs / wm8523.c

/*
 * wm8523.c  --  WM8523 ALSA SoC Audio driver
 *
 * Copyright 2009 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#include "wm8523.h"

#define WM8523_NUM_SUPPLIES 2
static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	"AVDD",
	"LINEVDD",
};

#define WM8523_NUM_RATES 7

/* codec private data */
struct wm8523_priv {
	enum snd_soc_control_type control_type;
	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	unsigned int sysclk;
	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	struct snd_pcm_hw_constraint_list rate_constraint;
};

static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
	0x8523,     /* R0 - DEVICE_ID */
	0x0001,     /* R1 - REVISION */
	0x0000,     /* R2 - PSCTRL1 */
	0x1812,     /* R3 - AIF_CTRL1 */
	0x0000,     /* R4 - AIF_CTRL2 */
	0x0001,     /* R5 - DAC_CTRL3 */
	0x0190,     /* R6 - DAC_GAINL */
	0x0190,     /* R7 - DAC_GAINR */
	0x0000,     /* R8 - ZERO_DETECT */
};

static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
{
	switch (reg) {
	case WM8523_DEVICE_ID:
	case WM8523_REVISION:
		return 1;
	default:
		return 0;
	}
}

static int wm8523_reset(struct snd_soc_codec *codec)
{
	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
}

static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);

static const char *wm8523_zd_count_text[] = {
	"1024",
	"2048",
};

static const struct soc_enum wm8523_zc_count =
	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);

static const struct snd_kcontrol_new wm8523_controls[] = {
SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
		 0, 448, 0, dac_tlv),
SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
SOC_ENUM("Zero Detect Count", wm8523_zc_count),
};

static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
};

static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
	{ "LINEVOUTL", NULL, "DAC" },
	{ "LINEVOUTR", NULL, "DAC" },
};

static struct {
	int value;
	int ratio;
} lrclk_ratios[WM8523_NUM_RATES] = {
	{ 1, 128 },
	{ 2, 192 },
	{ 3, 256 },
	{ 4, 384 },
	{ 5, 512 },
	{ 6, 768 },
	{ 7, 1152 },
};

static int wm8523_startup(struct snd_pcm_substream *substream,
			  struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	/* The set of sample rates that can be supported depends on the
	 * MCLK supplied to the CODEC - enforce this.
	 */
	if (!wm8523->sysclk) {
		dev_err(codec->dev,
			"No MCLK configured, call set_sysclk() on init\n");
		return -EINVAL;
	}

	snd_pcm_hw_constraint_list(substream->runtime, 0,
				   SNDRV_PCM_HW_PARAM_RATE,
				   &wm8523->rate_constraint);

	return 0;
}

static int wm8523_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_codec *codec = rtd->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int i;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);

	/* Find a supported LRCLK ratio */
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		if (wm8523->sysclk / params_rate(params) ==
		    lrclk_ratios[i].ratio)
			break;
	}

	/* Should never happen, should be handled by constraints */
	if (i == ARRAY_SIZE(lrclk_ratios)) {
		dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
			wm8523->sysclk / params_rate(params));
		return -EINVAL;
	}

	aifctrl2 &= ~WM8523_SR_MASK;
	aifctrl2 |= lrclk_ratios[i].value;

	aifctrl1 &= ~WM8523_WL_MASK;
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S16_LE:
		break;
	case SNDRV_PCM_FORMAT_S20_3LE:
		aifctrl1 |= 0x8;
		break;
	case SNDRV_PCM_FORMAT_S24_LE:
		aifctrl1 |= 0x10;
		break;
	case SNDRV_PCM_FORMAT_S32_LE:
		aifctrl1 |= 0x18;
		break;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);

	return 0;
}

static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
		int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	unsigned int val;
	int i;

	wm8523->sysclk = freq;

	wm8523->rate_constraint.count = 0;
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		val = freq / lrclk_ratios[i].ratio;
		/* Check that it's a standard rate since core can't
		 * cope with others and having the odd rates confuses
		 * constraint matching.
		 */
		switch (val) {
		case 8000:
		case 11025:
		case 16000:
		case 22050:
		case 32000:
		case 44100:
		case 48000:
		case 64000:
		case 88200:
		case 96000:
		case 176400:
		case 192000:
			dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
				val);
			wm8523->rate_constraint_list[i] = val;
			wm8523->rate_constraint.count++;
			break;
		default:
			dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
				val);
		}
	}

	/* Need at least one supported rate... */
	if (wm8523->rate_constraint.count == 0)
		return -EINVAL;

	return 0;
}


static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
		unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);

	aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
		      WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		aifctrl1 |= WM8523_AIF_MSTR;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		aifctrl1 |= 0x0002;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		aifctrl1 |= 0x0001;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		aifctrl1 |= 0x0003;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		aifctrl1 |= 0x0023;
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		break;
	case SND_SOC_DAIFMT_IB_IF:
		aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
		break;
	case SND_SOC_DAIFMT_IB_NF:
		aifctrl1 |= WM8523_BCLK_INV;
		break;
	case SND_SOC_DAIFMT_NB_IF:
		aifctrl1 |= WM8523_LRCLK_INV;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);

	return 0;
}

static int wm8523_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	u16 *reg_cache = codec->reg_cache;
	int ret, i;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;

	case SND_SOC_BIAS_PREPARE:
		/* Full power on */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 3);
		break;

	case SND_SOC_BIAS_STANDBY:
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
			ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
						    wm8523->supplies);
			if (ret != 0) {
				dev_err(codec->dev,
					"Failed to enable supplies: %d\n",
					ret);
				return ret;
			}

			/* Initial power up */
			snd_soc_update_bits(codec, WM8523_PSCTRL1,
					    WM8523_SYS_ENA_MASK, 1);

			/* Sync back default/cached values */
			for (i = WM8523_AIF_CTRL1;
			     i < WM8523_MAX_REGISTER; i++)
				snd_soc_write(codec, i, reg_cache[i]);


			msleep(100);
		}

		/* Power up to mute */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 2);

		break;

	case SND_SOC_BIAS_OFF:
		/* The chip runs through the power down sequence for us. */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 0);
		msleep(100);

		regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
				       wm8523->supplies);
		break;
	}
	codec->dapm.bias_level = level;
	return 0;
}

#define WM8523_RATES SNDRV_PCM_RATE_8000_192000

#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

static const struct snd_soc_dai_ops wm8523_dai_ops = {
	.startup	= wm8523_startup,
	.hw_params	= wm8523_hw_params,
	.set_sysclk	= wm8523_set_dai_sysclk,
	.set_fmt	= wm8523_set_dai_fmt,
};

static struct snd_soc_dai_driver wm8523_dai = {
	.name = "wm8523-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,  /* Mono modes not yet supported */
		.channels_max = 2,
		.rates = WM8523_RATES,
		.formats = WM8523_FORMATS,
	},
	.ops = &wm8523_dai_ops,
};

#ifdef CONFIG_PM
static int wm8523_suspend(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static int wm8523_resume(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	return 0;
}
#else
#define wm8523_suspend NULL
#define wm8523_resume NULL
#endif

static int wm8523_probe(struct snd_soc_codec *codec)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int ret, i;

	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	wm8523->rate_constraint.count =
		ARRAY_SIZE(wm8523->rate_constraint_list);

	ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
		wm8523->supplies[i].supply = wm8523_supply_names[i];

	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
				 wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
		return ret;
	}

	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
				    wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
		goto err_get;
	}

	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read ID register\n");
		goto err_enable;
	}
	if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
		dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
		ret = -EINVAL;
		goto err_enable;
	}

	ret = snd_soc_read(codec, WM8523_REVISION);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read revision register\n");
		goto err_enable;
	}
	dev_info(codec->dev, "revision %c\n",
		 (ret & WM8523_CHIP_REV_MASK) + 'A');

	ret = wm8523_reset(codec);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to issue reset\n");
		goto err_enable;
	}

	/* Change some default settings - latch VU and enable ZC */
	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
			    WM8523_DACR_VU, WM8523_DACR_VU);
	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);

	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	/* Bias level configuration will have done an extra enable */
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	return 0;

err_enable:
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err_get:
	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	return ret;
}

static int wm8523_remove(struct snd_soc_codec *codec)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	.probe =	wm8523_probe,
	.remove =	wm8523_remove,
	.suspend =	wm8523_suspend,
	.resume =	wm8523_resume,
	.set_bias_level = wm8523_set_bias_level,
	.reg_cache_size = WM8523_REGISTER_COUNT,
	.reg_word_size = sizeof(u16),
	.reg_cache_default = wm8523_reg,
	.volatile_register = wm8523_volatile_register,

	.controls = wm8523_controls,
	.num_controls = ARRAY_SIZE(wm8523_controls),
	.dapm_widgets = wm8523_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
	.dapm_routes = wm8523_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
};

static const struct of_device_id wm8523_of_match[] = {
	{ .compatible = "wlf,wm8523" },
	{ },
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct wm8523_priv *wm8523;
	int ret;

	wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
	if (wm8523 == NULL)
		return -ENOMEM;

	i2c_set_clientdata(i2c, wm8523);
	wm8523->control_type = SND_SOC_I2C;

	ret =  snd_soc_register_codec(&i2c->dev,
			&soc_codec_dev_wm8523, &wm8523_dai, 1);
	if (ret < 0)
		kfree(wm8523);
	return ret;

}

static __devexit int wm8523_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	kfree(i2c_get_clientdata(client));
	return 0;
}

static const struct i2c_device_id wm8523_i2c_id[] = {
	{ "wm8523", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);

static struct i2c_driver wm8523_i2c_driver = {
	.driver = {
		.name = "wm8523",
		.owner = THIS_MODULE,
		.of_match_table = wm8523_of_match,
	},
	.probe =    wm8523_i2c_probe,
	.remove =   __devexit_p(wm8523_i2c_remove),
	.id_table = wm8523_i2c_id,
};
#endif

static int __init wm8523_modinit(void)
{
	int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&wm8523_i2c_driver);
	if (ret != 0) {
		printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
		       ret);
	}
#endif
	return 0;
}
module_init(wm8523_modinit);

static void __exit wm8523_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&wm8523_i2c_driver);
#endif
}
module_exit(wm8523_exit);

MODULE_DESCRIPTION("ASoC WM8523 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1dcf98ff MB	1	/*
	2	* wm8523.c -- WM8523 ALSA SoC Audio driver
	3	*
	4	* Copyright 2009 Wolfson Microelectronics plc
	5	*
	6	* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/pm.h>
	19	#include <linux/i2c.h>
1dcf98ff	20	#include <linux/regulator/consumer.h>
5a0e3ad6	21	#include <linux/slab.h>
bf5a85be	22	#include <linux/of_device.h>
1dcf98ff MB	23	#include <sound/core.h>
	24	#include <sound/pcm.h>
	25	#include <sound/pcm_params.h>
	26	#include <sound/soc.h>
1dcf98ff MB	27	#include <sound/initval.h>
	28	#include <sound/tlv.h>
	29
	30	#include "wm8523.h"
	31
1dcf98ff MB	32	#define WM8523_NUM_SUPPLIES 2
	33	static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	34	"AVDD",
	35	"LINEVDD",
	36	};
	37
	38	#define WM8523_NUM_RATES 7
	39
	40	/* codec private data */
	41	struct wm8523_priv {
f0fba2ad	42	enum snd_soc_control_type control_type;
1dcf98ff MB	43	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	44	unsigned int sysclk;
	45	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	46	struct snd_pcm_hw_constraint_list rate_constraint;
	47	};
	48
	49	static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
	50	0x8523, /* R0 - DEVICE_ID */
	51	0x0001, /* R1 - REVISION */
	52	0x0000, /* R2 - PSCTRL1 */
	53	0x1812, /* R3 - AIF_CTRL1 */
	54	0x0000, /* R4 - AIF_CTRL2 */
	55	0x0001, /* R5 - DAC_CTRL3 */
	56	0x0190, /* R6 - DAC_GAINL */
	57	0x0190, /* R7 - DAC_GAINR */
	58	0x0000, /* R8 - ZERO_DETECT */
	59	};
	60
d4754ec9	61	static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
1dcf98ff MB	62	{
	63	switch (reg) {
	64	case WM8523_DEVICE_ID:
	65	case WM8523_REVISION:
	66	return 1;
	67	default:
	68	return 0;
	69	}
	70	}
	71
1dcf98ff MB	72	static int wm8523_reset(struct snd_soc_codec *codec)
1dcf98ff MB	73	{
8d50e447	74	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
1dcf98ff MB	75	}
	76
	77	static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
	78
	79	static const char *wm8523_zd_count_text[] = {
	80	"1024",
	81	"2048",
	82	};
	83
	84	static const struct soc_enum wm8523_zc_count =
	85	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
	86
1661699a	87	static const struct snd_kcontrol_new wm8523_controls[] = {
1dcf98ff MB	88	SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
	89	0, 448, 0, dac_tlv),
	90	SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
	91	SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
	92	SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
	93	SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
	94	SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
	95	SOC_ENUM("Zero Detect Count", wm8523_zc_count),
	96	};
	97
	98	static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
	99	SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
	100	SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
	101	SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
	102	};
	103
1661699a	104	static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
1dcf98ff MB	105	{ "LINEVOUTL", NULL, "DAC" },
	106	{ "LINEVOUTR", NULL, "DAC" },
	107	};
	108
1dcf98ff MB	109	static struct {
	110	int value;
	111	int ratio;
	112	} lrclk_ratios[WM8523_NUM_RATES] = {
	113	{ 1, 128 },
	114	{ 2, 192 },
	115	{ 3, 256 },
	116	{ 4, 384 },
	117	{ 5, 512 },
	118	{ 6, 768 },
	119	{ 7, 1152 },
	120	};
	121
	122	static int wm8523_startup(struct snd_pcm_substream *substream,
	123	struct snd_soc_dai *dai)
	124	{
	125	struct snd_soc_codec *codec = dai->codec;
b2c812e2	126	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	127
	128	/* The set of sample rates that can be supported depends on the
	129	* MCLK supplied to the CODEC - enforce this.
	130	*/
	131	if (!wm8523->sysclk) {
	132	dev_err(codec->dev,
	133	"No MCLK configured, call set_sysclk() on init\n");
	134	return -EINVAL;
	135	}
	136
1dcf98ff MB	137	snd_pcm_hw_constraint_list(substream->runtime, 0,
	138	SNDRV_PCM_HW_PARAM_RATE,
	139	&wm8523->rate_constraint);
	140
	141	return 0;
	142	}
	143
	144	static int wm8523_hw_params(struct snd_pcm_substream *substream,
	145	struct snd_pcm_hw_params *params,
	146	struct snd_soc_dai *dai)
	147	{
	148	struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad	149	struct snd_soc_codec *codec = rtd->codec;
b2c812e2	150	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff	151	int i;
8d50e447 MB	152	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
8d50e447 MB	153	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
1dcf98ff MB	154
	155	/* Find a supported LRCLK ratio */
	156	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	157	if (wm8523->sysclk / params_rate(params) ==
	158	lrclk_ratios[i].ratio)
	159	break;
	160	}
	161
	162	/* Should never happen, should be handled by constraints */
	163	if (i == ARRAY_SIZE(lrclk_ratios)) {
	164	dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
	165	wm8523->sysclk / params_rate(params));
	166	return -EINVAL;
	167	}
	168
	169	aifctrl2 &= ~WM8523_SR_MASK;
	170	aifctrl2 \|= lrclk_ratios[i].value;
	171
	172	aifctrl1 &= ~WM8523_WL_MASK;
	173	switch (params_format(params)) {
	174	case SNDRV_PCM_FORMAT_S16_LE:
	175	break;
	176	case SNDRV_PCM_FORMAT_S20_3LE:
	177	aifctrl1 \|= 0x8;
	178	break;
	179	case SNDRV_PCM_FORMAT_S24_LE:
	180	aifctrl1 \|= 0x10;
	181	break;
	182	case SNDRV_PCM_FORMAT_S32_LE:
	183	aifctrl1 \|= 0x18;
	184	break;
	185	}
	186
8d50e447 MB	187	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
8d50e447 MB	188	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
1dcf98ff MB	189
	190	return 0;
	191	}
	192
	193	static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
	194	int clk_id, unsigned int freq, int dir)
	195	{
	196	struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2	197	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	198	unsigned int val;
	199	int i;
	200
	201	wm8523->sysclk = freq;
	202
	203	wm8523->rate_constraint.count = 0;
	204	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	205	val = freq / lrclk_ratios[i].ratio;
	206	/* Check that it's a standard rate since core can't
	207	* cope with others and having the odd rates confuses
	208	* constraint matching.
	209	*/
	210	switch (val) {
	211	case 8000:
	212	case 11025:
	213	case 16000:
	214	case 22050:
	215	case 32000:
	216	case 44100:
	217	case 48000:
	218	case 64000:
	219	case 88200:
	220	case 96000:
	221	case 176400:
	222	case 192000:
	223	dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
	224	val);
	225	wm8523->rate_constraint_list[i] = val;
	226	wm8523->rate_constraint.count++;
	227	break;
	228	default:
	229	dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
	230	val);
	231	}
	232	}
	233
	234	/* Need at least one supported rate... */
	235	if (wm8523->rate_constraint.count == 0)
	236	return -EINVAL;
	237
	238	return 0;
	239	}
	240
	241
	242	static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
	243	unsigned int fmt)
	244	{
	245	struct snd_soc_codec *codec = codec_dai->codec;
8d50e447	246	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
1dcf98ff MB	247
	248	aifctrl1 &= ~(WM8523_BCLK_INV_MASK \| WM8523_LRCLK_INV_MASK \|
	249	WM8523_FMT_MASK \| WM8523_AIF_MSTR_MASK);
	250
	251	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	252	case SND_SOC_DAIFMT_CBM_CFM:
	253	aifctrl1 \|= WM8523_AIF_MSTR;
	254	break;
	255	case SND_SOC_DAIFMT_CBS_CFS:
	256	break;
	257	default:
	258	return -EINVAL;
	259	}
	260
	261	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	262	case SND_SOC_DAIFMT_I2S:
	263	aifctrl1 \|= 0x0002;
	264	break;
	265	case SND_SOC_DAIFMT_RIGHT_J:
	266	break;
	267	case SND_SOC_DAIFMT_LEFT_J:
	268	aifctrl1 \|= 0x0001;
	269	break;
	270	case SND_SOC_DAIFMT_DSP_A:
	271	aifctrl1 \|= 0x0003;
	272	break;
	273	case SND_SOC_DAIFMT_DSP_B:
	274	aifctrl1 \|= 0x0023;
	275	break;
	276	default:
	277	return -EINVAL;
	278	}
	279
	280	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	281	case SND_SOC_DAIFMT_NB_NF:
	282	break;
	283	case SND_SOC_DAIFMT_IB_IF:
	284	aifctrl1 \|= WM8523_BCLK_INV \| WM8523_LRCLK_INV;
	285	break;
	286	case SND_SOC_DAIFMT_IB_NF:
	287	aifctrl1 \|= WM8523_BCLK_INV;
	288	break;
	289	case SND_SOC_DAIFMT_NB_IF:
	290	aifctrl1 \|= WM8523_LRCLK_INV;
	291	break;
	292	default:
	293	return -EINVAL;
	294	}
	295
8d50e447	296	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
1dcf98ff MB	297
	298	return 0;
	299	}
	300
	301	static int wm8523_set_bias_level(struct snd_soc_codec *codec,
	302	enum snd_soc_bias_level level)
	303	{
b2c812e2	304	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
beebca31	305	u16 *reg_cache = codec->reg_cache;
1dcf98ff MB	306	int ret, i;
	307
	308	switch (level) {
	309	case SND_SOC_BIAS_ON:
	310	break;
	311
	312	case SND_SOC_BIAS_PREPARE:
	313	/* Full power on */
	314	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	315	WM8523_SYS_ENA_MASK, 3);
	316	break;
	317
	318	case SND_SOC_BIAS_STANDBY:
ce6120cc	319	if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1dcf98ff MB	320	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	321	wm8523->supplies);
	322	if (ret != 0) {
	323	dev_err(codec->dev,
	324	"Failed to enable supplies: %d\n",
	325	ret);
	326	return ret;
	327	}
	328
	329	/* Initial power up */
	330	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	331	WM8523_SYS_ENA_MASK, 1);
	332
	333	/* Sync back default/cached values */
	334	for (i = WM8523_AIF_CTRL1;
	335	i < WM8523_MAX_REGISTER; i++)
beebca31	336	snd_soc_write(codec, i, reg_cache[i]);
1dcf98ff MB	337
	338
	339	msleep(100);
	340	}
	341
	342	/* Power up to mute */
	343	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	344	WM8523_SYS_ENA_MASK, 2);
	345
	346	break;
	347
	348	case SND_SOC_BIAS_OFF:
	349	/* The chip runs through the power down sequence for us. */
	350	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	351	WM8523_SYS_ENA_MASK, 0);
	352	msleep(100);
	353
	354	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
	355	wm8523->supplies);
	356	break;
	357	}
ce6120cc	358	codec->dapm.bias_level = level;
1dcf98ff MB	359	return 0;
	360	}
	361
	362	#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
	363
	364	#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S20_3LE \|\
	365	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S32_LE)
	366
85e7652d	367	static const struct snd_soc_dai_ops wm8523_dai_ops = {
1dcf98ff MB	368	.startup = wm8523_startup,
	369	.hw_params = wm8523_hw_params,
	370	.set_sysclk = wm8523_set_dai_sysclk,
	371	.set_fmt = wm8523_set_dai_fmt,
	372	};
	373
f0fba2ad LG	374	static struct snd_soc_dai_driver wm8523_dai = {
f0fba2ad LG	375	.name = "wm8523-hifi",
1dcf98ff MB	376	.playback = {
	377	.stream_name = "Playback",
	378	.channels_min = 2, /* Mono modes not yet supported */
	379	.channels_max = 2,
	380	.rates = WM8523_RATES,
	381	.formats = WM8523_FORMATS,
	382	},
	383	.ops = &wm8523_dai_ops,
	384	};
1dcf98ff MB	385
1dcf98ff MB	386	#ifdef CONFIG_PM
84b315ee	387	static int wm8523_suspend(struct snd_soc_codec *codec)
1dcf98ff	388	{
1dcf98ff MB	389	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	390	return 0;
	391	}
	392
f0fba2ad	393	static int wm8523_resume(struct snd_soc_codec *codec)
1dcf98ff	394	{
1dcf98ff	395	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1dcf98ff MB	396	return 0;
	397	}
	398	#else
	399	#define wm8523_suspend NULL
	400	#define wm8523_resume NULL
	401	#endif
	402
f0fba2ad	403	static int wm8523_probe(struct snd_soc_codec *codec)
1dcf98ff	404	{
f0fba2ad LG	405	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
f0fba2ad LG	406	int ret, i;
1dcf98ff MB	407
	408	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	409	wm8523->rate_constraint.count =
	410	ARRAY_SIZE(wm8523->rate_constraint_list);
	411
f0fba2ad	412	ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
8d50e447 MB	413	if (ret != 0) {
8d50e447 MB	414	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad	415	return ret;
8d50e447 MB	416	}
8d50e447 MB	417
1dcf98ff MB	418	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
	419	wm8523->supplies[i].supply = wm8523_supply_names[i];
	420
	421	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
	422	wm8523->supplies);
	423	if (ret != 0) {
	424	dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
f0fba2ad	425	return ret;
1dcf98ff MB	426	}
	427
	428	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	429	wm8523->supplies);
	430	if (ret != 0) {
	431	dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
	432	goto err_get;
	433	}
	434
8d50e447	435	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
1dcf98ff MB	436	if (ret < 0) {
	437	dev_err(codec->dev, "Failed to read ID register\n");
	438	goto err_enable;
	439	}
	440	if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
	441	dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
	442	ret = -EINVAL;
	443	goto err_enable;
	444	}
	445
8d50e447	446	ret = snd_soc_read(codec, WM8523_REVISION);
1dcf98ff MB	447	if (ret < 0) {
	448	dev_err(codec->dev, "Failed to read revision register\n");
	449	goto err_enable;
	450	}
	451	dev_info(codec->dev, "revision %c\n",
	452	(ret & WM8523_CHIP_REV_MASK) + 'A');
	453
	454	ret = wm8523_reset(codec);
	455	if (ret < 0) {
	456	dev_err(codec->dev, "Failed to issue reset\n");
	457	goto err_enable;
	458	}
	459
1dcf98ff	460	/* Change some default settings - latch VU and enable ZC */
a1b3b5ee MB	461	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
	462	WM8523_DACR_VU, WM8523_DACR_VU);
	463	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
1dcf98ff MB	464
	465	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	466
	467	/* Bias level configuration will have done an extra enable */
	468	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	469
1dcf98ff MB	470	return 0;
	471
	472	err_enable:
	473	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	474	err_get:
	475	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
f0fba2ad	476
1dcf98ff MB	477	return ret;
	478	}
	479
f0fba2ad	480	static int wm8523_remove(struct snd_soc_codec *codec)
1dcf98ff	481	{
f0fba2ad LG	482	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	483
	484	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
1dcf98ff	485	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
f0fba2ad	486	return 0;
1dcf98ff MB	487	}
1dcf98ff MB	488
f0fba2ad LG	489	static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	490	.probe = wm8523_probe,
	491	.remove = wm8523_remove,
	492	.suspend = wm8523_suspend,
	493	.resume = wm8523_resume,
	494	.set_bias_level = wm8523_set_bias_level,
	495	.reg_cache_size = WM8523_REGISTER_COUNT,
	496	.reg_word_size = sizeof(u16),
	497	.reg_cache_default = wm8523_reg,
	498	.volatile_register = wm8523_volatile_register,
1661699a MB	499
	500	.controls = wm8523_controls,
	501	.num_controls = ARRAY_SIZE(wm8523_controls),
	502	.dapm_widgets = wm8523_dapm_widgets,
	503	.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
	504	.dapm_routes = wm8523_dapm_routes,
	505	.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
f0fba2ad LG	506	};
f0fba2ad LG	507
bf5a85be MB	508	static const struct of_device_id wm8523_of_match[] = {
	509	{ .compatible = "wlf,wm8523" },
	510	{ },
	511	};
	512
1dcf98ff MB	513	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	514	static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
	515	const struct i2c_device_id *id)
	516	{
	517	struct wm8523_priv *wm8523;
f0fba2ad	518	int ret;
1dcf98ff MB	519
	520	wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
	521	if (wm8523 == NULL)
	522	return -ENOMEM;
	523
1dcf98ff	524	i2c_set_clientdata(i2c, wm8523);
f0fba2ad	525	wm8523->control_type = SND_SOC_I2C;
1dcf98ff	526
f0fba2ad LG	527	ret = snd_soc_register_codec(&i2c->dev,
	528	&soc_codec_dev_wm8523, &wm8523_dai, 1);
	529	if (ret < 0)
	530	kfree(wm8523);
	531	return ret;
1dcf98ff	532
1dcf98ff MB	533	}
	534
	535	static __devexit int wm8523_i2c_remove(struct i2c_client *client)
	536	{
f0fba2ad LG	537	snd_soc_unregister_codec(&client->dev);
f0fba2ad LG	538	kfree(i2c_get_clientdata(client));
1dcf98ff MB	539	return 0;
	540	}
	541
1dcf98ff MB	542	static const struct i2c_device_id wm8523_i2c_id[] = {
	543	{ "wm8523", 0 },
	544	{ }
	545	};
	546	MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
	547
	548	static struct i2c_driver wm8523_i2c_driver = {
	549	.driver = {
9665408e	550	.name = "wm8523",
1dcf98ff	551	.owner = THIS_MODULE,
bf5a85be	552	.of_match_table = wm8523_of_match,
1dcf98ff MB	553	},
	554	.probe = wm8523_i2c_probe,
	555	.remove = __devexit_p(wm8523_i2c_remove),
1dcf98ff MB	556	.id_table = wm8523_i2c_id,
	557	};
	558	#endif
	559
	560	static int __init wm8523_modinit(void)
	561	{
	562	int ret;
	563	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	564	ret = i2c_add_driver(&wm8523_i2c_driver);
	565	if (ret != 0) {
	566	printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
	567	ret);
	568	}
	569	#endif
	570	return 0;
	571	}
	572	module_init(wm8523_modinit);
	573
	574	static void __exit wm8523_exit(void)
	575	{
	576	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	577	i2c_del_driver(&wm8523_i2c_driver);
	578	#endif
	579	}
	580	module_exit(wm8523_exit);
	581
	582	MODULE_DESCRIPTION("ASoC WM8523 driver");
	583	MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
	584	MODULE_LICENSE("GPL");