[deliverable/linux.git] / sound / soc / codecs / wm8523.c

/*
 * wm8523.c  --  WM8523 ALSA SoC Audio driver
 *
 * Copyright 2009 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#include "wm8523.h"

#define WM8523_NUM_SUPPLIES 2
static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	"AVDD",
	"LINEVDD",
};

#define WM8523_NUM_RATES 7

/* codec private data */
struct wm8523_priv {
	enum snd_soc_control_type control_type;
	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	unsigned int sysclk;
	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	struct snd_pcm_hw_constraint_list rate_constraint;
};

static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
	0x8523,     /* R0 - DEVICE_ID */
	0x0001,     /* R1 - REVISION */
	0x0000,     /* R2 - PSCTRL1 */
	0x1812,     /* R3 - AIF_CTRL1 */
	0x0000,     /* R4 - AIF_CTRL2 */
	0x0001,     /* R5 - DAC_CTRL3 */
	0x0190,     /* R6 - DAC_GAINL */
	0x0190,     /* R7 - DAC_GAINR */
	0x0000,     /* R8 - ZERO_DETECT */
};

static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
{
	switch (reg) {
	case WM8523_DEVICE_ID:
	case WM8523_REVISION:
		return 1;
	default:
		return 0;
	}
}

static int wm8523_reset(struct snd_soc_codec *codec)
{
	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
}

static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);

static const char *wm8523_zd_count_text[] = {
	"1024",
	"2048",
};

static const struct soc_enum wm8523_zc_count =
	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);

static const struct snd_kcontrol_new wm8523_snd_controls[] = {
SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
		 0, 448, 0, dac_tlv),
SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
SOC_ENUM("Zero Detect Count", wm8523_zc_count),
};

static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
};

static const struct snd_soc_dapm_route intercon[] = {
	{ "LINEVOUTL", NULL, "DAC" },
	{ "LINEVOUTR", NULL, "DAC" },
};

static int wm8523_add_widgets(struct snd_soc_codec *codec)
{
	struct snd_soc_dapm_context *dapm = &codec->dapm;

	snd_soc_dapm_new_controls(dapm, wm8523_dapm_widgets,
				  ARRAY_SIZE(wm8523_dapm_widgets));
	snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));

	return 0;
}

static struct {
	int value;
	int ratio;
} lrclk_ratios[WM8523_NUM_RATES] = {
	{ 1, 128 },
	{ 2, 192 },
	{ 3, 256 },
	{ 4, 384 },
	{ 5, 512 },
	{ 6, 768 },
	{ 7, 1152 },
};

static int wm8523_startup(struct snd_pcm_substream *substream,
			  struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	/* The set of sample rates that can be supported depends on the
	 * MCLK supplied to the CODEC - enforce this.
	 */
	if (!wm8523->sysclk) {
		dev_err(codec->dev,
			"No MCLK configured, call set_sysclk() on init\n");
		return -EINVAL;
	}

	snd_pcm_hw_constraint_list(substream->runtime, 0,
				   SNDRV_PCM_HW_PARAM_RATE,
				   &wm8523->rate_constraint);

	return 0;
}

static int wm8523_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_codec *codec = rtd->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int i;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);

	/* Find a supported LRCLK ratio */
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		if (wm8523->sysclk / params_rate(params) ==
		    lrclk_ratios[i].ratio)
			break;
	}

	/* Should never happen, should be handled by constraints */
	if (i == ARRAY_SIZE(lrclk_ratios)) {
		dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
			wm8523->sysclk / params_rate(params));
		return -EINVAL;
	}

	aifctrl2 &= ~WM8523_SR_MASK;
	aifctrl2 |= lrclk_ratios[i].value;

	aifctrl1 &= ~WM8523_WL_MASK;
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S16_LE:
		break;
	case SNDRV_PCM_FORMAT_S20_3LE:
		aifctrl1 |= 0x8;
		break;
	case SNDRV_PCM_FORMAT_S24_LE:
		aifctrl1 |= 0x10;
		break;
	case SNDRV_PCM_FORMAT_S32_LE:
		aifctrl1 |= 0x18;
		break;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);

	return 0;
}

static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
		int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	unsigned int val;
	int i;

	wm8523->sysclk = freq;

	wm8523->rate_constraint.count = 0;
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		val = freq / lrclk_ratios[i].ratio;
		/* Check that it's a standard rate since core can't
		 * cope with others and having the odd rates confuses
		 * constraint matching.
		 */
		switch (val) {
		case 8000:
		case 11025:
		case 16000:
		case 22050:
		case 32000:
		case 44100:
		case 48000:
		case 64000:
		case 88200:
		case 96000:
		case 176400:
		case 192000:
			dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
				val);
			wm8523->rate_constraint_list[i] = val;
			wm8523->rate_constraint.count++;
			break;
		default:
			dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
				val);
		}
	}

	/* Need at least one supported rate... */
	if (wm8523->rate_constraint.count == 0)
		return -EINVAL;

	return 0;
}


static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
		unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);

	aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
		      WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		aifctrl1 |= WM8523_AIF_MSTR;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		aifctrl1 |= 0x0002;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		aifctrl1 |= 0x0001;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		aifctrl1 |= 0x0003;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		aifctrl1 |= 0x0023;
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		break;
	case SND_SOC_DAIFMT_IB_IF:
		aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
		break;
	case SND_SOC_DAIFMT_IB_NF:
		aifctrl1 |= WM8523_BCLK_INV;
		break;
	case SND_SOC_DAIFMT_NB_IF:
		aifctrl1 |= WM8523_LRCLK_INV;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);

	return 0;
}

static int wm8523_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	u16 *reg_cache = codec->reg_cache;
	int ret, i;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;

	case SND_SOC_BIAS_PREPARE:
		/* Full power on */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 3);
		break;

	case SND_SOC_BIAS_STANDBY:
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
			ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
						    wm8523->supplies);
			if (ret != 0) {
				dev_err(codec->dev,
					"Failed to enable supplies: %d\n",
					ret);
				return ret;
			}

			/* Initial power up */
			snd_soc_update_bits(codec, WM8523_PSCTRL1,
					    WM8523_SYS_ENA_MASK, 1);

			/* Sync back default/cached values */
			for (i = WM8523_AIF_CTRL1;
			     i < WM8523_MAX_REGISTER; i++)
				snd_soc_write(codec, i, reg_cache[i]);


			msleep(100);
		}

		/* Power up to mute */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 2);

		break;

	case SND_SOC_BIAS_OFF:
		/* The chip runs through the power down sequence for us. */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 0);
		msleep(100);

		regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
				       wm8523->supplies);
		break;
	}
	codec->dapm.bias_level = level;
	return 0;
}

#define WM8523_RATES SNDRV_PCM_RATE_8000_192000

#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

static struct snd_soc_dai_ops wm8523_dai_ops = {
	.startup	= wm8523_startup,
	.hw_params	= wm8523_hw_params,
	.set_sysclk	= wm8523_set_dai_sysclk,
	.set_fmt	= wm8523_set_dai_fmt,
};

static struct snd_soc_dai_driver wm8523_dai = {
	.name = "wm8523-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,  /* Mono modes not yet supported */
		.channels_max = 2,
		.rates = WM8523_RATES,
		.formats = WM8523_FORMATS,
	},
	.ops = &wm8523_dai_ops,
};

#ifdef CONFIG_PM
static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static int wm8523_resume(struct snd_soc_codec *codec)
{
	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	return 0;
}
#else
#define wm8523_suspend NULL
#define wm8523_resume NULL
#endif

static int wm8523_probe(struct snd_soc_codec *codec)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	int ret, i;

	codec->hw_write = (hw_write_t)i2c_master_send;
	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	wm8523->rate_constraint.count =
		ARRAY_SIZE(wm8523->rate_constraint_list);

	ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
		wm8523->supplies[i].supply = wm8523_supply_names[i];

	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
				 wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
		return ret;
	}

	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
				    wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
		goto err_get;
	}

	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read ID register\n");
		goto err_enable;
	}
	if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
		dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
		ret = -EINVAL;
		goto err_enable;
	}

	ret = snd_soc_read(codec, WM8523_REVISION);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read revision register\n");
		goto err_enable;
	}
	dev_info(codec->dev, "revision %c\n",
		 (ret & WM8523_CHIP_REV_MASK) + 'A');

	ret = wm8523_reset(codec);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to issue reset\n");
		goto err_enable;
	}

	/* Change some default settings - latch VU and enable ZC */
	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
			    WM8523_DACR_VU, WM8523_DACR_VU);
	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);

	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	/* Bias level configuration will have done an extra enable */
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	snd_soc_add_controls(codec, wm8523_snd_controls,
			     ARRAY_SIZE(wm8523_snd_controls));
	wm8523_add_widgets(codec);

	return 0;

err_enable:
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err_get:
	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	return ret;
}

static int wm8523_remove(struct snd_soc_codec *codec)
{
	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);

	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	.probe =	wm8523_probe,
	.remove =	wm8523_remove,
	.suspend =	wm8523_suspend,
	.resume =	wm8523_resume,
	.set_bias_level = wm8523_set_bias_level,
	.reg_cache_size = WM8523_REGISTER_COUNT,
	.reg_word_size = sizeof(u16),
	.reg_cache_default = wm8523_reg,
	.volatile_register = wm8523_volatile_register,
};

static const struct of_device_id wm8523_of_match[] = {
	{ .compatible = "wlf,wm8523" },
	{ },
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct wm8523_priv *wm8523;
	int ret;

	wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
	if (wm8523 == NULL)
		return -ENOMEM;

	i2c_set_clientdata(i2c, wm8523);
	wm8523->control_type = SND_SOC_I2C;

	ret =  snd_soc_register_codec(&i2c->dev,
			&soc_codec_dev_wm8523, &wm8523_dai, 1);
	if (ret < 0)
		kfree(wm8523);
	return ret;

}

static __devexit int wm8523_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	kfree(i2c_get_clientdata(client));
	return 0;
}

static const struct i2c_device_id wm8523_i2c_id[] = {
	{ "wm8523", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);

static struct i2c_driver wm8523_i2c_driver = {
	.driver = {
		.name = "wm8523",
		.owner = THIS_MODULE,
		.of_match_table = wm8523_of_match,
	},
	.probe =    wm8523_i2c_probe,
	.remove =   __devexit_p(wm8523_i2c_remove),
	.id_table = wm8523_i2c_id,
};
#endif

static int __init wm8523_modinit(void)
{
	int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&wm8523_i2c_driver);
	if (ret != 0) {
		printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
		       ret);
	}
#endif
	return 0;
}
module_init(wm8523_modinit);

static void __exit wm8523_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&wm8523_i2c_driver);
#endif
}
module_exit(wm8523_exit);

MODULE_DESCRIPTION("ASoC WM8523 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1dcf98ff MB	1	/*
	2	* wm8523.c -- WM8523 ALSA SoC Audio driver
	3	*
	4	* Copyright 2009 Wolfson Microelectronics plc
	5	*
	6	* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/pm.h>
	19	#include <linux/i2c.h>
	20	#include <linux/platform_device.h>
	21	#include <linux/regulator/consumer.h>
5a0e3ad6	22	#include <linux/slab.h>
bf5a85be	23	#include <linux/of_device.h>
1dcf98ff MB	24	#include <sound/core.h>
	25	#include <sound/pcm.h>
	26	#include <sound/pcm_params.h>
	27	#include <sound/soc.h>
1dcf98ff MB	28	#include <sound/initval.h>
	29	#include <sound/tlv.h>
	30
	31	#include "wm8523.h"
	32
1dcf98ff MB	33	#define WM8523_NUM_SUPPLIES 2
	34	static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	35	"AVDD",
	36	"LINEVDD",
	37	};
	38
	39	#define WM8523_NUM_RATES 7
	40
	41	/* codec private data */
	42	struct wm8523_priv {
f0fba2ad	43	enum snd_soc_control_type control_type;
1dcf98ff MB	44	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	45	unsigned int sysclk;
	46	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	47	struct snd_pcm_hw_constraint_list rate_constraint;
	48	};
	49
	50	static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
	51	0x8523, /* R0 - DEVICE_ID */
	52	0x0001, /* R1 - REVISION */
	53	0x0000, /* R2 - PSCTRL1 */
	54	0x1812, /* R3 - AIF_CTRL1 */
	55	0x0000, /* R4 - AIF_CTRL2 */
	56	0x0001, /* R5 - DAC_CTRL3 */
	57	0x0190, /* R6 - DAC_GAINL */
	58	0x0190, /* R7 - DAC_GAINR */
	59	0x0000, /* R8 - ZERO_DETECT */
	60	};
	61
d4754ec9	62	static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
1dcf98ff MB	63	{
	64	switch (reg) {
	65	case WM8523_DEVICE_ID:
	66	case WM8523_REVISION:
	67	return 1;
	68	default:
	69	return 0;
	70	}
	71	}
	72
1dcf98ff MB	73	static int wm8523_reset(struct snd_soc_codec *codec)
1dcf98ff MB	74	{
8d50e447	75	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
1dcf98ff MB	76	}
	77
	78	static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
	79
	80	static const char *wm8523_zd_count_text[] = {
	81	"1024",
	82	"2048",
	83	};
	84
	85	static const struct soc_enum wm8523_zc_count =
	86	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
	87
	88	static const struct snd_kcontrol_new wm8523_snd_controls[] = {
	89	SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
	90	0, 448, 0, dac_tlv),
	91	SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
	92	SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
	93	SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
	94	SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
	95	SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
	96	SOC_ENUM("Zero Detect Count", wm8523_zc_count),
	97	};
	98
	99	static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
	100	SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
	101	SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
	102	SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
	103	};
	104
	105	static const struct snd_soc_dapm_route intercon[] = {
	106	{ "LINEVOUTL", NULL, "DAC" },
	107	{ "LINEVOUTR", NULL, "DAC" },
	108	};
	109
	110	static int wm8523_add_widgets(struct snd_soc_codec *codec)
	111	{
ce6120cc	112	struct snd_soc_dapm_context *dapm = &codec->dapm;
1dcf98ff	113
ce6120cc LG	114	snd_soc_dapm_new_controls(dapm, wm8523_dapm_widgets,
	115	ARRAY_SIZE(wm8523_dapm_widgets));
	116	snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1dcf98ff	117
1dcf98ff MB	118	return 0;
	119	}
	120
	121	static struct {
	122	int value;
	123	int ratio;
	124	} lrclk_ratios[WM8523_NUM_RATES] = {
	125	{ 1, 128 },
	126	{ 2, 192 },
	127	{ 3, 256 },
	128	{ 4, 384 },
	129	{ 5, 512 },
	130	{ 6, 768 },
	131	{ 7, 1152 },
	132	};
	133
	134	static int wm8523_startup(struct snd_pcm_substream *substream,
	135	struct snd_soc_dai *dai)
	136	{
	137	struct snd_soc_codec *codec = dai->codec;
b2c812e2	138	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	139
	140	/* The set of sample rates that can be supported depends on the
	141	* MCLK supplied to the CODEC - enforce this.
	142	*/
	143	if (!wm8523->sysclk) {
	144	dev_err(codec->dev,
	145	"No MCLK configured, call set_sysclk() on init\n");
	146	return -EINVAL;
	147	}
	148
1dcf98ff MB	149	snd_pcm_hw_constraint_list(substream->runtime, 0,
	150	SNDRV_PCM_HW_PARAM_RATE,
	151	&wm8523->rate_constraint);
	152
	153	return 0;
	154	}
	155
	156	static int wm8523_hw_params(struct snd_pcm_substream *substream,
	157	struct snd_pcm_hw_params *params,
	158	struct snd_soc_dai *dai)
	159	{
	160	struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad	161	struct snd_soc_codec *codec = rtd->codec;
b2c812e2	162	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff	163	int i;
8d50e447 MB	164	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
8d50e447 MB	165	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
1dcf98ff MB	166
	167	/* Find a supported LRCLK ratio */
	168	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	169	if (wm8523->sysclk / params_rate(params) ==
	170	lrclk_ratios[i].ratio)
	171	break;
	172	}
	173
	174	/* Should never happen, should be handled by constraints */
	175	if (i == ARRAY_SIZE(lrclk_ratios)) {
	176	dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
	177	wm8523->sysclk / params_rate(params));
	178	return -EINVAL;
	179	}
	180
	181	aifctrl2 &= ~WM8523_SR_MASK;
	182	aifctrl2 \|= lrclk_ratios[i].value;
	183
	184	aifctrl1 &= ~WM8523_WL_MASK;
	185	switch (params_format(params)) {
	186	case SNDRV_PCM_FORMAT_S16_LE:
	187	break;
	188	case SNDRV_PCM_FORMAT_S20_3LE:
	189	aifctrl1 \|= 0x8;
	190	break;
	191	case SNDRV_PCM_FORMAT_S24_LE:
	192	aifctrl1 \|= 0x10;
	193	break;
	194	case SNDRV_PCM_FORMAT_S32_LE:
	195	aifctrl1 \|= 0x18;
	196	break;
	197	}
	198
8d50e447 MB	199	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
8d50e447 MB	200	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
1dcf98ff MB	201
	202	return 0;
	203	}
	204
	205	static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
	206	int clk_id, unsigned int freq, int dir)
	207	{
	208	struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2	209	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
1dcf98ff MB	210	unsigned int val;
	211	int i;
	212
	213	wm8523->sysclk = freq;
	214
	215	wm8523->rate_constraint.count = 0;
	216	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	217	val = freq / lrclk_ratios[i].ratio;
	218	/* Check that it's a standard rate since core can't
	219	* cope with others and having the odd rates confuses
	220	* constraint matching.
	221	*/
	222	switch (val) {
	223	case 8000:
	224	case 11025:
	225	case 16000:
	226	case 22050:
	227	case 32000:
	228	case 44100:
	229	case 48000:
	230	case 64000:
	231	case 88200:
	232	case 96000:
	233	case 176400:
	234	case 192000:
	235	dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
	236	val);
	237	wm8523->rate_constraint_list[i] = val;
	238	wm8523->rate_constraint.count++;
	239	break;
	240	default:
	241	dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
	242	val);
	243	}
	244	}
	245
	246	/* Need at least one supported rate... */
	247	if (wm8523->rate_constraint.count == 0)
	248	return -EINVAL;
	249
	250	return 0;
	251	}
	252
	253
	254	static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
	255	unsigned int fmt)
	256	{
	257	struct snd_soc_codec *codec = codec_dai->codec;
8d50e447	258	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
1dcf98ff MB	259
	260	aifctrl1 &= ~(WM8523_BCLK_INV_MASK \| WM8523_LRCLK_INV_MASK \|
	261	WM8523_FMT_MASK \| WM8523_AIF_MSTR_MASK);
	262
	263	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	264	case SND_SOC_DAIFMT_CBM_CFM:
	265	aifctrl1 \|= WM8523_AIF_MSTR;
	266	break;
	267	case SND_SOC_DAIFMT_CBS_CFS:
	268	break;
	269	default:
	270	return -EINVAL;
	271	}
	272
	273	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	274	case SND_SOC_DAIFMT_I2S:
	275	aifctrl1 \|= 0x0002;
	276	break;
	277	case SND_SOC_DAIFMT_RIGHT_J:
	278	break;
	279	case SND_SOC_DAIFMT_LEFT_J:
	280	aifctrl1 \|= 0x0001;
	281	break;
	282	case SND_SOC_DAIFMT_DSP_A:
	283	aifctrl1 \|= 0x0003;
	284	break;
	285	case SND_SOC_DAIFMT_DSP_B:
	286	aifctrl1 \|= 0x0023;
	287	break;
	288	default:
	289	return -EINVAL;
	290	}
	291
	292	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	293	case SND_SOC_DAIFMT_NB_NF:
	294	break;
	295	case SND_SOC_DAIFMT_IB_IF:
	296	aifctrl1 \|= WM8523_BCLK_INV \| WM8523_LRCLK_INV;
	297	break;
	298	case SND_SOC_DAIFMT_IB_NF:
	299	aifctrl1 \|= WM8523_BCLK_INV;
	300	break;
	301	case SND_SOC_DAIFMT_NB_IF:
	302	aifctrl1 \|= WM8523_LRCLK_INV;
	303	break;
	304	default:
	305	return -EINVAL;
	306	}
	307
8d50e447	308	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
1dcf98ff MB	309
	310	return 0;
	311	}
	312
	313	static int wm8523_set_bias_level(struct snd_soc_codec *codec,
	314	enum snd_soc_bias_level level)
	315	{
b2c812e2	316	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
beebca31	317	u16 *reg_cache = codec->reg_cache;
1dcf98ff MB	318	int ret, i;
	319
	320	switch (level) {
	321	case SND_SOC_BIAS_ON:
	322	break;
	323
	324	case SND_SOC_BIAS_PREPARE:
	325	/* Full power on */
	326	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	327	WM8523_SYS_ENA_MASK, 3);
	328	break;
	329
	330	case SND_SOC_BIAS_STANDBY:
ce6120cc	331	if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1dcf98ff MB	332	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	333	wm8523->supplies);
	334	if (ret != 0) {
	335	dev_err(codec->dev,
	336	"Failed to enable supplies: %d\n",
	337	ret);
	338	return ret;
	339	}
	340
	341	/* Initial power up */
	342	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	343	WM8523_SYS_ENA_MASK, 1);
	344
	345	/* Sync back default/cached values */
	346	for (i = WM8523_AIF_CTRL1;
	347	i < WM8523_MAX_REGISTER; i++)
beebca31	348	snd_soc_write(codec, i, reg_cache[i]);
1dcf98ff MB	349
	350
	351	msleep(100);
	352	}
	353
	354	/* Power up to mute */
	355	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	356	WM8523_SYS_ENA_MASK, 2);
	357
	358	break;
	359
	360	case SND_SOC_BIAS_OFF:
	361	/* The chip runs through the power down sequence for us. */
	362	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	363	WM8523_SYS_ENA_MASK, 0);
	364	msleep(100);
	365
	366	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
	367	wm8523->supplies);
	368	break;
	369	}
ce6120cc	370	codec->dapm.bias_level = level;
1dcf98ff MB	371	return 0;
	372	}
	373
	374	#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
	375
	376	#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S20_3LE \|\
	377	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S32_LE)
	378
	379	static struct snd_soc_dai_ops wm8523_dai_ops = {
	380	.startup = wm8523_startup,
	381	.hw_params = wm8523_hw_params,
	382	.set_sysclk = wm8523_set_dai_sysclk,
	383	.set_fmt = wm8523_set_dai_fmt,
	384	};
	385
f0fba2ad LG	386	static struct snd_soc_dai_driver wm8523_dai = {
f0fba2ad LG	387	.name = "wm8523-hifi",
1dcf98ff MB	388	.playback = {
	389	.stream_name = "Playback",
	390	.channels_min = 2, /* Mono modes not yet supported */
	391	.channels_max = 2,
	392	.rates = WM8523_RATES,
	393	.formats = WM8523_FORMATS,
	394	},
	395	.ops = &wm8523_dai_ops,
	396	};
1dcf98ff MB	397
1dcf98ff MB	398	#ifdef CONFIG_PM
f0fba2ad	399	static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
1dcf98ff	400	{
1dcf98ff MB	401	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	402	return 0;
	403	}
	404
f0fba2ad	405	static int wm8523_resume(struct snd_soc_codec *codec)
1dcf98ff	406	{
1dcf98ff	407	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1dcf98ff MB	408	return 0;
	409	}
	410	#else
	411	#define wm8523_suspend NULL
	412	#define wm8523_resume NULL
	413	#endif
	414
f0fba2ad	415	static int wm8523_probe(struct snd_soc_codec *codec)
1dcf98ff	416	{
f0fba2ad LG	417	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
f0fba2ad LG	418	int ret, i;
1dcf98ff	419
f0fba2ad	420	codec->hw_write = (hw_write_t)i2c_master_send;
1dcf98ff MB	421	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	422	wm8523->rate_constraint.count =
	423	ARRAY_SIZE(wm8523->rate_constraint_list);
	424
f0fba2ad	425	ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
8d50e447 MB	426	if (ret != 0) {
8d50e447 MB	427	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad	428	return ret;
8d50e447 MB	429	}
8d50e447 MB	430
1dcf98ff MB	431	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
	432	wm8523->supplies[i].supply = wm8523_supply_names[i];
	433
	434	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
	435	wm8523->supplies);
	436	if (ret != 0) {
	437	dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
f0fba2ad	438	return ret;
1dcf98ff MB	439	}
	440
	441	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	442	wm8523->supplies);
	443	if (ret != 0) {
	444	dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
	445	goto err_get;
	446	}
	447
8d50e447	448	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
1dcf98ff MB	449	if (ret < 0) {
	450	dev_err(codec->dev, "Failed to read ID register\n");
	451	goto err_enable;
	452	}
	453	if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
	454	dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
	455	ret = -EINVAL;
	456	goto err_enable;
	457	}
	458
8d50e447	459	ret = snd_soc_read(codec, WM8523_REVISION);
1dcf98ff MB	460	if (ret < 0) {
	461	dev_err(codec->dev, "Failed to read revision register\n");
	462	goto err_enable;
	463	}
	464	dev_info(codec->dev, "revision %c\n",
	465	(ret & WM8523_CHIP_REV_MASK) + 'A');
	466
	467	ret = wm8523_reset(codec);
	468	if (ret < 0) {
	469	dev_err(codec->dev, "Failed to issue reset\n");
	470	goto err_enable;
	471	}
	472
1dcf98ff	473	/* Change some default settings - latch VU and enable ZC */
a1b3b5ee MB	474	snd_soc_update_bits(codec, WM8523_DAC_GAINR,
	475	WM8523_DACR_VU, WM8523_DACR_VU);
	476	snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
1dcf98ff MB	477
	478	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	479
	480	/* Bias level configuration will have done an extra enable */
	481	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	482
f0fba2ad LG	483	snd_soc_add_controls(codec, wm8523_snd_controls,
	484	ARRAY_SIZE(wm8523_snd_controls));
	485	wm8523_add_widgets(codec);
1dcf98ff MB	486
	487	return 0;
	488
	489	err_enable:
	490	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	491	err_get:
	492	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
f0fba2ad	493
1dcf98ff MB	494	return ret;
	495	}
	496
f0fba2ad	497	static int wm8523_remove(struct snd_soc_codec *codec)
1dcf98ff	498	{
f0fba2ad LG	499	struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
	500
	501	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
1dcf98ff	502	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
f0fba2ad	503	return 0;
1dcf98ff MB	504	}
1dcf98ff MB	505
f0fba2ad LG	506	static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
	507	.probe = wm8523_probe,
	508	.remove = wm8523_remove,
	509	.suspend = wm8523_suspend,
	510	.resume = wm8523_resume,
	511	.set_bias_level = wm8523_set_bias_level,
	512	.reg_cache_size = WM8523_REGISTER_COUNT,
	513	.reg_word_size = sizeof(u16),
	514	.reg_cache_default = wm8523_reg,
	515	.volatile_register = wm8523_volatile_register,
	516	};
	517
bf5a85be MB	518	static const struct of_device_id wm8523_of_match[] = {
	519	{ .compatible = "wlf,wm8523" },
	520	{ },
	521	};
	522
1dcf98ff MB	523	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	524	static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
	525	const struct i2c_device_id *id)
	526	{
	527	struct wm8523_priv *wm8523;
f0fba2ad	528	int ret;
1dcf98ff MB	529
	530	wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
	531	if (wm8523 == NULL)
	532	return -ENOMEM;
	533
1dcf98ff	534	i2c_set_clientdata(i2c, wm8523);
f0fba2ad	535	wm8523->control_type = SND_SOC_I2C;
1dcf98ff	536
f0fba2ad LG	537	ret = snd_soc_register_codec(&i2c->dev,
	538	&soc_codec_dev_wm8523, &wm8523_dai, 1);
	539	if (ret < 0)
	540	kfree(wm8523);
	541	return ret;
1dcf98ff	542
1dcf98ff MB	543	}
	544
	545	static __devexit int wm8523_i2c_remove(struct i2c_client *client)
	546	{
f0fba2ad LG	547	snd_soc_unregister_codec(&client->dev);
f0fba2ad LG	548	kfree(i2c_get_clientdata(client));
1dcf98ff MB	549	return 0;
	550	}
	551
1dcf98ff MB	552	static const struct i2c_device_id wm8523_i2c_id[] = {
	553	{ "wm8523", 0 },
	554	{ }
	555	};
	556	MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
	557
	558	static struct i2c_driver wm8523_i2c_driver = {
	559	.driver = {
9665408e	560	.name = "wm8523",
1dcf98ff	561	.owner = THIS_MODULE,
bf5a85be	562	.of_match_table = wm8523_of_match,
1dcf98ff MB	563	},
	564	.probe = wm8523_i2c_probe,
	565	.remove = __devexit_p(wm8523_i2c_remove),
1dcf98ff MB	566	.id_table = wm8523_i2c_id,
	567	};
	568	#endif
	569
	570	static int __init wm8523_modinit(void)
	571	{
	572	int ret;
	573	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	574	ret = i2c_add_driver(&wm8523_i2c_driver);
	575	if (ret != 0) {
	576	printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
	577	ret);
	578	}
	579	#endif
	580	return 0;
	581	}
	582	module_init(wm8523_modinit);
	583
	584	static void __exit wm8523_exit(void)
	585	{
	586	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	587	i2c_del_driver(&wm8523_i2c_driver);
	588	#endif
	589	}
	590	module_exit(wm8523_exit);
	591
	592	MODULE_DESCRIPTION("ASoC WM8523 driver");
	593	MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
	594	MODULE_LICENSE("GPL");