Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney...
[deliverable/linux.git] / sound / soc / codecs / wm8731.c
CommitLineData
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1/*
2 * wm8731.c -- WM8731 ALSA SoC Audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
656baaeb 5 * Copyright 2006-12 Wolfson Microelectronics, plc
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6 *
7 * Author: Richard Purdie <richard@openedhand.com>
8 *
9 * Based on wm8753.c by Liam Girdwood
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h>
19#include <linux/delay.h>
20#include <linux/pm.h>
21#include <linux/i2c.h>
5a0e3ad6 22#include <linux/slab.h>
05d448e2 23#include <linux/regmap.h>
7dea7c01 24#include <linux/regulator/consumer.h>
d2a40355 25#include <linux/spi/spi.h>
a7f96e4d 26#include <linux/of_device.h>
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27#include <sound/core.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/soc.h>
40e0aa64 31#include <sound/initval.h>
d00efa64 32#include <sound/tlv.h>
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33
34#include "wm8731.h"
35
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36#define WM8731_NUM_SUPPLIES 4
37static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
38 "AVDD",
39 "HPVDD",
40 "DCVDD",
41 "DBVDD",
42};
43
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44/* codec private data */
45struct wm8731_priv {
05d448e2 46 struct regmap *regmap;
7dea7c01 47 struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
0890c2b7 48 const struct snd_pcm_hw_constraint_list *constraints;
b36d61d4 49 unsigned int sysclk;
9745e824 50 int sysclk_type;
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51 int playback_fs;
52 bool deemph;
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53};
54
a8035c8f 55
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56/*
57 * wm8731 register cache
40e0aa64 58 */
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59static const struct reg_default wm8731_reg_defaults[] = {
60 { 0, 0x0097 },
61 { 1, 0x0097 },
62 { 2, 0x0079 },
63 { 3, 0x0079 },
64 { 4, 0x000a },
65 { 5, 0x0008 },
66 { 6, 0x009f },
67 { 7, 0x000a },
68 { 8, 0x0000 },
69 { 9, 0x0000 },
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70};
71
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72static bool wm8731_volatile(struct device *dev, unsigned int reg)
73{
74 return reg == WM8731_RESET;
75}
76
77static bool wm8731_writeable(struct device *dev, unsigned int reg)
78{
79 return reg <= WM8731_RESET;
80}
81
17a52fd6 82#define wm8731_reset(c) snd_soc_write(c, WM8731_RESET, 0)
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83
84static const char *wm8731_input_select[] = {"Line In", "Mic"};
59f72970 85
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86static const struct soc_enum wm8731_insel_enum =
87 SOC_ENUM_SINGLE(WM8731_APANA, 2, 2, wm8731_input_select);
88
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89static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
90
91static int wm8731_set_deemph(struct snd_soc_codec *codec)
92{
93 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
94 int val, i, best;
95
96 /* If we're using deemphasis select the nearest available sample
97 * rate.
98 */
99 if (wm8731->deemph) {
100 best = 1;
101 for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
102 if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
103 abs(wm8731_deemph[best] - wm8731->playback_fs))
104 best = i;
105 }
106
107 val = best << 1;
108 } else {
109 best = 0;
110 val = 0;
111 }
112
113 dev_dbg(codec->dev, "Set deemphasis %d (%dHz)\n",
114 best, wm8731_deemph[best]);
115
116 return snd_soc_update_bits(codec, WM8731_APDIGI, 0x6, val);
117}
118
119static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
120 struct snd_ctl_elem_value *ucontrol)
121{
122 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
123 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
124
125 ucontrol->value.enumerated.item[0] = wm8731->deemph;
126
127 return 0;
128}
129
130static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
131 struct snd_ctl_elem_value *ucontrol)
132{
133 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
134 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
135 int deemph = ucontrol->value.enumerated.item[0];
136 int ret = 0;
137
138 if (deemph > 1)
139 return -EINVAL;
140
141 mutex_lock(&codec->mutex);
142 if (wm8731->deemph != deemph) {
143 wm8731->deemph = deemph;
59f72970 144
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145 wm8731_set_deemph(codec);
146
147 ret = 1;
148 }
149 mutex_unlock(&codec->mutex);
150
151 return ret;
152}
40e0aa64 153
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154static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
155static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
156static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
d921184e 157static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
d00efa64 158
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159static const struct snd_kcontrol_new wm8731_snd_controls[] = {
160
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161SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
162 0, 127, 0, out_tlv),
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163SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
164 7, 1, 0),
40e0aa64 165
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166SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
167 in_tlv),
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168SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
169
d921184e 170SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
ef38ed88 171SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
40e0aa64 172
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173SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
174 sidetone_tlv),
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175
176SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
177SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
178
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179SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
180 wm8731_get_deemph, wm8731_put_deemph),
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181};
182
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183/* Output Mixer */
184static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
185SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
186SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
187SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
188};
189
190/* Input mux */
191static const struct snd_kcontrol_new wm8731_input_mux_controls =
59f72970 192SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
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193
194static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
8a27bd9a 195SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
9745e824 196SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
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197SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
198 &wm8731_output_mixer_controls[0],
199 ARRAY_SIZE(wm8731_output_mixer_controls)),
200SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
201SND_SOC_DAPM_OUTPUT("LOUT"),
202SND_SOC_DAPM_OUTPUT("LHPOUT"),
203SND_SOC_DAPM_OUTPUT("ROUT"),
204SND_SOC_DAPM_OUTPUT("RHPOUT"),
205SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
206SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
207SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
208SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
209SND_SOC_DAPM_INPUT("MICIN"),
210SND_SOC_DAPM_INPUT("RLINEIN"),
211SND_SOC_DAPM_INPUT("LLINEIN"),
212};
213
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214static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
215 struct snd_soc_dapm_widget *sink)
216{
217 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(source->codec);
218
5a195b44 219 return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
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220}
221
5e251aec 222static const struct snd_soc_dapm_route wm8731_intercon[] = {
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223 {"DAC", NULL, "OSC", wm8731_check_osc},
224 {"ADC", NULL, "OSC", wm8731_check_osc},
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225 {"DAC", NULL, "ACTIVE"},
226 {"ADC", NULL, "ACTIVE"},
9745e824 227
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228 /* output mixer */
229 {"Output Mixer", "Line Bypass Switch", "Line Input"},
230 {"Output Mixer", "HiFi Playback Switch", "DAC"},
231 {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
232
233 /* outputs */
234 {"RHPOUT", NULL, "Output Mixer"},
235 {"ROUT", NULL, "Output Mixer"},
236 {"LHPOUT", NULL, "Output Mixer"},
237 {"LOUT", NULL, "Output Mixer"},
238
239 /* input mux */
240 {"Input Mux", "Line In", "Line Input"},
241 {"Input Mux", "Mic", "Mic Bias"},
242 {"ADC", NULL, "Input Mux"},
243
244 /* inputs */
245 {"Line Input", NULL, "LLINEIN"},
246 {"Line Input", NULL, "RLINEIN"},
247 {"Mic Bias", NULL, "MICIN"},
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248};
249
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250struct _coeff_div {
251 u32 mclk;
252 u32 rate;
253 u16 fs;
254 u8 sr:4;
255 u8 bosr:1;
256 u8 usb:1;
257};
258
259/* codec mclk clock divider coefficients */
260static const struct _coeff_div coeff_div[] = {
261 /* 48k */
262 {12288000, 48000, 256, 0x0, 0x0, 0x0},
263 {18432000, 48000, 384, 0x0, 0x1, 0x0},
264 {12000000, 48000, 250, 0x0, 0x0, 0x1},
265
266 /* 32k */
267 {12288000, 32000, 384, 0x6, 0x0, 0x0},
268 {18432000, 32000, 576, 0x6, 0x1, 0x0},
298a2c75 269 {12000000, 32000, 375, 0x6, 0x0, 0x1},
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270
271 /* 8k */
272 {12288000, 8000, 1536, 0x3, 0x0, 0x0},
273 {18432000, 8000, 2304, 0x3, 0x1, 0x0},
274 {11289600, 8000, 1408, 0xb, 0x0, 0x0},
275 {16934400, 8000, 2112, 0xb, 0x1, 0x0},
276 {12000000, 8000, 1500, 0x3, 0x0, 0x1},
277
278 /* 96k */
279 {12288000, 96000, 128, 0x7, 0x0, 0x0},
280 {18432000, 96000, 192, 0x7, 0x1, 0x0},
281 {12000000, 96000, 125, 0x7, 0x0, 0x1},
282
283 /* 44.1k */
284 {11289600, 44100, 256, 0x8, 0x0, 0x0},
285 {16934400, 44100, 384, 0x8, 0x1, 0x0},
286 {12000000, 44100, 272, 0x8, 0x1, 0x1},
287
288 /* 88.2k */
289 {11289600, 88200, 128, 0xf, 0x0, 0x0},
290 {16934400, 88200, 192, 0xf, 0x1, 0x0},
291 {12000000, 88200, 136, 0xf, 0x1, 0x1},
292};
293
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294/* rates constraints */
295static const unsigned int wm8731_rates_12000000[] = {
296 8000, 32000, 44100, 48000, 96000, 88200,
297};
298
299static const unsigned int wm8731_rates_12288000_18432000[] = {
300 8000, 32000, 48000, 96000,
301};
302
303static const unsigned int wm8731_rates_11289600_16934400[] = {
304 8000, 44100, 88200,
305};
306
307static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
308 .list = wm8731_rates_12000000,
309 .count = ARRAY_SIZE(wm8731_rates_12000000),
310};
311
312static const
313struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
314 .list = wm8731_rates_12288000_18432000,
315 .count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
316};
317
318static const
319struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
320 .list = wm8731_rates_11289600_16934400,
321 .count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
322};
323
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324static inline int get_coeff(int mclk, int rate)
325{
326 int i;
327
328 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
329 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
330 return i;
331 }
332 return 0;
333}
334
b36d61d4 335static int wm8731_hw_params(struct snd_pcm_substream *substream,
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336 struct snd_pcm_hw_params *params,
337 struct snd_soc_dai *dai)
40e0aa64 338{
f0fba2ad 339 struct snd_soc_codec *codec = dai->codec;
b2c812e2 340 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
17a52fd6 341 u16 iface = snd_soc_read(codec, WM8731_IFACE) & 0xfff3;
b36d61d4
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342 int i = get_coeff(wm8731->sysclk, params_rate(params));
343 u16 srate = (coeff_div[i].sr << 2) |
344 (coeff_div[i].bosr << 1) | coeff_div[i].usb;
40e0aa64 345
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346 wm8731->playback_fs = params_rate(params);
347
17a52fd6 348 snd_soc_write(codec, WM8731_SRATE, srate);
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349
350 /* bit size */
351 switch (params_format(params)) {
352 case SNDRV_PCM_FORMAT_S16_LE:
353 break;
354 case SNDRV_PCM_FORMAT_S20_3LE:
355 iface |= 0x0004;
356 break;
357 case SNDRV_PCM_FORMAT_S24_LE:
358 iface |= 0x0008;
359 break;
360 }
40e0aa64 361
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362 wm8731_set_deemph(codec);
363
17a52fd6 364 snd_soc_write(codec, WM8731_IFACE, iface);
b36d61d4 365 return 0;
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366}
367
e550e17f 368static int wm8731_mute(struct snd_soc_dai *dai, int mute)
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369{
370 struct snd_soc_codec *codec = dai->codec;
17a52fd6 371 u16 mute_reg = snd_soc_read(codec, WM8731_APDIGI) & 0xfff7;
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372
373 if (mute)
17a52fd6 374 snd_soc_write(codec, WM8731_APDIGI, mute_reg | 0x8);
b36d61d4 375 else
17a52fd6 376 snd_soc_write(codec, WM8731_APDIGI, mute_reg);
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377 return 0;
378}
379
e550e17f 380static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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FM
381 int clk_id, unsigned int freq, int dir)
382{
383 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 384 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
b36d61d4 385
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386 switch (clk_id) {
387 case WM8731_SYSCLK_XTAL:
388 case WM8731_SYSCLK_MCLK:
389 wm8731->sysclk_type = clk_id;
390 break;
391 default:
392 return -EINVAL;
393 }
394
b36d61d4 395 switch (freq) {
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396 case 0:
397 wm8731->constraints = NULL;
398 break;
b36d61d4 399 case 12000000:
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400 wm8731->constraints = &wm8731_constraints_12000000;
401 break;
b36d61d4 402 case 12288000:
b36d61d4 403 case 18432000:
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404 wm8731->constraints = &wm8731_constraints_12288000_18432000;
405 break;
406 case 16934400:
407 case 11289600:
408 wm8731->constraints = &wm8731_constraints_11289600_16934400;
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409 break;
410 default:
411 return -EINVAL;
b36d61d4 412 }
9745e824 413
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414 wm8731->sysclk = freq;
415
ce6120cc 416 snd_soc_dapm_sync(&codec->dapm);
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417
418 return 0;
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419}
420
421
e550e17f 422static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
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423 unsigned int fmt)
424{
425 struct snd_soc_codec *codec = codec_dai->codec;
426 u16 iface = 0;
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427
428 /* set master/slave audio interface */
b36d61d4 429 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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430 case SND_SOC_DAIFMT_CBM_CFM:
431 iface |= 0x0040;
432 break;
433 case SND_SOC_DAIFMT_CBS_CFS:
434 break;
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435 default:
436 return -EINVAL;
40e0aa64 437 }
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438
439 /* interface format */
b36d61d4 440 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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441 case SND_SOC_DAIFMT_I2S:
442 iface |= 0x0002;
443 break;
444 case SND_SOC_DAIFMT_RIGHT_J:
445 break;
446 case SND_SOC_DAIFMT_LEFT_J:
447 iface |= 0x0001;
448 break;
449 case SND_SOC_DAIFMT_DSP_A:
b4af6ef9 450 iface |= 0x0013;
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451 break;
452 case SND_SOC_DAIFMT_DSP_B:
b4af6ef9 453 iface |= 0x0003;
40e0aa64 454 break;
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455 default:
456 return -EINVAL;
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457 }
458
459 /* clock inversion */
b36d61d4 460 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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461 case SND_SOC_DAIFMT_NB_NF:
462 break;
463 case SND_SOC_DAIFMT_IB_IF:
464 iface |= 0x0090;
465 break;
466 case SND_SOC_DAIFMT_IB_NF:
467 iface |= 0x0080;
468 break;
469 case SND_SOC_DAIFMT_NB_IF:
470 iface |= 0x0010;
471 break;
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472 default:
473 return -EINVAL;
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474 }
475
476 /* set iface */
17a52fd6 477 snd_soc_write(codec, WM8731_IFACE, iface);
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478 return 0;
479}
480
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481static int wm8731_set_bias_level(struct snd_soc_codec *codec,
482 enum snd_soc_bias_level level)
40e0aa64 483{
06ae9988 484 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
9bf311fe 485 int ret;
22d22ee5 486 u16 reg;
40e0aa64 487
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488 switch (level) {
489 case SND_SOC_BIAS_ON:
40e0aa64 490 break;
0be9898a 491 case SND_SOC_BIAS_PREPARE:
40e0aa64 492 break;
0be9898a 493 case SND_SOC_BIAS_STANDBY:
ce6120cc 494 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
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495 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
496 wm8731->supplies);
497 if (ret != 0)
498 return ret;
499
05d448e2 500 regcache_sync(wm8731->regmap);
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501 }
502
22d22ee5 503 /* Clear PWROFF, gate CLKOUT, everything else as-is */
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504 reg = snd_soc_read(codec, WM8731_PWR) & 0xff7f;
505 snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
40e0aa64 506 break;
0be9898a 507 case SND_SOC_BIAS_OFF:
17a52fd6 508 snd_soc_write(codec, WM8731_PWR, 0xffff);
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509 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
510 wm8731->supplies);
05d448e2 511 regcache_mark_dirty(wm8731->regmap);
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512 break;
513 }
ce6120cc 514 codec->dapm.bias_level = level;
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515 return 0;
516}
517
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518static int wm8731_startup(struct snd_pcm_substream *substream,
519 struct snd_soc_dai *dai)
520{
521 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(dai->codec);
522
523 if (wm8731->constraints)
524 snd_pcm_hw_constraint_list(substream->runtime, 0,
525 SNDRV_PCM_HW_PARAM_RATE,
526 wm8731->constraints);
527
528 return 0;
529}
530
e135443e 531#define WM8731_RATES SNDRV_PCM_RATE_8000_96000
b36d61d4
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532
533#define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
534 SNDRV_PCM_FMTBIT_S24_LE)
535
85e7652d 536static const struct snd_soc_dai_ops wm8731_dai_ops = {
0890c2b7 537 .startup = wm8731_startup,
6335d055 538 .hw_params = wm8731_hw_params,
6335d055
EM
539 .digital_mute = wm8731_mute,
540 .set_sysclk = wm8731_set_dai_sysclk,
541 .set_fmt = wm8731_set_dai_fmt,
542};
543
f0fba2ad
LG
544static struct snd_soc_dai_driver wm8731_dai = {
545 .name = "wm8731-hifi",
40e0aa64
RP
546 .playback = {
547 .stream_name = "Playback",
548 .channels_min = 1,
549 .channels_max = 2,
b36d61d4
FM
550 .rates = WM8731_RATES,
551 .formats = WM8731_FORMATS,},
40e0aa64
RP
552 .capture = {
553 .stream_name = "Capture",
554 .channels_min = 1,
555 .channels_max = 2,
b36d61d4
FM
556 .rates = WM8731_RATES,
557 .formats = WM8731_FORMATS,},
6335d055 558 .ops = &wm8731_dai_ops,
4934482d 559 .symmetric_rates = 1,
40e0aa64 560};
40e0aa64 561
b3b50b3f 562#ifdef CONFIG_PM
84b315ee 563static int wm8731_suspend(struct snd_soc_codec *codec)
40e0aa64 564{
0be9898a 565 wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
06ae9988 566
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RP
567 return 0;
568}
569
f0fba2ad 570static int wm8731_resume(struct snd_soc_codec *codec)
40e0aa64 571{
0be9898a 572 wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
7dea7c01 573
40e0aa64
RP
574 return 0;
575}
b3b50b3f
MB
576#else
577#define wm8731_suspend NULL
578#define wm8731_resume NULL
579#endif
40e0aa64 580
f0fba2ad 581static int wm8731_probe(struct snd_soc_codec *codec)
40e0aa64 582{
f0fba2ad
LG
583 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
584 int ret = 0, i;
5998102b 585
05d448e2
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586 codec->control_data = wm8731->regmap;
587 ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
17a52fd6
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588 if (ret < 0) {
589 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 590 return ret;
17a52fd6
MB
591 }
592
7dea7c01
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593 for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
594 wm8731->supplies[i].supply = wm8731_supply_names[i];
595
596 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8731->supplies),
597 wm8731->supplies);
598 if (ret != 0) {
599 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
f0fba2ad 600 return ret;
7dea7c01
MB
601 }
602
603 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
604 wm8731->supplies);
605 if (ret != 0) {
606 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
607 goto err_regulator_get;
608 }
609
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610 ret = wm8731_reset(codec);
611 if (ret < 0) {
fe5422fc 612 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
7dea7c01 613 goto err_regulator_enable;
519cf2df
MB
614 }
615
5998102b
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616 wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
617
618 /* Latch the update bits */
17a52fd6
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619 snd_soc_update_bits(codec, WM8731_LOUT1V, 0x100, 0);
620 snd_soc_update_bits(codec, WM8731_ROUT1V, 0x100, 0);
621 snd_soc_update_bits(codec, WM8731_LINVOL, 0x100, 0);
622 snd_soc_update_bits(codec, WM8731_RINVOL, 0x100, 0);
5998102b 623
ce3bdaa8 624 /* Disable bypass path by default */
2062ea52 625 snd_soc_update_bits(codec, WM8731_APANA, 0x8, 0);
ce3bdaa8 626
06ae9988
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627 /* Regulators will have been enabled by bias management */
628 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
629
a8035c8f 630 return 0;
fe5422fc 631
7dea7c01
MB
632err_regulator_enable:
633 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
634err_regulator_get:
635 regulator_bulk_free(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
f0fba2ad 636
fe5422fc 637 return ret;
a8035c8f
MB
638}
639
f0fba2ad
LG
640/* power down chip */
641static int wm8731_remove(struct snd_soc_codec *codec)
5998102b 642{
f0fba2ad
LG
643 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
644
645 wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
646
647 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
7dea7c01 648 regulator_bulk_free(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
f0fba2ad
LG
649
650 return 0;
5998102b 651}
a8035c8f 652
f0fba2ad
LG
653static struct snd_soc_codec_driver soc_codec_dev_wm8731 = {
654 .probe = wm8731_probe,
655 .remove = wm8731_remove,
656 .suspend = wm8731_suspend,
657 .resume = wm8731_resume,
658 .set_bias_level = wm8731_set_bias_level,
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MB
659 .dapm_widgets = wm8731_dapm_widgets,
660 .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
661 .dapm_routes = wm8731_intercon,
662 .num_dapm_routes = ARRAY_SIZE(wm8731_intercon),
cb555318
MB
663 .controls = wm8731_snd_controls,
664 .num_controls = ARRAY_SIZE(wm8731_snd_controls),
f0fba2ad
LG
665};
666
a7f96e4d
MB
667static const struct of_device_id wm8731_of_match[] = {
668 { .compatible = "wlf,wm8731", },
669 { }
670};
671
672MODULE_DEVICE_TABLE(of, wm8731_of_match);
673
05d448e2
MB
674static const struct regmap_config wm8731_regmap = {
675 .reg_bits = 7,
676 .val_bits = 9,
677
678 .max_register = WM8731_RESET,
679 .volatile_reg = wm8731_volatile,
680 .writeable_reg = wm8731_writeable,
681
682 .cache_type = REGCACHE_RBTREE,
683 .reg_defaults = wm8731_reg_defaults,
684 .num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
685};
686
5998102b 687#if defined(CONFIG_SPI_MASTER)
7a79e94e 688static int wm8731_spi_probe(struct spi_device *spi)
5998102b 689{
5998102b 690 struct wm8731_priv *wm8731;
f0fba2ad 691 int ret;
5998102b 692
f1992dde
MB
693 wm8731 = devm_kzalloc(&spi->dev, sizeof(struct wm8731_priv),
694 GFP_KERNEL);
5998102b
MB
695 if (wm8731 == NULL)
696 return -ENOMEM;
697
f1992dde 698 wm8731->regmap = devm_regmap_init_spi(spi, &wm8731_regmap);
05d448e2
MB
699 if (IS_ERR(wm8731->regmap)) {
700 ret = PTR_ERR(wm8731->regmap);
701 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
702 ret);
f1992dde 703 return ret;
05d448e2
MB
704 }
705
f0fba2ad 706 spi_set_drvdata(spi, wm8731);
93b760b7 707
f0fba2ad
LG
708 ret = snd_soc_register_codec(&spi->dev,
709 &soc_codec_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB
710 if (ret != 0) {
711 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 712 return ret;
05d448e2
MB
713 }
714
715 return 0;
5998102b
MB
716}
717
7a79e94e 718static int wm8731_spi_remove(struct spi_device *spi)
5998102b 719{
f0fba2ad 720 snd_soc_unregister_codec(&spi->dev);
5998102b
MB
721 return 0;
722}
723
724static struct spi_driver wm8731_spi_driver = {
725 .driver = {
99b59f3c 726 .name = "wm8731",
5998102b 727 .owner = THIS_MODULE,
a7f96e4d 728 .of_match_table = wm8731_of_match,
5998102b
MB
729 },
730 .probe = wm8731_spi_probe,
7a79e94e 731 .remove = wm8731_spi_remove,
5998102b 732};
a8035c8f
MB
733#endif /* CONFIG_SPI_MASTER */
734
b65ab73e 735#if IS_ENABLED(CONFIG_I2C)
7a79e94e
BP
736static int wm8731_i2c_probe(struct i2c_client *i2c,
737 const struct i2c_device_id *id)
a8035c8f 738{
5998102b 739 struct wm8731_priv *wm8731;
f0fba2ad 740 int ret;
a8035c8f 741
f1992dde
MB
742 wm8731 = devm_kzalloc(&i2c->dev, sizeof(struct wm8731_priv),
743 GFP_KERNEL);
5998102b
MB
744 if (wm8731 == NULL)
745 return -ENOMEM;
746
f1992dde 747 wm8731->regmap = devm_regmap_init_i2c(i2c, &wm8731_regmap);
05d448e2
MB
748 if (IS_ERR(wm8731->regmap)) {
749 ret = PTR_ERR(wm8731->regmap);
750 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
751 ret);
f1992dde 752 return ret;
05d448e2
MB
753 }
754
5998102b 755 i2c_set_clientdata(i2c, wm8731);
a8035c8f 756
05d448e2 757 ret = snd_soc_register_codec(&i2c->dev,
f0fba2ad 758 &soc_codec_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB
759 if (ret != 0) {
760 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 761 return ret;
05d448e2
MB
762 }
763
764 return 0;
a8035c8f
MB
765}
766
7a79e94e 767static int wm8731_i2c_remove(struct i2c_client *client)
a8035c8f 768{
f0fba2ad 769 snd_soc_unregister_codec(&client->dev);
a8035c8f
MB
770 return 0;
771}
772
773static const struct i2c_device_id wm8731_i2c_id[] = {
774 { "wm8731", 0 },
775 { }
776};
777MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
778
779static struct i2c_driver wm8731_i2c_driver = {
780 .driver = {
99b59f3c 781 .name = "wm8731",
a8035c8f 782 .owner = THIS_MODULE,
a7f96e4d 783 .of_match_table = wm8731_of_match,
a8035c8f
MB
784 },
785 .probe = wm8731_i2c_probe,
7a79e94e 786 .remove = wm8731_i2c_remove,
a8035c8f
MB
787 .id_table = wm8731_i2c_id,
788};
789#endif
790
c9b3a40f 791static int __init wm8731_modinit(void)
64089b84 792{
f0fba2ad 793 int ret = 0;
b65ab73e 794#if IS_ENABLED(CONFIG_I2C)
5998102b
MB
795 ret = i2c_add_driver(&wm8731_i2c_driver);
796 if (ret != 0) {
797 printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
798 ret);
799 }
800#endif
801#if defined(CONFIG_SPI_MASTER)
802 ret = spi_register_driver(&wm8731_spi_driver);
803 if (ret != 0) {
804 printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
805 ret);
806 }
807#endif
f0fba2ad 808 return ret;
64089b84
MB
809}
810module_init(wm8731_modinit);
811
812static void __exit wm8731_exit(void)
813{
b65ab73e 814#if IS_ENABLED(CONFIG_I2C)
5998102b
MB
815 i2c_del_driver(&wm8731_i2c_driver);
816#endif
817#if defined(CONFIG_SPI_MASTER)
818 spi_unregister_driver(&wm8731_spi_driver);
819#endif
64089b84
MB
820}
821module_exit(wm8731_exit);
822
40e0aa64
RP
823MODULE_DESCRIPTION("ASoC WM8731 driver");
824MODULE_AUTHOR("Richard Purdie");
825MODULE_LICENSE("GPL");
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