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Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
[deliverable/linux.git] / sound / soc / codecs / wm8750.c
CommitLineData
abadfc92
RP		 1/*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/platform_device.h>
2f3dfaf5 22#include <linux/spi/spi.h>
abadfc92
RP		 23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29
30#include "wm8750.h"
31
4422b606 32#define WM8750_VERSION "0.12"
abadfc92 33
4422b606
LG		 34/* codec private data */
35struct wm8750_priv {
36 unsigned int sysclk;
37};
38
abadfc92
RP		 39/*
40 * wm8750 register cache
41 * We can't read the WM8750 register space when we
42 * are using 2 wire for device control, so we cache them instead.
43 */
44static const u16 wm8750_reg[] = {
45 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
46 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
47 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
48 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
49 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
50 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
51 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
52 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
53 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
54 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
55 0x0079, 0x0079, 0x0079, /* 40 */
56};
57
17a52fd6 58#define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
abadfc92
RP		 59
60/*
61 * WM8750 Controls
62 */
63static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
64static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
65static const char *wm8750_treble[] = {"8kHz", "4kHz"};
66static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
67static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
68static const char *wm8750_3d_func[] = {"Capture", "Playback"};
69static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
70static const char *wm8750_ng_type[] = {"Constant PGA Gain",
71 "Mute ADC Output"};
72static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
73 "Differential"};
74static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
75 "Differential"};
76static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
77 "ROUT1"};
78static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
79static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
80 "L + R Invert"};
81static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
82static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
83 "Mono (Right)", "Digital Mono"};
84
85static const struct soc_enum wm8750_enum[] = {
86SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
87SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
88SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
89SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
90SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
91SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
92SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
93SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
94SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
95SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
96SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
97SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
98SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
99SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
100SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
101SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
102SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
103
104};
105
106static const struct snd_kcontrol_new wm8750_snd_controls[] = {
107
108SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
109SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
110SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
111
bd903b6e 112SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
abadfc92 113 WM8750_ROUT1V, 7, 1, 0),
bd903b6e 114SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
abadfc92
RP		 115 WM8750_ROUT2V, 7, 1, 0),
116
117SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
118
119SOC_ENUM("Capture Polarity", wm8750_enum[14]),
120SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
121SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
122
123SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
124
125SOC_ENUM("Bass Boost", wm8750_enum[0]),
126SOC_ENUM("Bass Filter", wm8750_enum[1]),
127SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
128
6a7b8cf4 129SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
abadfc92
RP		 130SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
131
132SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
133SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
134SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
135SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
136SOC_ENUM("3D Mode", wm8750_enum[5]),
137
138SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
139SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
140SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
141SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
142SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
143SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
144SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
145SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
146SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
147SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
148
149SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
150SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
151
152SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
153SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
154
bd903b6e 155SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
abadfc92
RP		 156
157/* Unimplemented */
158/* ADCDAC Bit 0 - ADCHPD */
159/* ADCDAC Bit 4 - HPOR */
160/* ADCTL1 Bit 2,3 - DATSEL */
161/* ADCTL1 Bit 4,5 - DMONOMIX */
162/* ADCTL1 Bit 6,7 - VSEL */
163/* ADCTL2 Bit 2 - LRCM */
164/* ADCTL2 Bit 3 - TRI */
165/* ADCTL3 Bit 5 - HPFLREN */
166/* ADCTL3 Bit 6 - VROI */
167/* ADCTL3 Bit 7,8 - ADCLRM */
168/* ADCIN Bit 4 - LDCM */
169/* ADCIN Bit 5 - RDCM */
170
171SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
172
173SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
174 WM8750_LOUTM2, 4, 7, 1),
175SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
176 WM8750_ROUTM2, 4, 7, 1),
177SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
178 WM8750_MOUTM2, 4, 7, 1),
179
180SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
181
bd903b6e
LG		 182SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
183 0, 127, 0),
184SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
185 0, 127, 0),
abadfc92
RP		 186
187SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
188
189};
190
abadfc92
RP		 191/*
192 * DAPM Controls
193 */
194
195/* Left Mixer */
196static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
197SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
198SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
199SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
200SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
201};
202
203/* Right Mixer */
204static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
205SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
206SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
207SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
208SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
209};
210
211/* Mono Mixer */
212static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
213SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
214SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
215SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
216SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
217};
218
219/* Left Line Mux */
220static const struct snd_kcontrol_new wm8750_left_line_controls =
221SOC_DAPM_ENUM("Route", wm8750_enum[8]);
222
223/* Right Line Mux */
224static const struct snd_kcontrol_new wm8750_right_line_controls =
225SOC_DAPM_ENUM("Route", wm8750_enum[9]);
226
227/* Left PGA Mux */
228static const struct snd_kcontrol_new wm8750_left_pga_controls =
229SOC_DAPM_ENUM("Route", wm8750_enum[10]);
230
231/* Right PGA Mux */
232static const struct snd_kcontrol_new wm8750_right_pga_controls =
233SOC_DAPM_ENUM("Route", wm8750_enum[11]);
234
235/* Out 3 Mux */
236static const struct snd_kcontrol_new wm8750_out3_controls =
237SOC_DAPM_ENUM("Route", wm8750_enum[12]);
238
239/* Differential Mux */
240static const struct snd_kcontrol_new wm8750_diffmux_controls =
241SOC_DAPM_ENUM("Route", wm8750_enum[13]);
242
243/* Mono ADC Mux */
244static const struct snd_kcontrol_new wm8750_monomux_controls =
245SOC_DAPM_ENUM("Route", wm8750_enum[16]);
246
247static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
248 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
249 &wm8750_left_mixer_controls[0],
250 ARRAY_SIZE(wm8750_left_mixer_controls)),
251 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
252 &wm8750_right_mixer_controls[0],
253 ARRAY_SIZE(wm8750_right_mixer_controls)),
254 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
255 &wm8750_mono_mixer_controls[0],
256 ARRAY_SIZE(wm8750_mono_mixer_controls)),
257
258 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
259 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
260 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
261 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
262 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
263 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
264
265 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
266 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
267 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
268
269 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
270 &wm8750_left_pga_controls),
271 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
272 &wm8750_right_pga_controls),
273 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
274 &wm8750_left_line_controls),
275 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
276 &wm8750_right_line_controls),
277
278 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
279 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
280 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
281
282 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
283 &wm8750_diffmux_controls),
284 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
285 &wm8750_monomux_controls),
286 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
287 &wm8750_monomux_controls),
288
289 SND_SOC_DAPM_OUTPUT("LOUT1"),
290 SND_SOC_DAPM_OUTPUT("ROUT1"),
291 SND_SOC_DAPM_OUTPUT("LOUT2"),
292 SND_SOC_DAPM_OUTPUT("ROUT2"),
23ba79bd 293 SND_SOC_DAPM_OUTPUT("MONO1"),
abadfc92 294 SND_SOC_DAPM_OUTPUT("OUT3"),
04489eeb 295 SND_SOC_DAPM_OUTPUT("VREF"),
abadfc92
RP		 296
297 SND_SOC_DAPM_INPUT("LINPUT1"),
298 SND_SOC_DAPM_INPUT("LINPUT2"),
299 SND_SOC_DAPM_INPUT("LINPUT3"),
300 SND_SOC_DAPM_INPUT("RINPUT1"),
301 SND_SOC_DAPM_INPUT("RINPUT2"),
302 SND_SOC_DAPM_INPUT("RINPUT3"),
303};
304
a65f0568 305static const struct snd_soc_dapm_route audio_map[] = {
abadfc92
RP		 306 /* left mixer */
307 {"Left Mixer", "Playback Switch", "Left DAC"},
308 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
309 {"Left Mixer", "Right Playback Switch", "Right DAC"},
310 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
311
312 /* right mixer */
313 {"Right Mixer", "Left Playback Switch", "Left DAC"},
314 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
315 {"Right Mixer", "Playback Switch", "Right DAC"},
316 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
317
318 /* left out 1 */
319 {"Left Out 1", NULL, "Left Mixer"},
320 {"LOUT1", NULL, "Left Out 1"},
321
322 /* left out 2 */
323 {"Left Out 2", NULL, "Left Mixer"},
324 {"LOUT2", NULL, "Left Out 2"},
325
326 /* right out 1 */
327 {"Right Out 1", NULL, "Right Mixer"},
328 {"ROUT1", NULL, "Right Out 1"},
329
330 /* right out 2 */
331 {"Right Out 2", NULL, "Right Mixer"},
332 {"ROUT2", NULL, "Right Out 2"},
333
334 /* mono mixer */
335 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
336 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
337 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
338 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
339
340 /* mono out */
341 {"Mono Out 1", NULL, "Mono Mixer"},
342 {"MONO1", NULL, "Mono Out 1"},
343
344 /* out 3 */
345 {"Out3 Mux", "VREF", "VREF"},
346 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
347 {"Out3 Mux", "ROUT1", "Right Mixer"},
348 {"Out3 Mux", "MonoOut", "MONO1"},
349 {"Out 3", NULL, "Out3 Mux"},
350 {"OUT3", NULL, "Out 3"},
351
352 /* Left Line Mux */
353 {"Left Line Mux", "Line 1", "LINPUT1"},
354 {"Left Line Mux", "Line 2", "LINPUT2"},
355 {"Left Line Mux", "Line 3", "LINPUT3"},
356 {"Left Line Mux", "PGA", "Left PGA Mux"},
357 {"Left Line Mux", "Differential", "Differential Mux"},
358
359 /* Right Line Mux */
360 {"Right Line Mux", "Line 1", "RINPUT1"},
361 {"Right Line Mux", "Line 2", "RINPUT2"},
362 {"Right Line Mux", "Line 3", "RINPUT3"},
363 {"Right Line Mux", "PGA", "Right PGA Mux"},
364 {"Right Line Mux", "Differential", "Differential Mux"},
365
366 /* Left PGA Mux */
367 {"Left PGA Mux", "Line 1", "LINPUT1"},
368 {"Left PGA Mux", "Line 2", "LINPUT2"},
369 {"Left PGA Mux", "Line 3", "LINPUT3"},
370 {"Left PGA Mux", "Differential", "Differential Mux"},
371
372 /* Right PGA Mux */
373 {"Right PGA Mux", "Line 1", "RINPUT1"},
374 {"Right PGA Mux", "Line 2", "RINPUT2"},
375 {"Right PGA Mux", "Line 3", "RINPUT3"},
376 {"Right PGA Mux", "Differential", "Differential Mux"},
377
378 /* Differential Mux */
379 {"Differential Mux", "Line 1", "LINPUT1"},
380 {"Differential Mux", "Line 1", "RINPUT1"},
381 {"Differential Mux", "Line 2", "LINPUT2"},
382 {"Differential Mux", "Line 2", "RINPUT2"},
383
384 /* Left ADC Mux */
385 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
386 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
387 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
388
389 /* Right ADC Mux */
390 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
391 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
392 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
393
394 /* ADC */
395 {"Left ADC", NULL, "Left ADC Mux"},
396 {"Right ADC", NULL, "Right ADC Mux"},
abadfc92
RP		 397};
398
399static int wm8750_add_widgets(struct snd_soc_codec *codec)
400{
a65f0568
MB		 401 snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
402 ARRAY_SIZE(wm8750_dapm_widgets));
abadfc92 403
a65f0568 404 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
abadfc92 405
abadfc92
RP		 406 return 0;
407}
408
409struct _coeff_div {
410 u32 mclk;
411 u32 rate;
412 u16 fs;
413 u8 sr:5;
414 u8 usb:1;
415};
416
417/* codec hifi mclk clock divider coefficients */
418static const struct _coeff_div coeff_div[] = {
419 /* 8k */
420 {12288000, 8000, 1536, 0x6, 0x0},
421 {11289600, 8000, 1408, 0x16, 0x0},
422 {18432000, 8000, 2304, 0x7, 0x0},
423 {16934400, 8000, 2112, 0x17, 0x0},
424 {12000000, 8000, 1500, 0x6, 0x1},
425
426 /* 11.025k */
427 {11289600, 11025, 1024, 0x18, 0x0},
428 {16934400, 11025, 1536, 0x19, 0x0},
429 {12000000, 11025, 1088, 0x19, 0x1},
430
431 /* 16k */
432 {12288000, 16000, 768, 0xa, 0x0},
433 {18432000, 16000, 1152, 0xb, 0x0},
434 {12000000, 16000, 750, 0xa, 0x1},
435
436 /* 22.05k */
437 {11289600, 22050, 512, 0x1a, 0x0},
438 {16934400, 22050, 768, 0x1b, 0x0},
439 {12000000, 22050, 544, 0x1b, 0x1},
440
441 /* 32k */
442 {12288000, 32000, 384, 0xc, 0x0},
443 {18432000, 32000, 576, 0xd, 0x0},
444 {12000000, 32000, 375, 0xa, 0x1},
445
446 /* 44.1k */
447 {11289600, 44100, 256, 0x10, 0x0},
448 {16934400, 44100, 384, 0x11, 0x0},
449 {12000000, 44100, 272, 0x11, 0x1},
450
451 /* 48k */
452 {12288000, 48000, 256, 0x0, 0x0},
453 {18432000, 48000, 384, 0x1, 0x0},
454 {12000000, 48000, 250, 0x0, 0x1},
455
456 /* 88.2k */
457 {11289600, 88200, 128, 0x1e, 0x0},
458 {16934400, 88200, 192, 0x1f, 0x0},
459 {12000000, 88200, 136, 0x1f, 0x1},
460
461 /* 96k */
462 {12288000, 96000, 128, 0xe, 0x0},
463 {18432000, 96000, 192, 0xf, 0x0},
464 {12000000, 96000, 125, 0xe, 0x1},
465};
466
467static inline int get_coeff(int mclk, int rate)
468{
469 int i;
470
471 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
472 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
473 return i;
474 }
a71a468a
LG		 475
476 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
477 mclk, rate);
abadfc92
RP		 478 return -EINVAL;
479}
480
e550e17f 481static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
4422b606 482 int clk_id, unsigned int freq, int dir)
abadfc92 483{
4422b606
LG		 484 struct snd_soc_codec *codec = codec_dai->codec;
485 struct wm8750_priv *wm8750 = codec->private_data;
486
487 switch (freq) {
488 case 11289600:
489 case 12000000:
490 case 12288000:
491 case 16934400:
492 case 18432000:
493 wm8750->sysclk = freq;
494 return 0;
495 }
496 return -EINVAL;
abadfc92
RP		 497}
498
e550e17f 499static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
4422b606 500 unsigned int fmt)
abadfc92 501{
4422b606
LG		 502 struct snd_soc_codec *codec = codec_dai->codec;
503 u16 iface = 0;
abadfc92
RP		 504
505 /* set master/slave audio interface */
4422b606 506 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
abadfc92
RP		 507 case SND_SOC_DAIFMT_CBM_CFM:
508 iface = 0x0040;
509 break;
510 case SND_SOC_DAIFMT_CBS_CFS:
511 break;
4422b606
LG		 512 default:
513 return -EINVAL;
abadfc92
RP		 514 }
515
516 /* interface format */
4422b606 517 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
abadfc92
RP		 518 case SND_SOC_DAIFMT_I2S:
519 iface |= 0x0002;
520 break;
521 case SND_SOC_DAIFMT_RIGHT_J:
522 break;
523 case SND_SOC_DAIFMT_LEFT_J:
524 iface |= 0x0001;
525 break;
526 case SND_SOC_DAIFMT_DSP_A:
527 iface |= 0x0003;
528 break;
529 case SND_SOC_DAIFMT_DSP_B:
530 iface |= 0x0013;
531 break;
4422b606
LG		 532 default:
533 return -EINVAL;
abadfc92
RP		 534 }
535
536 /* clock inversion */
4422b606 537 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
abadfc92
RP		 538 case SND_SOC_DAIFMT_NB_NF:
539 break;
540 case SND_SOC_DAIFMT_IB_IF:
541 iface |= 0x0090;
542 break;
543 case SND_SOC_DAIFMT_IB_NF:
544 iface |= 0x0080;
545 break;
546 case SND_SOC_DAIFMT_NB_IF:
547 iface |= 0x0010;
548 break;
4422b606
LG		 549 default:
550 return -EINVAL;
abadfc92
RP		 551 }
552
17a52fd6 553 snd_soc_write(codec, WM8750_IFACE, iface);
4422b606
LG		 554 return 0;
555}
556
557static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 558 struct snd_pcm_hw_params *params,
559 struct snd_soc_dai *dai)
4422b606
LG		 560{
561 struct snd_soc_pcm_runtime *rtd = substream->private_data;
562 struct snd_soc_device *socdev = rtd->socdev;
6627a653 563 struct snd_soc_codec *codec = socdev->card->codec;
4422b606 564 struct wm8750_priv *wm8750 = codec->private_data;
17a52fd6
MB		 565 u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3;
566 u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0;
4422b606
LG		 567 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
568
569 /* bit size */
570 switch (params_format(params)) {
571 case SNDRV_PCM_FORMAT_S16_LE:
abadfc92 572 break;
4422b606
LG		 573 case SNDRV_PCM_FORMAT_S20_3LE:
574 iface |= 0x0004;
abadfc92 575 break;
4422b606
LG		 576 case SNDRV_PCM_FORMAT_S24_LE:
577 iface |= 0x0008;
abadfc92 578 break;
4422b606
LG		 579 case SNDRV_PCM_FORMAT_S32_LE:
580 iface |= 0x000c;
abadfc92
RP		 581 break;
582 }
583
584 /* set iface & srate */
17a52fd6 585 snd_soc_write(codec, WM8750_IFACE, iface);
4422b606 586 if (coeff >= 0)
17a52fd6 587 snd_soc_write(codec, WM8750_SRATE, srate |
4422b606 588 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
abadfc92
RP		 589
590 return 0;
591}
592
e550e17f 593static int wm8750_mute(struct snd_soc_dai *dai, int mute)
abadfc92 594{
4422b606 595 struct snd_soc_codec *codec = dai->codec;
17a52fd6 596 u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7;
4422b606 597
abadfc92 598 if (mute)
17a52fd6 599 snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
abadfc92 600 else
17a52fd6 601 snd_soc_write(codec, WM8750_ADCDAC, mute_reg);
abadfc92
RP		 602 return 0;
603}
604
0be9898a
MB		 605static int wm8750_set_bias_level(struct snd_soc_codec *codec,
606 enum snd_soc_bias_level level)
abadfc92 607{
17a52fd6 608 u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e;
abadfc92 609
0be9898a
MB		 610 switch (level) {
611 case SND_SOC_BIAS_ON:
abadfc92 612 /* set vmid to 50k and unmute dac */
17a52fd6 613 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
abadfc92 614 break;
0be9898a 615 case SND_SOC_BIAS_PREPARE:
abadfc92 616 /* set vmid to 5k for quick power up */
17a52fd6 617 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
abadfc92 618 break;
0be9898a 619 case SND_SOC_BIAS_STANDBY:
abadfc92 620 /* mute dac and set vmid to 500k, enable VREF */
17a52fd6 621 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
abadfc92 622 break;
0be9898a 623 case SND_SOC_BIAS_OFF:
17a52fd6 624 snd_soc_write(codec, WM8750_PWR1, 0x0001);
abadfc92
RP		 625 break;
626 }
0be9898a 627 codec->bias_level = level;
abadfc92
RP		 628 return 0;
629}
630
4422b606 631#define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
42f3030f
MB		 632 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
633 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
4422b606
LG		 634
635#define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
636 SNDRV_PCM_FMTBIT_S24_LE)
637
6335d055
EM		 638static struct snd_soc_dai_ops wm8750_dai_ops = {
639 .hw_params = wm8750_pcm_hw_params,
640 .digital_mute = wm8750_mute,
641 .set_fmt = wm8750_set_dai_fmt,
642 .set_sysclk = wm8750_set_dai_sysclk,
643};
644
e550e17f 645struct snd_soc_dai wm8750_dai = {
abadfc92
RP		 646 .name = "WM8750",
647 .playback = {
648 .stream_name = "Playback",
649 .channels_min = 1,
650 .channels_max = 2,
4422b606
LG		 651 .rates = WM8750_RATES,
652 .formats = WM8750_FORMATS,},
abadfc92
RP		 653 .capture = {
654 .stream_name = "Capture",
655 .channels_min = 1,
656 .channels_max = 2,
4422b606
LG		 657 .rates = WM8750_RATES,
658 .formats = WM8750_FORMATS,},
6335d055 659 .ops = &wm8750_dai_ops,
abadfc92
RP		 660};
661EXPORT_SYMBOL_GPL(wm8750_dai);
662
1321b160 663static void wm8750_work(struct work_struct *work)
abadfc92 664{
1321b160
TI		 665 struct snd_soc_codec *codec =
666 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 667 wm8750_set_bias_level(codec, codec->bias_level);
abadfc92
RP		 668}
669
670static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
671{
672 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 673 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92 674
0be9898a 675 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
abadfc92
RP		 676 return 0;
677}
678
679static int wm8750_resume(struct platform_device *pdev)
680{
681 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 682 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 683 int i;
684 u8 data[2];
685 u16 *cache = codec->reg_cache;
686
687 /* Sync reg_cache with the hardware */
688 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
689 if (i == WM8750_RESET)
690 continue;
691 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
692 data[1] = cache[i] & 0x00ff;
693 codec->hw_write(codec->control_data, data, 2);
694 }
695
0be9898a 696 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
abadfc92
RP		 697
698 /* charge wm8750 caps */
0be9898a
MB		 699 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
700 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
701 codec->bias_level = SND_SOC_BIAS_ON;
42f3030f
MB		 702 schedule_delayed_work(&codec->delayed_work,
703 msecs_to_jiffies(1000));
abadfc92
RP		 704 }
705
706 return 0;
707}
708
709/*
710 * initialise the WM8750 driver
711 * register the mixer and dsp interfaces with the kernel
712 */
7084a42b
MB		 713static int wm8750_init(struct snd_soc_device *socdev,
714 enum snd_soc_control_type control)
abadfc92 715{
6627a653 716 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 717 int reg, ret = 0;
718
719 codec->name = "WM8750";
720 codec->owner = THIS_MODULE;
0be9898a 721 codec->set_bias_level = wm8750_set_bias_level;
abadfc92
RP		 722 codec->dai = &wm8750_dai;
723 codec->num_dai = 1;
d751b233 724 codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
713fb939 725 codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
abadfc92
RP		 726 if (codec->reg_cache == NULL)
727 return -ENOMEM;
abadfc92 728
7084a42b 729 ret = snd_soc_codec_set_cache_io(codec, 7, 9, control);
17a52fd6
MB		 730 if (ret < 0) {
731 printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
732 goto err;
733 }
734
735 ret = wm8750_reset(codec);
736 if (ret < 0) {
737 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
738 goto err;
739 }
abadfc92
RP		 740
741 /* register pcms */
742 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
743 if (ret < 0) {
e35115a5 744 printk(KERN_ERR "wm8750: failed to create pcms\n");
17a52fd6 745 goto err;
abadfc92
RP		 746 }
747
748 /* charge output caps */
0be9898a
MB		 749 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
750 codec->bias_level = SND_SOC_BIAS_STANDBY;
1321b160 751 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
abadfc92
RP		 752
753 /* set the update bits */
17a52fd6
MB		 754 reg = snd_soc_read(codec, WM8750_LDAC);
755 snd_soc_write(codec, WM8750_LDAC, reg | 0x0100);
756 reg = snd_soc_read(codec, WM8750_RDAC);
757 snd_soc_write(codec, WM8750_RDAC, reg | 0x0100);
758 reg = snd_soc_read(codec, WM8750_LOUT1V);
759 snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100);
760 reg = snd_soc_read(codec, WM8750_ROUT1V);
761 snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100);
762 reg = snd_soc_read(codec, WM8750_LOUT2V);
763 snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100);
764 reg = snd_soc_read(codec, WM8750_ROUT2V);
765 snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100);
766 reg = snd_soc_read(codec, WM8750_LINVOL);
767 snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100);
768 reg = snd_soc_read(codec, WM8750_RINVOL);
769 snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100);
abadfc92 770
3e8e1952
IM		 771 snd_soc_add_controls(codec, wm8750_snd_controls,
772 ARRAY_SIZE(wm8750_snd_controls));
abadfc92 773 wm8750_add_widgets(codec);
e35115a5 774 return ret;
abadfc92 775
17a52fd6 776err:
e35115a5 777 kfree(codec->reg_cache);
abadfc92
RP		 778 return ret;
779}
780
781/* If the i2c layer weren't so broken, we could pass this kind of data
782 around */
783static struct snd_soc_device *wm8750_socdev;
784
42f3030f 785#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92
RP		 786
787/*
2f3dfaf5 788 * WM8750 2 wire address is determined by GPIO5
abadfc92
RP		 789 * state during powerup.
790 * low = 0x1a
791 * high = 0x1b
792 */
abadfc92 793
ee1d0099
JD		 794static int wm8750_i2c_probe(struct i2c_client *i2c,
795 const struct i2c_device_id *id)
abadfc92
RP		 796{
797 struct snd_soc_device *socdev = wm8750_socdev;
6627a653 798 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 799 int ret;
800
abadfc92
RP		 801 i2c_set_clientdata(i2c, codec);
802 codec->control_data = i2c;
803
7084a42b 804 ret = wm8750_init(socdev, SND_SOC_I2C);
ee1d0099 805 if (ret < 0)
a5c95e90 806 pr_err("failed to initialise WM8750\n");
abadfc92 807
abadfc92
RP		 808 return ret;
809}
810
ee1d0099 811static int wm8750_i2c_remove(struct i2c_client *client)
abadfc92
RP		 812{
813 struct snd_soc_codec *codec = i2c_get_clientdata(client);
abadfc92 814 kfree(codec->reg_cache);
abadfc92
RP		 815 return 0;
816}
817
ee1d0099
JD		 818static const struct i2c_device_id wm8750_i2c_id[] = {
819 { "wm8750", 0 },
820 { }
821};
822MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
abadfc92 823
abadfc92
RP		 824static struct i2c_driver wm8750_i2c_driver = {
825 .driver = {
826 .name = "WM8750 I2C Codec",
827 .owner = THIS_MODULE,
828 },
ee1d0099
JD		 829 .probe = wm8750_i2c_probe,
830 .remove = wm8750_i2c_remove,
831 .id_table = wm8750_i2c_id,
abadfc92
RP		 832};
833
ee1d0099
JD		 834static int wm8750_add_i2c_device(struct platform_device *pdev,
835 const struct wm8750_setup_data *setup)
836{
837 struct i2c_board_info info;
838 struct i2c_adapter *adapter;
839 struct i2c_client *client;
840 int ret;
841
842 ret = i2c_add_driver(&wm8750_i2c_driver);
843 if (ret != 0) {
844 dev_err(&pdev->dev, "can't add i2c driver\n");
845 return ret;
846 }
847
848 memset(&info, 0, sizeof(struct i2c_board_info));
849 info.addr = setup->i2c_address;
850 strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
851
852 adapter = i2c_get_adapter(setup->i2c_bus);
853 if (!adapter) {
854 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
855 setup->i2c_bus);
856 goto err_driver;
857 }
858
859 client = i2c_new_device(adapter, &info);
860 i2c_put_adapter(adapter);
861 if (!client) {
862 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
863 (unsigned int)info.addr);
864 goto err_driver;
865 }
866
867 return 0;
868
869err_driver:
870 i2c_del_driver(&wm8750_i2c_driver);
871 return -ENODEV;
872}
abadfc92
RP		 873#endif
874
2f3dfaf5
MB		 875#if defined(CONFIG_SPI_MASTER)
876static int __devinit wm8750_spi_probe(struct spi_device *spi)
877{
878 struct snd_soc_device *socdev = wm8750_socdev;
6627a653 879 struct snd_soc_codec *codec = socdev->card->codec;
2f3dfaf5
MB		 880 int ret;
881
882 codec->control_data = spi;
883
7084a42b 884 ret = wm8750_init(socdev, SND_SOC_SPI);
2f3dfaf5
MB		 885 if (ret < 0)
886 dev_err(&spi->dev, "failed to initialise WM8750\n");
887
888 return ret;
889}
890
891static int __devexit wm8750_spi_remove(struct spi_device *spi)
892{
893 return 0;
894}
895
896static struct spi_driver wm8750_spi_driver = {
897 .driver = {
898 .name = "wm8750",
899 .bus = &spi_bus_type,
900 .owner = THIS_MODULE,
901 },
902 .probe = wm8750_spi_probe,
903 .remove = __devexit_p(wm8750_spi_remove),
904};
2f3dfaf5
MB		 905#endif
906
abadfc92
RP		 907static int wm8750_probe(struct platform_device *pdev)
908{
909 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
910 struct wm8750_setup_data *setup = socdev->codec_data;
911 struct snd_soc_codec *codec;
4422b606 912 struct wm8750_priv *wm8750;
b7c9d852 913 int ret;
abadfc92 914
a5c95e90 915 pr_info("WM8750 Audio Codec %s", WM8750_VERSION);
abadfc92
RP		 916 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
917 if (codec == NULL)
918 return -ENOMEM;
919
4422b606
LG		 920 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
921 if (wm8750 == NULL) {
922 kfree(codec);
923 return -ENOMEM;
924 }
925
926 codec->private_data = wm8750;
6627a653 927 socdev->card->codec = codec;
abadfc92
RP		 928 mutex_init(&codec->mutex);
929 INIT_LIST_HEAD(&codec->dapm_widgets);
930 INIT_LIST_HEAD(&codec->dapm_paths);
931 wm8750_socdev = socdev;
1321b160 932 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
42f3030f 933
b7c9d852
MB		 934 ret = -ENODEV;
935
42f3030f 936#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92 937 if (setup->i2c_address) {
ee1d0099 938 ret = wm8750_add_i2c_device(pdev, setup);
abadfc92 939 }
abadfc92 940#endif
2f3dfaf5
MB		 941#if defined(CONFIG_SPI_MASTER)
942 if (setup->spi) {
2f3dfaf5
MB		 943 ret = spi_register_driver(&wm8750_spi_driver);
944 if (ret != 0)
945 printk(KERN_ERR "can't add spi driver");
946 }
947#endif
abadfc92 948
3051e41a
JD		 949 if (ret != 0) {
950 kfree(codec->private_data);
951 kfree(codec);
952 }
abadfc92
RP		 953 return ret;
954}
955
4422b606
LG		 956/*
957 * This function forces any delayed work to be queued and run.
958 */
959static int run_delayed_work(struct delayed_work *dwork)
960{
961 int ret;
962
963 /* cancel any work waiting to be queued. */
964 ret = cancel_delayed_work(dwork);
965
966 /* if there was any work waiting then we run it now and
967 * wait for it's completion */
968 if (ret) {
969 schedule_delayed_work(dwork, 0);
970 flush_scheduled_work();
971 }
972 return ret;
973}
974
abadfc92
RP		 975/* power down chip */
976static int wm8750_remove(struct platform_device *pdev)
977{
978 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 979 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 980
981 if (codec->control_data)
0be9898a 982 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
4422b606 983 run_delayed_work(&codec->delayed_work);
abadfc92
RP		 984 snd_soc_free_pcms(socdev);
985 snd_soc_dapm_free(socdev);
42f3030f 986#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ee1d0099 987 i2c_unregister_device(codec->control_data);
abadfc92 988 i2c_del_driver(&wm8750_i2c_driver);
2f3dfaf5
MB		 989#endif
990#if defined(CONFIG_SPI_MASTER)
991 spi_unregister_driver(&wm8750_spi_driver);
abadfc92 992#endif
4422b606 993 kfree(codec->private_data);
abadfc92
RP		 994 kfree(codec);
995
996 return 0;
997}
998
999struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1000 .probe = wm8750_probe,
1001 .remove = wm8750_remove,
1002 .suspend = wm8750_suspend,
1003 .resume = wm8750_resume,
1004};
abadfc92
RP		 1005EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1006
c9b3a40f 1007static int __init wm8750_modinit(void)
64089b84
MB		 1008{
1009 return snd_soc_register_dai(&wm8750_dai);
1010}
1011module_init(wm8750_modinit);
1012
1013static void __exit wm8750_exit(void)
1014{
1015 snd_soc_unregister_dai(&wm8750_dai);
1016}
1017module_exit(wm8750_exit);
1018
abadfc92
RP		 1019MODULE_DESCRIPTION("ASoC WM8750 driver");
1020MODULE_AUTHOR("Liam Girdwood");
1021MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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