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abadfc92 RP |
1 | /* |
2 | * wm8750.c -- WM8750 ALSA SoC audio driver | |
3 | * | |
4 | * Copyright 2005 Openedhand Ltd. | |
5 | * | |
6 | * Author: Richard Purdie <richard@openedhand.com> | |
7 | * | |
8 | * Based on WM8753.c | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/platform_device.h> | |
2f3dfaf5 | 22 | #include <linux/spi/spi.h> |
abadfc92 RP |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/soc.h> | |
27 | #include <sound/soc-dapm.h> | |
28 | #include <sound/initval.h> | |
29 | ||
30 | #include "wm8750.h" | |
31 | ||
4422b606 LG |
32 | /* codec private data */ |
33 | struct wm8750_priv { | |
34 | unsigned int sysclk; | |
35 | }; | |
36 | ||
abadfc92 RP |
37 | /* |
38 | * wm8750 register cache | |
39 | * We can't read the WM8750 register space when we | |
40 | * are using 2 wire for device control, so we cache them instead. | |
41 | */ | |
42 | static const u16 wm8750_reg[] = { | |
43 | 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ | |
44 | 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ | |
45 | 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ | |
46 | 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ | |
47 | 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ | |
48 | 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ | |
49 | 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ | |
50 | 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ | |
51 | 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ | |
52 | 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ | |
53 | 0x0079, 0x0079, 0x0079, /* 40 */ | |
54 | }; | |
55 | ||
17a52fd6 | 56 | #define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0) |
abadfc92 RP |
57 | |
58 | /* | |
59 | * WM8750 Controls | |
60 | */ | |
61 | static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"}; | |
62 | static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; | |
63 | static const char *wm8750_treble[] = {"8kHz", "4kHz"}; | |
64 | static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"}; | |
65 | static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"}; | |
66 | static const char *wm8750_3d_func[] = {"Capture", "Playback"}; | |
67 | static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"}; | |
68 | static const char *wm8750_ng_type[] = {"Constant PGA Gain", | |
69 | "Mute ADC Output"}; | |
70 | static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", | |
71 | "Differential"}; | |
72 | static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3", | |
73 | "Differential"}; | |
74 | static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", | |
75 | "ROUT1"}; | |
76 | static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"}; | |
77 | static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert", | |
78 | "L + R Invert"}; | |
79 | static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; | |
80 | static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)", | |
81 | "Mono (Right)", "Digital Mono"}; | |
82 | ||
83 | static const struct soc_enum wm8750_enum[] = { | |
84 | SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass), | |
85 | SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter), | |
86 | SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble), | |
87 | SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc), | |
88 | SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc), | |
89 | SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func), | |
90 | SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func), | |
91 | SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type), | |
92 | SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux), | |
93 | SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux), | |
94 | SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */ | |
95 | SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel), | |
96 | SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3), | |
97 | SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel), | |
98 | SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol), | |
99 | SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph), | |
100 | SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */ | |
101 | ||
102 | }; | |
103 | ||
104 | static const struct snd_kcontrol_new wm8750_snd_controls[] = { | |
105 | ||
106 | SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0), | |
107 | SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0), | |
108 | SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1), | |
109 | ||
bd903b6e | 110 | SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V, |
abadfc92 | 111 | WM8750_ROUT1V, 7, 1, 0), |
bd903b6e | 112 | SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V, |
abadfc92 RP |
113 | WM8750_ROUT2V, 7, 1, 0), |
114 | ||
115 | SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), | |
116 | ||
117 | SOC_ENUM("Capture Polarity", wm8750_enum[14]), | |
118 | SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0), | |
119 | SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0), | |
120 | ||
121 | SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0), | |
122 | ||
123 | SOC_ENUM("Bass Boost", wm8750_enum[0]), | |
124 | SOC_ENUM("Bass Filter", wm8750_enum[1]), | |
125 | SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1), | |
126 | ||
6a7b8cf4 | 127 | SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1), |
abadfc92 RP |
128 | SOC_ENUM("Treble Cut-off", wm8750_enum[2]), |
129 | ||
130 | SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0), | |
131 | SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0), | |
132 | SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), | |
133 | SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), | |
134 | SOC_ENUM("3D Mode", wm8750_enum[5]), | |
135 | ||
136 | SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0), | |
137 | SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0), | |
138 | SOC_ENUM("ALC Capture Function", wm8750_enum[6]), | |
139 | SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0), | |
140 | SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0), | |
141 | SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0), | |
142 | SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0), | |
143 | SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0), | |
144 | SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]), | |
145 | SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0), | |
146 | ||
147 | SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0), | |
148 | SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0), | |
149 | ||
150 | SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0), | |
151 | SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0), | |
152 | ||
bd903b6e | 153 | SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0), |
abadfc92 RP |
154 | |
155 | /* Unimplemented */ | |
156 | /* ADCDAC Bit 0 - ADCHPD */ | |
157 | /* ADCDAC Bit 4 - HPOR */ | |
158 | /* ADCTL1 Bit 2,3 - DATSEL */ | |
159 | /* ADCTL1 Bit 4,5 - DMONOMIX */ | |
160 | /* ADCTL1 Bit 6,7 - VSEL */ | |
161 | /* ADCTL2 Bit 2 - LRCM */ | |
162 | /* ADCTL2 Bit 3 - TRI */ | |
163 | /* ADCTL3 Bit 5 - HPFLREN */ | |
164 | /* ADCTL3 Bit 6 - VROI */ | |
165 | /* ADCTL3 Bit 7,8 - ADCLRM */ | |
166 | /* ADCIN Bit 4 - LDCM */ | |
167 | /* ADCIN Bit 5 - RDCM */ | |
168 | ||
169 | SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0), | |
170 | ||
171 | SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1, | |
172 | WM8750_LOUTM2, 4, 7, 1), | |
173 | SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1, | |
174 | WM8750_ROUTM2, 4, 7, 1), | |
175 | SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1, | |
176 | WM8750_MOUTM2, 4, 7, 1), | |
177 | ||
178 | SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0), | |
179 | ||
bd903b6e LG |
180 | SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V, |
181 | 0, 127, 0), | |
182 | SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V, | |
183 | 0, 127, 0), | |
abadfc92 RP |
184 | |
185 | SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0), | |
186 | ||
187 | }; | |
188 | ||
abadfc92 RP |
189 | /* |
190 | * DAPM Controls | |
191 | */ | |
192 | ||
193 | /* Left Mixer */ | |
194 | static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = { | |
195 | SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0), | |
196 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0), | |
197 | SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0), | |
198 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0), | |
199 | }; | |
200 | ||
201 | /* Right Mixer */ | |
202 | static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = { | |
203 | SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0), | |
204 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0), | |
205 | SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0), | |
206 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0), | |
207 | }; | |
208 | ||
209 | /* Mono Mixer */ | |
210 | static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = { | |
211 | SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0), | |
212 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0), | |
213 | SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0), | |
214 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0), | |
215 | }; | |
216 | ||
217 | /* Left Line Mux */ | |
218 | static const struct snd_kcontrol_new wm8750_left_line_controls = | |
219 | SOC_DAPM_ENUM("Route", wm8750_enum[8]); | |
220 | ||
221 | /* Right Line Mux */ | |
222 | static const struct snd_kcontrol_new wm8750_right_line_controls = | |
223 | SOC_DAPM_ENUM("Route", wm8750_enum[9]); | |
224 | ||
225 | /* Left PGA Mux */ | |
226 | static const struct snd_kcontrol_new wm8750_left_pga_controls = | |
227 | SOC_DAPM_ENUM("Route", wm8750_enum[10]); | |
228 | ||
229 | /* Right PGA Mux */ | |
230 | static const struct snd_kcontrol_new wm8750_right_pga_controls = | |
231 | SOC_DAPM_ENUM("Route", wm8750_enum[11]); | |
232 | ||
233 | /* Out 3 Mux */ | |
234 | static const struct snd_kcontrol_new wm8750_out3_controls = | |
235 | SOC_DAPM_ENUM("Route", wm8750_enum[12]); | |
236 | ||
237 | /* Differential Mux */ | |
238 | static const struct snd_kcontrol_new wm8750_diffmux_controls = | |
239 | SOC_DAPM_ENUM("Route", wm8750_enum[13]); | |
240 | ||
241 | /* Mono ADC Mux */ | |
242 | static const struct snd_kcontrol_new wm8750_monomux_controls = | |
243 | SOC_DAPM_ENUM("Route", wm8750_enum[16]); | |
244 | ||
245 | static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = { | |
246 | SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, | |
247 | &wm8750_left_mixer_controls[0], | |
248 | ARRAY_SIZE(wm8750_left_mixer_controls)), | |
249 | SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, | |
250 | &wm8750_right_mixer_controls[0], | |
251 | ARRAY_SIZE(wm8750_right_mixer_controls)), | |
252 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0, | |
253 | &wm8750_mono_mixer_controls[0], | |
254 | ARRAY_SIZE(wm8750_mono_mixer_controls)), | |
255 | ||
256 | SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0), | |
257 | SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0), | |
258 | SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0), | |
259 | SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0), | |
260 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0), | |
261 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0), | |
262 | ||
263 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0), | |
264 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0), | |
265 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0), | |
266 | ||
267 | SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0, | |
268 | &wm8750_left_pga_controls), | |
269 | SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0, | |
270 | &wm8750_right_pga_controls), | |
271 | SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, | |
272 | &wm8750_left_line_controls), | |
273 | SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, | |
274 | &wm8750_right_line_controls), | |
275 | ||
276 | SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls), | |
277 | SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0), | |
278 | SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0), | |
279 | ||
280 | SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, | |
281 | &wm8750_diffmux_controls), | |
282 | SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, | |
283 | &wm8750_monomux_controls), | |
284 | SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, | |
285 | &wm8750_monomux_controls), | |
286 | ||
287 | SND_SOC_DAPM_OUTPUT("LOUT1"), | |
288 | SND_SOC_DAPM_OUTPUT("ROUT1"), | |
289 | SND_SOC_DAPM_OUTPUT("LOUT2"), | |
290 | SND_SOC_DAPM_OUTPUT("ROUT2"), | |
23ba79bd | 291 | SND_SOC_DAPM_OUTPUT("MONO1"), |
abadfc92 | 292 | SND_SOC_DAPM_OUTPUT("OUT3"), |
04489eeb | 293 | SND_SOC_DAPM_OUTPUT("VREF"), |
abadfc92 RP |
294 | |
295 | SND_SOC_DAPM_INPUT("LINPUT1"), | |
296 | SND_SOC_DAPM_INPUT("LINPUT2"), | |
297 | SND_SOC_DAPM_INPUT("LINPUT3"), | |
298 | SND_SOC_DAPM_INPUT("RINPUT1"), | |
299 | SND_SOC_DAPM_INPUT("RINPUT2"), | |
300 | SND_SOC_DAPM_INPUT("RINPUT3"), | |
301 | }; | |
302 | ||
a65f0568 | 303 | static const struct snd_soc_dapm_route audio_map[] = { |
abadfc92 RP |
304 | /* left mixer */ |
305 | {"Left Mixer", "Playback Switch", "Left DAC"}, | |
306 | {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
307 | {"Left Mixer", "Right Playback Switch", "Right DAC"}, | |
308 | {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
309 | ||
310 | /* right mixer */ | |
311 | {"Right Mixer", "Left Playback Switch", "Left DAC"}, | |
312 | {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
313 | {"Right Mixer", "Playback Switch", "Right DAC"}, | |
314 | {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
315 | ||
316 | /* left out 1 */ | |
317 | {"Left Out 1", NULL, "Left Mixer"}, | |
318 | {"LOUT1", NULL, "Left Out 1"}, | |
319 | ||
320 | /* left out 2 */ | |
321 | {"Left Out 2", NULL, "Left Mixer"}, | |
322 | {"LOUT2", NULL, "Left Out 2"}, | |
323 | ||
324 | /* right out 1 */ | |
325 | {"Right Out 1", NULL, "Right Mixer"}, | |
326 | {"ROUT1", NULL, "Right Out 1"}, | |
327 | ||
328 | /* right out 2 */ | |
329 | {"Right Out 2", NULL, "Right Mixer"}, | |
330 | {"ROUT2", NULL, "Right Out 2"}, | |
331 | ||
332 | /* mono mixer */ | |
333 | {"Mono Mixer", "Left Playback Switch", "Left DAC"}, | |
334 | {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
335 | {"Mono Mixer", "Right Playback Switch", "Right DAC"}, | |
336 | {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
337 | ||
338 | /* mono out */ | |
339 | {"Mono Out 1", NULL, "Mono Mixer"}, | |
340 | {"MONO1", NULL, "Mono Out 1"}, | |
341 | ||
342 | /* out 3 */ | |
343 | {"Out3 Mux", "VREF", "VREF"}, | |
344 | {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, | |
345 | {"Out3 Mux", "ROUT1", "Right Mixer"}, | |
346 | {"Out3 Mux", "MonoOut", "MONO1"}, | |
347 | {"Out 3", NULL, "Out3 Mux"}, | |
348 | {"OUT3", NULL, "Out 3"}, | |
349 | ||
350 | /* Left Line Mux */ | |
351 | {"Left Line Mux", "Line 1", "LINPUT1"}, | |
352 | {"Left Line Mux", "Line 2", "LINPUT2"}, | |
353 | {"Left Line Mux", "Line 3", "LINPUT3"}, | |
354 | {"Left Line Mux", "PGA", "Left PGA Mux"}, | |
355 | {"Left Line Mux", "Differential", "Differential Mux"}, | |
356 | ||
357 | /* Right Line Mux */ | |
358 | {"Right Line Mux", "Line 1", "RINPUT1"}, | |
359 | {"Right Line Mux", "Line 2", "RINPUT2"}, | |
360 | {"Right Line Mux", "Line 3", "RINPUT3"}, | |
361 | {"Right Line Mux", "PGA", "Right PGA Mux"}, | |
362 | {"Right Line Mux", "Differential", "Differential Mux"}, | |
363 | ||
364 | /* Left PGA Mux */ | |
365 | {"Left PGA Mux", "Line 1", "LINPUT1"}, | |
366 | {"Left PGA Mux", "Line 2", "LINPUT2"}, | |
367 | {"Left PGA Mux", "Line 3", "LINPUT3"}, | |
368 | {"Left PGA Mux", "Differential", "Differential Mux"}, | |
369 | ||
370 | /* Right PGA Mux */ | |
371 | {"Right PGA Mux", "Line 1", "RINPUT1"}, | |
372 | {"Right PGA Mux", "Line 2", "RINPUT2"}, | |
373 | {"Right PGA Mux", "Line 3", "RINPUT3"}, | |
374 | {"Right PGA Mux", "Differential", "Differential Mux"}, | |
375 | ||
376 | /* Differential Mux */ | |
377 | {"Differential Mux", "Line 1", "LINPUT1"}, | |
378 | {"Differential Mux", "Line 1", "RINPUT1"}, | |
379 | {"Differential Mux", "Line 2", "LINPUT2"}, | |
380 | {"Differential Mux", "Line 2", "RINPUT2"}, | |
381 | ||
382 | /* Left ADC Mux */ | |
383 | {"Left ADC Mux", "Stereo", "Left PGA Mux"}, | |
384 | {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, | |
385 | {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, | |
386 | ||
387 | /* Right ADC Mux */ | |
388 | {"Right ADC Mux", "Stereo", "Right PGA Mux"}, | |
389 | {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, | |
390 | {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, | |
391 | ||
392 | /* ADC */ | |
393 | {"Left ADC", NULL, "Left ADC Mux"}, | |
394 | {"Right ADC", NULL, "Right ADC Mux"}, | |
abadfc92 RP |
395 | }; |
396 | ||
397 | static int wm8750_add_widgets(struct snd_soc_codec *codec) | |
398 | { | |
a65f0568 MB |
399 | snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets, |
400 | ARRAY_SIZE(wm8750_dapm_widgets)); | |
abadfc92 | 401 | |
a65f0568 | 402 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); |
abadfc92 | 403 | |
abadfc92 RP |
404 | return 0; |
405 | } | |
406 | ||
407 | struct _coeff_div { | |
408 | u32 mclk; | |
409 | u32 rate; | |
410 | u16 fs; | |
411 | u8 sr:5; | |
412 | u8 usb:1; | |
413 | }; | |
414 | ||
415 | /* codec hifi mclk clock divider coefficients */ | |
416 | static const struct _coeff_div coeff_div[] = { | |
417 | /* 8k */ | |
418 | {12288000, 8000, 1536, 0x6, 0x0}, | |
419 | {11289600, 8000, 1408, 0x16, 0x0}, | |
420 | {18432000, 8000, 2304, 0x7, 0x0}, | |
421 | {16934400, 8000, 2112, 0x17, 0x0}, | |
422 | {12000000, 8000, 1500, 0x6, 0x1}, | |
423 | ||
424 | /* 11.025k */ | |
425 | {11289600, 11025, 1024, 0x18, 0x0}, | |
426 | {16934400, 11025, 1536, 0x19, 0x0}, | |
427 | {12000000, 11025, 1088, 0x19, 0x1}, | |
428 | ||
429 | /* 16k */ | |
430 | {12288000, 16000, 768, 0xa, 0x0}, | |
431 | {18432000, 16000, 1152, 0xb, 0x0}, | |
432 | {12000000, 16000, 750, 0xa, 0x1}, | |
433 | ||
434 | /* 22.05k */ | |
435 | {11289600, 22050, 512, 0x1a, 0x0}, | |
436 | {16934400, 22050, 768, 0x1b, 0x0}, | |
437 | {12000000, 22050, 544, 0x1b, 0x1}, | |
438 | ||
439 | /* 32k */ | |
440 | {12288000, 32000, 384, 0xc, 0x0}, | |
441 | {18432000, 32000, 576, 0xd, 0x0}, | |
442 | {12000000, 32000, 375, 0xa, 0x1}, | |
443 | ||
444 | /* 44.1k */ | |
445 | {11289600, 44100, 256, 0x10, 0x0}, | |
446 | {16934400, 44100, 384, 0x11, 0x0}, | |
447 | {12000000, 44100, 272, 0x11, 0x1}, | |
448 | ||
449 | /* 48k */ | |
450 | {12288000, 48000, 256, 0x0, 0x0}, | |
451 | {18432000, 48000, 384, 0x1, 0x0}, | |
452 | {12000000, 48000, 250, 0x0, 0x1}, | |
453 | ||
454 | /* 88.2k */ | |
455 | {11289600, 88200, 128, 0x1e, 0x0}, | |
456 | {16934400, 88200, 192, 0x1f, 0x0}, | |
457 | {12000000, 88200, 136, 0x1f, 0x1}, | |
458 | ||
459 | /* 96k */ | |
460 | {12288000, 96000, 128, 0xe, 0x0}, | |
461 | {18432000, 96000, 192, 0xf, 0x0}, | |
462 | {12000000, 96000, 125, 0xe, 0x1}, | |
463 | }; | |
464 | ||
465 | static inline int get_coeff(int mclk, int rate) | |
466 | { | |
467 | int i; | |
468 | ||
469 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
470 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
471 | return i; | |
472 | } | |
a71a468a LG |
473 | |
474 | printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n", | |
475 | mclk, rate); | |
abadfc92 RP |
476 | return -EINVAL; |
477 | } | |
478 | ||
e550e17f | 479 | static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
4422b606 | 480 | int clk_id, unsigned int freq, int dir) |
abadfc92 | 481 | { |
4422b606 LG |
482 | struct snd_soc_codec *codec = codec_dai->codec; |
483 | struct wm8750_priv *wm8750 = codec->private_data; | |
484 | ||
485 | switch (freq) { | |
486 | case 11289600: | |
487 | case 12000000: | |
488 | case 12288000: | |
489 | case 16934400: | |
490 | case 18432000: | |
491 | wm8750->sysclk = freq; | |
492 | return 0; | |
493 | } | |
494 | return -EINVAL; | |
abadfc92 RP |
495 | } |
496 | ||
e550e17f | 497 | static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai, |
4422b606 | 498 | unsigned int fmt) |
abadfc92 | 499 | { |
4422b606 LG |
500 | struct snd_soc_codec *codec = codec_dai->codec; |
501 | u16 iface = 0; | |
abadfc92 RP |
502 | |
503 | /* set master/slave audio interface */ | |
4422b606 | 504 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
abadfc92 RP |
505 | case SND_SOC_DAIFMT_CBM_CFM: |
506 | iface = 0x0040; | |
507 | break; | |
508 | case SND_SOC_DAIFMT_CBS_CFS: | |
509 | break; | |
4422b606 LG |
510 | default: |
511 | return -EINVAL; | |
abadfc92 RP |
512 | } |
513 | ||
514 | /* interface format */ | |
4422b606 | 515 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
abadfc92 RP |
516 | case SND_SOC_DAIFMT_I2S: |
517 | iface |= 0x0002; | |
518 | break; | |
519 | case SND_SOC_DAIFMT_RIGHT_J: | |
520 | break; | |
521 | case SND_SOC_DAIFMT_LEFT_J: | |
522 | iface |= 0x0001; | |
523 | break; | |
524 | case SND_SOC_DAIFMT_DSP_A: | |
525 | iface |= 0x0003; | |
526 | break; | |
527 | case SND_SOC_DAIFMT_DSP_B: | |
528 | iface |= 0x0013; | |
529 | break; | |
4422b606 LG |
530 | default: |
531 | return -EINVAL; | |
abadfc92 RP |
532 | } |
533 | ||
534 | /* clock inversion */ | |
4422b606 | 535 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
abadfc92 RP |
536 | case SND_SOC_DAIFMT_NB_NF: |
537 | break; | |
538 | case SND_SOC_DAIFMT_IB_IF: | |
539 | iface |= 0x0090; | |
540 | break; | |
541 | case SND_SOC_DAIFMT_IB_NF: | |
542 | iface |= 0x0080; | |
543 | break; | |
544 | case SND_SOC_DAIFMT_NB_IF: | |
545 | iface |= 0x0010; | |
546 | break; | |
4422b606 LG |
547 | default: |
548 | return -EINVAL; | |
abadfc92 RP |
549 | } |
550 | ||
17a52fd6 | 551 | snd_soc_write(codec, WM8750_IFACE, iface); |
4422b606 LG |
552 | return 0; |
553 | } | |
554 | ||
555 | static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
556 | struct snd_pcm_hw_params *params, |
557 | struct snd_soc_dai *dai) | |
4422b606 LG |
558 | { |
559 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
560 | struct snd_soc_device *socdev = rtd->socdev; | |
6627a653 | 561 | struct snd_soc_codec *codec = socdev->card->codec; |
4422b606 | 562 | struct wm8750_priv *wm8750 = codec->private_data; |
17a52fd6 MB |
563 | u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3; |
564 | u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0; | |
4422b606 LG |
565 | int coeff = get_coeff(wm8750->sysclk, params_rate(params)); |
566 | ||
567 | /* bit size */ | |
568 | switch (params_format(params)) { | |
569 | case SNDRV_PCM_FORMAT_S16_LE: | |
abadfc92 | 570 | break; |
4422b606 LG |
571 | case SNDRV_PCM_FORMAT_S20_3LE: |
572 | iface |= 0x0004; | |
abadfc92 | 573 | break; |
4422b606 LG |
574 | case SNDRV_PCM_FORMAT_S24_LE: |
575 | iface |= 0x0008; | |
abadfc92 | 576 | break; |
4422b606 LG |
577 | case SNDRV_PCM_FORMAT_S32_LE: |
578 | iface |= 0x000c; | |
abadfc92 RP |
579 | break; |
580 | } | |
581 | ||
582 | /* set iface & srate */ | |
17a52fd6 | 583 | snd_soc_write(codec, WM8750_IFACE, iface); |
4422b606 | 584 | if (coeff >= 0) |
17a52fd6 | 585 | snd_soc_write(codec, WM8750_SRATE, srate | |
4422b606 | 586 | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); |
abadfc92 RP |
587 | |
588 | return 0; | |
589 | } | |
590 | ||
e550e17f | 591 | static int wm8750_mute(struct snd_soc_dai *dai, int mute) |
abadfc92 | 592 | { |
4422b606 | 593 | struct snd_soc_codec *codec = dai->codec; |
17a52fd6 | 594 | u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7; |
4422b606 | 595 | |
abadfc92 | 596 | if (mute) |
17a52fd6 | 597 | snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8); |
abadfc92 | 598 | else |
17a52fd6 | 599 | snd_soc_write(codec, WM8750_ADCDAC, mute_reg); |
abadfc92 RP |
600 | return 0; |
601 | } | |
602 | ||
0be9898a MB |
603 | static int wm8750_set_bias_level(struct snd_soc_codec *codec, |
604 | enum snd_soc_bias_level level) | |
abadfc92 | 605 | { |
17a52fd6 | 606 | u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e; |
abadfc92 | 607 | |
0be9898a MB |
608 | switch (level) { |
609 | case SND_SOC_BIAS_ON: | |
abadfc92 | 610 | /* set vmid to 50k and unmute dac */ |
17a52fd6 | 611 | snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); |
abadfc92 | 612 | break; |
0be9898a | 613 | case SND_SOC_BIAS_PREPARE: |
abadfc92 | 614 | break; |
0be9898a | 615 | case SND_SOC_BIAS_STANDBY: |
dd76769d MB |
616 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
617 | /* Set VMID to 5k */ | |
618 | snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); | |
619 | ||
620 | /* ...and ramp */ | |
621 | msleep(1000); | |
622 | } | |
623 | ||
abadfc92 | 624 | /* mute dac and set vmid to 500k, enable VREF */ |
17a52fd6 | 625 | snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141); |
abadfc92 | 626 | break; |
0be9898a | 627 | case SND_SOC_BIAS_OFF: |
17a52fd6 | 628 | snd_soc_write(codec, WM8750_PWR1, 0x0001); |
abadfc92 RP |
629 | break; |
630 | } | |
0be9898a | 631 | codec->bias_level = level; |
abadfc92 RP |
632 | return 0; |
633 | } | |
634 | ||
4422b606 | 635 | #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ |
42f3030f MB |
636 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ |
637 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
4422b606 LG |
638 | |
639 | #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
640 | SNDRV_PCM_FMTBIT_S24_LE) | |
641 | ||
6335d055 EM |
642 | static struct snd_soc_dai_ops wm8750_dai_ops = { |
643 | .hw_params = wm8750_pcm_hw_params, | |
644 | .digital_mute = wm8750_mute, | |
645 | .set_fmt = wm8750_set_dai_fmt, | |
646 | .set_sysclk = wm8750_set_dai_sysclk, | |
647 | }; | |
648 | ||
e550e17f | 649 | struct snd_soc_dai wm8750_dai = { |
abadfc92 RP |
650 | .name = "WM8750", |
651 | .playback = { | |
652 | .stream_name = "Playback", | |
653 | .channels_min = 1, | |
654 | .channels_max = 2, | |
4422b606 LG |
655 | .rates = WM8750_RATES, |
656 | .formats = WM8750_FORMATS,}, | |
abadfc92 RP |
657 | .capture = { |
658 | .stream_name = "Capture", | |
659 | .channels_min = 1, | |
660 | .channels_max = 2, | |
4422b606 LG |
661 | .rates = WM8750_RATES, |
662 | .formats = WM8750_FORMATS,}, | |
6335d055 | 663 | .ops = &wm8750_dai_ops, |
abadfc92 RP |
664 | }; |
665 | EXPORT_SYMBOL_GPL(wm8750_dai); | |
666 | ||
abadfc92 RP |
667 | static int wm8750_suspend(struct platform_device *pdev, pm_message_t state) |
668 | { | |
669 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
6627a653 | 670 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 | 671 | |
0be9898a | 672 | wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); |
abadfc92 RP |
673 | return 0; |
674 | } | |
675 | ||
676 | static int wm8750_resume(struct platform_device *pdev) | |
677 | { | |
678 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
6627a653 | 679 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 RP |
680 | int i; |
681 | u8 data[2]; | |
682 | u16 *cache = codec->reg_cache; | |
683 | ||
684 | /* Sync reg_cache with the hardware */ | |
685 | for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) { | |
686 | if (i == WM8750_RESET) | |
687 | continue; | |
688 | data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); | |
689 | data[1] = cache[i] & 0x00ff; | |
690 | codec->hw_write(codec->control_data, data, 2); | |
691 | } | |
692 | ||
0be9898a | 693 | wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
abadfc92 | 694 | |
abadfc92 RP |
695 | return 0; |
696 | } | |
697 | ||
698 | /* | |
699 | * initialise the WM8750 driver | |
700 | * register the mixer and dsp interfaces with the kernel | |
701 | */ | |
7084a42b MB |
702 | static int wm8750_init(struct snd_soc_device *socdev, |
703 | enum snd_soc_control_type control) | |
abadfc92 | 704 | { |
6627a653 | 705 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 RP |
706 | int reg, ret = 0; |
707 | ||
708 | codec->name = "WM8750"; | |
709 | codec->owner = THIS_MODULE; | |
0be9898a | 710 | codec->set_bias_level = wm8750_set_bias_level; |
abadfc92 RP |
711 | codec->dai = &wm8750_dai; |
712 | codec->num_dai = 1; | |
d751b233 | 713 | codec->reg_cache_size = ARRAY_SIZE(wm8750_reg); |
713fb939 | 714 | codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL); |
abadfc92 RP |
715 | if (codec->reg_cache == NULL) |
716 | return -ENOMEM; | |
abadfc92 | 717 | |
7084a42b | 718 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, control); |
17a52fd6 MB |
719 | if (ret < 0) { |
720 | printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret); | |
721 | goto err; | |
722 | } | |
723 | ||
724 | ret = wm8750_reset(codec); | |
725 | if (ret < 0) { | |
726 | printk(KERN_ERR "wm8750: failed to reset: %d\n", ret); | |
727 | goto err; | |
728 | } | |
abadfc92 RP |
729 | |
730 | /* register pcms */ | |
731 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
732 | if (ret < 0) { | |
e35115a5 | 733 | printk(KERN_ERR "wm8750: failed to create pcms\n"); |
17a52fd6 | 734 | goto err; |
abadfc92 RP |
735 | } |
736 | ||
737 | /* charge output caps */ | |
dd76769d | 738 | wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
abadfc92 RP |
739 | |
740 | /* set the update bits */ | |
17a52fd6 MB |
741 | reg = snd_soc_read(codec, WM8750_LDAC); |
742 | snd_soc_write(codec, WM8750_LDAC, reg | 0x0100); | |
743 | reg = snd_soc_read(codec, WM8750_RDAC); | |
744 | snd_soc_write(codec, WM8750_RDAC, reg | 0x0100); | |
745 | reg = snd_soc_read(codec, WM8750_LOUT1V); | |
746 | snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100); | |
747 | reg = snd_soc_read(codec, WM8750_ROUT1V); | |
748 | snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100); | |
749 | reg = snd_soc_read(codec, WM8750_LOUT2V); | |
750 | snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100); | |
751 | reg = snd_soc_read(codec, WM8750_ROUT2V); | |
752 | snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100); | |
753 | reg = snd_soc_read(codec, WM8750_LINVOL); | |
754 | snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100); | |
755 | reg = snd_soc_read(codec, WM8750_RINVOL); | |
756 | snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100); | |
abadfc92 | 757 | |
3e8e1952 IM |
758 | snd_soc_add_controls(codec, wm8750_snd_controls, |
759 | ARRAY_SIZE(wm8750_snd_controls)); | |
abadfc92 | 760 | wm8750_add_widgets(codec); |
e35115a5 | 761 | return ret; |
abadfc92 | 762 | |
17a52fd6 | 763 | err: |
e35115a5 | 764 | kfree(codec->reg_cache); |
abadfc92 RP |
765 | return ret; |
766 | } | |
767 | ||
768 | /* If the i2c layer weren't so broken, we could pass this kind of data | |
769 | around */ | |
770 | static struct snd_soc_device *wm8750_socdev; | |
771 | ||
42f3030f | 772 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
abadfc92 RP |
773 | |
774 | /* | |
2f3dfaf5 | 775 | * WM8750 2 wire address is determined by GPIO5 |
abadfc92 RP |
776 | * state during powerup. |
777 | * low = 0x1a | |
778 | * high = 0x1b | |
779 | */ | |
abadfc92 | 780 | |
ee1d0099 JD |
781 | static int wm8750_i2c_probe(struct i2c_client *i2c, |
782 | const struct i2c_device_id *id) | |
abadfc92 RP |
783 | { |
784 | struct snd_soc_device *socdev = wm8750_socdev; | |
6627a653 | 785 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 RP |
786 | int ret; |
787 | ||
abadfc92 RP |
788 | i2c_set_clientdata(i2c, codec); |
789 | codec->control_data = i2c; | |
790 | ||
7084a42b | 791 | ret = wm8750_init(socdev, SND_SOC_I2C); |
ee1d0099 | 792 | if (ret < 0) |
a5c95e90 | 793 | pr_err("failed to initialise WM8750\n"); |
abadfc92 | 794 | |
abadfc92 RP |
795 | return ret; |
796 | } | |
797 | ||
ee1d0099 | 798 | static int wm8750_i2c_remove(struct i2c_client *client) |
abadfc92 RP |
799 | { |
800 | struct snd_soc_codec *codec = i2c_get_clientdata(client); | |
abadfc92 | 801 | kfree(codec->reg_cache); |
abadfc92 RP |
802 | return 0; |
803 | } | |
804 | ||
ee1d0099 JD |
805 | static const struct i2c_device_id wm8750_i2c_id[] = { |
806 | { "wm8750", 0 }, | |
807 | { } | |
808 | }; | |
809 | MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id); | |
abadfc92 | 810 | |
abadfc92 RP |
811 | static struct i2c_driver wm8750_i2c_driver = { |
812 | .driver = { | |
813 | .name = "WM8750 I2C Codec", | |
814 | .owner = THIS_MODULE, | |
815 | }, | |
ee1d0099 JD |
816 | .probe = wm8750_i2c_probe, |
817 | .remove = wm8750_i2c_remove, | |
818 | .id_table = wm8750_i2c_id, | |
abadfc92 RP |
819 | }; |
820 | ||
ee1d0099 JD |
821 | static int wm8750_add_i2c_device(struct platform_device *pdev, |
822 | const struct wm8750_setup_data *setup) | |
823 | { | |
824 | struct i2c_board_info info; | |
825 | struct i2c_adapter *adapter; | |
826 | struct i2c_client *client; | |
827 | int ret; | |
828 | ||
829 | ret = i2c_add_driver(&wm8750_i2c_driver); | |
830 | if (ret != 0) { | |
831 | dev_err(&pdev->dev, "can't add i2c driver\n"); | |
832 | return ret; | |
833 | } | |
834 | ||
835 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
836 | info.addr = setup->i2c_address; | |
837 | strlcpy(info.type, "wm8750", I2C_NAME_SIZE); | |
838 | ||
839 | adapter = i2c_get_adapter(setup->i2c_bus); | |
840 | if (!adapter) { | |
841 | dev_err(&pdev->dev, "can't get i2c adapter %d\n", | |
842 | setup->i2c_bus); | |
843 | goto err_driver; | |
844 | } | |
845 | ||
846 | client = i2c_new_device(adapter, &info); | |
847 | i2c_put_adapter(adapter); | |
848 | if (!client) { | |
849 | dev_err(&pdev->dev, "can't add i2c device at 0x%x\n", | |
850 | (unsigned int)info.addr); | |
851 | goto err_driver; | |
852 | } | |
853 | ||
854 | return 0; | |
855 | ||
856 | err_driver: | |
857 | i2c_del_driver(&wm8750_i2c_driver); | |
858 | return -ENODEV; | |
859 | } | |
abadfc92 RP |
860 | #endif |
861 | ||
2f3dfaf5 MB |
862 | #if defined(CONFIG_SPI_MASTER) |
863 | static int __devinit wm8750_spi_probe(struct spi_device *spi) | |
864 | { | |
865 | struct snd_soc_device *socdev = wm8750_socdev; | |
6627a653 | 866 | struct snd_soc_codec *codec = socdev->card->codec; |
2f3dfaf5 MB |
867 | int ret; |
868 | ||
869 | codec->control_data = spi; | |
870 | ||
7084a42b | 871 | ret = wm8750_init(socdev, SND_SOC_SPI); |
2f3dfaf5 MB |
872 | if (ret < 0) |
873 | dev_err(&spi->dev, "failed to initialise WM8750\n"); | |
874 | ||
875 | return ret; | |
876 | } | |
877 | ||
878 | static int __devexit wm8750_spi_remove(struct spi_device *spi) | |
879 | { | |
880 | return 0; | |
881 | } | |
882 | ||
883 | static struct spi_driver wm8750_spi_driver = { | |
884 | .driver = { | |
885 | .name = "wm8750", | |
886 | .bus = &spi_bus_type, | |
887 | .owner = THIS_MODULE, | |
888 | }, | |
889 | .probe = wm8750_spi_probe, | |
890 | .remove = __devexit_p(wm8750_spi_remove), | |
891 | }; | |
2f3dfaf5 MB |
892 | #endif |
893 | ||
abadfc92 RP |
894 | static int wm8750_probe(struct platform_device *pdev) |
895 | { | |
896 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
897 | struct wm8750_setup_data *setup = socdev->codec_data; | |
898 | struct snd_soc_codec *codec; | |
4422b606 | 899 | struct wm8750_priv *wm8750; |
b7c9d852 | 900 | int ret; |
abadfc92 | 901 | |
abadfc92 RP |
902 | codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); |
903 | if (codec == NULL) | |
904 | return -ENOMEM; | |
905 | ||
4422b606 LG |
906 | wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); |
907 | if (wm8750 == NULL) { | |
908 | kfree(codec); | |
909 | return -ENOMEM; | |
910 | } | |
911 | ||
912 | codec->private_data = wm8750; | |
6627a653 | 913 | socdev->card->codec = codec; |
abadfc92 RP |
914 | mutex_init(&codec->mutex); |
915 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
916 | INIT_LIST_HEAD(&codec->dapm_paths); | |
917 | wm8750_socdev = socdev; | |
42f3030f | 918 | |
b7c9d852 MB |
919 | ret = -ENODEV; |
920 | ||
42f3030f | 921 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
abadfc92 | 922 | if (setup->i2c_address) { |
ee1d0099 | 923 | ret = wm8750_add_i2c_device(pdev, setup); |
abadfc92 | 924 | } |
abadfc92 | 925 | #endif |
2f3dfaf5 MB |
926 | #if defined(CONFIG_SPI_MASTER) |
927 | if (setup->spi) { | |
2f3dfaf5 MB |
928 | ret = spi_register_driver(&wm8750_spi_driver); |
929 | if (ret != 0) | |
930 | printk(KERN_ERR "can't add spi driver"); | |
931 | } | |
932 | #endif | |
abadfc92 | 933 | |
3051e41a JD |
934 | if (ret != 0) { |
935 | kfree(codec->private_data); | |
936 | kfree(codec); | |
937 | } | |
abadfc92 RP |
938 | return ret; |
939 | } | |
940 | ||
941 | /* power down chip */ | |
942 | static int wm8750_remove(struct platform_device *pdev) | |
943 | { | |
944 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
6627a653 | 945 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 RP |
946 | |
947 | if (codec->control_data) | |
0be9898a | 948 | wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); |
abadfc92 RP |
949 | snd_soc_free_pcms(socdev); |
950 | snd_soc_dapm_free(socdev); | |
42f3030f | 951 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
ee1d0099 | 952 | i2c_unregister_device(codec->control_data); |
abadfc92 | 953 | i2c_del_driver(&wm8750_i2c_driver); |
2f3dfaf5 MB |
954 | #endif |
955 | #if defined(CONFIG_SPI_MASTER) | |
956 | spi_unregister_driver(&wm8750_spi_driver); | |
abadfc92 | 957 | #endif |
4422b606 | 958 | kfree(codec->private_data); |
abadfc92 RP |
959 | kfree(codec); |
960 | ||
961 | return 0; | |
962 | } | |
963 | ||
964 | struct snd_soc_codec_device soc_codec_dev_wm8750 = { | |
965 | .probe = wm8750_probe, | |
966 | .remove = wm8750_remove, | |
967 | .suspend = wm8750_suspend, | |
968 | .resume = wm8750_resume, | |
969 | }; | |
abadfc92 RP |
970 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750); |
971 | ||
c9b3a40f | 972 | static int __init wm8750_modinit(void) |
64089b84 MB |
973 | { |
974 | return snd_soc_register_dai(&wm8750_dai); | |
975 | } | |
976 | module_init(wm8750_modinit); | |
977 | ||
978 | static void __exit wm8750_exit(void) | |
979 | { | |
980 | snd_soc_unregister_dai(&wm8750_dai); | |
981 | } | |
982 | module_exit(wm8750_exit); | |
983 | ||
abadfc92 RP |
984 | MODULE_DESCRIPTION("ASoC WM8750 driver"); |
985 | MODULE_AUTHOR("Liam Girdwood"); | |
986 | MODULE_LICENSE("GPL"); |