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ASoC: Shuffle WM8753 device registration code
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
1f53aee0
LG		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/soc.h>
47#include <sound/soc-dapm.h>
48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
69e169da
MB		 54#ifdef CONFIG_SPI_MASTER
55static struct spi_driver wm8753_spi_driver;
56static int wm8753_spi_write(struct spi_device *spi, const char *data, int len);
57#endif
58
1f53aee0
LG		 59static int caps_charge = 2000;
60module_param(caps_charge, int, 0);
61MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
62
63static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
64 unsigned int mode);
65
66/* codec private data */
67struct wm8753_priv {
68 unsigned int sysclk;
69 unsigned int pcmclk;
70};
71
72/*
73 * wm8753 register cache
74 * We can't read the WM8753 register space when we
75 * are using 2 wire for device control, so we cache them instead.
76 */
77static const u16 wm8753_reg[] = {
78 0x0008, 0x0000, 0x000a, 0x000a,
79 0x0033, 0x0000, 0x0007, 0x00ff,
80 0x00ff, 0x000f, 0x000f, 0x007b,
81 0x0000, 0x0032, 0x0000, 0x00c3,
82 0x00c3, 0x00c0, 0x0000, 0x0000,
83 0x0000, 0x0000, 0x0000, 0x0000,
84 0x0000, 0x0000, 0x0000, 0x0000,
85 0x0000, 0x0000, 0x0000, 0x0055,
86 0x0005, 0x0050, 0x0055, 0x0050,
87 0x0055, 0x0050, 0x0055, 0x0079,
88 0x0079, 0x0079, 0x0079, 0x0079,
89 0x0000, 0x0000, 0x0000, 0x0000,
90 0x0097, 0x0097, 0x0000, 0x0004,
91 0x0000, 0x0083, 0x0024, 0x01ba,
92 0x0000, 0x0083, 0x0024, 0x01ba,
93 0x0000, 0x0000
94};
95
96/*
97 * read wm8753 register cache
98 */
99static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
100 unsigned int reg)
101{
102 u16 *cache = codec->reg_cache;
91432e97 103 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 104 return -1;
105 return cache[reg - 1];
106}
107
108/*
109 * write wm8753 register cache
110 */
111static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
112 unsigned int reg, unsigned int value)
113{
114 u16 *cache = codec->reg_cache;
91432e97 115 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 116 return;
117 cache[reg - 1] = value;
118}
119
120/*
121 * write to the WM8753 register space
122 */
123static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
124 unsigned int value)
125{
126 u8 data[2];
127
128 /* data is
129 * D15..D9 WM8753 register offset
130 * D8...D0 register data
131 */
132 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
133 data[1] = value & 0x00ff;
134
60fc684a 135 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 136 if (codec->hw_write(codec->control_data, data, 2) == 2)
137 return 0;
138 else
139 return -EIO;
140}
141
142#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
143
144/*
145 * WM8753 Controls
146 */
147static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
148static const char *wm8753_base_filter[] =
149 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
150 "100Hz @ 8kHz", "200Hz @ 8kHz"};
151static const char *wm8753_treble[] = {"8kHz", "4kHz"};
152static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
153static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
154static const char *wm8753_3d_func[] = {"Capture", "Playback"};
155static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
156static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
157static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
158static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
159static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
160static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
161 "Line 1", "Line 2"};
162static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
163static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
164static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
165static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
166static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
167 "Right PGA"};
168static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
169 "Left + Right"};
170static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
171static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
172static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
173static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
174static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
175 "Analogue Mix Right", "Digital Mono Mix"};
176static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
177 "82Hz @ 8kHz", "170Hz @ 8kHz"};
178static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
179static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
180static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
181static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
182 "Channel Swap"};
ae092c9e 183static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 184
185static const struct soc_enum wm8753_enum[] = {
186SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
187SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
188SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
189SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
190SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
191SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
192SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
193SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
194SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
195SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
196SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
197SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
198SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
199SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
200SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
201SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
202SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
203SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
204SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
205SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
206SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
207SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
208SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
209SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
210SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
211SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
212SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
213SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 214SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 215};
216
217
218static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
219 struct snd_ctl_elem_value *ucontrol)
220{
221 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
222 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
223
224 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
225 return 0;
226}
227
228static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
229 struct snd_ctl_elem_value *ucontrol)
230{
231 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
232 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
233
60fc684a 234 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 235 return 0;
236
237 mode &= 0xfff3;
238 mode |= (ucontrol->value.integer.value[0] << 2);
239
240 wm8753_write(codec, WM8753_IOCTL, mode);
241 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
242 return 1;
243}
244
2cc8c609
MM		 245static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
246static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
247static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
248static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
249static const unsigned int out_tlv[] = {
250 TLV_DB_RANGE_HEAD(2),
251 /* 0000000 - 0101111 = "Analogue mute" */
252 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
253 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
254};
255static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
256static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
257static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 258
1f53aee0 259static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 260SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
261
262SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
263 adc_tlv),
264
265SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
266 0, 127, 0, out_tlv),
267SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
268 127, 0, out_tlv),
269
270SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
271
272SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
273 1, mix_tlv),
274SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
275 7, 1, mix_tlv),
276SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
277 1, voice_mix_tlv),
278
279SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
280 1, 0),
281SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
282 1, 0),
283
284SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
285SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
286 mix_tlv),
287SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
288 voice_mix_tlv),
1f53aee0
LG		 289SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
290
291SOC_ENUM("Bass Boost", wm8753_enum[0]),
292SOC_ENUM("Bass Filter", wm8753_enum[1]),
293SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
294
295SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
296SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
297
2cc8c609
MM		 298SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
299 rec_mix_tlv),
300SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
301 rec_mix_tlv),
1f53aee0 302
2cc8c609
MM		 303SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
304 pga_tlv),
1f53aee0
LG		 305SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
306SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
307
308SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
309SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
310SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
311
312SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
313SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
314SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
315SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
316SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
317SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
318SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
319SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
320SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
321SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
322
323SOC_ENUM("3D Function", wm8753_enum[5]),
324SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
325SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
326SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
327SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
328
329SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
330SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
331
332SOC_ENUM("De-emphasis", wm8753_enum[8]),
333SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
334SOC_ENUM("Playback Phase", wm8753_enum[10]),
335
2cc8c609
MM		 336SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
337SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 338
339SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
340
341SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 342SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 343};
344
1f53aee0
LG		 345/*
346 * _DAPM_ Controls
347 */
348
349/* Left Mixer */
350static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
351SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
352SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
353SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
354SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
355};
356
357/* Right mixer */
358static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
359SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
360SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
361SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
362SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
363};
364
365/* Mono mixer */
366static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
367SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
368SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
369SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
370SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
371SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
372};
373
374/* Mono 2 Mux */
375static const struct snd_kcontrol_new wm8753_mono2_controls =
376SOC_DAPM_ENUM("Route", wm8753_enum[17]);
377
378/* Out 3 Mux */
379static const struct snd_kcontrol_new wm8753_out3_controls =
380SOC_DAPM_ENUM("Route", wm8753_enum[18]);
381
382/* Out 4 Mux */
383static const struct snd_kcontrol_new wm8753_out4_controls =
384SOC_DAPM_ENUM("Route", wm8753_enum[19]);
385
386/* ADC Mono Mix */
387static const struct snd_kcontrol_new wm8753_adc_mono_controls =
388SOC_DAPM_ENUM("Route", wm8753_enum[22]);
389
390/* Record mixer */
391static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
392SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
393SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
394SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
395};
396
397/* Left ADC mux */
398static const struct snd_kcontrol_new wm8753_adc_left_controls =
399SOC_DAPM_ENUM("Route", wm8753_enum[21]);
400
401/* Right ADC mux */
402static const struct snd_kcontrol_new wm8753_adc_right_controls =
403SOC_DAPM_ENUM("Route", wm8753_enum[20]);
404
405/* MIC mux */
406static const struct snd_kcontrol_new wm8753_mic_mux_controls =
407SOC_DAPM_ENUM("Route", wm8753_enum[16]);
408
409/* ALC mixer */
410static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
411SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
412SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
413SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
414SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
415};
416
417/* Left Line mux */
418static const struct snd_kcontrol_new wm8753_line_left_controls =
419SOC_DAPM_ENUM("Route", wm8753_enum[14]);
420
421/* Right Line mux */
422static const struct snd_kcontrol_new wm8753_line_right_controls =
423SOC_DAPM_ENUM("Route", wm8753_enum[13]);
424
425/* Mono Line mux */
426static const struct snd_kcontrol_new wm8753_line_mono_controls =
427SOC_DAPM_ENUM("Route", wm8753_enum[12]);
428
429/* Line mux and mixer */
430static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
431SOC_DAPM_ENUM("Route", wm8753_enum[11]);
432
433/* Rx mux and mixer */
434static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
435SOC_DAPM_ENUM("Route", wm8753_enum[15]);
436
437/* Mic Selector Mux */
438static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
439SOC_DAPM_ENUM("Route", wm8753_enum[25]);
440
441static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
442SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
443SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
444 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
445SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
446SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
447SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
448SND_SOC_DAPM_OUTPUT("LOUT1"),
449SND_SOC_DAPM_OUTPUT("LOUT2"),
450SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
451 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
452SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
453SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
454SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
455SND_SOC_DAPM_OUTPUT("ROUT1"),
456SND_SOC_DAPM_OUTPUT("ROUT2"),
457SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
458 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
459SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
460SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
461SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
462SND_SOC_DAPM_OUTPUT("MONO1"),
463SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
464SND_SOC_DAPM_OUTPUT("MONO2"),
465SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
466SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
467SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
468SND_SOC_DAPM_OUTPUT("OUT3"),
469SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
470SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
471SND_SOC_DAPM_OUTPUT("OUT4"),
472SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
473 &wm8753_record_mixer_controls[0],
474 ARRAY_SIZE(wm8753_record_mixer_controls)),
475SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
476SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
477SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
478 &wm8753_adc_mono_controls),
479SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
480 &wm8753_adc_mono_controls),
481SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
482 &wm8753_adc_left_controls),
483SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
484 &wm8753_adc_right_controls),
485SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
486 &wm8753_mic_mux_controls),
487SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
488SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
489SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
490 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
491SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
492 &wm8753_line_left_controls),
493SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
494 &wm8753_line_right_controls),
495SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
496 &wm8753_line_mono_controls),
497SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
498 &wm8753_line_mux_mix_controls),
499SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
500 &wm8753_rx_mux_mix_controls),
501SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
502SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
503SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
504 &wm8753_mic_sel_mux_controls),
505SND_SOC_DAPM_INPUT("LINE1"),
506SND_SOC_DAPM_INPUT("LINE2"),
507SND_SOC_DAPM_INPUT("RXP"),
508SND_SOC_DAPM_INPUT("RXN"),
509SND_SOC_DAPM_INPUT("ACIN"),
510SND_SOC_DAPM_OUTPUT("ACOP"),
511SND_SOC_DAPM_INPUT("MIC1N"),
512SND_SOC_DAPM_INPUT("MIC1"),
513SND_SOC_DAPM_INPUT("MIC2N"),
514SND_SOC_DAPM_INPUT("MIC2"),
515SND_SOC_DAPM_VMID("VREF"),
516};
517
a65f0568 518static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 519 /* left mixer */
520 {"Left Mixer", "Left Playback Switch", "Left DAC"},
521 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
522 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
523 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
524
525 /* right mixer */
526 {"Right Mixer", "Right Playback Switch", "Right DAC"},
527 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
528 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
529 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
530
531 /* mono mixer */
532 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
533 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
534 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
535 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
536 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
537
538 /* left out */
539 {"Left Out 1", NULL, "Left Mixer"},
540 {"Left Out 2", NULL, "Left Mixer"},
541 {"LOUT1", NULL, "Left Out 1"},
542 {"LOUT2", NULL, "Left Out 2"},
543
544 /* right out */
545 {"Right Out 1", NULL, "Right Mixer"},
546 {"Right Out 2", NULL, "Right Mixer"},
547 {"ROUT1", NULL, "Right Out 1"},
548 {"ROUT2", NULL, "Right Out 2"},
549
550 /* mono 1 out */
551 {"Mono Out 1", NULL, "Mono Mixer"},
552 {"MONO1", NULL, "Mono Out 1"},
553
554 /* mono 2 out */
555 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
556 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
557 {"Mono 2 Mux", "Left", "Left Mixer"},
558 {"Mono 2 Mux", "Right", "Right Mixer"},
559 {"Mono Out 2", NULL, "Mono 2 Mux"},
560 {"MONO2", NULL, "Mono Out 2"},
561
562 /* out 3 */
563 {"Out3 Left + Right", NULL, "Left Mixer"},
564 {"Out3 Left + Right", NULL, "Right Mixer"},
565 {"Out3 Mux", "VREF", "VREF"},
566 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
567 {"Out3 Mux", "ROUT2", "ROUT2"},
568 {"Out 3", NULL, "Out3 Mux"},
569 {"OUT3", NULL, "Out 3"},
570
571 /* out 4 */
572 {"Out4 Mux", "VREF", "VREF"},
4037314a 573 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 574 {"Out4 Mux", "LOUT2", "LOUT2"},
575 {"Out 4", NULL, "Out4 Mux"},
576 {"OUT4", NULL, "Out 4"},
577
578 /* record mixer */
579 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
580 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
581 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
582
583 /* Mic/SideTone Mux */
584 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
585 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
586 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
587 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
588
589 /* Capture Left Mux */
590 {"Capture Left Mux", "PGA", "Left Capture Volume"},
591 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
592 {"Capture Left Mux", "Line", "LINE1"},
593
594 /* Capture Right Mux */
595 {"Capture Right Mux", "PGA", "Right Capture Volume"},
596 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 597 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 598
599 /* Mono Capture mixer-mux */
600 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
601 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
602 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
603 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
604 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
605 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
606 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
607 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
608 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
609
610 /* ADC */
611 {"Left ADC", NULL, "Capture Left Mixer"},
612 {"Right ADC", NULL, "Capture Right Mixer"},
613
614 /* Left Capture Volume */
615 {"Left Capture Volume", NULL, "ACIN"},
616
617 /* Right Capture Volume */
618 {"Right Capture Volume", NULL, "Mic 2 Volume"},
619
620 /* ALC Mixer */
621 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
622 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
623 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
624 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
625
626 /* Line Left Mux */
627 {"Line Left Mux", "Line 1", "LINE1"},
628 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
629
630 /* Line Right Mux */
631 {"Line Right Mux", "Line 2", "LINE2"},
632 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
633
634 /* Line Mono Mux */
635 {"Line Mono Mux", "Line Mix", "Line Mixer"},
636 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
637
638 /* Line Mixer/Mux */
639 {"Line Mixer", "Line 1 + 2", "LINE1"},
640 {"Line Mixer", "Line 1 - 2", "LINE1"},
641 {"Line Mixer", "Line 1 + 2", "LINE2"},
642 {"Line Mixer", "Line 1 - 2", "LINE2"},
643 {"Line Mixer", "Line 1", "LINE1"},
644 {"Line Mixer", "Line 2", "LINE2"},
645
646 /* Rx Mixer/Mux */
647 {"Rx Mixer", "RXP - RXN", "RXP"},
648 {"Rx Mixer", "RXP + RXN", "RXP"},
649 {"Rx Mixer", "RXP - RXN", "RXN"},
650 {"Rx Mixer", "RXP + RXN", "RXN"},
651 {"Rx Mixer", "RXP", "RXP"},
652 {"Rx Mixer", "RXN", "RXN"},
653
654 /* Mic 1 Volume */
655 {"Mic 1 Volume", NULL, "MIC1N"},
656 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
657
658 /* Mic 2 Volume */
659 {"Mic 2 Volume", NULL, "MIC2N"},
660 {"Mic 2 Volume", NULL, "MIC2"},
661
662 /* Mic Selector Mux */
663 {"Mic Selection Mux", "Mic 1", "MIC1"},
664 {"Mic Selection Mux", "Mic 2", "MIC2N"},
665 {"Mic Selection Mux", "Mic 3", "MIC2"},
666
667 /* ACOP */
668 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 669};
670
671static int wm8753_add_widgets(struct snd_soc_codec *codec)
672{
a65f0568
MB		 673 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
674 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 675
a65f0568 676 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 677
678 snd_soc_dapm_new_widgets(codec);
679 return 0;
680}
681
682/* PLL divisors */
683struct _pll_div {
684 u32 div2:1;
685 u32 n:4;
686 u32 k:24;
687};
688
689/* The size in bits of the pll divide multiplied by 10
690 * to allow rounding later */
691#define FIXED_PLL_SIZE ((1 << 22) * 10)
692
693static void pll_factors(struct _pll_div *pll_div, unsigned int target,
694 unsigned int source)
695{
696 u64 Kpart;
697 unsigned int K, Ndiv, Nmod;
698
699 Ndiv = target / source;
700 if (Ndiv < 6) {
701 source >>= 1;
702 pll_div->div2 = 1;
703 Ndiv = target / source;
704 } else
705 pll_div->div2 = 0;
706
707 if ((Ndiv < 6) || (Ndiv > 12))
708 printk(KERN_WARNING
60fc684a 709 "wm8753: unsupported N = %d\n", Ndiv);
1f53aee0
LG		 710
711 pll_div->n = Ndiv;
712 Nmod = target % source;
713 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
714
715 do_div(Kpart, source);
716
717 K = Kpart & 0xFFFFFFFF;
718
719 /* Check if we need to round */
720 if ((K % 10) >= 5)
721 K += 5;
722
723 /* Move down to proper range now rounding is done */
724 K /= 10;
725
726 pll_div->k = K;
727}
728
e550e17f 729static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 730 int pll_id, unsigned int freq_in, unsigned int freq_out)
731{
732 u16 reg, enable;
733 int offset;
734 struct snd_soc_codec *codec = codec_dai->codec;
735
736 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
737 return -ENODEV;
738
739 if (pll_id == WM8753_PLL1) {
740 offset = 0;
741 enable = 0x10;
742 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
743 } else {
744 offset = 4;
745 enable = 0x8;
746 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
747 }
748
749 if (!freq_in || !freq_out) {
750 /* disable PLL */
751 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
752 wm8753_write(codec, WM8753_CLOCK, reg);
753 return 0;
754 } else {
755 u16 value = 0;
756 struct _pll_div pll_div;
757
758 pll_factors(&pll_div, freq_out * 8, freq_in);
759
760 /* set up N and K PLL divisor ratios */
761 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
762 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
763 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
764
765 /* bits 8:0 = PLL_K[17:9] */
766 value = (pll_div.k & 0x03fe00) >> 9;
767 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
768
769 /* bits 8:0 = PLL_K[8:0] */
770 value = pll_div.k & 0x0001ff;
771 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
772
773 /* set PLL as input and enable */
774 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
775 (pll_div.div2 << 3));
776 wm8753_write(codec, WM8753_CLOCK, reg | enable);
777 }
778 return 0;
779}
780
781struct _coeff_div {
782 u32 mclk;
783 u32 rate;
784 u8 sr:5;
785 u8 usb:1;
786};
787
788/* codec hifi mclk (after PLL) clock divider coefficients */
789static const struct _coeff_div coeff_div[] = {
790 /* 8k */
791 {12288000, 8000, 0x6, 0x0},
792 {11289600, 8000, 0x16, 0x0},
793 {18432000, 8000, 0x7, 0x0},
794 {16934400, 8000, 0x17, 0x0},
795 {12000000, 8000, 0x6, 0x1},
796
797 /* 11.025k */
798 {11289600, 11025, 0x18, 0x0},
799 {16934400, 11025, 0x19, 0x0},
800 {12000000, 11025, 0x19, 0x1},
801
802 /* 16k */
803 {12288000, 16000, 0xa, 0x0},
804 {18432000, 16000, 0xb, 0x0},
805 {12000000, 16000, 0xa, 0x1},
806
807 /* 22.05k */
808 {11289600, 22050, 0x1a, 0x0},
809 {16934400, 22050, 0x1b, 0x0},
810 {12000000, 22050, 0x1b, 0x1},
811
812 /* 32k */
813 {12288000, 32000, 0xc, 0x0},
814 {18432000, 32000, 0xd, 0x0},
815 {12000000, 32000, 0xa, 0x1},
816
817 /* 44.1k */
818 {11289600, 44100, 0x10, 0x0},
819 {16934400, 44100, 0x11, 0x0},
820 {12000000, 44100, 0x11, 0x1},
821
822 /* 48k */
823 {12288000, 48000, 0x0, 0x0},
824 {18432000, 48000, 0x1, 0x0},
825 {12000000, 48000, 0x0, 0x1},
826
827 /* 88.2k */
828 {11289600, 88200, 0x1e, 0x0},
829 {16934400, 88200, 0x1f, 0x0},
830 {12000000, 88200, 0x1f, 0x1},
831
832 /* 96k */
833 {12288000, 96000, 0xe, 0x0},
834 {18432000, 96000, 0xf, 0x0},
835 {12000000, 96000, 0xe, 0x1},
836};
837
838static int get_coeff(int mclk, int rate)
839{
840 int i;
841
842 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
843 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
844 return i;
845 }
846 return -EINVAL;
847}
848
849/*
850 * Clock after PLL and dividers
851 */
e550e17f 852static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 853 int clk_id, unsigned int freq, int dir)
854{
855 struct snd_soc_codec *codec = codec_dai->codec;
856 struct wm8753_priv *wm8753 = codec->private_data;
857
858 switch (freq) {
859 case 11289600:
860 case 12000000:
861 case 12288000:
862 case 16934400:
863 case 18432000:
864 if (clk_id == WM8753_MCLK) {
865 wm8753->sysclk = freq;
866 return 0;
867 } else if (clk_id == WM8753_PCMCLK) {
868 wm8753->pcmclk = freq;
869 return 0;
870 }
871 break;
872 }
873 return -EINVAL;
874}
875
876/*
877 * Set's ADC and Voice DAC format.
878 */
e550e17f 879static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 880 unsigned int fmt)
881{
882 struct snd_soc_codec *codec = codec_dai->codec;
883 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
884
885 /* interface format */
886 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
887 case SND_SOC_DAIFMT_I2S:
888 voice |= 0x0002;
889 break;
890 case SND_SOC_DAIFMT_RIGHT_J:
891 break;
892 case SND_SOC_DAIFMT_LEFT_J:
893 voice |= 0x0001;
894 break;
895 case SND_SOC_DAIFMT_DSP_A:
896 voice |= 0x0003;
897 break;
898 case SND_SOC_DAIFMT_DSP_B:
899 voice |= 0x0013;
900 break;
901 default:
902 return -EINVAL;
903 }
904
905 wm8753_write(codec, WM8753_PCM, voice);
906 return 0;
907}
908
909/*
910 * Set PCM DAI bit size and sample rate.
911 */
912static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 913 struct snd_pcm_hw_params *params,
914 struct snd_soc_dai *dai)
1f53aee0
LG		 915{
916 struct snd_soc_pcm_runtime *rtd = substream->private_data;
917 struct snd_soc_device *socdev = rtd->socdev;
6627a653 918 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 919 struct wm8753_priv *wm8753 = codec->private_data;
920 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
921 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
922
923 /* bit size */
924 switch (params_format(params)) {
925 case SNDRV_PCM_FORMAT_S16_LE:
926 break;
927 case SNDRV_PCM_FORMAT_S20_3LE:
928 voice |= 0x0004;
929 break;
930 case SNDRV_PCM_FORMAT_S24_LE:
931 voice |= 0x0008;
932 break;
933 case SNDRV_PCM_FORMAT_S32_LE:
934 voice |= 0x000c;
935 break;
936 }
937
938 /* sample rate */
939 if (params_rate(params) * 384 == wm8753->pcmclk)
940 srate |= 0x80;
941 wm8753_write(codec, WM8753_SRATE1, srate);
942
943 wm8753_write(codec, WM8753_PCM, voice);
944 return 0;
945}
946
947/*
948 * Set's PCM dai fmt and BCLK.
949 */
e550e17f 950static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 951 unsigned int fmt)
952{
953 struct snd_soc_codec *codec = codec_dai->codec;
954 u16 voice, ioctl;
955
956 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
957 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
958
959 /* set master/slave audio interface */
960 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
961 case SND_SOC_DAIFMT_CBS_CFS:
962 break;
963 case SND_SOC_DAIFMT_CBM_CFM:
964 ioctl |= 0x2;
965 case SND_SOC_DAIFMT_CBM_CFS:
966 voice |= 0x0040;
967 break;
968 default:
969 return -EINVAL;
970 }
971
972 /* clock inversion */
973 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
974 case SND_SOC_DAIFMT_DSP_A:
975 case SND_SOC_DAIFMT_DSP_B:
976 /* frame inversion not valid for DSP modes */
977 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
978 case SND_SOC_DAIFMT_NB_NF:
979 break;
980 case SND_SOC_DAIFMT_IB_NF:
981 voice |= 0x0080;
982 break;
983 default:
984 return -EINVAL;
985 }
986 break;
987 case SND_SOC_DAIFMT_I2S:
988 case SND_SOC_DAIFMT_RIGHT_J:
989 case SND_SOC_DAIFMT_LEFT_J:
990 voice &= ~0x0010;
991 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
992 case SND_SOC_DAIFMT_NB_NF:
993 break;
994 case SND_SOC_DAIFMT_IB_IF:
995 voice |= 0x0090;
996 break;
997 case SND_SOC_DAIFMT_IB_NF:
998 voice |= 0x0080;
999 break;
1000 case SND_SOC_DAIFMT_NB_IF:
1001 voice |= 0x0010;
1002 break;
1003 default:
1004 return -EINVAL;
1005 }
1006 break;
1007 default:
1008 return -EINVAL;
1009 }
1010
1011 wm8753_write(codec, WM8753_PCM, voice);
1012 wm8753_write(codec, WM8753_IOCTL, ioctl);
1013 return 0;
1014}
1015
e550e17f 1016static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1017 int div_id, int div)
1018{
1019 struct snd_soc_codec *codec = codec_dai->codec;
1020 u16 reg;
1021
1022 switch (div_id) {
1023 case WM8753_PCMDIV:
1024 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1025 wm8753_write(codec, WM8753_CLOCK, reg | div);
1026 break;
1027 case WM8753_BCLKDIV:
1028 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1029 wm8753_write(codec, WM8753_SRATE2, reg | div);
1030 break;
1031 case WM8753_VXCLKDIV:
1032 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1033 wm8753_write(codec, WM8753_SRATE2, reg | div);
1034 break;
1035 default:
1036 return -EINVAL;
1037 }
1038 return 0;
1039}
1040
1041/*
1042 * Set's HiFi DAC format.
1043 */
e550e17f 1044static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1045 unsigned int fmt)
1046{
1047 struct snd_soc_codec *codec = codec_dai->codec;
1048 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1049
1050 /* interface format */
1051 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1052 case SND_SOC_DAIFMT_I2S:
1053 hifi |= 0x0002;
1054 break;
1055 case SND_SOC_DAIFMT_RIGHT_J:
1056 break;
1057 case SND_SOC_DAIFMT_LEFT_J:
1058 hifi |= 0x0001;
1059 break;
1060 case SND_SOC_DAIFMT_DSP_A:
1061 hifi |= 0x0003;
1062 break;
1063 case SND_SOC_DAIFMT_DSP_B:
1064 hifi |= 0x0013;
1065 break;
1066 default:
1067 return -EINVAL;
1068 }
1069
1070 wm8753_write(codec, WM8753_HIFI, hifi);
1071 return 0;
1072}
1073
1074/*
1075 * Set's I2S DAI format.
1076 */
e550e17f 1077static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1078 unsigned int fmt)
1079{
1080 struct snd_soc_codec *codec = codec_dai->codec;
1081 u16 ioctl, hifi;
1082
1083 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1084 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1085
1086 /* set master/slave audio interface */
1087 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1088 case SND_SOC_DAIFMT_CBS_CFS:
1089 break;
1090 case SND_SOC_DAIFMT_CBM_CFM:
1091 ioctl |= 0x1;
1092 case SND_SOC_DAIFMT_CBM_CFS:
1093 hifi |= 0x0040;
1094 break;
1095 default:
1096 return -EINVAL;
1097 }
1098
1099 /* clock inversion */
1100 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1101 case SND_SOC_DAIFMT_DSP_A:
1102 case SND_SOC_DAIFMT_DSP_B:
1103 /* frame inversion not valid for DSP modes */
1104 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1105 case SND_SOC_DAIFMT_NB_NF:
1106 break;
1107 case SND_SOC_DAIFMT_IB_NF:
1108 hifi |= 0x0080;
1109 break;
1110 default:
1111 return -EINVAL;
1112 }
1113 break;
1114 case SND_SOC_DAIFMT_I2S:
1115 case SND_SOC_DAIFMT_RIGHT_J:
1116 case SND_SOC_DAIFMT_LEFT_J:
1117 hifi &= ~0x0010;
1118 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1119 case SND_SOC_DAIFMT_NB_NF:
1120 break;
1121 case SND_SOC_DAIFMT_IB_IF:
1122 hifi |= 0x0090;
1123 break;
1124 case SND_SOC_DAIFMT_IB_NF:
1125 hifi |= 0x0080;
1126 break;
1127 case SND_SOC_DAIFMT_NB_IF:
1128 hifi |= 0x0010;
1129 break;
1130 default:
1131 return -EINVAL;
1132 }
1133 break;
1134 default:
1135 return -EINVAL;
1136 }
1137
1138 wm8753_write(codec, WM8753_HIFI, hifi);
1139 wm8753_write(codec, WM8753_IOCTL, ioctl);
1140 return 0;
1141}
1142
1143/*
1144 * Set PCM DAI bit size and sample rate.
1145 */
1146static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1147 struct snd_pcm_hw_params *params,
1148 struct snd_soc_dai *dai)
1f53aee0
LG		 1149{
1150 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1151 struct snd_soc_device *socdev = rtd->socdev;
6627a653 1152 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1153 struct wm8753_priv *wm8753 = codec->private_data;
1154 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1155 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1156 int coeff;
1157
1158 /* is digital filter coefficient valid ? */
1159 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1160 if (coeff < 0) {
1161 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1162 return coeff;
1163 }
1164 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1165 coeff_div[coeff].usb);
1166
1167 /* bit size */
1168 switch (params_format(params)) {
1169 case SNDRV_PCM_FORMAT_S16_LE:
1170 break;
1171 case SNDRV_PCM_FORMAT_S20_3LE:
1172 hifi |= 0x0004;
1173 break;
1174 case SNDRV_PCM_FORMAT_S24_LE:
1175 hifi |= 0x0008;
1176 break;
1177 case SNDRV_PCM_FORMAT_S32_LE:
1178 hifi |= 0x000c;
1179 break;
1180 }
1181
1182 wm8753_write(codec, WM8753_HIFI, hifi);
1183 return 0;
1184}
1185
e550e17f 1186static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1187 unsigned int fmt)
1188{
1189 struct snd_soc_codec *codec = codec_dai->codec;
1190 u16 clock;
1191
1192 /* set clk source as pcmclk */
1193 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1194 wm8753_write(codec, WM8753_CLOCK, clock);
1195
1196 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1197 return -EINVAL;
1198 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1199}
1200
e550e17f 1201static int wm8753_mode1h_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1202 unsigned int fmt)
1203{
1204 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1205 return -EINVAL;
1206 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1207}
1208
e550e17f 1209static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1210 unsigned int fmt)
1211{
1212 struct snd_soc_codec *codec = codec_dai->codec;
1213 u16 clock;
1214
1215 /* set clk source as pcmclk */
1216 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1217 wm8753_write(codec, WM8753_CLOCK, clock);
1218
1219 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1220 return -EINVAL;
1221 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1222}
1223
e550e17f 1224static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1225 unsigned int fmt)
1226{
1227 struct snd_soc_codec *codec = codec_dai->codec;
1228 u16 clock;
1229
1230 /* set clk source as mclk */
1231 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1232 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1233
1234 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1235 return -EINVAL;
1236 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1237 return -EINVAL;
1238 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1239}
1240
e550e17f 1241static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1242{
1243 struct snd_soc_codec *codec = dai->codec;
1244 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1245
1246 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1247 * make sure we check if they are not both active when we mute */
1248 if (mute && dai->id == 1) {
1249 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1250 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1251 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1252 } else {
1253 if (mute)
1254 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1255 else
1256 wm8753_write(codec, WM8753_DAC, mute_reg);
1257 }
1258
1259 return 0;
1260}
1261
0be9898a
MB		 1262static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1263 enum snd_soc_bias_level level)
1f53aee0
LG		 1264{
1265 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1266
0be9898a
MB		 1267 switch (level) {
1268 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1269 /* set vmid to 50k and unmute dac */
1270 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1271 break;
0be9898a 1272 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1273 /* set vmid to 5k for quick power up */
1274 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1275 break;
0be9898a 1276 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1277 /* mute dac and set vmid to 500k, enable VREF */
1278 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1279 break;
0be9898a 1280 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1281 wm8753_write(codec, WM8753_PWR1, 0x0001);
1282 break;
1283 }
0be9898a 1284 codec->bias_level = level;
1f53aee0
LG		 1285 return 0;
1286}
1287
1288#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1289 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1290 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1291 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1292
1293#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1294 SNDRV_PCM_FMTBIT_S24_LE)
1295
1296/*
1297 * The WM8753 supports upto 4 different and mutually exclusive DAI
1298 * configurations. This gives 2 PCM's available for use, hifi and voice.
1299 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1300 * is connected between the wm8753 and a BT codec or GSM modem.
1301 *
1302 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1303 * 2. Voice over HIFI DAI - HIFI disabled
1304 * 3. Voice disabled - HIFI over HIFI
1305 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1306 */
e550e17f 1307static const struct snd_soc_dai wm8753_all_dai[] = {
1f53aee0
LG		 1308/* DAI HiFi mode 1 */
1309{ .name = "WM8753 HiFi",
1310 .id = 1,
1311 .playback = {
1312 .stream_name = "HiFi Playback",
1313 .channels_min = 1,
1314 .channels_max = 2,
1315 .rates = WM8753_RATES,
dee89c4d 1316 .formats = WM8753_FORMATS},
1f53aee0
LG		 1317 .capture = { /* dummy for fast DAI switching */
1318 .stream_name = "Capture",
1319 .channels_min = 1,
1320 .channels_max = 2,
1321 .rates = WM8753_RATES,
dee89c4d 1322 .formats = WM8753_FORMATS},
1f53aee0 1323 .ops = {
dee89c4d 1324 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1325 .digital_mute = wm8753_mute,
1326 .set_fmt = wm8753_mode1h_set_dai_fmt,
1327 .set_clkdiv = wm8753_set_dai_clkdiv,
1328 .set_pll = wm8753_set_dai_pll,
1329 .set_sysclk = wm8753_set_dai_sysclk,
1330 },
1331},
1332/* DAI Voice mode 1 */
1333{ .name = "WM8753 Voice",
1334 .id = 1,
1335 .playback = {
1336 .stream_name = "Voice Playback",
1337 .channels_min = 1,
1338 .channels_max = 1,
1339 .rates = WM8753_RATES,
1340 .formats = WM8753_FORMATS,},
1341 .capture = {
1342 .stream_name = "Capture",
1343 .channels_min = 1,
1344 .channels_max = 2,
1345 .rates = WM8753_RATES,
1346 .formats = WM8753_FORMATS,},
1347 .ops = {
dee89c4d 1348 .hw_params = wm8753_pcm_hw_params,
1f53aee0
LG		 1349 .digital_mute = wm8753_mute,
1350 .set_fmt = wm8753_mode1v_set_dai_fmt,
1351 .set_clkdiv = wm8753_set_dai_clkdiv,
1352 .set_pll = wm8753_set_dai_pll,
1353 .set_sysclk = wm8753_set_dai_sysclk,
1354 },
1355},
1356/* DAI HiFi mode 2 - dummy */
1357{ .name = "WM8753 HiFi",
1358 .id = 2,
1359},
1360/* DAI Voice mode 2 */
1361{ .name = "WM8753 Voice",
1362 .id = 2,
1363 .playback = {
1364 .stream_name = "Voice Playback",
1365 .channels_min = 1,
1366 .channels_max = 1,
1367 .rates = WM8753_RATES,
1368 .formats = WM8753_FORMATS,},
1369 .capture = {
1370 .stream_name = "Capture",
1371 .channels_min = 1,
1372 .channels_max = 2,
1373 .rates = WM8753_RATES,
1374 .formats = WM8753_FORMATS,},
1375 .ops = {
dee89c4d 1376 .hw_params = wm8753_pcm_hw_params,
1f53aee0
LG		 1377 .digital_mute = wm8753_mute,
1378 .set_fmt = wm8753_mode2_set_dai_fmt,
1379 .set_clkdiv = wm8753_set_dai_clkdiv,
1380 .set_pll = wm8753_set_dai_pll,
1381 .set_sysclk = wm8753_set_dai_sysclk,
1382 },
1383},
1384/* DAI HiFi mode 3 */
1385{ .name = "WM8753 HiFi",
1386 .id = 3,
1387 .playback = {
1388 .stream_name = "HiFi Playback",
1389 .channels_min = 1,
1390 .channels_max = 2,
1391 .rates = WM8753_RATES,
1392 .formats = WM8753_FORMATS,},
1393 .capture = {
1394 .stream_name = "Capture",
1395 .channels_min = 1,
1396 .channels_max = 2,
1397 .rates = WM8753_RATES,
1398 .formats = WM8753_FORMATS,},
1399 .ops = {
dee89c4d 1400 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1401 .digital_mute = wm8753_mute,
1402 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1403 .set_clkdiv = wm8753_set_dai_clkdiv,
1404 .set_pll = wm8753_set_dai_pll,
1405 .set_sysclk = wm8753_set_dai_sysclk,
1406 },
1407},
1408/* DAI Voice mode 3 - dummy */
1409{ .name = "WM8753 Voice",
1410 .id = 3,
1411},
1412/* DAI HiFi mode 4 */
1413{ .name = "WM8753 HiFi",
1414 .id = 4,
1415 .playback = {
1416 .stream_name = "HiFi Playback",
1417 .channels_min = 1,
1418 .channels_max = 2,
1419 .rates = WM8753_RATES,
1420 .formats = WM8753_FORMATS,},
1421 .capture = {
1422 .stream_name = "Capture",
1423 .channels_min = 1,
1424 .channels_max = 2,
1425 .rates = WM8753_RATES,
1426 .formats = WM8753_FORMATS,},
1427 .ops = {
dee89c4d 1428 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1429 .digital_mute = wm8753_mute,
1430 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1431 .set_clkdiv = wm8753_set_dai_clkdiv,
1432 .set_pll = wm8753_set_dai_pll,
1433 .set_sysclk = wm8753_set_dai_sysclk,
1434 },
1435},
1436/* DAI Voice mode 4 - dummy */
1437{ .name = "WM8753 Voice",
1438 .id = 4,
1439},
1440};
1441
9e70c1f0
MB		 1442struct snd_soc_dai wm8753_dai[] = {
1443 {
1444 .name = "WM8753 DAI 0",
1445 },
1446 {
1447 .name = "WM8753 DAI 1",
1448 },
1449};
1f53aee0
LG		 1450EXPORT_SYMBOL_GPL(wm8753_dai);
1451
1452static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1453{
1454 if (mode < 4) {
1455 int playback_active, capture_active, codec_active, pop_wait;
1456 void *private_data;
31b59cf9 1457 struct list_head list;
1f53aee0
LG		 1458
1459 playback_active = wm8753_dai[0].playback.active;
1460 capture_active = wm8753_dai[0].capture.active;
1461 codec_active = wm8753_dai[0].active;
1462 private_data = wm8753_dai[0].private_data;
1463 pop_wait = wm8753_dai[0].pop_wait;
31b59cf9 1464 list = wm8753_dai[0].list;
1f53aee0
LG		 1465 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1466 wm8753_dai[0].playback.active = playback_active;
1467 wm8753_dai[0].capture.active = capture_active;
1468 wm8753_dai[0].active = codec_active;
1469 wm8753_dai[0].private_data = private_data;
1470 wm8753_dai[0].pop_wait = pop_wait;
31b59cf9 1471 wm8753_dai[0].list = list;
1f53aee0
LG		 1472
1473 playback_active = wm8753_dai[1].playback.active;
1474 capture_active = wm8753_dai[1].capture.active;
1475 codec_active = wm8753_dai[1].active;
1476 private_data = wm8753_dai[1].private_data;
1477 pop_wait = wm8753_dai[1].pop_wait;
31b59cf9 1478 list = wm8753_dai[1].list;
1f53aee0
LG		 1479 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1480 wm8753_dai[1].playback.active = playback_active;
1481 wm8753_dai[1].capture.active = capture_active;
1482 wm8753_dai[1].active = codec_active;
1483 wm8753_dai[1].private_data = private_data;
1484 wm8753_dai[1].pop_wait = pop_wait;
31b59cf9 1485 wm8753_dai[1].list = list;
1f53aee0
LG		 1486 }
1487 wm8753_dai[0].codec = codec;
1488 wm8753_dai[1].codec = codec;
1489}
1490
1491static void wm8753_work(struct work_struct *work)
1492{
1493 struct snd_soc_codec *codec =
1494 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1495 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1496}
1497
1498static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1499{
1500 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1501 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1502
1503 /* we only need to suspend if we are a valid card */
60fc684a 1504 if (!codec->card)
1f53aee0 1505 return 0;
60fc684a 1506
0be9898a 1507 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1508 return 0;
1509}
1510
1511static int wm8753_resume(struct platform_device *pdev)
1512{
1513 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1514 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1515 int i;
1516 u8 data[2];
1517 u16 *cache = codec->reg_cache;
1518
1519 /* we only need to resume if we are a valid card */
60fc684a 1520 if (!codec->card)
1f53aee0
LG		 1521 return 0;
1522
1523 /* Sync reg_cache with the hardware */
1524 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1525 if (i + 1 == WM8753_RESET)
1526 continue;
1527 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1528 data[1] = cache[i] & 0x00ff;
1529 codec->hw_write(codec->control_data, data, 2);
1530 }
1531
0be9898a 1532 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1533
1534 /* charge wm8753 caps */
0be9898a
MB		 1535 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1536 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1537 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1538 schedule_delayed_work(&codec->delayed_work,
1539 msecs_to_jiffies(caps_charge));
1540 }
1541
1542 return 0;
1543}
1544
1545/*
1546 * initialise the WM8753 driver
1547 * register the mixer and dsp interfaces with the kernel
1548 */
1549static int wm8753_init(struct snd_soc_device *socdev)
1550{
6627a653 1551 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1552 int reg, ret = 0;
1553
1554 codec->name = "WM8753";
1555 codec->owner = THIS_MODULE;
1556 codec->read = wm8753_read_reg_cache;
1557 codec->write = wm8753_write;
0be9898a 1558 codec->set_bias_level = wm8753_set_bias_level;
1f53aee0
LG		 1559 codec->dai = wm8753_dai;
1560 codec->num_dai = 2;
d751b233 1561 codec->reg_cache_size = ARRAY_SIZE(wm8753_reg);
1f53aee0
LG		 1562 codec->reg_cache = kmemdup(wm8753_reg, sizeof(wm8753_reg), GFP_KERNEL);
1563
1564 if (codec->reg_cache == NULL)
1565 return -ENOMEM;
1566
1567 wm8753_set_dai_mode(codec, 0);
1568
eeb1080b
MB		 1569 ret = wm8753_reset(codec);
1570 if (ret < 0) {
1571 printk(KERN_ERR "wm8753: failed to reset device\n");
1572 return ret;
1573 }
1f53aee0
LG		 1574
1575 /* register pcms */
1576 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1577 if (ret < 0) {
1578 printk(KERN_ERR "wm8753: failed to create pcms\n");
1579 goto pcm_err;
1580 }
1581
1582 /* charge output caps */
0be9898a
MB		 1583 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1584 codec->bias_level = SND_SOC_BIAS_STANDBY;
1f53aee0
LG		 1585 schedule_delayed_work(&codec->delayed_work,
1586 msecs_to_jiffies(caps_charge));
1587
1588 /* set the update bits */
1589 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1590 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1591 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1592 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1593 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1594 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1595 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1596 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1597 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1598 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1599 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1600 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1601 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1602 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1603 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1604 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1605 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1606 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1607 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1608 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1609
3e8e1952
IM		 1610 snd_soc_add_controls(codec, wm8753_snd_controls,
1611 ARRAY_SIZE(wm8753_snd_controls));
1f53aee0 1612 wm8753_add_widgets(codec);
968a6025 1613 ret = snd_soc_init_card(socdev);
1f53aee0 1614 if (ret < 0) {
60fc684a 1615 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1616 goto card_err;
60fc684a
MB		 1617 }
1618
1f53aee0
LG		 1619 return ret;
1620
1621card_err:
1622 snd_soc_free_pcms(socdev);
1623 snd_soc_dapm_free(socdev);
1624pcm_err:
1625 kfree(codec->reg_cache);
1626 return ret;
1627}
1628
1629/* If the i2c layer weren't so broken, we could pass this kind of data
1630 around */
1631static struct snd_soc_device *wm8753_socdev;
1632
60fc684a 1633#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
69e169da 1634static struct i2c_driver wm8753_i2c_driver;
1f53aee0 1635
ad4503d8
JD		 1636static int wm8753_add_i2c_device(struct platform_device *pdev,
1637 const struct wm8753_setup_data *setup)
1638{
1639 struct i2c_board_info info;
1640 struct i2c_adapter *adapter;
1641 struct i2c_client *client;
1642 int ret;
1643
1644 ret = i2c_add_driver(&wm8753_i2c_driver);
1645 if (ret != 0) {
1646 dev_err(&pdev->dev, "can't add i2c driver\n");
1647 return ret;
1648 }
1649
1650 memset(&info, 0, sizeof(struct i2c_board_info));
1651 info.addr = setup->i2c_address;
1652 strlcpy(info.type, "wm8753", I2C_NAME_SIZE);
1653
1654 adapter = i2c_get_adapter(setup->i2c_bus);
1655 if (!adapter) {
1656 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
1657 setup->i2c_bus);
1658 goto err_driver;
1659 }
1660
1661 client = i2c_new_device(adapter, &info);
1662 i2c_put_adapter(adapter);
1663 if (!client) {
1664 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
1665 (unsigned int)info.addr);
1666 goto err_driver;
1667 }
1668
1669 return 0;
1670
1671err_driver:
1672 i2c_del_driver(&wm8753_i2c_driver);
1673 return -ENODEV;
1674}
1f53aee0
LG		 1675#endif
1676
1677static int wm8753_probe(struct platform_device *pdev)
1678{
1679 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1680 struct wm8753_setup_data *setup;
1681 struct snd_soc_codec *codec;
1682 struct wm8753_priv *wm8753;
1683 int ret = 0;
1684
1f53aee0
LG		 1685 setup = socdev->codec_data;
1686 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
1687 if (codec == NULL)
1688 return -ENOMEM;
1689
1690 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1691 if (wm8753 == NULL) {
1692 kfree(codec);
1693 return -ENOMEM;
1694 }
1695
1696 codec->private_data = wm8753;
6627a653 1697 socdev->card->codec = codec;
1f53aee0
LG		 1698 mutex_init(&codec->mutex);
1699 INIT_LIST_HEAD(&codec->dapm_widgets);
1700 INIT_LIST_HEAD(&codec->dapm_paths);
1701 wm8753_socdev = socdev;
1702 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1703
60fc684a 1704#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0 1705 if (setup->i2c_address) {
1f53aee0 1706 codec->hw_write = (hw_write_t)i2c_master_send;
ad4503d8 1707 ret = wm8753_add_i2c_device(pdev, setup);
1f53aee0 1708 }
dd0c0c80
MB		 1709#endif
1710#if defined(CONFIG_SPI_MASTER)
1711 if (setup->spi) {
1712 codec->hw_write = (hw_write_t)wm8753_spi_write;
1713 ret = spi_register_driver(&wm8753_spi_driver);
1714 if (ret != 0)
1715 printk(KERN_ERR "can't add spi driver");
1716 }
1f53aee0 1717#endif
3051e41a
JD		 1718
1719 if (ret != 0) {
1720 kfree(codec->private_data);
1721 kfree(codec);
1722 }
1f53aee0
LG		 1723 return ret;
1724}
1725
1726/*
1727 * This function forces any delayed work to be queued and run.
1728 */
1729static int run_delayed_work(struct delayed_work *dwork)
1730{
1731 int ret;
1732
1733 /* cancel any work waiting to be queued. */
1734 ret = cancel_delayed_work(dwork);
1735
1736 /* if there was any work waiting then we run it now and
1737 * wait for it's completion */
1738 if (ret) {
1739 schedule_delayed_work(dwork, 0);
1740 flush_scheduled_work();
1741 }
1742 return ret;
1743}
1744
1745/* power down chip */
1746static int wm8753_remove(struct platform_device *pdev)
1747{
1748 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1749 struct snd_soc_codec *codec = socdev->card->codec;
93e051d2 1750 struct wm8753_setup_data *setup = socdev->codec_data;
1f53aee0
LG		 1751
1752 if (codec->control_data)
0be9898a 1753 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1754 run_delayed_work(&codec->delayed_work);
1755 snd_soc_free_pcms(socdev);
1756 snd_soc_dapm_free(socdev);
60fc684a 1757#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
93e051d2
MB		 1758 if (setup->i2c_address) {
1759 i2c_unregister_device(codec->control_data);
1760 i2c_del_driver(&wm8753_i2c_driver);
1761 }
dd0c0c80
MB		 1762#endif
1763#if defined(CONFIG_SPI_MASTER)
93e051d2
MB		 1764 if (setup->spi)
1765 spi_unregister_driver(&wm8753_spi_driver);
1f53aee0
LG		 1766#endif
1767 kfree(codec->private_data);
1768 kfree(codec);
1769
1770 return 0;
1771}
1772
1773struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1774 .probe = wm8753_probe,
1775 .remove = wm8753_remove,
1776 .suspend = wm8753_suspend,
1777 .resume = wm8753_resume,
1778};
1f53aee0
LG		 1779EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1780
69e169da
MB		 1781#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1782
1783static int wm8753_i2c_probe(struct i2c_client *i2c,
1784 const struct i2c_device_id *id)
1785{
1786 struct snd_soc_device *socdev = wm8753_socdev;
1787 struct snd_soc_codec *codec = socdev->card->codec;
1788 int ret;
1789
1790 i2c_set_clientdata(i2c, codec);
1791 codec->control_data = i2c;
1792
1793 ret = wm8753_init(socdev);
1794 if (ret < 0)
1795 pr_err("failed to initialise WM8753\n");
1796
1797 return ret;
1798}
1799
1800static int wm8753_i2c_remove(struct i2c_client *client)
1801{
1802 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1803 kfree(codec->reg_cache);
1804 return 0;
1805}
1806
1807static const struct i2c_device_id wm8753_i2c_id[] = {
1808 { "wm8753", 0 },
1809 { }
1810};
1811MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1812
1813static struct i2c_driver wm8753_i2c_driver = {
1814 .driver = {
1815 .name = "WM8753 I2C Codec",
1816 .owner = THIS_MODULE,
1817 },
1818 .probe = wm8753_i2c_probe,
1819 .remove = wm8753_i2c_remove,
1820 .id_table = wm8753_i2c_id,
1821};
1822#endif
1823
1824#if defined(CONFIG_SPI_MASTER)
1825static int wm8753_spi_write(struct spi_device *spi, const char *data, int len)
1826{
1827 struct spi_transfer t;
1828 struct spi_message m;
1829 u8 msg[2];
1830
1831 if (len <= 0)
1832 return 0;
1833
1834 msg[0] = data[0];
1835 msg[1] = data[1];
1836
1837 spi_message_init(&m);
1838 memset(&t, 0, (sizeof t));
1839
1840 t.tx_buf = &msg[0];
1841 t.len = len;
1842
1843 spi_message_add_tail(&t, &m);
1844 spi_sync(spi, &m);
1845
1846 return len;
1847}
1848
1849static int __devinit wm8753_spi_probe(struct spi_device *spi)
1850{
1851 struct snd_soc_device *socdev = wm8753_socdev;
1852 struct snd_soc_codec *codec = socdev->card->codec;
1853 int ret;
1854
1855 codec->control_data = spi;
1856
1857 ret = wm8753_init(socdev);
1858 if (ret < 0)
1859 dev_err(&spi->dev, "failed to initialise WM8753\n");
1860
1861 return ret;
1862}
1863
1864static int __devexit wm8753_spi_remove(struct spi_device *spi)
1865{
1866 return 0;
1867}
1868
1869static struct spi_driver wm8753_spi_driver = {
1870 .driver = {
1871 .name = "wm8753",
1872 .bus = &spi_bus_type,
1873 .owner = THIS_MODULE,
1874 },
1875 .probe = wm8753_spi_probe,
1876 .remove = __devexit_p(wm8753_spi_remove),
1877};
1878#endif
1879
c9b3a40f 1880static int __init wm8753_modinit(void)
64089b84
MB		 1881{
1882 return snd_soc_register_dais(wm8753_dai, ARRAY_SIZE(wm8753_dai));
1883}
1884module_init(wm8753_modinit);
1885
1886static void __exit wm8753_exit(void)
1887{
1888 snd_soc_unregister_dais(wm8753_dai, ARRAY_SIZE(wm8753_dai));
1889}
1890module_exit(wm8753_exit);
1891
1f53aee0
LG		 1892MODULE_DESCRIPTION("ASoC WM8753 driver");
1893MODULE_AUTHOR("Liam Girdwood");
1894MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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