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Linux 4.5-rc1
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
656baaeb 4 * Copyright 2003-11 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
70e14122 41#include <linux/of_device.h>
d3398ff0 42#include <linux/regmap.h>
dd0c0c80 43#include <linux/spi/spi.h>
5a0e3ad6 44#include <linux/slab.h>
1f53aee0
LG		 45#include <sound/core.h>
46#include <sound/pcm.h>
47#include <sound/pcm_params.h>
48#include <sound/soc.h>
1f53aee0 49#include <sound/initval.h>
2d6a4ac9 50#include <sound/tlv.h>
1f53aee0
LG		 51#include <asm/div64.h>
52
53#include "wm8753.h"
54
1f53aee0
LG		 55static int caps_charge = 2000;
56module_param(caps_charge, int, 0);
57MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
58
338ee253
LPC		 59static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
60 unsigned int fmt);
61static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
62 unsigned int fmt);
1f53aee0 63
1f53aee0
LG		 64/*
65 * wm8753 register cache
66 * We can't read the WM8753 register space when we
67 * are using 2 wire for device control, so we cache them instead.
68 */
d3398ff0
MB		 69static const struct reg_default wm8753_reg_defaults[] = {
70 { 0x00, 0x0000 },
71 { 0x01, 0x0008 },
72 { 0x02, 0x0000 },
73 { 0x03, 0x000a },
74 { 0x04, 0x000a },
75 { 0x05, 0x0033 },
76 { 0x06, 0x0000 },
77 { 0x07, 0x0007 },
78 { 0x08, 0x00ff },
79 { 0x09, 0x00ff },
80 { 0x0a, 0x000f },
81 { 0x0b, 0x000f },
82 { 0x0c, 0x007b },
83 { 0x0d, 0x0000 },
84 { 0x0e, 0x0032 },
85 { 0x0f, 0x0000 },
86 { 0x10, 0x00c3 },
87 { 0x11, 0x00c3 },
88 { 0x12, 0x00c0 },
89 { 0x13, 0x0000 },
90 { 0x14, 0x0000 },
91 { 0x15, 0x0000 },
92 { 0x16, 0x0000 },
93 { 0x17, 0x0000 },
94 { 0x18, 0x0000 },
95 { 0x19, 0x0000 },
96 { 0x1a, 0x0000 },
97 { 0x1b, 0x0000 },
98 { 0x1c, 0x0000 },
99 { 0x1d, 0x0000 },
100 { 0x1e, 0x0000 },
101 { 0x1f, 0x0000 },
102 { 0x20, 0x0055 },
103 { 0x21, 0x0005 },
104 { 0x22, 0x0050 },
105 { 0x23, 0x0055 },
106 { 0x24, 0x0050 },
107 { 0x25, 0x0055 },
108 { 0x26, 0x0050 },
109 { 0x27, 0x0055 },
110 { 0x28, 0x0079 },
111 { 0x29, 0x0079 },
112 { 0x2a, 0x0079 },
113 { 0x2b, 0x0079 },
114 { 0x2c, 0x0079 },
115 { 0x2d, 0x0000 },
116 { 0x2e, 0x0000 },
117 { 0x2f, 0x0000 },
118 { 0x30, 0x0000 },
119 { 0x31, 0x0097 },
120 { 0x32, 0x0097 },
121 { 0x33, 0x0000 },
122 { 0x34, 0x0004 },
123 { 0x35, 0x0000 },
124 { 0x36, 0x0083 },
125 { 0x37, 0x0024 },
126 { 0x38, 0x01ba },
127 { 0x39, 0x0000 },
128 { 0x3a, 0x0083 },
129 { 0x3b, 0x0024 },
130 { 0x3c, 0x01ba },
131 { 0x3d, 0x0000 },
132 { 0x3e, 0x0000 },
133 { 0x3f, 0x0000 },
1f53aee0
LG		 134};
135
d3398ff0
MB		 136static bool wm8753_volatile(struct device *dev, unsigned int reg)
137{
138 return reg == WM8753_RESET;
139}
140
c2bac160
MB		 141/* codec private data */
142struct wm8753_priv {
d3398ff0 143 struct regmap *regmap;
c2bac160
MB		 144 unsigned int sysclk;
145 unsigned int pcmclk;
338ee253
LPC		 146
147 unsigned int voice_fmt;
148 unsigned int hifi_fmt;
149
f0fba2ad 150 int dai_func;
35afd922 151 struct delayed_work charge_work;
c2bac160
MB		 152};
153
776065e3 154#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
1f53aee0
LG		 155
156/*
157 * WM8753 Controls
158 */
159static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
160static const char *wm8753_base_filter[] =
161 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
162 "100Hz @ 8kHz", "200Hz @ 8kHz"};
163static const char *wm8753_treble[] = {"8kHz", "4kHz"};
164static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
165static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
166static const char *wm8753_3d_func[] = {"Capture", "Playback"};
167static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
168static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
169static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
170static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
171static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
172static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
173 "Line 1", "Line 2"};
174static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
175static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
176static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
177static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
178static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
179 "Right PGA"};
180static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
181 "Left + Right"};
182static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
183static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
184static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
185static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
186static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
187 "Analogue Mix Right", "Digital Mono Mix"};
188static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
189 "82Hz @ 8kHz", "170Hz @ 8kHz"};
190static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
191static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
192static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
193static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
194 "Channel Swap"};
ae092c9e 195static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 196
197static const struct soc_enum wm8753_enum[] = {
198SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
199SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
200SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
201SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
202SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
203SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
204SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
205SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
206SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
207SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
208SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
209SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
210SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
211SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
212SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
213SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
214SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
215SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
216SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
217SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
218SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
219SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
220SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
221SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
222SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
223SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
224SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
225SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 226SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 227};
228
229
230static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol)
232{
ea53bf77 233 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
338ee253 234 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0 235
338ee253 236 ucontrol->value.integer.value[0] = wm8753->dai_func;
1f53aee0
LG		 237 return 0;
238}
239
240static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
241 struct snd_ctl_elem_value *ucontrol)
242{
ea53bf77 243 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
f0fba2ad 244 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
338ee253
LPC		 245 u16 ioctl;
246
2391a0e0
TJL		 247 if (wm8753->dai_func == ucontrol->value.integer.value[0])
248 return 0;
249
5c898e74 250 if (snd_soc_codec_is_active(codec))
338ee253
LPC		 251 return -EBUSY;
252
253 ioctl = snd_soc_read(codec, WM8753_IOCTL);
254
255 wm8753->dai_func = ucontrol->value.integer.value[0];
256
257 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
258 return 1;
259
260 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
261 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0 262
1f53aee0 263
338ee253
LPC		 264 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
265 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
1f53aee0 266
1f53aee0
LG		 267 return 1;
268}
269
2cc8c609
MM		 270static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
271static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
272static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
273static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
11c3727c 274static const DECLARE_TLV_DB_RANGE(out_tlv,
2cc8c609
MM		 275 /* 0000000 - 0101111 = "Analogue mute" */
276 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
11c3727c
LPC		 277 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0)
278);
2cc8c609
MM		 279static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
280static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
281static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 282
1f53aee0 283static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 284SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
285
286SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
287 adc_tlv),
288
289SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
290 0, 127, 0, out_tlv),
291SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
292 127, 0, out_tlv),
293
294SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
295
296SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
297 1, mix_tlv),
298SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
299 7, 1, mix_tlv),
300SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
301 1, voice_mix_tlv),
302
303SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
304 1, 0),
305SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
306 1, 0),
307
308SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
309SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
310 mix_tlv),
311SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
312 voice_mix_tlv),
1f53aee0
LG		 313SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
314
315SOC_ENUM("Bass Boost", wm8753_enum[0]),
316SOC_ENUM("Bass Filter", wm8753_enum[1]),
317SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
318
319SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
320SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
321
2cc8c609
MM		 322SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
323 rec_mix_tlv),
324SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
325 rec_mix_tlv),
1f53aee0 326
2cc8c609
MM		 327SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
328 pga_tlv),
1f53aee0
LG		 329SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
330SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
331
332SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
333SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
334SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
335
336SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
337SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
338SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
339SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
340SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
341SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
342SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
343SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
344SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
345SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
346
347SOC_ENUM("3D Function", wm8753_enum[5]),
348SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
349SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
350SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
351SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
352
353SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
354SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
355
356SOC_ENUM("De-emphasis", wm8753_enum[8]),
357SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
358SOC_ENUM("Playback Phase", wm8753_enum[10]),
359
2cc8c609
MM		 360SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
361SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 362
363SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
364
365SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 366SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 367};
368
1f53aee0
LG		 369/*
370 * _DAPM_ Controls
371 */
372
373/* Left Mixer */
374static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
375SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
376SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
377SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
378SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
379};
380
381/* Right mixer */
382static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
383SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
384SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
385SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
386SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
387};
388
389/* Mono mixer */
390static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
391SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
392SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
393SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
394SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
395SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
396};
397
398/* Mono 2 Mux */
399static const struct snd_kcontrol_new wm8753_mono2_controls =
400SOC_DAPM_ENUM("Route", wm8753_enum[17]);
401
402/* Out 3 Mux */
403static const struct snd_kcontrol_new wm8753_out3_controls =
404SOC_DAPM_ENUM("Route", wm8753_enum[18]);
405
406/* Out 4 Mux */
407static const struct snd_kcontrol_new wm8753_out4_controls =
408SOC_DAPM_ENUM("Route", wm8753_enum[19]);
409
410/* ADC Mono Mix */
411static const struct snd_kcontrol_new wm8753_adc_mono_controls =
412SOC_DAPM_ENUM("Route", wm8753_enum[22]);
413
414/* Record mixer */
415static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
416SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
417SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
418SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
419};
420
421/* Left ADC mux */
422static const struct snd_kcontrol_new wm8753_adc_left_controls =
423SOC_DAPM_ENUM("Route", wm8753_enum[21]);
424
425/* Right ADC mux */
426static const struct snd_kcontrol_new wm8753_adc_right_controls =
427SOC_DAPM_ENUM("Route", wm8753_enum[20]);
428
429/* MIC mux */
430static const struct snd_kcontrol_new wm8753_mic_mux_controls =
431SOC_DAPM_ENUM("Route", wm8753_enum[16]);
432
433/* ALC mixer */
434static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
435SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
436SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
437SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
438SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
439};
440
441/* Left Line mux */
442static const struct snd_kcontrol_new wm8753_line_left_controls =
443SOC_DAPM_ENUM("Route", wm8753_enum[14]);
444
445/* Right Line mux */
446static const struct snd_kcontrol_new wm8753_line_right_controls =
447SOC_DAPM_ENUM("Route", wm8753_enum[13]);
448
449/* Mono Line mux */
450static const struct snd_kcontrol_new wm8753_line_mono_controls =
451SOC_DAPM_ENUM("Route", wm8753_enum[12]);
452
453/* Line mux and mixer */
454static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
455SOC_DAPM_ENUM("Route", wm8753_enum[11]);
456
457/* Rx mux and mixer */
458static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
459SOC_DAPM_ENUM("Route", wm8753_enum[15]);
460
461/* Mic Selector Mux */
462static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
463SOC_DAPM_ENUM("Route", wm8753_enum[25]);
464
465static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
466SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
467SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
468 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
469SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
470SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
471SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
472SND_SOC_DAPM_OUTPUT("LOUT1"),
473SND_SOC_DAPM_OUTPUT("LOUT2"),
474SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
475 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
476SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
477SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
478SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
479SND_SOC_DAPM_OUTPUT("ROUT1"),
480SND_SOC_DAPM_OUTPUT("ROUT2"),
481SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
482 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
483SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
484SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
485SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
486SND_SOC_DAPM_OUTPUT("MONO1"),
487SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
488SND_SOC_DAPM_OUTPUT("MONO2"),
489SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
490SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
491SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
492SND_SOC_DAPM_OUTPUT("OUT3"),
493SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
494SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
495SND_SOC_DAPM_OUTPUT("OUT4"),
496SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
497 &wm8753_record_mixer_controls[0],
498 ARRAY_SIZE(wm8753_record_mixer_controls)),
499SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
500SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
501SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
502 &wm8753_adc_mono_controls),
503SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
504 &wm8753_adc_mono_controls),
505SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
506 &wm8753_adc_left_controls),
507SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
508 &wm8753_adc_right_controls),
509SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
510 &wm8753_mic_mux_controls),
511SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
512SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
513SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
514 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
515SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
516 &wm8753_line_left_controls),
517SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
518 &wm8753_line_right_controls),
519SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
520 &wm8753_line_mono_controls),
521SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
522 &wm8753_line_mux_mix_controls),
523SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
524 &wm8753_rx_mux_mix_controls),
525SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
526SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
527SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
528 &wm8753_mic_sel_mux_controls),
529SND_SOC_DAPM_INPUT("LINE1"),
530SND_SOC_DAPM_INPUT("LINE2"),
531SND_SOC_DAPM_INPUT("RXP"),
532SND_SOC_DAPM_INPUT("RXN"),
533SND_SOC_DAPM_INPUT("ACIN"),
534SND_SOC_DAPM_OUTPUT("ACOP"),
535SND_SOC_DAPM_INPUT("MIC1N"),
536SND_SOC_DAPM_INPUT("MIC1"),
537SND_SOC_DAPM_INPUT("MIC2N"),
538SND_SOC_DAPM_INPUT("MIC2"),
539SND_SOC_DAPM_VMID("VREF"),
540};
541
56a926dd 542static const struct snd_soc_dapm_route wm8753_dapm_routes[] = {
1f53aee0
LG		 543 /* left mixer */
544 {"Left Mixer", "Left Playback Switch", "Left DAC"},
545 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
546 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
547 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
548
549 /* right mixer */
550 {"Right Mixer", "Right Playback Switch", "Right DAC"},
551 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
552 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
553 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
554
555 /* mono mixer */
556 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
557 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
558 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
559 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
560 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
561
562 /* left out */
563 {"Left Out 1", NULL, "Left Mixer"},
564 {"Left Out 2", NULL, "Left Mixer"},
565 {"LOUT1", NULL, "Left Out 1"},
566 {"LOUT2", NULL, "Left Out 2"},
567
568 /* right out */
569 {"Right Out 1", NULL, "Right Mixer"},
570 {"Right Out 2", NULL, "Right Mixer"},
571 {"ROUT1", NULL, "Right Out 1"},
572 {"ROUT2", NULL, "Right Out 2"},
573
574 /* mono 1 out */
575 {"Mono Out 1", NULL, "Mono Mixer"},
576 {"MONO1", NULL, "Mono Out 1"},
577
578 /* mono 2 out */
579 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
580 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
581 {"Mono 2 Mux", "Left", "Left Mixer"},
582 {"Mono 2 Mux", "Right", "Right Mixer"},
583 {"Mono Out 2", NULL, "Mono 2 Mux"},
584 {"MONO2", NULL, "Mono Out 2"},
585
586 /* out 3 */
587 {"Out3 Left + Right", NULL, "Left Mixer"},
588 {"Out3 Left + Right", NULL, "Right Mixer"},
589 {"Out3 Mux", "VREF", "VREF"},
590 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
591 {"Out3 Mux", "ROUT2", "ROUT2"},
592 {"Out 3", NULL, "Out3 Mux"},
593 {"OUT3", NULL, "Out 3"},
594
595 /* out 4 */
596 {"Out4 Mux", "VREF", "VREF"},
4037314a 597 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 598 {"Out4 Mux", "LOUT2", "LOUT2"},
599 {"Out 4", NULL, "Out4 Mux"},
600 {"OUT4", NULL, "Out 4"},
601
602 /* record mixer */
603 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
604 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
605 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
606
607 /* Mic/SideTone Mux */
608 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
609 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
610 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
611 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
612
613 /* Capture Left Mux */
614 {"Capture Left Mux", "PGA", "Left Capture Volume"},
615 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
616 {"Capture Left Mux", "Line", "LINE1"},
617
618 /* Capture Right Mux */
619 {"Capture Right Mux", "PGA", "Right Capture Volume"},
620 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 621 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 622
623 /* Mono Capture mixer-mux */
624 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
877ae707 625 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
1f53aee0
LG		 626 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
627 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
628 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
629 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
630 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
631 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
632 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
633 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
634
635 /* ADC */
636 {"Left ADC", NULL, "Capture Left Mixer"},
637 {"Right ADC", NULL, "Capture Right Mixer"},
638
639 /* Left Capture Volume */
640 {"Left Capture Volume", NULL, "ACIN"},
641
642 /* Right Capture Volume */
643 {"Right Capture Volume", NULL, "Mic 2 Volume"},
644
645 /* ALC Mixer */
646 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
647 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
648 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
649 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
650
651 /* Line Left Mux */
652 {"Line Left Mux", "Line 1", "LINE1"},
653 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
654
655 /* Line Right Mux */
656 {"Line Right Mux", "Line 2", "LINE2"},
657 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
658
659 /* Line Mono Mux */
660 {"Line Mono Mux", "Line Mix", "Line Mixer"},
661 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
662
663 /* Line Mixer/Mux */
664 {"Line Mixer", "Line 1 + 2", "LINE1"},
665 {"Line Mixer", "Line 1 - 2", "LINE1"},
666 {"Line Mixer", "Line 1 + 2", "LINE2"},
667 {"Line Mixer", "Line 1 - 2", "LINE2"},
668 {"Line Mixer", "Line 1", "LINE1"},
669 {"Line Mixer", "Line 2", "LINE2"},
670
671 /* Rx Mixer/Mux */
672 {"Rx Mixer", "RXP - RXN", "RXP"},
673 {"Rx Mixer", "RXP + RXN", "RXP"},
674 {"Rx Mixer", "RXP - RXN", "RXN"},
675 {"Rx Mixer", "RXP + RXN", "RXN"},
676 {"Rx Mixer", "RXP", "RXP"},
677 {"Rx Mixer", "RXN", "RXN"},
678
679 /* Mic 1 Volume */
680 {"Mic 1 Volume", NULL, "MIC1N"},
681 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
682
683 /* Mic 2 Volume */
684 {"Mic 2 Volume", NULL, "MIC2N"},
685 {"Mic 2 Volume", NULL, "MIC2"},
686
687 /* Mic Selector Mux */
688 {"Mic Selection Mux", "Mic 1", "MIC1"},
689 {"Mic Selection Mux", "Mic 2", "MIC2N"},
690 {"Mic Selection Mux", "Mic 3", "MIC2"},
691
692 /* ACOP */
693 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 694};
695
1f53aee0
LG		 696/* PLL divisors */
697struct _pll_div {
698 u32 div2:1;
699 u32 n:4;
700 u32 k:24;
701};
702
703/* The size in bits of the pll divide multiplied by 10
704 * to allow rounding later */
705#define FIXED_PLL_SIZE ((1 << 22) * 10)
706
707static void pll_factors(struct _pll_div *pll_div, unsigned int target,
708 unsigned int source)
709{
710 u64 Kpart;
711 unsigned int K, Ndiv, Nmod;
712
713 Ndiv = target / source;
714 if (Ndiv < 6) {
715 source >>= 1;
716 pll_div->div2 = 1;
717 Ndiv = target / source;
718 } else
719 pll_div->div2 = 0;
720
721 if ((Ndiv < 6) || (Ndiv > 12))
722 printk(KERN_WARNING
449bd54d 723 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 724
725 pll_div->n = Ndiv;
726 Nmod = target % source;
727 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
728
729 do_div(Kpart, source);
730
731 K = Kpart & 0xFFFFFFFF;
732
733 /* Check if we need to round */
734 if ((K % 10) >= 5)
735 K += 5;
736
737 /* Move down to proper range now rounding is done */
738 K /= 10;
739
740 pll_div->k = K;
741}
742
85488037
MB		 743static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
744 int source, unsigned int freq_in, unsigned int freq_out)
1f53aee0
LG		 745{
746 u16 reg, enable;
747 int offset;
748 struct snd_soc_codec *codec = codec_dai->codec;
749
750 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
751 return -ENODEV;
752
753 if (pll_id == WM8753_PLL1) {
754 offset = 0;
755 enable = 0x10;
776065e3 756 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
1f53aee0
LG		 757 } else {
758 offset = 4;
759 enable = 0x8;
776065e3 760 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
1f53aee0
LG		 761 }
762
763 if (!freq_in || !freq_out) {
764 /* disable PLL */
776065e3
LPC		 765 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
766 snd_soc_write(codec, WM8753_CLOCK, reg);
1f53aee0
LG		 767 return 0;
768 } else {
769 u16 value = 0;
770 struct _pll_div pll_div;
771
772 pll_factors(&pll_div, freq_out * 8, freq_in);
773
774 /* set up N and K PLL divisor ratios */
775 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
776 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776065e3 777 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
1f53aee0
LG		 778
779 /* bits 8:0 = PLL_K[17:9] */
780 value = (pll_div.k & 0x03fe00) >> 9;
776065e3 781 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
1f53aee0
LG		 782
783 /* bits 8:0 = PLL_K[8:0] */
784 value = pll_div.k & 0x0001ff;
776065e3 785 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
1f53aee0
LG		 786
787 /* set PLL as input and enable */
776065e3 788 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
1f53aee0 789 (pll_div.div2 << 3));
776065e3 790 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
1f53aee0
LG		 791 }
792 return 0;
793}
794
795struct _coeff_div {
796 u32 mclk;
797 u32 rate;
798 u8 sr:5;
799 u8 usb:1;
800};
801
802/* codec hifi mclk (after PLL) clock divider coefficients */
803static const struct _coeff_div coeff_div[] = {
804 /* 8k */
805 {12288000, 8000, 0x6, 0x0},
806 {11289600, 8000, 0x16, 0x0},
807 {18432000, 8000, 0x7, 0x0},
808 {16934400, 8000, 0x17, 0x0},
809 {12000000, 8000, 0x6, 0x1},
810
811 /* 11.025k */
812 {11289600, 11025, 0x18, 0x0},
813 {16934400, 11025, 0x19, 0x0},
814 {12000000, 11025, 0x19, 0x1},
815
816 /* 16k */
817 {12288000, 16000, 0xa, 0x0},
818 {18432000, 16000, 0xb, 0x0},
819 {12000000, 16000, 0xa, 0x1},
820
821 /* 22.05k */
822 {11289600, 22050, 0x1a, 0x0},
823 {16934400, 22050, 0x1b, 0x0},
824 {12000000, 22050, 0x1b, 0x1},
825
826 /* 32k */
827 {12288000, 32000, 0xc, 0x0},
828 {18432000, 32000, 0xd, 0x0},
829 {12000000, 32000, 0xa, 0x1},
830
831 /* 44.1k */
832 {11289600, 44100, 0x10, 0x0},
833 {16934400, 44100, 0x11, 0x0},
834 {12000000, 44100, 0x11, 0x1},
835
836 /* 48k */
837 {12288000, 48000, 0x0, 0x0},
838 {18432000, 48000, 0x1, 0x0},
839 {12000000, 48000, 0x0, 0x1},
840
841 /* 88.2k */
842 {11289600, 88200, 0x1e, 0x0},
843 {16934400, 88200, 0x1f, 0x0},
844 {12000000, 88200, 0x1f, 0x1},
845
846 /* 96k */
847 {12288000, 96000, 0xe, 0x0},
848 {18432000, 96000, 0xf, 0x0},
849 {12000000, 96000, 0xe, 0x1},
850};
851
852static int get_coeff(int mclk, int rate)
853{
854 int i;
855
856 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
857 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
858 return i;
859 }
860 return -EINVAL;
861}
862
863/*
864 * Clock after PLL and dividers
865 */
e550e17f 866static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 867 int clk_id, unsigned int freq, int dir)
868{
869 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 870 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 871
872 switch (freq) {
873 case 11289600:
874 case 12000000:
875 case 12288000:
876 case 16934400:
877 case 18432000:
878 if (clk_id == WM8753_MCLK) {
879 wm8753->sysclk = freq;
880 return 0;
881 } else if (clk_id == WM8753_PCMCLK) {
882 wm8753->pcmclk = freq;
883 return 0;
884 }
885 break;
886 }
887 return -EINVAL;
888}
889
890/*
891 * Set's ADC and Voice DAC format.
892 */
338ee253 893static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 894 unsigned int fmt)
895{
776065e3 896 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
1f53aee0
LG		 897
898 /* interface format */
899 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
900 case SND_SOC_DAIFMT_I2S:
901 voice |= 0x0002;
902 break;
903 case SND_SOC_DAIFMT_RIGHT_J:
904 break;
905 case SND_SOC_DAIFMT_LEFT_J:
906 voice |= 0x0001;
907 break;
908 case SND_SOC_DAIFMT_DSP_A:
909 voice |= 0x0003;
910 break;
911 case SND_SOC_DAIFMT_DSP_B:
912 voice |= 0x0013;
913 break;
914 default:
915 return -EINVAL;
916 }
917
776065e3 918 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 919 return 0;
920}
921
922/*
923 * Set PCM DAI bit size and sample rate.
924 */
925static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 926 struct snd_pcm_hw_params *params,
927 struct snd_soc_dai *dai)
1f53aee0 928{
e6968a17 929 struct snd_soc_codec *codec = dai->codec;
b2c812e2 930 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 931 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
932 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
1f53aee0
LG		 933
934 /* bit size */
f21b6604
MB		 935 switch (params_width(params)) {
936 case 16:
1f53aee0 937 break;
f21b6604 938 case 20:
1f53aee0
LG		 939 voice |= 0x0004;
940 break;
f21b6604 941 case 24:
1f53aee0
LG		 942 voice |= 0x0008;
943 break;
f21b6604 944 case 32:
1f53aee0
LG		 945 voice |= 0x000c;
946 break;
947 }
948
949 /* sample rate */
950 if (params_rate(params) * 384 == wm8753->pcmclk)
951 srate |= 0x80;
776065e3 952 snd_soc_write(codec, WM8753_SRATE1, srate);
1f53aee0 953
776065e3 954 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 955 return 0;
956}
957
958/*
959 * Set's PCM dai fmt and BCLK.
960 */
338ee253 961static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 962 unsigned int fmt)
963{
1f53aee0
LG		 964 u16 voice, ioctl;
965
776065e3
LPC		 966 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
967 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
1f53aee0
LG		 968
969 /* set master/slave audio interface */
970 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
971 case SND_SOC_DAIFMT_CBS_CFS:
972 break;
973 case SND_SOC_DAIFMT_CBM_CFM:
974 ioctl |= 0x2;
975 case SND_SOC_DAIFMT_CBM_CFS:
976 voice |= 0x0040;
977 break;
978 default:
979 return -EINVAL;
980 }
981
982 /* clock inversion */
983 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
984 case SND_SOC_DAIFMT_DSP_A:
985 case SND_SOC_DAIFMT_DSP_B:
986 /* frame inversion not valid for DSP modes */
987 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
988 case SND_SOC_DAIFMT_NB_NF:
989 break;
990 case SND_SOC_DAIFMT_IB_NF:
991 voice |= 0x0080;
992 break;
993 default:
994 return -EINVAL;
995 }
996 break;
997 case SND_SOC_DAIFMT_I2S:
998 case SND_SOC_DAIFMT_RIGHT_J:
999 case SND_SOC_DAIFMT_LEFT_J:
1000 voice &= ~0x0010;
1001 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1002 case SND_SOC_DAIFMT_NB_NF:
1003 break;
1004 case SND_SOC_DAIFMT_IB_IF:
1005 voice |= 0x0090;
1006 break;
1007 case SND_SOC_DAIFMT_IB_NF:
1008 voice |= 0x0080;
1009 break;
1010 case SND_SOC_DAIFMT_NB_IF:
1011 voice |= 0x0010;
1012 break;
1013 default:
1014 return -EINVAL;
1015 }
1016 break;
1017 default:
1018 return -EINVAL;
1019 }
1020
776065e3
LPC		 1021 snd_soc_write(codec, WM8753_PCM, voice);
1022 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1023 return 0;
1024}
1025
e550e17f 1026static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1027 int div_id, int div)
1028{
1029 struct snd_soc_codec *codec = codec_dai->codec;
1030 u16 reg;
1031
1032 switch (div_id) {
1033 case WM8753_PCMDIV:
776065e3
LPC		 1034 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
1035 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1f53aee0
LG		 1036 break;
1037 case WM8753_BCLKDIV:
776065e3
LPC		 1038 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
1039 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 1040 break;
1041 case WM8753_VXCLKDIV:
776065e3
LPC		 1042 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
1043 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 1044 break;
1045 default:
1046 return -EINVAL;
1047 }
1048 return 0;
1049}
1050
1051/*
1052 * Set's HiFi DAC format.
1053 */
338ee253 1054static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1055 unsigned int fmt)
1056{
776065e3 1057 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1f53aee0
LG		 1058
1059 /* interface format */
1060 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1061 case SND_SOC_DAIFMT_I2S:
1062 hifi |= 0x0002;
1063 break;
1064 case SND_SOC_DAIFMT_RIGHT_J:
1065 break;
1066 case SND_SOC_DAIFMT_LEFT_J:
1067 hifi |= 0x0001;
1068 break;
1069 case SND_SOC_DAIFMT_DSP_A:
1070 hifi |= 0x0003;
1071 break;
1072 case SND_SOC_DAIFMT_DSP_B:
1073 hifi |= 0x0013;
1074 break;
1075 default:
1076 return -EINVAL;
1077 }
1078
776065e3 1079 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1080 return 0;
1081}
1082
1083/*
1084 * Set's I2S DAI format.
1085 */
338ee253 1086static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1087 unsigned int fmt)
1088{
1f53aee0
LG		 1089 u16 ioctl, hifi;
1090
776065e3
LPC		 1091 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1092 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1f53aee0
LG		 1093
1094 /* set master/slave audio interface */
1095 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1096 case SND_SOC_DAIFMT_CBS_CFS:
1097 break;
1098 case SND_SOC_DAIFMT_CBM_CFM:
1099 ioctl |= 0x1;
1100 case SND_SOC_DAIFMT_CBM_CFS:
1101 hifi |= 0x0040;
1102 break;
1103 default:
1104 return -EINVAL;
1105 }
1106
1107 /* clock inversion */
1108 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1109 case SND_SOC_DAIFMT_DSP_A:
1110 case SND_SOC_DAIFMT_DSP_B:
1111 /* frame inversion not valid for DSP modes */
1112 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1113 case SND_SOC_DAIFMT_NB_NF:
1114 break;
1115 case SND_SOC_DAIFMT_IB_NF:
1116 hifi |= 0x0080;
1117 break;
1118 default:
1119 return -EINVAL;
1120 }
1121 break;
1122 case SND_SOC_DAIFMT_I2S:
1123 case SND_SOC_DAIFMT_RIGHT_J:
1124 case SND_SOC_DAIFMT_LEFT_J:
1125 hifi &= ~0x0010;
1126 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1127 case SND_SOC_DAIFMT_NB_NF:
1128 break;
1129 case SND_SOC_DAIFMT_IB_IF:
1130 hifi |= 0x0090;
1131 break;
1132 case SND_SOC_DAIFMT_IB_NF:
1133 hifi |= 0x0080;
1134 break;
1135 case SND_SOC_DAIFMT_NB_IF:
1136 hifi |= 0x0010;
1137 break;
1138 default:
1139 return -EINVAL;
1140 }
1141 break;
1142 default:
1143 return -EINVAL;
1144 }
1145
776065e3
LPC		 1146 snd_soc_write(codec, WM8753_HIFI, hifi);
1147 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1148 return 0;
1149}
1150
1151/*
1152 * Set PCM DAI bit size and sample rate.
1153 */
1154static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1155 struct snd_pcm_hw_params *params,
1156 struct snd_soc_dai *dai)
1f53aee0 1157{
e6968a17 1158 struct snd_soc_codec *codec = dai->codec;
b2c812e2 1159 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 1160 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1161 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1f53aee0
LG		 1162 int coeff;
1163
1164 /* is digital filter coefficient valid ? */
1165 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1166 if (coeff < 0) {
1167 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1168 return coeff;
1169 }
776065e3 1170 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1f53aee0
LG		 1171 coeff_div[coeff].usb);
1172
1173 /* bit size */
f21b6604
MB		 1174 switch (params_width(params)) {
1175 case 16:
1f53aee0 1176 break;
f21b6604 1177 case 20:
1f53aee0
LG		 1178 hifi |= 0x0004;
1179 break;
f21b6604 1180 case 24:
1f53aee0
LG		 1181 hifi |= 0x0008;
1182 break;
f21b6604 1183 case 32:
1f53aee0
LG		 1184 hifi |= 0x000c;
1185 break;
1186 }
1187
776065e3 1188 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1189 return 0;
1190}
1191
338ee253 1192static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1193 unsigned int fmt)
1194{
1f53aee0
LG		 1195 u16 clock;
1196
1197 /* set clk source as pcmclk */
776065e3
LPC		 1198 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1199 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1200
338ee253 1201 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1202}
1203
338ee253 1204static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1205 unsigned int fmt)
1206{
338ee253 1207 return wm8753_hdac_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1208}
1209
338ee253 1210static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1211 unsigned int fmt)
1212{
1f53aee0
LG		 1213 u16 clock;
1214
1215 /* set clk source as pcmclk */
776065e3
LPC		 1216 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1217 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1218
338ee253 1219 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1220}
1221
338ee253 1222static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1223 unsigned int fmt)
1224{
1f53aee0
LG		 1225 u16 clock;
1226
1227 /* set clk source as mclk */
776065e3
LPC		 1228 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1229 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1f53aee0 1230
338ee253 1231 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1f53aee0 1232 return -EINVAL;
338ee253 1233 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1234}
1235
338ee253
LPC		 1236static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1237 unsigned int fmt)
1238{
1239 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1240 int ret = 0;
1241
1242 switch (wm8753->dai_func) {
1243 case 0:
1244 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1245 break;
1246 case 1:
1247 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1248 break;
1249 case 2:
1250 case 3:
1251 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1252 break;
1253 default:
1254 break;
1255 }
1256 if (ret)
1257 return ret;
1258
1259 return wm8753_i2s_set_dai_fmt(codec, fmt);
1260}
1261
1262static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1263 unsigned int fmt)
1264{
1265 struct snd_soc_codec *codec = codec_dai->codec;
1266 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1267
1268 wm8753->hifi_fmt = fmt;
1269
1270 return wm8753_hifi_write_dai_fmt(codec, fmt);
1271};
1272
1273static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1274 unsigned int fmt)
1275{
1276 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1277 int ret = 0;
1278
1279 if (wm8753->dai_func != 0)
1280 return 0;
1281
1282 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1283 if (ret)
1284 return ret;
1285 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1286 if (ret)
1287 return ret;
1288
1289 return 0;
1290};
1291
1292static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1293 unsigned int fmt)
1294{
1295 struct snd_soc_codec *codec = codec_dai->codec;
1296 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1297
1298 wm8753->voice_fmt = fmt;
1299
1300 return wm8753_voice_write_dai_fmt(codec, fmt);
1301};
1302
e550e17f 1303static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1304{
1305 struct snd_soc_codec *codec = dai->codec;
776065e3 1306 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
f0fba2ad 1307 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 1308
1309 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1310 * make sure we check if they are not both active when we mute */
f0fba2ad 1311 if (mute && wm8753->dai_func == 1) {
5c898e74 1312 if (!snd_soc_codec_is_active(codec))
776065e3 1313 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0
LG		 1314 } else {
1315 if (mute)
776065e3 1316 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0 1317 else
776065e3 1318 snd_soc_write(codec, WM8753_DAC, mute_reg);
1f53aee0
LG		 1319 }
1320
1321 return 0;
1322}
1323
35afd922
LPC		 1324static void wm8753_charge_work(struct work_struct *work)
1325{
1326 struct wm8753_priv *wm8753 =
1327 container_of(work, struct wm8753_priv, charge_work.work);
1328
1329 /* Set to 500k */
1330 regmap_update_bits(wm8753->regmap, WM8753_PWR1, 0x0180, 0x0100);
1331}
1332
0be9898a
MB		 1333static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1334 enum snd_soc_bias_level level)
1f53aee0 1335{
35afd922 1336 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1337 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1f53aee0 1338
0be9898a
MB		 1339 switch (level) {
1340 case SND_SOC_BIAS_ON:
1f53aee0 1341 /* set vmid to 50k and unmute dac */
776065e3 1342 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1f53aee0 1343 break;
0be9898a 1344 case SND_SOC_BIAS_PREPARE:
35afd922
LPC		 1345 /* Wait until fully charged */
1346 flush_delayed_work(&wm8753->charge_work);
1f53aee0 1347 break;
0be9898a 1348 case SND_SOC_BIAS_STANDBY:
6093e926 1349 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
35afd922
LPC		 1350 /* set vmid to 5k for quick power up */
1351 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1352 schedule_delayed_work(&wm8753->charge_work,
1353 msecs_to_jiffies(caps_charge));
1354 } else {
1355 /* mute dac and set vmid to 500k, enable VREF */
1356 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1357 }
1f53aee0 1358 break;
0be9898a 1359 case SND_SOC_BIAS_OFF:
35afd922 1360 cancel_delayed_work_sync(&wm8753->charge_work);
776065e3 1361 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1f53aee0
LG		 1362 break;
1363 }
1f53aee0
LG		 1364 return 0;
1365}
1366
1367#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1368 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1369 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1370 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1371
1372#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1373 SNDRV_PCM_FMTBIT_S24_LE)
1374
1375/*
25985edc 1376 * The WM8753 supports up to 4 different and mutually exclusive DAI
1f53aee0
LG		 1377 * configurations. This gives 2 PCM's available for use, hifi and voice.
1378 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1379 * is connected between the wm8753 and a BT codec or GSM modem.
1380 *
1381 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1382 * 2. Voice over HIFI DAI - HIFI disabled
1383 * 3. Voice disabled - HIFI over HIFI
1384 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1385 */
85e7652d 1386static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
6335d055
EM		 1387 .hw_params = wm8753_i2s_hw_params,
1388 .digital_mute = wm8753_mute,
338ee253 1389 .set_fmt = wm8753_hifi_set_dai_fmt,
6335d055
EM		 1390 .set_clkdiv = wm8753_set_dai_clkdiv,
1391 .set_pll = wm8753_set_dai_pll,
1392 .set_sysclk = wm8753_set_dai_sysclk,
1393};
1394
85e7652d 1395static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
6335d055
EM		 1396 .hw_params = wm8753_pcm_hw_params,
1397 .digital_mute = wm8753_mute,
338ee253 1398 .set_fmt = wm8753_voice_set_dai_fmt,
6335d055
EM		 1399 .set_clkdiv = wm8753_set_dai_clkdiv,
1400 .set_pll = wm8753_set_dai_pll,
1401 .set_sysclk = wm8753_set_dai_sysclk,
1402};
1403
338ee253 1404static struct snd_soc_dai_driver wm8753_dai[] = {
1f53aee0 1405/* DAI HiFi mode 1 */
f0fba2ad 1406{ .name = "wm8753-hifi",
1f53aee0
LG		 1407 .playback = {
1408 .stream_name = "HiFi Playback",
1409 .channels_min = 1,
1410 .channels_max = 2,
1411 .rates = WM8753_RATES,
338ee253
LPC		 1412 .formats = WM8753_FORMATS
1413 },
1f53aee0
LG		 1414 .capture = { /* dummy for fast DAI switching */
1415 .stream_name = "Capture",
1416 .channels_min = 1,
1417 .channels_max = 2,
1418 .rates = WM8753_RATES,
338ee253
LPC		 1419 .formats = WM8753_FORMATS
1420 },
1421 .ops = &wm8753_dai_ops_hifi_mode,
1f53aee0
LG		 1422},
1423/* DAI Voice mode 1 */
f0fba2ad 1424{ .name = "wm8753-voice",
1f53aee0
LG		 1425 .playback = {
1426 .stream_name = "Voice Playback",
1427 .channels_min = 1,
1428 .channels_max = 1,
1429 .rates = WM8753_RATES,
338ee253
LPC		 1430 .formats = WM8753_FORMATS,
1431 },
1f53aee0
LG		 1432 .capture = {
1433 .stream_name = "Capture",
1434 .channels_min = 1,
1435 .channels_max = 2,
1436 .rates = WM8753_RATES,
338ee253 1437 .formats = WM8753_FORMATS,
9e70c1f0 1438 },
338ee253
LPC		 1439 .ops = &wm8753_dai_ops_voice_mode,
1440},
9e70c1f0 1441};
1f53aee0 1442
f0fba2ad 1443static int wm8753_resume(struct snd_soc_codec *codec)
1f53aee0 1444{
d3398ff0 1445 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
e611bd82 1446
d3398ff0 1447 regcache_sync(wm8753->regmap);
1f53aee0 1448
1f53aee0
LG		 1449 return 0;
1450}
1451
f0fba2ad 1452static int wm8753_probe(struct snd_soc_codec *codec)
1f53aee0 1453{
f0fba2ad 1454 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1455 int ret;
1f53aee0 1456
35afd922 1457 INIT_DELAYED_WORK(&wm8753->charge_work, wm8753_charge_work);
c2bac160 1458
c2bac160
MB		 1459 ret = wm8753_reset(codec);
1460 if (ret < 0) {
f0fba2ad
LG		 1461 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1462 return ret;
c2bac160
MB		 1463 }
1464
f0fba2ad
LG		 1465 wm8753->dai_func = 0;
1466
c2bac160 1467 /* set the update bits */
776065e3
LPC		 1468 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1469 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
21d17dd2
AL		 1470 snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100);
1471 snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100);
776065e3
LPC		 1472 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1473 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1474 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1475 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1476 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1477 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
c2bac160 1478
c2bac160 1479 return 0;
c2bac160
MB		 1480}
1481
f0fba2ad
LG		 1482static struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
1483 .probe = wm8753_probe,
f0fba2ad
LG		 1484 .resume = wm8753_resume,
1485 .set_bias_level = wm8753_set_bias_level,
a1f0b967 1486 .suspend_bias_off = true,
56a926dd
MB		 1487
1488 .controls = wm8753_snd_controls,
1489 .num_controls = ARRAY_SIZE(wm8753_snd_controls),
1490 .dapm_widgets = wm8753_dapm_widgets,
1491 .num_dapm_widgets = ARRAY_SIZE(wm8753_dapm_widgets),
1492 .dapm_routes = wm8753_dapm_routes,
1493 .num_dapm_routes = ARRAY_SIZE(wm8753_dapm_routes),
f0fba2ad 1494};
69e169da 1495
70e14122
MB		 1496static const struct of_device_id wm8753_of_match[] = {
1497 { .compatible = "wlf,wm8753", },
1498 { }
1499};
1500MODULE_DEVICE_TABLE(of, wm8753_of_match);
1501
d3398ff0
MB		 1502static const struct regmap_config wm8753_regmap = {
1503 .reg_bits = 7,
1504 .val_bits = 9,
1505
1506 .max_register = WM8753_ADCTL2,
d3398ff0
MB		 1507 .volatile_reg = wm8753_volatile,
1508
1509 .cache_type = REGCACHE_RBTREE,
1510 .reg_defaults = wm8753_reg_defaults,
1511 .num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults),
1512};
1513
f0fba2ad 1514#if defined(CONFIG_SPI_MASTER)
7a79e94e 1515static int wm8753_spi_probe(struct spi_device *spi)
69e169da 1516{
c2bac160 1517 struct wm8753_priv *wm8753;
f0fba2ad 1518 int ret;
69e169da 1519
2c823d14
MB		 1520 wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv),
1521 GFP_KERNEL);
c2bac160
MB		 1522 if (wm8753 == NULL)
1523 return -ENOMEM;
69e169da 1524
f0fba2ad 1525 spi_set_drvdata(spi, wm8753);
c2bac160 1526
eb781f78 1527 wm8753->regmap = devm_regmap_init_spi(spi, &wm8753_regmap);
d3398ff0
MB		 1528 if (IS_ERR(wm8753->regmap)) {
1529 ret = PTR_ERR(wm8753->regmap);
1530 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1531 ret);
eb781f78 1532 return ret;
d3398ff0
MB		 1533 }
1534
1535 ret = snd_soc_register_codec(&spi->dev, &soc_codec_dev_wm8753,
1536 wm8753_dai, ARRAY_SIZE(wm8753_dai));
eb781f78 1537 if (ret != 0)
d3398ff0 1538 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
ad20ff92 1539
f0fba2ad 1540 return ret;
69e169da
MB		 1541}
1542
7a79e94e 1543static int wm8753_spi_remove(struct spi_device *spi)
69e169da 1544{
f0fba2ad 1545 snd_soc_unregister_codec(&spi->dev);
f0fba2ad 1546 return 0;
69e169da
MB		 1547}
1548
f0fba2ad 1549static struct spi_driver wm8753_spi_driver = {
69e169da 1550 .driver = {
63010634 1551 .name = "wm8753",
70e14122 1552 .of_match_table = wm8753_of_match,
69e169da 1553 },
f0fba2ad 1554 .probe = wm8753_spi_probe,
7a79e94e 1555 .remove = wm8753_spi_remove,
69e169da 1556};
f0fba2ad 1557#endif /* CONFIG_SPI_MASTER */
69e169da 1558
2c486433 1559#if IS_ENABLED(CONFIG_I2C)
7a79e94e
BP		 1560static int wm8753_i2c_probe(struct i2c_client *i2c,
1561 const struct i2c_device_id *id)
69e169da 1562{
c2bac160 1563 struct wm8753_priv *wm8753;
f0fba2ad 1564 int ret;
c2bac160 1565
2c823d14
MB		 1566 wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv),
1567 GFP_KERNEL);
c2bac160
MB		 1568 if (wm8753 == NULL)
1569 return -ENOMEM;
69e169da 1570
f0fba2ad 1571 i2c_set_clientdata(i2c, wm8753);
69e169da 1572
eb781f78 1573 wm8753->regmap = devm_regmap_init_i2c(i2c, &wm8753_regmap);
d3398ff0
MB		 1574 if (IS_ERR(wm8753->regmap)) {
1575 ret = PTR_ERR(wm8753->regmap);
1576 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1577 ret);
eb781f78 1578 return ret;
d3398ff0
MB		 1579 }
1580
1581 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8753,
1582 wm8753_dai, ARRAY_SIZE(wm8753_dai));
eb781f78 1583 if (ret != 0)
d3398ff0 1584 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
2c823d14 1585
f0fba2ad 1586 return ret;
69e169da
MB		 1587}
1588
7a79e94e 1589static int wm8753_i2c_remove(struct i2c_client *client)
69e169da 1590{
f0fba2ad 1591 snd_soc_unregister_codec(&client->dev);
69e169da
MB		 1592 return 0;
1593}
1594
f0fba2ad
LG		 1595static const struct i2c_device_id wm8753_i2c_id[] = {
1596 { "wm8753", 0 },
1597 { }
1598};
1599MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1600
1601static struct i2c_driver wm8753_i2c_driver = {
69e169da 1602 .driver = {
63010634 1603 .name = "wm8753",
70e14122 1604 .of_match_table = wm8753_of_match,
69e169da 1605 },
f0fba2ad 1606 .probe = wm8753_i2c_probe,
7a79e94e 1607 .remove = wm8753_i2c_remove,
f0fba2ad 1608 .id_table = wm8753_i2c_id,
69e169da
MB		 1609};
1610#endif
1611
c9b3a40f 1612static int __init wm8753_modinit(void)
64089b84 1613{
f0fba2ad 1614 int ret = 0;
2c486433 1615#if IS_ENABLED(CONFIG_I2C)
c2bac160 1616 ret = i2c_add_driver(&wm8753_i2c_driver);
f0fba2ad
LG		 1617 if (ret != 0) {
1618 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1619 ret);
1620 }
c2bac160
MB		 1621#endif
1622#if defined(CONFIG_SPI_MASTER)
1623 ret = spi_register_driver(&wm8753_spi_driver);
f0fba2ad
LG		 1624 if (ret != 0) {
1625 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1626 ret);
1627 }
c2bac160 1628#endif
f0fba2ad 1629 return ret;
64089b84
MB		 1630}
1631module_init(wm8753_modinit);
1632
1633static void __exit wm8753_exit(void)
1634{
2c486433 1635#if IS_ENABLED(CONFIG_I2C)
c2bac160
MB		 1636 i2c_del_driver(&wm8753_i2c_driver);
1637#endif
1638#if defined(CONFIG_SPI_MASTER)
1639 spi_unregister_driver(&wm8753_spi_driver);
1640#endif
64089b84
MB		 1641}
1642module_exit(wm8753_exit);
1643
1f53aee0
LG		 1644MODULE_DESCRIPTION("ASoC WM8753 driver");
1645MODULE_AUTHOR("Liam Girdwood");
1646MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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