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ASoC: Register platform drivers
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
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1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
1f53aee0
LG		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/soc.h>
47#include <sound/soc-dapm.h>
48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
1f53aee0
LG		 54#define WM8753_VERSION "0.16"
55
1f53aee0
LG		 56static int caps_charge = 2000;
57module_param(caps_charge, int, 0);
58MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
59
60static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
61 unsigned int mode);
62
63/* codec private data */
64struct wm8753_priv {
65 unsigned int sysclk;
66 unsigned int pcmclk;
67};
68
69/*
70 * wm8753 register cache
71 * We can't read the WM8753 register space when we
72 * are using 2 wire for device control, so we cache them instead.
73 */
74static const u16 wm8753_reg[] = {
75 0x0008, 0x0000, 0x000a, 0x000a,
76 0x0033, 0x0000, 0x0007, 0x00ff,
77 0x00ff, 0x000f, 0x000f, 0x007b,
78 0x0000, 0x0032, 0x0000, 0x00c3,
79 0x00c3, 0x00c0, 0x0000, 0x0000,
80 0x0000, 0x0000, 0x0000, 0x0000,
81 0x0000, 0x0000, 0x0000, 0x0000,
82 0x0000, 0x0000, 0x0000, 0x0055,
83 0x0005, 0x0050, 0x0055, 0x0050,
84 0x0055, 0x0050, 0x0055, 0x0079,
85 0x0079, 0x0079, 0x0079, 0x0079,
86 0x0000, 0x0000, 0x0000, 0x0000,
87 0x0097, 0x0097, 0x0000, 0x0004,
88 0x0000, 0x0083, 0x0024, 0x01ba,
89 0x0000, 0x0083, 0x0024, 0x01ba,
90 0x0000, 0x0000
91};
92
93/*
94 * read wm8753 register cache
95 */
96static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
97 unsigned int reg)
98{
99 u16 *cache = codec->reg_cache;
100 if (reg < 1 || reg > (ARRAY_SIZE(wm8753_reg) + 1))
101 return -1;
102 return cache[reg - 1];
103}
104
105/*
106 * write wm8753 register cache
107 */
108static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
109 unsigned int reg, unsigned int value)
110{
111 u16 *cache = codec->reg_cache;
112 if (reg < 1 || reg > 0x3f)
113 return;
114 cache[reg - 1] = value;
115}
116
117/*
118 * write to the WM8753 register space
119 */
120static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
121 unsigned int value)
122{
123 u8 data[2];
124
125 /* data is
126 * D15..D9 WM8753 register offset
127 * D8...D0 register data
128 */
129 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
130 data[1] = value & 0x00ff;
131
60fc684a 132 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 133 if (codec->hw_write(codec->control_data, data, 2) == 2)
134 return 0;
135 else
136 return -EIO;
137}
138
139#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
140
141/*
142 * WM8753 Controls
143 */
144static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
145static const char *wm8753_base_filter[] =
146 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
147 "100Hz @ 8kHz", "200Hz @ 8kHz"};
148static const char *wm8753_treble[] = {"8kHz", "4kHz"};
149static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
150static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
151static const char *wm8753_3d_func[] = {"Capture", "Playback"};
152static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
153static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
154static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
155static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
156static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
157static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
158 "Line 1", "Line 2"};
159static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
160static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
161static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
162static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
163static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
164 "Right PGA"};
165static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
166 "Left + Right"};
167static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
168static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
169static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
170static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
171static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
172 "Analogue Mix Right", "Digital Mono Mix"};
173static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
174 "82Hz @ 8kHz", "170Hz @ 8kHz"};
175static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
176static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
177static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
178static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
179 "Channel Swap"};
ae092c9e 180static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 181
182static const struct soc_enum wm8753_enum[] = {
183SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
184SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
185SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
186SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
187SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
188SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
189SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
190SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
191SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
192SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
193SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
194SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
195SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
196SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
197SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
198SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
199SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
200SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
201SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
202SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
203SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
204SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
205SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
206SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
207SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
208SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
209SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
210SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 211SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 212};
213
214
215static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
216 struct snd_ctl_elem_value *ucontrol)
217{
218 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
219 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
220
221 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
222 return 0;
223}
224
225static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
226 struct snd_ctl_elem_value *ucontrol)
227{
228 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
229 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
230
60fc684a 231 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 232 return 0;
233
234 mode &= 0xfff3;
235 mode |= (ucontrol->value.integer.value[0] << 2);
236
237 wm8753_write(codec, WM8753_IOCTL, mode);
238 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
239 return 1;
240}
241
2cc8c609
MM		 242static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
243static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
244static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
245static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
246static const unsigned int out_tlv[] = {
247 TLV_DB_RANGE_HEAD(2),
248 /* 0000000 - 0101111 = "Analogue mute" */
249 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
250 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
251};
252static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
253static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
254static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 255
1f53aee0 256static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 257SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
258
259SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
260 adc_tlv),
261
262SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
263 0, 127, 0, out_tlv),
264SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
265 127, 0, out_tlv),
266
267SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
268
269SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
270 1, mix_tlv),
271SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
272 7, 1, mix_tlv),
273SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
274 1, voice_mix_tlv),
275
276SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
277 1, 0),
278SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
279 1, 0),
280
281SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
282SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
283 mix_tlv),
284SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
285 voice_mix_tlv),
1f53aee0
LG		 286SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
287
288SOC_ENUM("Bass Boost", wm8753_enum[0]),
289SOC_ENUM("Bass Filter", wm8753_enum[1]),
290SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
291
292SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
293SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
294
2cc8c609
MM		 295SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
296 rec_mix_tlv),
297SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
298 rec_mix_tlv),
1f53aee0 299
2cc8c609
MM		 300SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
301 pga_tlv),
1f53aee0
LG		 302SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
303SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
304
305SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
306SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
307SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
308
309SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
310SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
311SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
312SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
313SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
314SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
315SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
316SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
317SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
318SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
319
320SOC_ENUM("3D Function", wm8753_enum[5]),
321SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
322SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
323SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
324SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
325
326SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
327SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
328
329SOC_ENUM("De-emphasis", wm8753_enum[8]),
330SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
331SOC_ENUM("Playback Phase", wm8753_enum[10]),
332
2cc8c609
MM		 333SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
334SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 335
336SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
337
338SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 339SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 340};
341
342/* add non dapm controls */
343static int wm8753_add_controls(struct snd_soc_codec *codec)
344{
345 int err, i;
346
347 for (i = 0; i < ARRAY_SIZE(wm8753_snd_controls); i++) {
348 err = snd_ctl_add(codec->card,
60fc684a
MB		 349 snd_soc_cnew(&wm8753_snd_controls[i],
350 codec, NULL));
1f53aee0
LG		 351 if (err < 0)
352 return err;
353 }
354 return 0;
355}
356
357/*
358 * _DAPM_ Controls
359 */
360
361/* Left Mixer */
362static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
363SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
364SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
365SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
366SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
367};
368
369/* Right mixer */
370static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
371SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
372SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
373SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
374SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
375};
376
377/* Mono mixer */
378static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
379SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
380SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
381SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
382SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
383SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
384};
385
386/* Mono 2 Mux */
387static const struct snd_kcontrol_new wm8753_mono2_controls =
388SOC_DAPM_ENUM("Route", wm8753_enum[17]);
389
390/* Out 3 Mux */
391static const struct snd_kcontrol_new wm8753_out3_controls =
392SOC_DAPM_ENUM("Route", wm8753_enum[18]);
393
394/* Out 4 Mux */
395static const struct snd_kcontrol_new wm8753_out4_controls =
396SOC_DAPM_ENUM("Route", wm8753_enum[19]);
397
398/* ADC Mono Mix */
399static const struct snd_kcontrol_new wm8753_adc_mono_controls =
400SOC_DAPM_ENUM("Route", wm8753_enum[22]);
401
402/* Record mixer */
403static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
404SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
405SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
406SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
407};
408
409/* Left ADC mux */
410static const struct snd_kcontrol_new wm8753_adc_left_controls =
411SOC_DAPM_ENUM("Route", wm8753_enum[21]);
412
413/* Right ADC mux */
414static const struct snd_kcontrol_new wm8753_adc_right_controls =
415SOC_DAPM_ENUM("Route", wm8753_enum[20]);
416
417/* MIC mux */
418static const struct snd_kcontrol_new wm8753_mic_mux_controls =
419SOC_DAPM_ENUM("Route", wm8753_enum[16]);
420
421/* ALC mixer */
422static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
423SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
424SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
425SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
426SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
427};
428
429/* Left Line mux */
430static const struct snd_kcontrol_new wm8753_line_left_controls =
431SOC_DAPM_ENUM("Route", wm8753_enum[14]);
432
433/* Right Line mux */
434static const struct snd_kcontrol_new wm8753_line_right_controls =
435SOC_DAPM_ENUM("Route", wm8753_enum[13]);
436
437/* Mono Line mux */
438static const struct snd_kcontrol_new wm8753_line_mono_controls =
439SOC_DAPM_ENUM("Route", wm8753_enum[12]);
440
441/* Line mux and mixer */
442static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
443SOC_DAPM_ENUM("Route", wm8753_enum[11]);
444
445/* Rx mux and mixer */
446static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
447SOC_DAPM_ENUM("Route", wm8753_enum[15]);
448
449/* Mic Selector Mux */
450static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
451SOC_DAPM_ENUM("Route", wm8753_enum[25]);
452
453static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
454SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
455SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
456 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
457SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
458SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
459SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
460SND_SOC_DAPM_OUTPUT("LOUT1"),
461SND_SOC_DAPM_OUTPUT("LOUT2"),
462SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
463 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
464SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
465SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
466SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
467SND_SOC_DAPM_OUTPUT("ROUT1"),
468SND_SOC_DAPM_OUTPUT("ROUT2"),
469SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
470 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
471SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
472SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
473SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
474SND_SOC_DAPM_OUTPUT("MONO1"),
475SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
476SND_SOC_DAPM_OUTPUT("MONO2"),
477SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
478SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
479SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
480SND_SOC_DAPM_OUTPUT("OUT3"),
481SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
482SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
483SND_SOC_DAPM_OUTPUT("OUT4"),
484SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
485 &wm8753_record_mixer_controls[0],
486 ARRAY_SIZE(wm8753_record_mixer_controls)),
487SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
488SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
489SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
490 &wm8753_adc_mono_controls),
491SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
492 &wm8753_adc_mono_controls),
493SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
494 &wm8753_adc_left_controls),
495SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
496 &wm8753_adc_right_controls),
497SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
498 &wm8753_mic_mux_controls),
499SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
500SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
501SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
502 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
503SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
504 &wm8753_line_left_controls),
505SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
506 &wm8753_line_right_controls),
507SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
508 &wm8753_line_mono_controls),
509SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
510 &wm8753_line_mux_mix_controls),
511SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
512 &wm8753_rx_mux_mix_controls),
513SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
514SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
515SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
516 &wm8753_mic_sel_mux_controls),
517SND_SOC_DAPM_INPUT("LINE1"),
518SND_SOC_DAPM_INPUT("LINE2"),
519SND_SOC_DAPM_INPUT("RXP"),
520SND_SOC_DAPM_INPUT("RXN"),
521SND_SOC_DAPM_INPUT("ACIN"),
522SND_SOC_DAPM_OUTPUT("ACOP"),
523SND_SOC_DAPM_INPUT("MIC1N"),
524SND_SOC_DAPM_INPUT("MIC1"),
525SND_SOC_DAPM_INPUT("MIC2N"),
526SND_SOC_DAPM_INPUT("MIC2"),
527SND_SOC_DAPM_VMID("VREF"),
528};
529
a65f0568 530static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 531 /* left mixer */
532 {"Left Mixer", "Left Playback Switch", "Left DAC"},
533 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
534 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
535 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
536
537 /* right mixer */
538 {"Right Mixer", "Right Playback Switch", "Right DAC"},
539 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
540 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
541 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
542
543 /* mono mixer */
544 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
545 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
546 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
547 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
548 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
549
550 /* left out */
551 {"Left Out 1", NULL, "Left Mixer"},
552 {"Left Out 2", NULL, "Left Mixer"},
553 {"LOUT1", NULL, "Left Out 1"},
554 {"LOUT2", NULL, "Left Out 2"},
555
556 /* right out */
557 {"Right Out 1", NULL, "Right Mixer"},
558 {"Right Out 2", NULL, "Right Mixer"},
559 {"ROUT1", NULL, "Right Out 1"},
560 {"ROUT2", NULL, "Right Out 2"},
561
562 /* mono 1 out */
563 {"Mono Out 1", NULL, "Mono Mixer"},
564 {"MONO1", NULL, "Mono Out 1"},
565
566 /* mono 2 out */
567 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
568 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
569 {"Mono 2 Mux", "Left", "Left Mixer"},
570 {"Mono 2 Mux", "Right", "Right Mixer"},
571 {"Mono Out 2", NULL, "Mono 2 Mux"},
572 {"MONO2", NULL, "Mono Out 2"},
573
574 /* out 3 */
575 {"Out3 Left + Right", NULL, "Left Mixer"},
576 {"Out3 Left + Right", NULL, "Right Mixer"},
577 {"Out3 Mux", "VREF", "VREF"},
578 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
579 {"Out3 Mux", "ROUT2", "ROUT2"},
580 {"Out 3", NULL, "Out3 Mux"},
581 {"OUT3", NULL, "Out 3"},
582
583 /* out 4 */
584 {"Out4 Mux", "VREF", "VREF"},
4037314a 585 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 586 {"Out4 Mux", "LOUT2", "LOUT2"},
587 {"Out 4", NULL, "Out4 Mux"},
588 {"OUT4", NULL, "Out 4"},
589
590 /* record mixer */
591 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
592 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
593 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
594
595 /* Mic/SideTone Mux */
596 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
597 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
598 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
599 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
600
601 /* Capture Left Mux */
602 {"Capture Left Mux", "PGA", "Left Capture Volume"},
603 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
604 {"Capture Left Mux", "Line", "LINE1"},
605
606 /* Capture Right Mux */
607 {"Capture Right Mux", "PGA", "Right Capture Volume"},
608 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 609 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 610
611 /* Mono Capture mixer-mux */
612 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
613 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
614 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
615 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
616 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
617 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
618 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
619 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
620 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
621
622 /* ADC */
623 {"Left ADC", NULL, "Capture Left Mixer"},
624 {"Right ADC", NULL, "Capture Right Mixer"},
625
626 /* Left Capture Volume */
627 {"Left Capture Volume", NULL, "ACIN"},
628
629 /* Right Capture Volume */
630 {"Right Capture Volume", NULL, "Mic 2 Volume"},
631
632 /* ALC Mixer */
633 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
634 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
635 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
636 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
637
638 /* Line Left Mux */
639 {"Line Left Mux", "Line 1", "LINE1"},
640 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
641
642 /* Line Right Mux */
643 {"Line Right Mux", "Line 2", "LINE2"},
644 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
645
646 /* Line Mono Mux */
647 {"Line Mono Mux", "Line Mix", "Line Mixer"},
648 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
649
650 /* Line Mixer/Mux */
651 {"Line Mixer", "Line 1 + 2", "LINE1"},
652 {"Line Mixer", "Line 1 - 2", "LINE1"},
653 {"Line Mixer", "Line 1 + 2", "LINE2"},
654 {"Line Mixer", "Line 1 - 2", "LINE2"},
655 {"Line Mixer", "Line 1", "LINE1"},
656 {"Line Mixer", "Line 2", "LINE2"},
657
658 /* Rx Mixer/Mux */
659 {"Rx Mixer", "RXP - RXN", "RXP"},
660 {"Rx Mixer", "RXP + RXN", "RXP"},
661 {"Rx Mixer", "RXP - RXN", "RXN"},
662 {"Rx Mixer", "RXP + RXN", "RXN"},
663 {"Rx Mixer", "RXP", "RXP"},
664 {"Rx Mixer", "RXN", "RXN"},
665
666 /* Mic 1 Volume */
667 {"Mic 1 Volume", NULL, "MIC1N"},
668 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
669
670 /* Mic 2 Volume */
671 {"Mic 2 Volume", NULL, "MIC2N"},
672 {"Mic 2 Volume", NULL, "MIC2"},
673
674 /* Mic Selector Mux */
675 {"Mic Selection Mux", "Mic 1", "MIC1"},
676 {"Mic Selection Mux", "Mic 2", "MIC2N"},
677 {"Mic Selection Mux", "Mic 3", "MIC2"},
678
679 /* ACOP */
680 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 681};
682
683static int wm8753_add_widgets(struct snd_soc_codec *codec)
684{
a65f0568
MB		 685 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
686 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 687
a65f0568 688 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 689
690 snd_soc_dapm_new_widgets(codec);
691 return 0;
692}
693
694/* PLL divisors */
695struct _pll_div {
696 u32 div2:1;
697 u32 n:4;
698 u32 k:24;
699};
700
701/* The size in bits of the pll divide multiplied by 10
702 * to allow rounding later */
703#define FIXED_PLL_SIZE ((1 << 22) * 10)
704
705static void pll_factors(struct _pll_div *pll_div, unsigned int target,
706 unsigned int source)
707{
708 u64 Kpart;
709 unsigned int K, Ndiv, Nmod;
710
711 Ndiv = target / source;
712 if (Ndiv < 6) {
713 source >>= 1;
714 pll_div->div2 = 1;
715 Ndiv = target / source;
716 } else
717 pll_div->div2 = 0;
718
719 if ((Ndiv < 6) || (Ndiv > 12))
720 printk(KERN_WARNING
60fc684a 721 "wm8753: unsupported N = %d\n", Ndiv);
1f53aee0
LG		 722
723 pll_div->n = Ndiv;
724 Nmod = target % source;
725 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
726
727 do_div(Kpart, source);
728
729 K = Kpart & 0xFFFFFFFF;
730
731 /* Check if we need to round */
732 if ((K % 10) >= 5)
733 K += 5;
734
735 /* Move down to proper range now rounding is done */
736 K /= 10;
737
738 pll_div->k = K;
739}
740
e550e17f 741static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 742 int pll_id, unsigned int freq_in, unsigned int freq_out)
743{
744 u16 reg, enable;
745 int offset;
746 struct snd_soc_codec *codec = codec_dai->codec;
747
748 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
749 return -ENODEV;
750
751 if (pll_id == WM8753_PLL1) {
752 offset = 0;
753 enable = 0x10;
754 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
755 } else {
756 offset = 4;
757 enable = 0x8;
758 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
759 }
760
761 if (!freq_in || !freq_out) {
762 /* disable PLL */
763 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
764 wm8753_write(codec, WM8753_CLOCK, reg);
765 return 0;
766 } else {
767 u16 value = 0;
768 struct _pll_div pll_div;
769
770 pll_factors(&pll_div, freq_out * 8, freq_in);
771
772 /* set up N and K PLL divisor ratios */
773 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
774 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
775 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
776
777 /* bits 8:0 = PLL_K[17:9] */
778 value = (pll_div.k & 0x03fe00) >> 9;
779 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
780
781 /* bits 8:0 = PLL_K[8:0] */
782 value = pll_div.k & 0x0001ff;
783 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
784
785 /* set PLL as input and enable */
786 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
787 (pll_div.div2 << 3));
788 wm8753_write(codec, WM8753_CLOCK, reg | enable);
789 }
790 return 0;
791}
792
793struct _coeff_div {
794 u32 mclk;
795 u32 rate;
796 u8 sr:5;
797 u8 usb:1;
798};
799
800/* codec hifi mclk (after PLL) clock divider coefficients */
801static const struct _coeff_div coeff_div[] = {
802 /* 8k */
803 {12288000, 8000, 0x6, 0x0},
804 {11289600, 8000, 0x16, 0x0},
805 {18432000, 8000, 0x7, 0x0},
806 {16934400, 8000, 0x17, 0x0},
807 {12000000, 8000, 0x6, 0x1},
808
809 /* 11.025k */
810 {11289600, 11025, 0x18, 0x0},
811 {16934400, 11025, 0x19, 0x0},
812 {12000000, 11025, 0x19, 0x1},
813
814 /* 16k */
815 {12288000, 16000, 0xa, 0x0},
816 {18432000, 16000, 0xb, 0x0},
817 {12000000, 16000, 0xa, 0x1},
818
819 /* 22.05k */
820 {11289600, 22050, 0x1a, 0x0},
821 {16934400, 22050, 0x1b, 0x0},
822 {12000000, 22050, 0x1b, 0x1},
823
824 /* 32k */
825 {12288000, 32000, 0xc, 0x0},
826 {18432000, 32000, 0xd, 0x0},
827 {12000000, 32000, 0xa, 0x1},
828
829 /* 44.1k */
830 {11289600, 44100, 0x10, 0x0},
831 {16934400, 44100, 0x11, 0x0},
832 {12000000, 44100, 0x11, 0x1},
833
834 /* 48k */
835 {12288000, 48000, 0x0, 0x0},
836 {18432000, 48000, 0x1, 0x0},
837 {12000000, 48000, 0x0, 0x1},
838
839 /* 88.2k */
840 {11289600, 88200, 0x1e, 0x0},
841 {16934400, 88200, 0x1f, 0x0},
842 {12000000, 88200, 0x1f, 0x1},
843
844 /* 96k */
845 {12288000, 96000, 0xe, 0x0},
846 {18432000, 96000, 0xf, 0x0},
847 {12000000, 96000, 0xe, 0x1},
848};
849
850static int get_coeff(int mclk, int rate)
851{
852 int i;
853
854 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
855 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
856 return i;
857 }
858 return -EINVAL;
859}
860
861/*
862 * Clock after PLL and dividers
863 */
e550e17f 864static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 865 int clk_id, unsigned int freq, int dir)
866{
867 struct snd_soc_codec *codec = codec_dai->codec;
868 struct wm8753_priv *wm8753 = codec->private_data;
869
870 switch (freq) {
871 case 11289600:
872 case 12000000:
873 case 12288000:
874 case 16934400:
875 case 18432000:
876 if (clk_id == WM8753_MCLK) {
877 wm8753->sysclk = freq;
878 return 0;
879 } else if (clk_id == WM8753_PCMCLK) {
880 wm8753->pcmclk = freq;
881 return 0;
882 }
883 break;
884 }
885 return -EINVAL;
886}
887
888/*
889 * Set's ADC and Voice DAC format.
890 */
e550e17f 891static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 892 unsigned int fmt)
893{
894 struct snd_soc_codec *codec = codec_dai->codec;
895 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
896
897 /* interface format */
898 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
899 case SND_SOC_DAIFMT_I2S:
900 voice |= 0x0002;
901 break;
902 case SND_SOC_DAIFMT_RIGHT_J:
903 break;
904 case SND_SOC_DAIFMT_LEFT_J:
905 voice |= 0x0001;
906 break;
907 case SND_SOC_DAIFMT_DSP_A:
908 voice |= 0x0003;
909 break;
910 case SND_SOC_DAIFMT_DSP_B:
911 voice |= 0x0013;
912 break;
913 default:
914 return -EINVAL;
915 }
916
917 wm8753_write(codec, WM8753_PCM, voice);
918 return 0;
919}
920
921/*
922 * Set PCM DAI bit size and sample rate.
923 */
924static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 925 struct snd_pcm_hw_params *params,
926 struct snd_soc_dai *dai)
1f53aee0
LG		 927{
928 struct snd_soc_pcm_runtime *rtd = substream->private_data;
929 struct snd_soc_device *socdev = rtd->socdev;
930 struct snd_soc_codec *codec = socdev->codec;
931 struct wm8753_priv *wm8753 = codec->private_data;
932 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
933 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
934
935 /* bit size */
936 switch (params_format(params)) {
937 case SNDRV_PCM_FORMAT_S16_LE:
938 break;
939 case SNDRV_PCM_FORMAT_S20_3LE:
940 voice |= 0x0004;
941 break;
942 case SNDRV_PCM_FORMAT_S24_LE:
943 voice |= 0x0008;
944 break;
945 case SNDRV_PCM_FORMAT_S32_LE:
946 voice |= 0x000c;
947 break;
948 }
949
950 /* sample rate */
951 if (params_rate(params) * 384 == wm8753->pcmclk)
952 srate |= 0x80;
953 wm8753_write(codec, WM8753_SRATE1, srate);
954
955 wm8753_write(codec, WM8753_PCM, voice);
956 return 0;
957}
958
959/*
960 * Set's PCM dai fmt and BCLK.
961 */
e550e17f 962static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 963 unsigned int fmt)
964{
965 struct snd_soc_codec *codec = codec_dai->codec;
966 u16 voice, ioctl;
967
968 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
969 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
970
971 /* set master/slave audio interface */
972 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
973 case SND_SOC_DAIFMT_CBS_CFS:
974 break;
975 case SND_SOC_DAIFMT_CBM_CFM:
976 ioctl |= 0x2;
977 case SND_SOC_DAIFMT_CBM_CFS:
978 voice |= 0x0040;
979 break;
980 default:
981 return -EINVAL;
982 }
983
984 /* clock inversion */
985 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
986 case SND_SOC_DAIFMT_DSP_A:
987 case SND_SOC_DAIFMT_DSP_B:
988 /* frame inversion not valid for DSP modes */
989 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
990 case SND_SOC_DAIFMT_NB_NF:
991 break;
992 case SND_SOC_DAIFMT_IB_NF:
993 voice |= 0x0080;
994 break;
995 default:
996 return -EINVAL;
997 }
998 break;
999 case SND_SOC_DAIFMT_I2S:
1000 case SND_SOC_DAIFMT_RIGHT_J:
1001 case SND_SOC_DAIFMT_LEFT_J:
1002 voice &= ~0x0010;
1003 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1004 case SND_SOC_DAIFMT_NB_NF:
1005 break;
1006 case SND_SOC_DAIFMT_IB_IF:
1007 voice |= 0x0090;
1008 break;
1009 case SND_SOC_DAIFMT_IB_NF:
1010 voice |= 0x0080;
1011 break;
1012 case SND_SOC_DAIFMT_NB_IF:
1013 voice |= 0x0010;
1014 break;
1015 default:
1016 return -EINVAL;
1017 }
1018 break;
1019 default:
1020 return -EINVAL;
1021 }
1022
1023 wm8753_write(codec, WM8753_PCM, voice);
1024 wm8753_write(codec, WM8753_IOCTL, ioctl);
1025 return 0;
1026}
1027
e550e17f 1028static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1029 int div_id, int div)
1030{
1031 struct snd_soc_codec *codec = codec_dai->codec;
1032 u16 reg;
1033
1034 switch (div_id) {
1035 case WM8753_PCMDIV:
1036 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1037 wm8753_write(codec, WM8753_CLOCK, reg | div);
1038 break;
1039 case WM8753_BCLKDIV:
1040 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1041 wm8753_write(codec, WM8753_SRATE2, reg | div);
1042 break;
1043 case WM8753_VXCLKDIV:
1044 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1045 wm8753_write(codec, WM8753_SRATE2, reg | div);
1046 break;
1047 default:
1048 return -EINVAL;
1049 }
1050 return 0;
1051}
1052
1053/*
1054 * Set's HiFi DAC format.
1055 */
e550e17f 1056static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1057 unsigned int fmt)
1058{
1059 struct snd_soc_codec *codec = codec_dai->codec;
1060 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1061
1062 /* interface format */
1063 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1064 case SND_SOC_DAIFMT_I2S:
1065 hifi |= 0x0002;
1066 break;
1067 case SND_SOC_DAIFMT_RIGHT_J:
1068 break;
1069 case SND_SOC_DAIFMT_LEFT_J:
1070 hifi |= 0x0001;
1071 break;
1072 case SND_SOC_DAIFMT_DSP_A:
1073 hifi |= 0x0003;
1074 break;
1075 case SND_SOC_DAIFMT_DSP_B:
1076 hifi |= 0x0013;
1077 break;
1078 default:
1079 return -EINVAL;
1080 }
1081
1082 wm8753_write(codec, WM8753_HIFI, hifi);
1083 return 0;
1084}
1085
1086/*
1087 * Set's I2S DAI format.
1088 */
e550e17f 1089static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1090 unsigned int fmt)
1091{
1092 struct snd_soc_codec *codec = codec_dai->codec;
1093 u16 ioctl, hifi;
1094
1095 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1096 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1097
1098 /* set master/slave audio interface */
1099 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1100 case SND_SOC_DAIFMT_CBS_CFS:
1101 break;
1102 case SND_SOC_DAIFMT_CBM_CFM:
1103 ioctl |= 0x1;
1104 case SND_SOC_DAIFMT_CBM_CFS:
1105 hifi |= 0x0040;
1106 break;
1107 default:
1108 return -EINVAL;
1109 }
1110
1111 /* clock inversion */
1112 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1113 case SND_SOC_DAIFMT_DSP_A:
1114 case SND_SOC_DAIFMT_DSP_B:
1115 /* frame inversion not valid for DSP modes */
1116 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1117 case SND_SOC_DAIFMT_NB_NF:
1118 break;
1119 case SND_SOC_DAIFMT_IB_NF:
1120 hifi |= 0x0080;
1121 break;
1122 default:
1123 return -EINVAL;
1124 }
1125 break;
1126 case SND_SOC_DAIFMT_I2S:
1127 case SND_SOC_DAIFMT_RIGHT_J:
1128 case SND_SOC_DAIFMT_LEFT_J:
1129 hifi &= ~0x0010;
1130 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1131 case SND_SOC_DAIFMT_NB_NF:
1132 break;
1133 case SND_SOC_DAIFMT_IB_IF:
1134 hifi |= 0x0090;
1135 break;
1136 case SND_SOC_DAIFMT_IB_NF:
1137 hifi |= 0x0080;
1138 break;
1139 case SND_SOC_DAIFMT_NB_IF:
1140 hifi |= 0x0010;
1141 break;
1142 default:
1143 return -EINVAL;
1144 }
1145 break;
1146 default:
1147 return -EINVAL;
1148 }
1149
1150 wm8753_write(codec, WM8753_HIFI, hifi);
1151 wm8753_write(codec, WM8753_IOCTL, ioctl);
1152 return 0;
1153}
1154
1155/*
1156 * Set PCM DAI bit size and sample rate.
1157 */
1158static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1159 struct snd_pcm_hw_params *params,
1160 struct snd_soc_dai *dai)
1f53aee0
LG		 1161{
1162 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1163 struct snd_soc_device *socdev = rtd->socdev;
1164 struct snd_soc_codec *codec = socdev->codec;
1165 struct wm8753_priv *wm8753 = codec->private_data;
1166 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1167 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1168 int coeff;
1169
1170 /* is digital filter coefficient valid ? */
1171 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1172 if (coeff < 0) {
1173 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1174 return coeff;
1175 }
1176 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1177 coeff_div[coeff].usb);
1178
1179 /* bit size */
1180 switch (params_format(params)) {
1181 case SNDRV_PCM_FORMAT_S16_LE:
1182 break;
1183 case SNDRV_PCM_FORMAT_S20_3LE:
1184 hifi |= 0x0004;
1185 break;
1186 case SNDRV_PCM_FORMAT_S24_LE:
1187 hifi |= 0x0008;
1188 break;
1189 case SNDRV_PCM_FORMAT_S32_LE:
1190 hifi |= 0x000c;
1191 break;
1192 }
1193
1194 wm8753_write(codec, WM8753_HIFI, hifi);
1195 return 0;
1196}
1197
e550e17f 1198static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1199 unsigned int fmt)
1200{
1201 struct snd_soc_codec *codec = codec_dai->codec;
1202 u16 clock;
1203
1204 /* set clk source as pcmclk */
1205 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1206 wm8753_write(codec, WM8753_CLOCK, clock);
1207
1208 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1209 return -EINVAL;
1210 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1211}
1212
e550e17f 1213static int wm8753_mode1h_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1214 unsigned int fmt)
1215{
1216 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1217 return -EINVAL;
1218 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1219}
1220
e550e17f 1221static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1222 unsigned int fmt)
1223{
1224 struct snd_soc_codec *codec = codec_dai->codec;
1225 u16 clock;
1226
1227 /* set clk source as pcmclk */
1228 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1229 wm8753_write(codec, WM8753_CLOCK, clock);
1230
1231 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1232 return -EINVAL;
1233 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1234}
1235
e550e17f 1236static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1237 unsigned int fmt)
1238{
1239 struct snd_soc_codec *codec = codec_dai->codec;
1240 u16 clock;
1241
1242 /* set clk source as mclk */
1243 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1244 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1245
1246 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1247 return -EINVAL;
1248 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1249 return -EINVAL;
1250 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1251}
1252
e550e17f 1253static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1254{
1255 struct snd_soc_codec *codec = dai->codec;
1256 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1257
1258 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1259 * make sure we check if they are not both active when we mute */
1260 if (mute && dai->id == 1) {
1261 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1262 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1263 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1264 } else {
1265 if (mute)
1266 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1267 else
1268 wm8753_write(codec, WM8753_DAC, mute_reg);
1269 }
1270
1271 return 0;
1272}
1273
0be9898a
MB		 1274static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1275 enum snd_soc_bias_level level)
1f53aee0
LG		 1276{
1277 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1278
0be9898a
MB		 1279 switch (level) {
1280 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1281 /* set vmid to 50k and unmute dac */
1282 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1283 break;
0be9898a 1284 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1285 /* set vmid to 5k for quick power up */
1286 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1287 break;
0be9898a 1288 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1289 /* mute dac and set vmid to 500k, enable VREF */
1290 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1291 break;
0be9898a 1292 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1293 wm8753_write(codec, WM8753_PWR1, 0x0001);
1294 break;
1295 }
0be9898a 1296 codec->bias_level = level;
1f53aee0
LG		 1297 return 0;
1298}
1299
1300#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1301 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1302 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1303 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1304
1305#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1306 SNDRV_PCM_FMTBIT_S24_LE)
1307
1308/*
1309 * The WM8753 supports upto 4 different and mutually exclusive DAI
1310 * configurations. This gives 2 PCM's available for use, hifi and voice.
1311 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1312 * is connected between the wm8753 and a BT codec or GSM modem.
1313 *
1314 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1315 * 2. Voice over HIFI DAI - HIFI disabled
1316 * 3. Voice disabled - HIFI over HIFI
1317 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1318 */
e550e17f 1319static const struct snd_soc_dai wm8753_all_dai[] = {
1f53aee0
LG		 1320/* DAI HiFi mode 1 */
1321{ .name = "WM8753 HiFi",
1322 .id = 1,
1323 .playback = {
1324 .stream_name = "HiFi Playback",
1325 .channels_min = 1,
1326 .channels_max = 2,
1327 .rates = WM8753_RATES,
dee89c4d 1328 .formats = WM8753_FORMATS},
1f53aee0
LG		 1329 .capture = { /* dummy for fast DAI switching */
1330 .stream_name = "Capture",
1331 .channels_min = 1,
1332 .channels_max = 2,
1333 .rates = WM8753_RATES,
dee89c4d 1334 .formats = WM8753_FORMATS},
1f53aee0 1335 .ops = {
dee89c4d 1336 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1337 .digital_mute = wm8753_mute,
1338 .set_fmt = wm8753_mode1h_set_dai_fmt,
1339 .set_clkdiv = wm8753_set_dai_clkdiv,
1340 .set_pll = wm8753_set_dai_pll,
1341 .set_sysclk = wm8753_set_dai_sysclk,
1342 },
1343},
1344/* DAI Voice mode 1 */
1345{ .name = "WM8753 Voice",
1346 .id = 1,
1347 .playback = {
1348 .stream_name = "Voice Playback",
1349 .channels_min = 1,
1350 .channels_max = 1,
1351 .rates = WM8753_RATES,
1352 .formats = WM8753_FORMATS,},
1353 .capture = {
1354 .stream_name = "Capture",
1355 .channels_min = 1,
1356 .channels_max = 2,
1357 .rates = WM8753_RATES,
1358 .formats = WM8753_FORMATS,},
1359 .ops = {
dee89c4d 1360 .hw_params = wm8753_pcm_hw_params,
1f53aee0
LG		 1361 .digital_mute = wm8753_mute,
1362 .set_fmt = wm8753_mode1v_set_dai_fmt,
1363 .set_clkdiv = wm8753_set_dai_clkdiv,
1364 .set_pll = wm8753_set_dai_pll,
1365 .set_sysclk = wm8753_set_dai_sysclk,
1366 },
1367},
1368/* DAI HiFi mode 2 - dummy */
1369{ .name = "WM8753 HiFi",
1370 .id = 2,
1371},
1372/* DAI Voice mode 2 */
1373{ .name = "WM8753 Voice",
1374 .id = 2,
1375 .playback = {
1376 .stream_name = "Voice Playback",
1377 .channels_min = 1,
1378 .channels_max = 1,
1379 .rates = WM8753_RATES,
1380 .formats = WM8753_FORMATS,},
1381 .capture = {
1382 .stream_name = "Capture",
1383 .channels_min = 1,
1384 .channels_max = 2,
1385 .rates = WM8753_RATES,
1386 .formats = WM8753_FORMATS,},
1387 .ops = {
dee89c4d 1388 .hw_params = wm8753_pcm_hw_params,
1f53aee0
LG		 1389 .digital_mute = wm8753_mute,
1390 .set_fmt = wm8753_mode2_set_dai_fmt,
1391 .set_clkdiv = wm8753_set_dai_clkdiv,
1392 .set_pll = wm8753_set_dai_pll,
1393 .set_sysclk = wm8753_set_dai_sysclk,
1394 },
1395},
1396/* DAI HiFi mode 3 */
1397{ .name = "WM8753 HiFi",
1398 .id = 3,
1399 .playback = {
1400 .stream_name = "HiFi Playback",
1401 .channels_min = 1,
1402 .channels_max = 2,
1403 .rates = WM8753_RATES,
1404 .formats = WM8753_FORMATS,},
1405 .capture = {
1406 .stream_name = "Capture",
1407 .channels_min = 1,
1408 .channels_max = 2,
1409 .rates = WM8753_RATES,
1410 .formats = WM8753_FORMATS,},
1411 .ops = {
dee89c4d 1412 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1413 .digital_mute = wm8753_mute,
1414 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1415 .set_clkdiv = wm8753_set_dai_clkdiv,
1416 .set_pll = wm8753_set_dai_pll,
1417 .set_sysclk = wm8753_set_dai_sysclk,
1418 },
1419},
1420/* DAI Voice mode 3 - dummy */
1421{ .name = "WM8753 Voice",
1422 .id = 3,
1423},
1424/* DAI HiFi mode 4 */
1425{ .name = "WM8753 HiFi",
1426 .id = 4,
1427 .playback = {
1428 .stream_name = "HiFi Playback",
1429 .channels_min = 1,
1430 .channels_max = 2,
1431 .rates = WM8753_RATES,
1432 .formats = WM8753_FORMATS,},
1433 .capture = {
1434 .stream_name = "Capture",
1435 .channels_min = 1,
1436 .channels_max = 2,
1437 .rates = WM8753_RATES,
1438 .formats = WM8753_FORMATS,},
1439 .ops = {
dee89c4d 1440 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1441 .digital_mute = wm8753_mute,
1442 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1443 .set_clkdiv = wm8753_set_dai_clkdiv,
1444 .set_pll = wm8753_set_dai_pll,
1445 .set_sysclk = wm8753_set_dai_sysclk,
1446 },
1447},
1448/* DAI Voice mode 4 - dummy */
1449{ .name = "WM8753 Voice",
1450 .id = 4,
1451},
1452};
1453
e550e17f 1454struct snd_soc_dai wm8753_dai[2];
1f53aee0
LG		 1455EXPORT_SYMBOL_GPL(wm8753_dai);
1456
1457static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1458{
1459 if (mode < 4) {
1460 int playback_active, capture_active, codec_active, pop_wait;
1461 void *private_data;
1462
1463 playback_active = wm8753_dai[0].playback.active;
1464 capture_active = wm8753_dai[0].capture.active;
1465 codec_active = wm8753_dai[0].active;
1466 private_data = wm8753_dai[0].private_data;
1467 pop_wait = wm8753_dai[0].pop_wait;
1468 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1469 wm8753_dai[0].playback.active = playback_active;
1470 wm8753_dai[0].capture.active = capture_active;
1471 wm8753_dai[0].active = codec_active;
1472 wm8753_dai[0].private_data = private_data;
1473 wm8753_dai[0].pop_wait = pop_wait;
1474
1475 playback_active = wm8753_dai[1].playback.active;
1476 capture_active = wm8753_dai[1].capture.active;
1477 codec_active = wm8753_dai[1].active;
1478 private_data = wm8753_dai[1].private_data;
1479 pop_wait = wm8753_dai[1].pop_wait;
1480 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1481 wm8753_dai[1].playback.active = playback_active;
1482 wm8753_dai[1].capture.active = capture_active;
1483 wm8753_dai[1].active = codec_active;
1484 wm8753_dai[1].private_data = private_data;
1485 wm8753_dai[1].pop_wait = pop_wait;
1486 }
1487 wm8753_dai[0].codec = codec;
1488 wm8753_dai[1].codec = codec;
1489}
1490
1491static void wm8753_work(struct work_struct *work)
1492{
1493 struct snd_soc_codec *codec =
1494 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1495 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1496}
1497
1498static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1499{
1500 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1501 struct snd_soc_codec *codec = socdev->codec;
1502
1503 /* we only need to suspend if we are a valid card */
60fc684a 1504 if (!codec->card)
1f53aee0 1505 return 0;
60fc684a 1506
0be9898a 1507 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1508 return 0;
1509}
1510
1511static int wm8753_resume(struct platform_device *pdev)
1512{
1513 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1514 struct snd_soc_codec *codec = socdev->codec;
1515 int i;
1516 u8 data[2];
1517 u16 *cache = codec->reg_cache;
1518
1519 /* we only need to resume if we are a valid card */
60fc684a 1520 if (!codec->card)
1f53aee0
LG		 1521 return 0;
1522
1523 /* Sync reg_cache with the hardware */
1524 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1525 if (i + 1 == WM8753_RESET)
1526 continue;
1527 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1528 data[1] = cache[i] & 0x00ff;
1529 codec->hw_write(codec->control_data, data, 2);
1530 }
1531
0be9898a 1532 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1533
1534 /* charge wm8753 caps */
0be9898a
MB		 1535 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1536 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1537 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1538 schedule_delayed_work(&codec->delayed_work,
1539 msecs_to_jiffies(caps_charge));
1540 }
1541
1542 return 0;
1543}
1544
1545/*
1546 * initialise the WM8753 driver
1547 * register the mixer and dsp interfaces with the kernel
1548 */
1549static int wm8753_init(struct snd_soc_device *socdev)
1550{
1551 struct snd_soc_codec *codec = socdev->codec;
1552 int reg, ret = 0;
1553
1554 codec->name = "WM8753";
1555 codec->owner = THIS_MODULE;
1556 codec->read = wm8753_read_reg_cache;
1557 codec->write = wm8753_write;
0be9898a 1558 codec->set_bias_level = wm8753_set_bias_level;
1f53aee0
LG		 1559 codec->dai = wm8753_dai;
1560 codec->num_dai = 2;
d751b233 1561 codec->reg_cache_size = ARRAY_SIZE(wm8753_reg);
1f53aee0
LG		 1562 codec->reg_cache = kmemdup(wm8753_reg, sizeof(wm8753_reg), GFP_KERNEL);
1563
1564 if (codec->reg_cache == NULL)
1565 return -ENOMEM;
1566
1567 wm8753_set_dai_mode(codec, 0);
1568
1569 wm8753_reset(codec);
1570
1571 /* register pcms */
1572 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1573 if (ret < 0) {
1574 printk(KERN_ERR "wm8753: failed to create pcms\n");
1575 goto pcm_err;
1576 }
1577
1578 /* charge output caps */
0be9898a
MB		 1579 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1580 codec->bias_level = SND_SOC_BIAS_STANDBY;
1f53aee0
LG		 1581 schedule_delayed_work(&codec->delayed_work,
1582 msecs_to_jiffies(caps_charge));
1583
1584 /* set the update bits */
1585 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1586 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1587 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1588 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1589 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1590 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1591 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1592 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1593 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1594 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1595 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1596 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1597 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1598 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1599 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1600 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1601 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1602 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1603 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1604 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1605
1606 wm8753_add_controls(codec);
1607 wm8753_add_widgets(codec);
968a6025 1608 ret = snd_soc_init_card(socdev);
1f53aee0 1609 if (ret < 0) {
60fc684a 1610 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1611 goto card_err;
60fc684a
MB		 1612 }
1613
1f53aee0
LG		 1614 return ret;
1615
1616card_err:
1617 snd_soc_free_pcms(socdev);
1618 snd_soc_dapm_free(socdev);
1619pcm_err:
1620 kfree(codec->reg_cache);
1621 return ret;
1622}
1623
1624/* If the i2c layer weren't so broken, we could pass this kind of data
1625 around */
1626static struct snd_soc_device *wm8753_socdev;
1627
60fc684a 1628#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0
LG		 1629
1630/*
1631 * WM8753 2 wire address is determined by GPIO5
1632 * state during powerup.
1633 * low = 0x1a
1634 * high = 0x1b
1635 */
1f53aee0 1636
ad4503d8
JD		 1637static int wm8753_i2c_probe(struct i2c_client *i2c,
1638 const struct i2c_device_id *id)
1f53aee0
LG		 1639{
1640 struct snd_soc_device *socdev = wm8753_socdev;
1f53aee0 1641 struct snd_soc_codec *codec = socdev->codec;
1f53aee0
LG		 1642 int ret;
1643
1f53aee0
LG		 1644 i2c_set_clientdata(i2c, codec);
1645 codec->control_data = i2c;
1646
1f53aee0 1647 ret = wm8753_init(socdev);
ad4503d8 1648 if (ret < 0)
a5c95e90 1649 pr_err("failed to initialise WM8753\n");
1f53aee0 1650
1f53aee0
LG		 1651 return ret;
1652}
1653
ad4503d8 1654static int wm8753_i2c_remove(struct i2c_client *client)
1f53aee0
LG		 1655{
1656 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1f53aee0 1657 kfree(codec->reg_cache);
1f53aee0
LG		 1658 return 0;
1659}
1660
ad4503d8
JD		 1661static const struct i2c_device_id wm8753_i2c_id[] = {
1662 { "wm8753", 0 },
1663 { }
1664};
1665MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1f53aee0 1666
1f53aee0
LG		 1667static struct i2c_driver wm8753_i2c_driver = {
1668 .driver = {
1669 .name = "WM8753 I2C Codec",
1670 .owner = THIS_MODULE,
1671 },
ad4503d8
JD		 1672 .probe = wm8753_i2c_probe,
1673 .remove = wm8753_i2c_remove,
1674 .id_table = wm8753_i2c_id,
1f53aee0
LG		 1675};
1676
ad4503d8
JD		 1677static int wm8753_add_i2c_device(struct platform_device *pdev,
1678 const struct wm8753_setup_data *setup)
1679{
1680 struct i2c_board_info info;
1681 struct i2c_adapter *adapter;
1682 struct i2c_client *client;
1683 int ret;
1684
1685 ret = i2c_add_driver(&wm8753_i2c_driver);
1686 if (ret != 0) {
1687 dev_err(&pdev->dev, "can't add i2c driver\n");
1688 return ret;
1689 }
1690
1691 memset(&info, 0, sizeof(struct i2c_board_info));
1692 info.addr = setup->i2c_address;
1693 strlcpy(info.type, "wm8753", I2C_NAME_SIZE);
1694
1695 adapter = i2c_get_adapter(setup->i2c_bus);
1696 if (!adapter) {
1697 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
1698 setup->i2c_bus);
1699 goto err_driver;
1700 }
1701
1702 client = i2c_new_device(adapter, &info);
1703 i2c_put_adapter(adapter);
1704 if (!client) {
1705 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
1706 (unsigned int)info.addr);
1707 goto err_driver;
1708 }
1709
1710 return 0;
1711
1712err_driver:
1713 i2c_del_driver(&wm8753_i2c_driver);
1714 return -ENODEV;
1715}
1f53aee0
LG		 1716#endif
1717
dd0c0c80
MB		 1718#if defined(CONFIG_SPI_MASTER)
1719static int __devinit wm8753_spi_probe(struct spi_device *spi)
1720{
1721 struct snd_soc_device *socdev = wm8753_socdev;
1722 struct snd_soc_codec *codec = socdev->codec;
1723 int ret;
1724
1725 codec->control_data = spi;
1726
1727 ret = wm8753_init(socdev);
1728 if (ret < 0)
1729 dev_err(&spi->dev, "failed to initialise WM8753\n");
1730
1731 return ret;
1732}
1733
1734static int __devexit wm8753_spi_remove(struct spi_device *spi)
1735{
1736 return 0;
1737}
1738
1739static struct spi_driver wm8753_spi_driver = {
1740 .driver = {
1741 .name = "wm8753",
1742 .bus = &spi_bus_type,
1743 .owner = THIS_MODULE,
1744 },
1745 .probe = wm8753_spi_probe,
1746 .remove = __devexit_p(wm8753_spi_remove),
1747};
1748
1749static int wm8753_spi_write(struct spi_device *spi, const char *data, int len)
1750{
1751 struct spi_transfer t;
1752 struct spi_message m;
1753 u8 msg[2];
1754
1755 if (len <= 0)
1756 return 0;
1757
1758 msg[0] = data[0];
1759 msg[1] = data[1];
1760
1761 spi_message_init(&m);
1762 memset(&t, 0, (sizeof t));
1763
1764 t.tx_buf = &msg[0];
1765 t.len = len;
1766
1767 spi_message_add_tail(&t, &m);
1768 spi_sync(spi, &m);
1769
1770 return len;
1771}
1772#endif
1773
1774
1f53aee0
LG		 1775static int wm8753_probe(struct platform_device *pdev)
1776{
1777 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1778 struct wm8753_setup_data *setup;
1779 struct snd_soc_codec *codec;
1780 struct wm8753_priv *wm8753;
1781 int ret = 0;
1782
a5c95e90 1783 pr_info("WM8753 Audio Codec %s", WM8753_VERSION);
1f53aee0
LG		 1784
1785 setup = socdev->codec_data;
1786 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
1787 if (codec == NULL)
1788 return -ENOMEM;
1789
1790 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1791 if (wm8753 == NULL) {
1792 kfree(codec);
1793 return -ENOMEM;
1794 }
1795
1796 codec->private_data = wm8753;
1797 socdev->codec = codec;
1798 mutex_init(&codec->mutex);
1799 INIT_LIST_HEAD(&codec->dapm_widgets);
1800 INIT_LIST_HEAD(&codec->dapm_paths);
1801 wm8753_socdev = socdev;
1802 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1803
60fc684a 1804#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0 1805 if (setup->i2c_address) {
1f53aee0 1806 codec->hw_write = (hw_write_t)i2c_master_send;
ad4503d8 1807 ret = wm8753_add_i2c_device(pdev, setup);
1f53aee0 1808 }
dd0c0c80
MB		 1809#endif
1810#if defined(CONFIG_SPI_MASTER)
1811 if (setup->spi) {
1812 codec->hw_write = (hw_write_t)wm8753_spi_write;
1813 ret = spi_register_driver(&wm8753_spi_driver);
1814 if (ret != 0)
1815 printk(KERN_ERR "can't add spi driver");
1816 }
1f53aee0 1817#endif
3051e41a
JD		 1818
1819 if (ret != 0) {
1820 kfree(codec->private_data);
1821 kfree(codec);
1822 }
1f53aee0
LG		 1823 return ret;
1824}
1825
1826/*
1827 * This function forces any delayed work to be queued and run.
1828 */
1829static int run_delayed_work(struct delayed_work *dwork)
1830{
1831 int ret;
1832
1833 /* cancel any work waiting to be queued. */
1834 ret = cancel_delayed_work(dwork);
1835
1836 /* if there was any work waiting then we run it now and
1837 * wait for it's completion */
1838 if (ret) {
1839 schedule_delayed_work(dwork, 0);
1840 flush_scheduled_work();
1841 }
1842 return ret;
1843}
1844
1845/* power down chip */
1846static int wm8753_remove(struct platform_device *pdev)
1847{
1848 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1849 struct snd_soc_codec *codec = socdev->codec;
1850
1851 if (codec->control_data)
0be9898a 1852 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1853 run_delayed_work(&codec->delayed_work);
1854 snd_soc_free_pcms(socdev);
1855 snd_soc_dapm_free(socdev);
60fc684a 1856#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ad4503d8 1857 i2c_unregister_device(codec->control_data);
1f53aee0 1858 i2c_del_driver(&wm8753_i2c_driver);
dd0c0c80
MB		 1859#endif
1860#if defined(CONFIG_SPI_MASTER)
1861 spi_unregister_driver(&wm8753_spi_driver);
1f53aee0
LG		 1862#endif
1863 kfree(codec->private_data);
1864 kfree(codec);
1865
1866 return 0;
1867}
1868
1869struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1870 .probe = wm8753_probe,
1871 .remove = wm8753_remove,
1872 .suspend = wm8753_suspend,
1873 .resume = wm8753_resume,
1874};
1f53aee0
LG		 1875EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1876
1877MODULE_DESCRIPTION("ASoC WM8753 driver");
1878MODULE_AUTHOR("Liam Girdwood");
1879MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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