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ALSA: asoc: davinci - merge structs snd_soc_codec_dai and snd_soc_cpu_dai.
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
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1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Notes:
14 * The WM8753 is a low power, high quality stereo codec with integrated PCM
15 * codec designed for portable digital telephony applications.
16 *
17 * Dual DAI:-
18 *
19 * This driver support 2 DAI PCM's. This makes the default PCM available for
20 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
21 * voice.
22 *
23 * Please note that the voice PCM can be connected directly to a Bluetooth
24 * codec or GSM modem and thus cannot be read or written to, although it is
25 * available to be configured with snd_hw_params(), etc and kcontrols in the
26 * normal alsa manner.
27 *
28 * Fast DAI switching:-
29 *
30 * The driver can now fast switch between the DAI configurations via a
31 * an alsa kcontrol. This allows the PCM to remain open.
32 *
33 */
34
35#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/version.h>
38#include <linux/kernel.h>
39#include <linux/init.h>
40#include <linux/delay.h>
41#include <linux/pm.h>
42#include <linux/i2c.h>
43#include <linux/platform_device.h>
1f53aee0
LG		 44#include <sound/core.h>
45#include <sound/pcm.h>
46#include <sound/pcm_params.h>
47#include <sound/soc.h>
48#include <sound/soc-dapm.h>
49#include <sound/initval.h>
2d6a4ac9 50#include <sound/tlv.h>
1f53aee0
LG		 51#include <asm/div64.h>
52
53#include "wm8753.h"
54
55#define AUDIO_NAME "wm8753"
56#define WM8753_VERSION "0.16"
57
1f53aee0
LG		 58static int caps_charge = 2000;
59module_param(caps_charge, int, 0);
60MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
61
62static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
63 unsigned int mode);
64
65/* codec private data */
66struct wm8753_priv {
67 unsigned int sysclk;
68 unsigned int pcmclk;
69};
70
71/*
72 * wm8753 register cache
73 * We can't read the WM8753 register space when we
74 * are using 2 wire for device control, so we cache them instead.
75 */
76static const u16 wm8753_reg[] = {
77 0x0008, 0x0000, 0x000a, 0x000a,
78 0x0033, 0x0000, 0x0007, 0x00ff,
79 0x00ff, 0x000f, 0x000f, 0x007b,
80 0x0000, 0x0032, 0x0000, 0x00c3,
81 0x00c3, 0x00c0, 0x0000, 0x0000,
82 0x0000, 0x0000, 0x0000, 0x0000,
83 0x0000, 0x0000, 0x0000, 0x0000,
84 0x0000, 0x0000, 0x0000, 0x0055,
85 0x0005, 0x0050, 0x0055, 0x0050,
86 0x0055, 0x0050, 0x0055, 0x0079,
87 0x0079, 0x0079, 0x0079, 0x0079,
88 0x0000, 0x0000, 0x0000, 0x0000,
89 0x0097, 0x0097, 0x0000, 0x0004,
90 0x0000, 0x0083, 0x0024, 0x01ba,
91 0x0000, 0x0083, 0x0024, 0x01ba,
92 0x0000, 0x0000
93};
94
95/*
96 * read wm8753 register cache
97 */
98static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
99 unsigned int reg)
100{
101 u16 *cache = codec->reg_cache;
102 if (reg < 1 || reg > (ARRAY_SIZE(wm8753_reg) + 1))
103 return -1;
104 return cache[reg - 1];
105}
106
107/*
108 * write wm8753 register cache
109 */
110static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
111 unsigned int reg, unsigned int value)
112{
113 u16 *cache = codec->reg_cache;
114 if (reg < 1 || reg > 0x3f)
115 return;
116 cache[reg - 1] = value;
117}
118
119/*
120 * write to the WM8753 register space
121 */
122static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
123 unsigned int value)
124{
125 u8 data[2];
126
127 /* data is
128 * D15..D9 WM8753 register offset
129 * D8...D0 register data
130 */
131 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
132 data[1] = value & 0x00ff;
133
60fc684a 134 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 135 if (codec->hw_write(codec->control_data, data, 2) == 2)
136 return 0;
137 else
138 return -EIO;
139}
140
141#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
142
143/*
144 * WM8753 Controls
145 */
146static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
147static const char *wm8753_base_filter[] =
148 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
149 "100Hz @ 8kHz", "200Hz @ 8kHz"};
150static const char *wm8753_treble[] = {"8kHz", "4kHz"};
151static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
152static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
153static const char *wm8753_3d_func[] = {"Capture", "Playback"};
154static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
155static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
156static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
157static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
158static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
159static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
160 "Line 1", "Line 2"};
161static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
162static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
163static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
164static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
165static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
166 "Right PGA"};
167static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
168 "Left + Right"};
169static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
170static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
171static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
172static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
173static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
174 "Analogue Mix Right", "Digital Mono Mix"};
175static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
176 "82Hz @ 8kHz", "170Hz @ 8kHz"};
177static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
178static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
179static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
180static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
181 "Channel Swap"};
ae092c9e 182static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 183
184static const struct soc_enum wm8753_enum[] = {
185SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
186SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
187SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
188SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
189SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
190SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
191SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
192SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
193SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
194SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
195SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
196SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
197SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
198SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
199SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
200SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
201SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
202SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
203SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
204SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
205SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
206SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
207SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
208SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
209SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
210SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
211SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
212SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 213SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 214};
215
216
217static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
218 struct snd_ctl_elem_value *ucontrol)
219{
220 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
221 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
222
223 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
224 return 0;
225}
226
227static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
228 struct snd_ctl_elem_value *ucontrol)
229{
230 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
231 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
232
60fc684a 233 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 234 return 0;
235
236 mode &= 0xfff3;
237 mode |= (ucontrol->value.integer.value[0] << 2);
238
239 wm8753_write(codec, WM8753_IOCTL, mode);
240 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
241 return 1;
242}
243
2cc8c609
MM		 244static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
245static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
246static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
247static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
248static const unsigned int out_tlv[] = {
249 TLV_DB_RANGE_HEAD(2),
250 /* 0000000 - 0101111 = "Analogue mute" */
251 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
252 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
253};
254static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
255static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
256static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 257
1f53aee0 258static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 259SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
260
261SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
262 adc_tlv),
263
264SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
265 0, 127, 0, out_tlv),
266SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
267 127, 0, out_tlv),
268
269SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
270
271SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
272 1, mix_tlv),
273SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
274 7, 1, mix_tlv),
275SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
276 1, voice_mix_tlv),
277
278SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
279 1, 0),
280SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
281 1, 0),
282
283SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
284SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
285 mix_tlv),
286SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
287 voice_mix_tlv),
1f53aee0
LG		 288SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
289
290SOC_ENUM("Bass Boost", wm8753_enum[0]),
291SOC_ENUM("Bass Filter", wm8753_enum[1]),
292SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
293
294SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
295SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
296
2cc8c609
MM		 297SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
298 rec_mix_tlv),
299SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
300 rec_mix_tlv),
1f53aee0 301
2cc8c609
MM		 302SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
303 pga_tlv),
1f53aee0
LG		 304SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
305SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
306
307SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
308SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
309SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
310
311SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
312SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
313SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
314SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
315SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
316SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
317SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
318SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
319SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
320SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
321
322SOC_ENUM("3D Function", wm8753_enum[5]),
323SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
324SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
325SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
326SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
327
328SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
329SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
330
331SOC_ENUM("De-emphasis", wm8753_enum[8]),
332SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
333SOC_ENUM("Playback Phase", wm8753_enum[10]),
334
2cc8c609
MM		 335SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
336SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 337
338SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
339
340SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 341SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 342};
343
344/* add non dapm controls */
345static int wm8753_add_controls(struct snd_soc_codec *codec)
346{
347 int err, i;
348
349 for (i = 0; i < ARRAY_SIZE(wm8753_snd_controls); i++) {
350 err = snd_ctl_add(codec->card,
60fc684a
MB		 351 snd_soc_cnew(&wm8753_snd_controls[i],
352 codec, NULL));
1f53aee0
LG		 353 if (err < 0)
354 return err;
355 }
356 return 0;
357}
358
359/*
360 * _DAPM_ Controls
361 */
362
363/* Left Mixer */
364static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
365SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
366SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
367SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
368SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
369};
370
371/* Right mixer */
372static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
373SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
374SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
375SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
376SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
377};
378
379/* Mono mixer */
380static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
381SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
382SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
383SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
384SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
385SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
386};
387
388/* Mono 2 Mux */
389static const struct snd_kcontrol_new wm8753_mono2_controls =
390SOC_DAPM_ENUM("Route", wm8753_enum[17]);
391
392/* Out 3 Mux */
393static const struct snd_kcontrol_new wm8753_out3_controls =
394SOC_DAPM_ENUM("Route", wm8753_enum[18]);
395
396/* Out 4 Mux */
397static const struct snd_kcontrol_new wm8753_out4_controls =
398SOC_DAPM_ENUM("Route", wm8753_enum[19]);
399
400/* ADC Mono Mix */
401static const struct snd_kcontrol_new wm8753_adc_mono_controls =
402SOC_DAPM_ENUM("Route", wm8753_enum[22]);
403
404/* Record mixer */
405static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
406SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
407SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
408SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
409};
410
411/* Left ADC mux */
412static const struct snd_kcontrol_new wm8753_adc_left_controls =
413SOC_DAPM_ENUM("Route", wm8753_enum[21]);
414
415/* Right ADC mux */
416static const struct snd_kcontrol_new wm8753_adc_right_controls =
417SOC_DAPM_ENUM("Route", wm8753_enum[20]);
418
419/* MIC mux */
420static const struct snd_kcontrol_new wm8753_mic_mux_controls =
421SOC_DAPM_ENUM("Route", wm8753_enum[16]);
422
423/* ALC mixer */
424static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
425SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
426SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
427SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
428SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
429};
430
431/* Left Line mux */
432static const struct snd_kcontrol_new wm8753_line_left_controls =
433SOC_DAPM_ENUM("Route", wm8753_enum[14]);
434
435/* Right Line mux */
436static const struct snd_kcontrol_new wm8753_line_right_controls =
437SOC_DAPM_ENUM("Route", wm8753_enum[13]);
438
439/* Mono Line mux */
440static const struct snd_kcontrol_new wm8753_line_mono_controls =
441SOC_DAPM_ENUM("Route", wm8753_enum[12]);
442
443/* Line mux and mixer */
444static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
445SOC_DAPM_ENUM("Route", wm8753_enum[11]);
446
447/* Rx mux and mixer */
448static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
449SOC_DAPM_ENUM("Route", wm8753_enum[15]);
450
451/* Mic Selector Mux */
452static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
453SOC_DAPM_ENUM("Route", wm8753_enum[25]);
454
455static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
456SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
457SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
458 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
459SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
460SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
461SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
462SND_SOC_DAPM_OUTPUT("LOUT1"),
463SND_SOC_DAPM_OUTPUT("LOUT2"),
464SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
465 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
466SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
467SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
468SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
469SND_SOC_DAPM_OUTPUT("ROUT1"),
470SND_SOC_DAPM_OUTPUT("ROUT2"),
471SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
472 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
473SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
474SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
475SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
476SND_SOC_DAPM_OUTPUT("MONO1"),
477SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
478SND_SOC_DAPM_OUTPUT("MONO2"),
479SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
480SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
481SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
482SND_SOC_DAPM_OUTPUT("OUT3"),
483SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
484SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
485SND_SOC_DAPM_OUTPUT("OUT4"),
486SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
487 &wm8753_record_mixer_controls[0],
488 ARRAY_SIZE(wm8753_record_mixer_controls)),
489SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
490SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
491SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
492 &wm8753_adc_mono_controls),
493SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
494 &wm8753_adc_mono_controls),
495SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
496 &wm8753_adc_left_controls),
497SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
498 &wm8753_adc_right_controls),
499SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
500 &wm8753_mic_mux_controls),
501SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
502SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
503SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
504 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
505SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
506 &wm8753_line_left_controls),
507SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
508 &wm8753_line_right_controls),
509SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
510 &wm8753_line_mono_controls),
511SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
512 &wm8753_line_mux_mix_controls),
513SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
514 &wm8753_rx_mux_mix_controls),
515SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
516SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
517SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
518 &wm8753_mic_sel_mux_controls),
519SND_SOC_DAPM_INPUT("LINE1"),
520SND_SOC_DAPM_INPUT("LINE2"),
521SND_SOC_DAPM_INPUT("RXP"),
522SND_SOC_DAPM_INPUT("RXN"),
523SND_SOC_DAPM_INPUT("ACIN"),
524SND_SOC_DAPM_OUTPUT("ACOP"),
525SND_SOC_DAPM_INPUT("MIC1N"),
526SND_SOC_DAPM_INPUT("MIC1"),
527SND_SOC_DAPM_INPUT("MIC2N"),
528SND_SOC_DAPM_INPUT("MIC2"),
529SND_SOC_DAPM_VMID("VREF"),
530};
531
a65f0568 532static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 533 /* left mixer */
534 {"Left Mixer", "Left Playback Switch", "Left DAC"},
535 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
536 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
537 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
538
539 /* right mixer */
540 {"Right Mixer", "Right Playback Switch", "Right DAC"},
541 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
542 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
543 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
544
545 /* mono mixer */
546 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
547 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
548 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
549 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
550 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
551
552 /* left out */
553 {"Left Out 1", NULL, "Left Mixer"},
554 {"Left Out 2", NULL, "Left Mixer"},
555 {"LOUT1", NULL, "Left Out 1"},
556 {"LOUT2", NULL, "Left Out 2"},
557
558 /* right out */
559 {"Right Out 1", NULL, "Right Mixer"},
560 {"Right Out 2", NULL, "Right Mixer"},
561 {"ROUT1", NULL, "Right Out 1"},
562 {"ROUT2", NULL, "Right Out 2"},
563
564 /* mono 1 out */
565 {"Mono Out 1", NULL, "Mono Mixer"},
566 {"MONO1", NULL, "Mono Out 1"},
567
568 /* mono 2 out */
569 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
570 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
571 {"Mono 2 Mux", "Left", "Left Mixer"},
572 {"Mono 2 Mux", "Right", "Right Mixer"},
573 {"Mono Out 2", NULL, "Mono 2 Mux"},
574 {"MONO2", NULL, "Mono Out 2"},
575
576 /* out 3 */
577 {"Out3 Left + Right", NULL, "Left Mixer"},
578 {"Out3 Left + Right", NULL, "Right Mixer"},
579 {"Out3 Mux", "VREF", "VREF"},
580 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
581 {"Out3 Mux", "ROUT2", "ROUT2"},
582 {"Out 3", NULL, "Out3 Mux"},
583 {"OUT3", NULL, "Out 3"},
584
585 /* out 4 */
586 {"Out4 Mux", "VREF", "VREF"},
587 {"Out4 Mux", "Capture ST", "Capture ST Mixer"},
588 {"Out4 Mux", "LOUT2", "LOUT2"},
589 {"Out 4", NULL, "Out4 Mux"},
590 {"OUT4", NULL, "Out 4"},
591
592 /* record mixer */
593 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
594 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
595 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
596
597 /* Mic/SideTone Mux */
598 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
599 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
600 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
601 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
602
603 /* Capture Left Mux */
604 {"Capture Left Mux", "PGA", "Left Capture Volume"},
605 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
606 {"Capture Left Mux", "Line", "LINE1"},
607
608 /* Capture Right Mux */
609 {"Capture Right Mux", "PGA", "Right Capture Volume"},
610 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
611 {"Capture Right Mux", "Sidetone", "Capture ST Mixer"},
612
613 /* Mono Capture mixer-mux */
614 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
615 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
616 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
617 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
618 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
619 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
620 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
621 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
622 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
623
624 /* ADC */
625 {"Left ADC", NULL, "Capture Left Mixer"},
626 {"Right ADC", NULL, "Capture Right Mixer"},
627
628 /* Left Capture Volume */
629 {"Left Capture Volume", NULL, "ACIN"},
630
631 /* Right Capture Volume */
632 {"Right Capture Volume", NULL, "Mic 2 Volume"},
633
634 /* ALC Mixer */
635 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
636 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
637 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
638 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
639
640 /* Line Left Mux */
641 {"Line Left Mux", "Line 1", "LINE1"},
642 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
643
644 /* Line Right Mux */
645 {"Line Right Mux", "Line 2", "LINE2"},
646 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
647
648 /* Line Mono Mux */
649 {"Line Mono Mux", "Line Mix", "Line Mixer"},
650 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
651
652 /* Line Mixer/Mux */
653 {"Line Mixer", "Line 1 + 2", "LINE1"},
654 {"Line Mixer", "Line 1 - 2", "LINE1"},
655 {"Line Mixer", "Line 1 + 2", "LINE2"},
656 {"Line Mixer", "Line 1 - 2", "LINE2"},
657 {"Line Mixer", "Line 1", "LINE1"},
658 {"Line Mixer", "Line 2", "LINE2"},
659
660 /* Rx Mixer/Mux */
661 {"Rx Mixer", "RXP - RXN", "RXP"},
662 {"Rx Mixer", "RXP + RXN", "RXP"},
663 {"Rx Mixer", "RXP - RXN", "RXN"},
664 {"Rx Mixer", "RXP + RXN", "RXN"},
665 {"Rx Mixer", "RXP", "RXP"},
666 {"Rx Mixer", "RXN", "RXN"},
667
668 /* Mic 1 Volume */
669 {"Mic 1 Volume", NULL, "MIC1N"},
670 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
671
672 /* Mic 2 Volume */
673 {"Mic 2 Volume", NULL, "MIC2N"},
674 {"Mic 2 Volume", NULL, "MIC2"},
675
676 /* Mic Selector Mux */
677 {"Mic Selection Mux", "Mic 1", "MIC1"},
678 {"Mic Selection Mux", "Mic 2", "MIC2N"},
679 {"Mic Selection Mux", "Mic 3", "MIC2"},
680
681 /* ACOP */
682 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 683};
684
685static int wm8753_add_widgets(struct snd_soc_codec *codec)
686{
a65f0568
MB		 687 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
688 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 689
a65f0568 690 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 691
692 snd_soc_dapm_new_widgets(codec);
693 return 0;
694}
695
696/* PLL divisors */
697struct _pll_div {
698 u32 div2:1;
699 u32 n:4;
700 u32 k:24;
701};
702
703/* The size in bits of the pll divide multiplied by 10
704 * to allow rounding later */
705#define FIXED_PLL_SIZE ((1 << 22) * 10)
706
707static void pll_factors(struct _pll_div *pll_div, unsigned int target,
708 unsigned int source)
709{
710 u64 Kpart;
711 unsigned int K, Ndiv, Nmod;
712
713 Ndiv = target / source;
714 if (Ndiv < 6) {
715 source >>= 1;
716 pll_div->div2 = 1;
717 Ndiv = target / source;
718 } else
719 pll_div->div2 = 0;
720
721 if ((Ndiv < 6) || (Ndiv > 12))
722 printk(KERN_WARNING
60fc684a 723 "wm8753: unsupported N = %d\n", Ndiv);
1f53aee0
LG		 724
725 pll_div->n = Ndiv;
726 Nmod = target % source;
727 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
728
729 do_div(Kpart, source);
730
731 K = Kpart & 0xFFFFFFFF;
732
733 /* Check if we need to round */
734 if ((K % 10) >= 5)
735 K += 5;
736
737 /* Move down to proper range now rounding is done */
738 K /= 10;
739
740 pll_div->k = K;
741}
742
743static int wm8753_set_dai_pll(struct snd_soc_codec_dai *codec_dai,
744 int pll_id, unsigned int freq_in, unsigned int freq_out)
745{
746 u16 reg, enable;
747 int offset;
748 struct snd_soc_codec *codec = codec_dai->codec;
749
750 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
751 return -ENODEV;
752
753 if (pll_id == WM8753_PLL1) {
754 offset = 0;
755 enable = 0x10;
756 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
757 } else {
758 offset = 4;
759 enable = 0x8;
760 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
761 }
762
763 if (!freq_in || !freq_out) {
764 /* disable PLL */
765 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
766 wm8753_write(codec, WM8753_CLOCK, reg);
767 return 0;
768 } else {
769 u16 value = 0;
770 struct _pll_div pll_div;
771
772 pll_factors(&pll_div, freq_out * 8, freq_in);
773
774 /* set up N and K PLL divisor ratios */
775 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
776 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
777 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
778
779 /* bits 8:0 = PLL_K[17:9] */
780 value = (pll_div.k & 0x03fe00) >> 9;
781 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
782
783 /* bits 8:0 = PLL_K[8:0] */
784 value = pll_div.k & 0x0001ff;
785 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
786
787 /* set PLL as input and enable */
788 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
789 (pll_div.div2 << 3));
790 wm8753_write(codec, WM8753_CLOCK, reg | enable);
791 }
792 return 0;
793}
794
795struct _coeff_div {
796 u32 mclk;
797 u32 rate;
798 u8 sr:5;
799 u8 usb:1;
800};
801
802/* codec hifi mclk (after PLL) clock divider coefficients */
803static const struct _coeff_div coeff_div[] = {
804 /* 8k */
805 {12288000, 8000, 0x6, 0x0},
806 {11289600, 8000, 0x16, 0x0},
807 {18432000, 8000, 0x7, 0x0},
808 {16934400, 8000, 0x17, 0x0},
809 {12000000, 8000, 0x6, 0x1},
810
811 /* 11.025k */
812 {11289600, 11025, 0x18, 0x0},
813 {16934400, 11025, 0x19, 0x0},
814 {12000000, 11025, 0x19, 0x1},
815
816 /* 16k */
817 {12288000, 16000, 0xa, 0x0},
818 {18432000, 16000, 0xb, 0x0},
819 {12000000, 16000, 0xa, 0x1},
820
821 /* 22.05k */
822 {11289600, 22050, 0x1a, 0x0},
823 {16934400, 22050, 0x1b, 0x0},
824 {12000000, 22050, 0x1b, 0x1},
825
826 /* 32k */
827 {12288000, 32000, 0xc, 0x0},
828 {18432000, 32000, 0xd, 0x0},
829 {12000000, 32000, 0xa, 0x1},
830
831 /* 44.1k */
832 {11289600, 44100, 0x10, 0x0},
833 {16934400, 44100, 0x11, 0x0},
834 {12000000, 44100, 0x11, 0x1},
835
836 /* 48k */
837 {12288000, 48000, 0x0, 0x0},
838 {18432000, 48000, 0x1, 0x0},
839 {12000000, 48000, 0x0, 0x1},
840
841 /* 88.2k */
842 {11289600, 88200, 0x1e, 0x0},
843 {16934400, 88200, 0x1f, 0x0},
844 {12000000, 88200, 0x1f, 0x1},
845
846 /* 96k */
847 {12288000, 96000, 0xe, 0x0},
848 {18432000, 96000, 0xf, 0x0},
849 {12000000, 96000, 0xe, 0x1},
850};
851
852static int get_coeff(int mclk, int rate)
853{
854 int i;
855
856 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
857 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
858 return i;
859 }
860 return -EINVAL;
861}
862
863/*
864 * Clock after PLL and dividers
865 */
866static int wm8753_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai,
867 int clk_id, unsigned int freq, int dir)
868{
869 struct snd_soc_codec *codec = codec_dai->codec;
870 struct wm8753_priv *wm8753 = codec->private_data;
871
872 switch (freq) {
873 case 11289600:
874 case 12000000:
875 case 12288000:
876 case 16934400:
877 case 18432000:
878 if (clk_id == WM8753_MCLK) {
879 wm8753->sysclk = freq;
880 return 0;
881 } else if (clk_id == WM8753_PCMCLK) {
882 wm8753->pcmclk = freq;
883 return 0;
884 }
885 break;
886 }
887 return -EINVAL;
888}
889
890/*
891 * Set's ADC and Voice DAC format.
892 */
893static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
894 unsigned int fmt)
895{
896 struct snd_soc_codec *codec = codec_dai->codec;
897 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
898
899 /* interface format */
900 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
901 case SND_SOC_DAIFMT_I2S:
902 voice |= 0x0002;
903 break;
904 case SND_SOC_DAIFMT_RIGHT_J:
905 break;
906 case SND_SOC_DAIFMT_LEFT_J:
907 voice |= 0x0001;
908 break;
909 case SND_SOC_DAIFMT_DSP_A:
910 voice |= 0x0003;
911 break;
912 case SND_SOC_DAIFMT_DSP_B:
913 voice |= 0x0013;
914 break;
915 default:
916 return -EINVAL;
917 }
918
919 wm8753_write(codec, WM8753_PCM, voice);
920 return 0;
921}
922
923/*
924 * Set PCM DAI bit size and sample rate.
925 */
926static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
927 struct snd_pcm_hw_params *params)
928{
929 struct snd_soc_pcm_runtime *rtd = substream->private_data;
930 struct snd_soc_device *socdev = rtd->socdev;
931 struct snd_soc_codec *codec = socdev->codec;
932 struct wm8753_priv *wm8753 = codec->private_data;
933 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
934 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
935
936 /* bit size */
937 switch (params_format(params)) {
938 case SNDRV_PCM_FORMAT_S16_LE:
939 break;
940 case SNDRV_PCM_FORMAT_S20_3LE:
941 voice |= 0x0004;
942 break;
943 case SNDRV_PCM_FORMAT_S24_LE:
944 voice |= 0x0008;
945 break;
946 case SNDRV_PCM_FORMAT_S32_LE:
947 voice |= 0x000c;
948 break;
949 }
950
951 /* sample rate */
952 if (params_rate(params) * 384 == wm8753->pcmclk)
953 srate |= 0x80;
954 wm8753_write(codec, WM8753_SRATE1, srate);
955
956 wm8753_write(codec, WM8753_PCM, voice);
957 return 0;
958}
959
960/*
961 * Set's PCM dai fmt and BCLK.
962 */
963static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
964 unsigned int fmt)
965{
966 struct snd_soc_codec *codec = codec_dai->codec;
967 u16 voice, ioctl;
968
969 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
970 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
971
972 /* set master/slave audio interface */
973 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
974 case SND_SOC_DAIFMT_CBS_CFS:
975 break;
976 case SND_SOC_DAIFMT_CBM_CFM:
977 ioctl |= 0x2;
978 case SND_SOC_DAIFMT_CBM_CFS:
979 voice |= 0x0040;
980 break;
981 default:
982 return -EINVAL;
983 }
984
985 /* clock inversion */
986 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
987 case SND_SOC_DAIFMT_DSP_A:
988 case SND_SOC_DAIFMT_DSP_B:
989 /* frame inversion not valid for DSP modes */
990 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
991 case SND_SOC_DAIFMT_NB_NF:
992 break;
993 case SND_SOC_DAIFMT_IB_NF:
994 voice |= 0x0080;
995 break;
996 default:
997 return -EINVAL;
998 }
999 break;
1000 case SND_SOC_DAIFMT_I2S:
1001 case SND_SOC_DAIFMT_RIGHT_J:
1002 case SND_SOC_DAIFMT_LEFT_J:
1003 voice &= ~0x0010;
1004 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1005 case SND_SOC_DAIFMT_NB_NF:
1006 break;
1007 case SND_SOC_DAIFMT_IB_IF:
1008 voice |= 0x0090;
1009 break;
1010 case SND_SOC_DAIFMT_IB_NF:
1011 voice |= 0x0080;
1012 break;
1013 case SND_SOC_DAIFMT_NB_IF:
1014 voice |= 0x0010;
1015 break;
1016 default:
1017 return -EINVAL;
1018 }
1019 break;
1020 default:
1021 return -EINVAL;
1022 }
1023
1024 wm8753_write(codec, WM8753_PCM, voice);
1025 wm8753_write(codec, WM8753_IOCTL, ioctl);
1026 return 0;
1027}
1028
1029static int wm8753_set_dai_clkdiv(struct snd_soc_codec_dai *codec_dai,
1030 int div_id, int div)
1031{
1032 struct snd_soc_codec *codec = codec_dai->codec;
1033 u16 reg;
1034
1035 switch (div_id) {
1036 case WM8753_PCMDIV:
1037 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1038 wm8753_write(codec, WM8753_CLOCK, reg | div);
1039 break;
1040 case WM8753_BCLKDIV:
1041 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1042 wm8753_write(codec, WM8753_SRATE2, reg | div);
1043 break;
1044 case WM8753_VXCLKDIV:
1045 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1046 wm8753_write(codec, WM8753_SRATE2, reg | div);
1047 break;
1048 default:
1049 return -EINVAL;
1050 }
1051 return 0;
1052}
1053
1054/*
1055 * Set's HiFi DAC format.
1056 */
1057static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
1058 unsigned int fmt)
1059{
1060 struct snd_soc_codec *codec = codec_dai->codec;
1061 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1062
1063 /* interface format */
1064 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1065 case SND_SOC_DAIFMT_I2S:
1066 hifi |= 0x0002;
1067 break;
1068 case SND_SOC_DAIFMT_RIGHT_J:
1069 break;
1070 case SND_SOC_DAIFMT_LEFT_J:
1071 hifi |= 0x0001;
1072 break;
1073 case SND_SOC_DAIFMT_DSP_A:
1074 hifi |= 0x0003;
1075 break;
1076 case SND_SOC_DAIFMT_DSP_B:
1077 hifi |= 0x0013;
1078 break;
1079 default:
1080 return -EINVAL;
1081 }
1082
1083 wm8753_write(codec, WM8753_HIFI, hifi);
1084 return 0;
1085}
1086
1087/*
1088 * Set's I2S DAI format.
1089 */
1090static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
1091 unsigned int fmt)
1092{
1093 struct snd_soc_codec *codec = codec_dai->codec;
1094 u16 ioctl, hifi;
1095
1096 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1097 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1098
1099 /* set master/slave audio interface */
1100 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1101 case SND_SOC_DAIFMT_CBS_CFS:
1102 break;
1103 case SND_SOC_DAIFMT_CBM_CFM:
1104 ioctl |= 0x1;
1105 case SND_SOC_DAIFMT_CBM_CFS:
1106 hifi |= 0x0040;
1107 break;
1108 default:
1109 return -EINVAL;
1110 }
1111
1112 /* clock inversion */
1113 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1114 case SND_SOC_DAIFMT_DSP_A:
1115 case SND_SOC_DAIFMT_DSP_B:
1116 /* frame inversion not valid for DSP modes */
1117 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1118 case SND_SOC_DAIFMT_NB_NF:
1119 break;
1120 case SND_SOC_DAIFMT_IB_NF:
1121 hifi |= 0x0080;
1122 break;
1123 default:
1124 return -EINVAL;
1125 }
1126 break;
1127 case SND_SOC_DAIFMT_I2S:
1128 case SND_SOC_DAIFMT_RIGHT_J:
1129 case SND_SOC_DAIFMT_LEFT_J:
1130 hifi &= ~0x0010;
1131 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1132 case SND_SOC_DAIFMT_NB_NF:
1133 break;
1134 case SND_SOC_DAIFMT_IB_IF:
1135 hifi |= 0x0090;
1136 break;
1137 case SND_SOC_DAIFMT_IB_NF:
1138 hifi |= 0x0080;
1139 break;
1140 case SND_SOC_DAIFMT_NB_IF:
1141 hifi |= 0x0010;
1142 break;
1143 default:
1144 return -EINVAL;
1145 }
1146 break;
1147 default:
1148 return -EINVAL;
1149 }
1150
1151 wm8753_write(codec, WM8753_HIFI, hifi);
1152 wm8753_write(codec, WM8753_IOCTL, ioctl);
1153 return 0;
1154}
1155
1156/*
1157 * Set PCM DAI bit size and sample rate.
1158 */
1159static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1160 struct snd_pcm_hw_params *params)
1161{
1162 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1163 struct snd_soc_device *socdev = rtd->socdev;
1164 struct snd_soc_codec *codec = socdev->codec;
1165 struct wm8753_priv *wm8753 = codec->private_data;
1166 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1167 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1168 int coeff;
1169
1170 /* is digital filter coefficient valid ? */
1171 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1172 if (coeff < 0) {
1173 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1174 return coeff;
1175 }
1176 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1177 coeff_div[coeff].usb);
1178
1179 /* bit size */
1180 switch (params_format(params)) {
1181 case SNDRV_PCM_FORMAT_S16_LE:
1182 break;
1183 case SNDRV_PCM_FORMAT_S20_3LE:
1184 hifi |= 0x0004;
1185 break;
1186 case SNDRV_PCM_FORMAT_S24_LE:
1187 hifi |= 0x0008;
1188 break;
1189 case SNDRV_PCM_FORMAT_S32_LE:
1190 hifi |= 0x000c;
1191 break;
1192 }
1193
1194 wm8753_write(codec, WM8753_HIFI, hifi);
1195 return 0;
1196}
1197
1198static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
1199 unsigned int fmt)
1200{
1201 struct snd_soc_codec *codec = codec_dai->codec;
1202 u16 clock;
1203
1204 /* set clk source as pcmclk */
1205 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1206 wm8753_write(codec, WM8753_CLOCK, clock);
1207
1208 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1209 return -EINVAL;
1210 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1211}
1212
1213static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
1214 unsigned int fmt)
1215{
1216 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1217 return -EINVAL;
1218 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1219}
1220
1221static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
1222 unsigned int fmt)
1223{
1224 struct snd_soc_codec *codec = codec_dai->codec;
1225 u16 clock;
1226
1227 /* set clk source as pcmclk */
1228 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1229 wm8753_write(codec, WM8753_CLOCK, clock);
1230
1231 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1232 return -EINVAL;
1233 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1234}
1235
1236static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
1237 unsigned int fmt)
1238{
1239 struct snd_soc_codec *codec = codec_dai->codec;
1240 u16 clock;
1241
1242 /* set clk source as mclk */
1243 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1244 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1245
1246 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1247 return -EINVAL;
1248 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1249 return -EINVAL;
1250 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1251}
1252
1253static int wm8753_mute(struct snd_soc_codec_dai *dai, int mute)
1254{
1255 struct snd_soc_codec *codec = dai->codec;
1256 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1257
1258 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1259 * make sure we check if they are not both active when we mute */
1260 if (mute && dai->id == 1) {
1261 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1262 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1263 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1264 } else {
1265 if (mute)
1266 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1267 else
1268 wm8753_write(codec, WM8753_DAC, mute_reg);
1269 }
1270
1271 return 0;
1272}
1273
0be9898a
MB		 1274static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1275 enum snd_soc_bias_level level)
1f53aee0
LG		 1276{
1277 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1278
0be9898a
MB		 1279 switch (level) {
1280 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1281 /* set vmid to 50k and unmute dac */
1282 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1283 break;
0be9898a 1284 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1285 /* set vmid to 5k for quick power up */
1286 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1287 break;
0be9898a 1288 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1289 /* mute dac and set vmid to 500k, enable VREF */
1290 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1291 break;
0be9898a 1292 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1293 wm8753_write(codec, WM8753_PWR1, 0x0001);
1294 break;
1295 }
0be9898a 1296 codec->bias_level = level;
1f53aee0
LG		 1297 return 0;
1298}
1299
1300#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1301 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1302 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1303 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1304
1305#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1306 SNDRV_PCM_FMTBIT_S24_LE)
1307
1308/*
1309 * The WM8753 supports upto 4 different and mutually exclusive DAI
1310 * configurations. This gives 2 PCM's available for use, hifi and voice.
1311 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1312 * is connected between the wm8753 and a BT codec or GSM modem.
1313 *
1314 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1315 * 2. Voice over HIFI DAI - HIFI disabled
1316 * 3. Voice disabled - HIFI over HIFI
1317 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1318 */
1319static const struct snd_soc_codec_dai wm8753_all_dai[] = {
1320/* DAI HiFi mode 1 */
1321{ .name = "WM8753 HiFi",
1322 .id = 1,
1323 .playback = {
1324 .stream_name = "HiFi Playback",
1325 .channels_min = 1,
1326 .channels_max = 2,
1327 .rates = WM8753_RATES,
1328 .formats = WM8753_FORMATS,},
1329 .capture = { /* dummy for fast DAI switching */
1330 .stream_name = "Capture",
1331 .channels_min = 1,
1332 .channels_max = 2,
1333 .rates = WM8753_RATES,
1334 .formats = WM8753_FORMATS,},
1335 .ops = {
1336 .hw_params = wm8753_i2s_hw_params,},
1337 .dai_ops = {
1338 .digital_mute = wm8753_mute,
1339 .set_fmt = wm8753_mode1h_set_dai_fmt,
1340 .set_clkdiv = wm8753_set_dai_clkdiv,
1341 .set_pll = wm8753_set_dai_pll,
1342 .set_sysclk = wm8753_set_dai_sysclk,
1343 },
1344},
1345/* DAI Voice mode 1 */
1346{ .name = "WM8753 Voice",
1347 .id = 1,
1348 .playback = {
1349 .stream_name = "Voice Playback",
1350 .channels_min = 1,
1351 .channels_max = 1,
1352 .rates = WM8753_RATES,
1353 .formats = WM8753_FORMATS,},
1354 .capture = {
1355 .stream_name = "Capture",
1356 .channels_min = 1,
1357 .channels_max = 2,
1358 .rates = WM8753_RATES,
1359 .formats = WM8753_FORMATS,},
1360 .ops = {
1361 .hw_params = wm8753_pcm_hw_params,},
1362 .dai_ops = {
1363 .digital_mute = wm8753_mute,
1364 .set_fmt = wm8753_mode1v_set_dai_fmt,
1365 .set_clkdiv = wm8753_set_dai_clkdiv,
1366 .set_pll = wm8753_set_dai_pll,
1367 .set_sysclk = wm8753_set_dai_sysclk,
1368 },
1369},
1370/* DAI HiFi mode 2 - dummy */
1371{ .name = "WM8753 HiFi",
1372 .id = 2,
1373},
1374/* DAI Voice mode 2 */
1375{ .name = "WM8753 Voice",
1376 .id = 2,
1377 .playback = {
1378 .stream_name = "Voice Playback",
1379 .channels_min = 1,
1380 .channels_max = 1,
1381 .rates = WM8753_RATES,
1382 .formats = WM8753_FORMATS,},
1383 .capture = {
1384 .stream_name = "Capture",
1385 .channels_min = 1,
1386 .channels_max = 2,
1387 .rates = WM8753_RATES,
1388 .formats = WM8753_FORMATS,},
1389 .ops = {
1390 .hw_params = wm8753_pcm_hw_params,},
1391 .dai_ops = {
1392 .digital_mute = wm8753_mute,
1393 .set_fmt = wm8753_mode2_set_dai_fmt,
1394 .set_clkdiv = wm8753_set_dai_clkdiv,
1395 .set_pll = wm8753_set_dai_pll,
1396 .set_sysclk = wm8753_set_dai_sysclk,
1397 },
1398},
1399/* DAI HiFi mode 3 */
1400{ .name = "WM8753 HiFi",
1401 .id = 3,
1402 .playback = {
1403 .stream_name = "HiFi Playback",
1404 .channels_min = 1,
1405 .channels_max = 2,
1406 .rates = WM8753_RATES,
1407 .formats = WM8753_FORMATS,},
1408 .capture = {
1409 .stream_name = "Capture",
1410 .channels_min = 1,
1411 .channels_max = 2,
1412 .rates = WM8753_RATES,
1413 .formats = WM8753_FORMATS,},
1414 .ops = {
1415 .hw_params = wm8753_i2s_hw_params,},
1416 .dai_ops = {
1417 .digital_mute = wm8753_mute,
1418 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1419 .set_clkdiv = wm8753_set_dai_clkdiv,
1420 .set_pll = wm8753_set_dai_pll,
1421 .set_sysclk = wm8753_set_dai_sysclk,
1422 },
1423},
1424/* DAI Voice mode 3 - dummy */
1425{ .name = "WM8753 Voice",
1426 .id = 3,
1427},
1428/* DAI HiFi mode 4 */
1429{ .name = "WM8753 HiFi",
1430 .id = 4,
1431 .playback = {
1432 .stream_name = "HiFi Playback",
1433 .channels_min = 1,
1434 .channels_max = 2,
1435 .rates = WM8753_RATES,
1436 .formats = WM8753_FORMATS,},
1437 .capture = {
1438 .stream_name = "Capture",
1439 .channels_min = 1,
1440 .channels_max = 2,
1441 .rates = WM8753_RATES,
1442 .formats = WM8753_FORMATS,},
1443 .ops = {
1444 .hw_params = wm8753_i2s_hw_params,},
1445 .dai_ops = {
1446 .digital_mute = wm8753_mute,
1447 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1448 .set_clkdiv = wm8753_set_dai_clkdiv,
1449 .set_pll = wm8753_set_dai_pll,
1450 .set_sysclk = wm8753_set_dai_sysclk,
1451 },
1452},
1453/* DAI Voice mode 4 - dummy */
1454{ .name = "WM8753 Voice",
1455 .id = 4,
1456},
1457};
1458
1459struct snd_soc_codec_dai wm8753_dai[2];
1460EXPORT_SYMBOL_GPL(wm8753_dai);
1461
1462static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1463{
1464 if (mode < 4) {
1465 int playback_active, capture_active, codec_active, pop_wait;
1466 void *private_data;
1467
1468 playback_active = wm8753_dai[0].playback.active;
1469 capture_active = wm8753_dai[0].capture.active;
1470 codec_active = wm8753_dai[0].active;
1471 private_data = wm8753_dai[0].private_data;
1472 pop_wait = wm8753_dai[0].pop_wait;
1473 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1474 wm8753_dai[0].playback.active = playback_active;
1475 wm8753_dai[0].capture.active = capture_active;
1476 wm8753_dai[0].active = codec_active;
1477 wm8753_dai[0].private_data = private_data;
1478 wm8753_dai[0].pop_wait = pop_wait;
1479
1480 playback_active = wm8753_dai[1].playback.active;
1481 capture_active = wm8753_dai[1].capture.active;
1482 codec_active = wm8753_dai[1].active;
1483 private_data = wm8753_dai[1].private_data;
1484 pop_wait = wm8753_dai[1].pop_wait;
1485 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1486 wm8753_dai[1].playback.active = playback_active;
1487 wm8753_dai[1].capture.active = capture_active;
1488 wm8753_dai[1].active = codec_active;
1489 wm8753_dai[1].private_data = private_data;
1490 wm8753_dai[1].pop_wait = pop_wait;
1491 }
1492 wm8753_dai[0].codec = codec;
1493 wm8753_dai[1].codec = codec;
1494}
1495
1496static void wm8753_work(struct work_struct *work)
1497{
1498 struct snd_soc_codec *codec =
1499 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1500 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1501}
1502
1503static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1504{
1505 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1506 struct snd_soc_codec *codec = socdev->codec;
1507
1508 /* we only need to suspend if we are a valid card */
60fc684a 1509 if (!codec->card)
1f53aee0 1510 return 0;
60fc684a 1511
0be9898a 1512 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1513 return 0;
1514}
1515
1516static int wm8753_resume(struct platform_device *pdev)
1517{
1518 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1519 struct snd_soc_codec *codec = socdev->codec;
1520 int i;
1521 u8 data[2];
1522 u16 *cache = codec->reg_cache;
1523
1524 /* we only need to resume if we are a valid card */
60fc684a 1525 if (!codec->card)
1f53aee0
LG		 1526 return 0;
1527
1528 /* Sync reg_cache with the hardware */
1529 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1530 if (i + 1 == WM8753_RESET)
1531 continue;
1532 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1533 data[1] = cache[i] & 0x00ff;
1534 codec->hw_write(codec->control_data, data, 2);
1535 }
1536
0be9898a 1537 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1538
1539 /* charge wm8753 caps */
0be9898a
MB		 1540 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1541 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1542 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1543 schedule_delayed_work(&codec->delayed_work,
1544 msecs_to_jiffies(caps_charge));
1545 }
1546
1547 return 0;
1548}
1549
1550/*
1551 * initialise the WM8753 driver
1552 * register the mixer and dsp interfaces with the kernel
1553 */
1554static int wm8753_init(struct snd_soc_device *socdev)
1555{
1556 struct snd_soc_codec *codec = socdev->codec;
1557 int reg, ret = 0;
1558
1559 codec->name = "WM8753";
1560 codec->owner = THIS_MODULE;
1561 codec->read = wm8753_read_reg_cache;
1562 codec->write = wm8753_write;
0be9898a 1563 codec->set_bias_level = wm8753_set_bias_level;
1f53aee0
LG		 1564 codec->dai = wm8753_dai;
1565 codec->num_dai = 2;
d751b233 1566 codec->reg_cache_size = ARRAY_SIZE(wm8753_reg);
1f53aee0
LG		 1567 codec->reg_cache = kmemdup(wm8753_reg, sizeof(wm8753_reg), GFP_KERNEL);
1568
1569 if (codec->reg_cache == NULL)
1570 return -ENOMEM;
1571
1572 wm8753_set_dai_mode(codec, 0);
1573
1574 wm8753_reset(codec);
1575
1576 /* register pcms */
1577 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1578 if (ret < 0) {
1579 printk(KERN_ERR "wm8753: failed to create pcms\n");
1580 goto pcm_err;
1581 }
1582
1583 /* charge output caps */
0be9898a
MB		 1584 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1585 codec->bias_level = SND_SOC_BIAS_STANDBY;
1f53aee0
LG		 1586 schedule_delayed_work(&codec->delayed_work,
1587 msecs_to_jiffies(caps_charge));
1588
1589 /* set the update bits */
1590 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1591 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1592 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1593 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1594 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1595 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1596 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1597 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1598 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1599 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1600 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1601 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1602 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1603 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1604 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1605 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1606 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1607 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1608 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1609 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1610
1611 wm8753_add_controls(codec);
1612 wm8753_add_widgets(codec);
1613 ret = snd_soc_register_card(socdev);
1614 if (ret < 0) {
60fc684a 1615 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1616 goto card_err;
60fc684a
MB		 1617 }
1618
1f53aee0
LG		 1619 return ret;
1620
1621card_err:
1622 snd_soc_free_pcms(socdev);
1623 snd_soc_dapm_free(socdev);
1624pcm_err:
1625 kfree(codec->reg_cache);
1626 return ret;
1627}
1628
1629/* If the i2c layer weren't so broken, we could pass this kind of data
1630 around */
1631static struct snd_soc_device *wm8753_socdev;
1632
60fc684a 1633#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0
LG		 1634
1635/*
1636 * WM8753 2 wire address is determined by GPIO5
1637 * state during powerup.
1638 * low = 0x1a
1639 * high = 0x1b
1640 */
1641static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
1642
1643/* Magic definition of all other variables and things */
1644I2C_CLIENT_INSMOD;
1645
1646static struct i2c_driver wm8753_i2c_driver;
1647static struct i2c_client client_template;
1648
1649static int wm8753_codec_probe(struct i2c_adapter *adap, int addr, int kind)
1650{
1651 struct snd_soc_device *socdev = wm8753_socdev;
1652 struct wm8753_setup_data *setup = socdev->codec_data;
1653 struct snd_soc_codec *codec = socdev->codec;
1654 struct i2c_client *i2c;
1655 int ret;
1656
1657 if (addr != setup->i2c_address)
1658 return -ENODEV;
1659
1660 client_template.adapter = adap;
1661 client_template.addr = addr;
1662
1663 i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL);
60fc684a 1664 if (!i2c) {
1f53aee0
LG		 1665 kfree(codec);
1666 return -ENOMEM;
1667 }
1668 i2c_set_clientdata(i2c, codec);
1669 codec->control_data = i2c;
1670
1671 ret = i2c_attach_client(i2c);
1672 if (ret < 0) {
a5c95e90 1673 pr_err("failed to attach codec at addr %x\n", addr);
1f53aee0
LG		 1674 goto err;
1675 }
1676
1677 ret = wm8753_init(socdev);
1678 if (ret < 0) {
a5c95e90 1679 pr_err("failed to initialise WM8753\n");
1f53aee0
LG		 1680 goto err;
1681 }
1682
1683 return ret;
1684
1685err:
1686 kfree(codec);
1687 kfree(i2c);
1688 return ret;
1689}
1690
1691static int wm8753_i2c_detach(struct i2c_client *client)
1692{
1693 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1694 i2c_detach_client(client);
1695 kfree(codec->reg_cache);
1696 kfree(client);
1697 return 0;
1698}
1699
1700static int wm8753_i2c_attach(struct i2c_adapter *adap)
1701{
1702 return i2c_probe(adap, &addr_data, wm8753_codec_probe);
1703}
1704
1705/* corgi i2c codec control layer */
1706static struct i2c_driver wm8753_i2c_driver = {
1707 .driver = {
1708 .name = "WM8753 I2C Codec",
1709 .owner = THIS_MODULE,
1710 },
1711 .id = I2C_DRIVERID_WM8753,
1712 .attach_adapter = wm8753_i2c_attach,
1713 .detach_client = wm8753_i2c_detach,
1714 .command = NULL,
1715};
1716
1717static struct i2c_client client_template = {
1718 .name = "WM8753",
1719 .driver = &wm8753_i2c_driver,
1720};
1721#endif
1722
1723static int wm8753_probe(struct platform_device *pdev)
1724{
1725 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1726 struct wm8753_setup_data *setup;
1727 struct snd_soc_codec *codec;
1728 struct wm8753_priv *wm8753;
1729 int ret = 0;
1730
a5c95e90 1731 pr_info("WM8753 Audio Codec %s", WM8753_VERSION);
1f53aee0
LG		 1732
1733 setup = socdev->codec_data;
1734 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
1735 if (codec == NULL)
1736 return -ENOMEM;
1737
1738 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1739 if (wm8753 == NULL) {
1740 kfree(codec);
1741 return -ENOMEM;
1742 }
1743
1744 codec->private_data = wm8753;
1745 socdev->codec = codec;
1746 mutex_init(&codec->mutex);
1747 INIT_LIST_HEAD(&codec->dapm_widgets);
1748 INIT_LIST_HEAD(&codec->dapm_paths);
1749 wm8753_socdev = socdev;
1750 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1751
60fc684a 1752#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0
LG		 1753 if (setup->i2c_address) {
1754 normal_i2c[0] = setup->i2c_address;
1755 codec->hw_write = (hw_write_t)i2c_master_send;
1756 ret = i2c_add_driver(&wm8753_i2c_driver);
1757 if (ret != 0)
1758 printk(KERN_ERR "can't add i2c driver");
1759 }
1760#else
1761 /* Add other interfaces here */
1762#endif
1763 return ret;
1764}
1765
1766/*
1767 * This function forces any delayed work to be queued and run.
1768 */
1769static int run_delayed_work(struct delayed_work *dwork)
1770{
1771 int ret;
1772
1773 /* cancel any work waiting to be queued. */
1774 ret = cancel_delayed_work(dwork);
1775
1776 /* if there was any work waiting then we run it now and
1777 * wait for it's completion */
1778 if (ret) {
1779 schedule_delayed_work(dwork, 0);
1780 flush_scheduled_work();
1781 }
1782 return ret;
1783}
1784
1785/* power down chip */
1786static int wm8753_remove(struct platform_device *pdev)
1787{
1788 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1789 struct snd_soc_codec *codec = socdev->codec;
1790
1791 if (codec->control_data)
0be9898a 1792 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1793 run_delayed_work(&codec->delayed_work);
1794 snd_soc_free_pcms(socdev);
1795 snd_soc_dapm_free(socdev);
60fc684a 1796#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0
LG		 1797 i2c_del_driver(&wm8753_i2c_driver);
1798#endif
1799 kfree(codec->private_data);
1800 kfree(codec);
1801
1802 return 0;
1803}
1804
1805struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1806 .probe = wm8753_probe,
1807 .remove = wm8753_remove,
1808 .suspend = wm8753_suspend,
1809 .resume = wm8753_resume,
1810};
1f53aee0
LG		 1811EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1812
1813MODULE_DESCRIPTION("ASoC WM8753 driver");
1814MODULE_AUTHOR("Liam Girdwood");
1815MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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