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ASoC: Remove redundant regcache_sync call in cs42l73_resume
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
70e14122 41#include <linux/of_device.h>
1f53aee0 42#include <linux/platform_device.h>
dd0c0c80 43#include <linux/spi/spi.h>
5a0e3ad6 44#include <linux/slab.h>
1f53aee0
LG		 45#include <sound/core.h>
46#include <sound/pcm.h>
47#include <sound/pcm_params.h>
48#include <sound/soc.h>
1f53aee0 49#include <sound/initval.h>
2d6a4ac9 50#include <sound/tlv.h>
1f53aee0
LG		 51#include <asm/div64.h>
52
53#include "wm8753.h"
54
1f53aee0
LG		 55static int caps_charge = 2000;
56module_param(caps_charge, int, 0);
57MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
58
338ee253
LPC		 59static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
60 unsigned int fmt);
61static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
62 unsigned int fmt);
1f53aee0 63
1f53aee0
LG		 64/*
65 * wm8753 register cache
66 * We can't read the WM8753 register space when we
67 * are using 2 wire for device control, so we cache them instead.
68 */
69static const u16 wm8753_reg[] = {
776065e3
LPC		 70 0x0000, 0x0008, 0x0000, 0x000a,
71 0x000a, 0x0033, 0x0000, 0x0007,
72 0x00ff, 0x00ff, 0x000f, 0x000f,
73 0x007b, 0x0000, 0x0032, 0x0000,
74 0x00c3, 0x00c3, 0x00c0, 0x0000,
1f53aee0
LG		 75 0x0000, 0x0000, 0x0000, 0x0000,
76 0x0000, 0x0000, 0x0000, 0x0000,
1f53aee0 77 0x0000, 0x0000, 0x0000, 0x0000,
776065e3
LPC		 78 0x0055, 0x0005, 0x0050, 0x0055,
79 0x0050, 0x0055, 0x0050, 0x0055,
80 0x0079, 0x0079, 0x0079, 0x0079,
81 0x0079, 0x0000, 0x0000, 0x0000,
82 0x0000, 0x0097, 0x0097, 0x0000,
83 0x0004, 0x0000, 0x0083, 0x0024,
84 0x01ba, 0x0000, 0x0083, 0x0024,
85 0x01ba, 0x0000, 0x0000, 0x0000
1f53aee0
LG		 86};
87
c2bac160
MB		 88/* codec private data */
89struct wm8753_priv {
f0fba2ad 90 enum snd_soc_control_type control_type;
c2bac160
MB		 91 unsigned int sysclk;
92 unsigned int pcmclk;
338ee253
LPC		 93
94 unsigned int voice_fmt;
95 unsigned int hifi_fmt;
96
f0fba2ad 97 int dai_func;
c2bac160
MB		 98};
99
776065e3 100#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
1f53aee0
LG		 101
102/*
103 * WM8753 Controls
104 */
105static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
106static const char *wm8753_base_filter[] =
107 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
108 "100Hz @ 8kHz", "200Hz @ 8kHz"};
109static const char *wm8753_treble[] = {"8kHz", "4kHz"};
110static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
111static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
112static const char *wm8753_3d_func[] = {"Capture", "Playback"};
113static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
114static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
115static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
116static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
117static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
118static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
119 "Line 1", "Line 2"};
120static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
121static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
122static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
123static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
124static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
125 "Right PGA"};
126static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
127 "Left + Right"};
128static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
129static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
130static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
131static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
132static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
133 "Analogue Mix Right", "Digital Mono Mix"};
134static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
135 "82Hz @ 8kHz", "170Hz @ 8kHz"};
136static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
137static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
138static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
139static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
140 "Channel Swap"};
ae092c9e 141static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 142
143static const struct soc_enum wm8753_enum[] = {
144SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
145SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
146SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
147SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
148SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
149SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
150SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
151SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
152SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
153SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
154SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
155SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
156SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
157SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
158SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
159SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
160SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
161SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
162SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
163SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
164SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
165SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
166SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
167SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
168SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
169SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
170SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
171SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 172SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 173};
174
175
176static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
177 struct snd_ctl_elem_value *ucontrol)
178{
179 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
338ee253 180 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0 181
338ee253 182 ucontrol->value.integer.value[0] = wm8753->dai_func;
1f53aee0
LG		 183 return 0;
184}
185
186static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_value *ucontrol)
188{
189 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
f0fba2ad 190 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
338ee253
LPC		 191 u16 ioctl;
192
2391a0e0
TJL		 193 if (wm8753->dai_func == ucontrol->value.integer.value[0])
194 return 0;
195
338ee253
LPC		 196 if (codec->active)
197 return -EBUSY;
198
199 ioctl = snd_soc_read(codec, WM8753_IOCTL);
200
201 wm8753->dai_func = ucontrol->value.integer.value[0];
202
203 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
204 return 1;
205
206 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
207 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0 208
1f53aee0 209
338ee253
LPC		 210 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
211 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
1f53aee0 212
1f53aee0
LG		 213 return 1;
214}
215
2cc8c609
MM		 216static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
217static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
218static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
219static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
220static const unsigned int out_tlv[] = {
221 TLV_DB_RANGE_HEAD(2),
222 /* 0000000 - 0101111 = "Analogue mute" */
223 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
224 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
225};
226static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
227static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
228static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 229
1f53aee0 230static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 231SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
232
233SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
234 adc_tlv),
235
236SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
237 0, 127, 0, out_tlv),
238SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
239 127, 0, out_tlv),
240
241SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
242
243SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
244 1, mix_tlv),
245SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
246 7, 1, mix_tlv),
247SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
248 1, voice_mix_tlv),
249
250SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
251 1, 0),
252SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
253 1, 0),
254
255SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
256SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
257 mix_tlv),
258SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
259 voice_mix_tlv),
1f53aee0
LG		 260SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
261
262SOC_ENUM("Bass Boost", wm8753_enum[0]),
263SOC_ENUM("Bass Filter", wm8753_enum[1]),
264SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
265
266SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
267SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
268
2cc8c609
MM		 269SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
270 rec_mix_tlv),
271SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
272 rec_mix_tlv),
1f53aee0 273
2cc8c609
MM		 274SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
275 pga_tlv),
1f53aee0
LG		 276SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
277SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
278
279SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
280SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
281SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
282
283SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
284SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
285SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
286SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
287SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
288SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
289SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
290SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
291SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
292SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
293
294SOC_ENUM("3D Function", wm8753_enum[5]),
295SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
296SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
297SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
298SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
299
300SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
301SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
302
303SOC_ENUM("De-emphasis", wm8753_enum[8]),
304SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
305SOC_ENUM("Playback Phase", wm8753_enum[10]),
306
2cc8c609
MM		 307SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
308SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 309
310SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
311
312SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 313SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 314};
315
1f53aee0
LG		 316/*
317 * _DAPM_ Controls
318 */
319
320/* Left Mixer */
321static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
322SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
323SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
324SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
325SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
326};
327
328/* Right mixer */
329static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
330SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
331SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
332SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
333SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
334};
335
336/* Mono mixer */
337static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
338SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
339SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
340SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
341SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
342SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
343};
344
345/* Mono 2 Mux */
346static const struct snd_kcontrol_new wm8753_mono2_controls =
347SOC_DAPM_ENUM("Route", wm8753_enum[17]);
348
349/* Out 3 Mux */
350static const struct snd_kcontrol_new wm8753_out3_controls =
351SOC_DAPM_ENUM("Route", wm8753_enum[18]);
352
353/* Out 4 Mux */
354static const struct snd_kcontrol_new wm8753_out4_controls =
355SOC_DAPM_ENUM("Route", wm8753_enum[19]);
356
357/* ADC Mono Mix */
358static const struct snd_kcontrol_new wm8753_adc_mono_controls =
359SOC_DAPM_ENUM("Route", wm8753_enum[22]);
360
361/* Record mixer */
362static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
363SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
364SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
365SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
366};
367
368/* Left ADC mux */
369static const struct snd_kcontrol_new wm8753_adc_left_controls =
370SOC_DAPM_ENUM("Route", wm8753_enum[21]);
371
372/* Right ADC mux */
373static const struct snd_kcontrol_new wm8753_adc_right_controls =
374SOC_DAPM_ENUM("Route", wm8753_enum[20]);
375
376/* MIC mux */
377static const struct snd_kcontrol_new wm8753_mic_mux_controls =
378SOC_DAPM_ENUM("Route", wm8753_enum[16]);
379
380/* ALC mixer */
381static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
382SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
383SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
384SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
385SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
386};
387
388/* Left Line mux */
389static const struct snd_kcontrol_new wm8753_line_left_controls =
390SOC_DAPM_ENUM("Route", wm8753_enum[14]);
391
392/* Right Line mux */
393static const struct snd_kcontrol_new wm8753_line_right_controls =
394SOC_DAPM_ENUM("Route", wm8753_enum[13]);
395
396/* Mono Line mux */
397static const struct snd_kcontrol_new wm8753_line_mono_controls =
398SOC_DAPM_ENUM("Route", wm8753_enum[12]);
399
400/* Line mux and mixer */
401static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
402SOC_DAPM_ENUM("Route", wm8753_enum[11]);
403
404/* Rx mux and mixer */
405static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
406SOC_DAPM_ENUM("Route", wm8753_enum[15]);
407
408/* Mic Selector Mux */
409static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
410SOC_DAPM_ENUM("Route", wm8753_enum[25]);
411
412static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
413SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
414SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
415 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
416SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
417SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
418SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
419SND_SOC_DAPM_OUTPUT("LOUT1"),
420SND_SOC_DAPM_OUTPUT("LOUT2"),
421SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
422 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
423SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
424SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
425SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
426SND_SOC_DAPM_OUTPUT("ROUT1"),
427SND_SOC_DAPM_OUTPUT("ROUT2"),
428SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
429 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
430SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
431SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
432SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
433SND_SOC_DAPM_OUTPUT("MONO1"),
434SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
435SND_SOC_DAPM_OUTPUT("MONO2"),
436SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
437SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
438SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
439SND_SOC_DAPM_OUTPUT("OUT3"),
440SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
441SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
442SND_SOC_DAPM_OUTPUT("OUT4"),
443SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
444 &wm8753_record_mixer_controls[0],
445 ARRAY_SIZE(wm8753_record_mixer_controls)),
446SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
447SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
448SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
449 &wm8753_adc_mono_controls),
450SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
451 &wm8753_adc_mono_controls),
452SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
453 &wm8753_adc_left_controls),
454SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
455 &wm8753_adc_right_controls),
456SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
457 &wm8753_mic_mux_controls),
458SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
459SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
460SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
461 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
462SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
463 &wm8753_line_left_controls),
464SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
465 &wm8753_line_right_controls),
466SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
467 &wm8753_line_mono_controls),
468SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
469 &wm8753_line_mux_mix_controls),
470SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
471 &wm8753_rx_mux_mix_controls),
472SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
473SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
474SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
475 &wm8753_mic_sel_mux_controls),
476SND_SOC_DAPM_INPUT("LINE1"),
477SND_SOC_DAPM_INPUT("LINE2"),
478SND_SOC_DAPM_INPUT("RXP"),
479SND_SOC_DAPM_INPUT("RXN"),
480SND_SOC_DAPM_INPUT("ACIN"),
481SND_SOC_DAPM_OUTPUT("ACOP"),
482SND_SOC_DAPM_INPUT("MIC1N"),
483SND_SOC_DAPM_INPUT("MIC1"),
484SND_SOC_DAPM_INPUT("MIC2N"),
485SND_SOC_DAPM_INPUT("MIC2"),
486SND_SOC_DAPM_VMID("VREF"),
487};
488
a65f0568 489static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 490 /* left mixer */
491 {"Left Mixer", "Left Playback Switch", "Left DAC"},
492 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
493 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
494 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
495
496 /* right mixer */
497 {"Right Mixer", "Right Playback Switch", "Right DAC"},
498 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
499 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
500 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
501
502 /* mono mixer */
503 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
504 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
505 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
506 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
507 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
508
509 /* left out */
510 {"Left Out 1", NULL, "Left Mixer"},
511 {"Left Out 2", NULL, "Left Mixer"},
512 {"LOUT1", NULL, "Left Out 1"},
513 {"LOUT2", NULL, "Left Out 2"},
514
515 /* right out */
516 {"Right Out 1", NULL, "Right Mixer"},
517 {"Right Out 2", NULL, "Right Mixer"},
518 {"ROUT1", NULL, "Right Out 1"},
519 {"ROUT2", NULL, "Right Out 2"},
520
521 /* mono 1 out */
522 {"Mono Out 1", NULL, "Mono Mixer"},
523 {"MONO1", NULL, "Mono Out 1"},
524
525 /* mono 2 out */
526 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
527 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
528 {"Mono 2 Mux", "Left", "Left Mixer"},
529 {"Mono 2 Mux", "Right", "Right Mixer"},
530 {"Mono Out 2", NULL, "Mono 2 Mux"},
531 {"MONO2", NULL, "Mono Out 2"},
532
533 /* out 3 */
534 {"Out3 Left + Right", NULL, "Left Mixer"},
535 {"Out3 Left + Right", NULL, "Right Mixer"},
536 {"Out3 Mux", "VREF", "VREF"},
537 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
538 {"Out3 Mux", "ROUT2", "ROUT2"},
539 {"Out 3", NULL, "Out3 Mux"},
540 {"OUT3", NULL, "Out 3"},
541
542 /* out 4 */
543 {"Out4 Mux", "VREF", "VREF"},
4037314a 544 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 545 {"Out4 Mux", "LOUT2", "LOUT2"},
546 {"Out 4", NULL, "Out4 Mux"},
547 {"OUT4", NULL, "Out 4"},
548
549 /* record mixer */
550 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
551 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
552 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
553
554 /* Mic/SideTone Mux */
555 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
556 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
557 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
558 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
559
560 /* Capture Left Mux */
561 {"Capture Left Mux", "PGA", "Left Capture Volume"},
562 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
563 {"Capture Left Mux", "Line", "LINE1"},
564
565 /* Capture Right Mux */
566 {"Capture Right Mux", "PGA", "Right Capture Volume"},
567 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 568 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 569
570 /* Mono Capture mixer-mux */
571 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
877ae707 572 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
1f53aee0
LG		 573 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
574 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
575 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
576 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
577 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
578 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
579 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
580 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
581
582 /* ADC */
583 {"Left ADC", NULL, "Capture Left Mixer"},
584 {"Right ADC", NULL, "Capture Right Mixer"},
585
586 /* Left Capture Volume */
587 {"Left Capture Volume", NULL, "ACIN"},
588
589 /* Right Capture Volume */
590 {"Right Capture Volume", NULL, "Mic 2 Volume"},
591
592 /* ALC Mixer */
593 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
594 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
595 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
596 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
597
598 /* Line Left Mux */
599 {"Line Left Mux", "Line 1", "LINE1"},
600 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
601
602 /* Line Right Mux */
603 {"Line Right Mux", "Line 2", "LINE2"},
604 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
605
606 /* Line Mono Mux */
607 {"Line Mono Mux", "Line Mix", "Line Mixer"},
608 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
609
610 /* Line Mixer/Mux */
611 {"Line Mixer", "Line 1 + 2", "LINE1"},
612 {"Line Mixer", "Line 1 - 2", "LINE1"},
613 {"Line Mixer", "Line 1 + 2", "LINE2"},
614 {"Line Mixer", "Line 1 - 2", "LINE2"},
615 {"Line Mixer", "Line 1", "LINE1"},
616 {"Line Mixer", "Line 2", "LINE2"},
617
618 /* Rx Mixer/Mux */
619 {"Rx Mixer", "RXP - RXN", "RXP"},
620 {"Rx Mixer", "RXP + RXN", "RXP"},
621 {"Rx Mixer", "RXP - RXN", "RXN"},
622 {"Rx Mixer", "RXP + RXN", "RXN"},
623 {"Rx Mixer", "RXP", "RXP"},
624 {"Rx Mixer", "RXN", "RXN"},
625
626 /* Mic 1 Volume */
627 {"Mic 1 Volume", NULL, "MIC1N"},
628 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
629
630 /* Mic 2 Volume */
631 {"Mic 2 Volume", NULL, "MIC2N"},
632 {"Mic 2 Volume", NULL, "MIC2"},
633
634 /* Mic Selector Mux */
635 {"Mic Selection Mux", "Mic 1", "MIC1"},
636 {"Mic Selection Mux", "Mic 2", "MIC2N"},
637 {"Mic Selection Mux", "Mic 3", "MIC2"},
638
639 /* ACOP */
640 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 641};
642
643static int wm8753_add_widgets(struct snd_soc_codec *codec)
644{
ce6120cc 645 struct snd_soc_dapm_context *dapm = &codec->dapm;
1f53aee0 646
ce6120cc
LG		 647 snd_soc_dapm_new_controls(dapm, wm8753_dapm_widgets,
648 ARRAY_SIZE(wm8753_dapm_widgets));
649 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1f53aee0 650
1f53aee0
LG		 651 return 0;
652}
653
654/* PLL divisors */
655struct _pll_div {
656 u32 div2:1;
657 u32 n:4;
658 u32 k:24;
659};
660
661/* The size in bits of the pll divide multiplied by 10
662 * to allow rounding later */
663#define FIXED_PLL_SIZE ((1 << 22) * 10)
664
665static void pll_factors(struct _pll_div *pll_div, unsigned int target,
666 unsigned int source)
667{
668 u64 Kpart;
669 unsigned int K, Ndiv, Nmod;
670
671 Ndiv = target / source;
672 if (Ndiv < 6) {
673 source >>= 1;
674 pll_div->div2 = 1;
675 Ndiv = target / source;
676 } else
677 pll_div->div2 = 0;
678
679 if ((Ndiv < 6) || (Ndiv > 12))
680 printk(KERN_WARNING
449bd54d 681 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 682
683 pll_div->n = Ndiv;
684 Nmod = target % source;
685 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
686
687 do_div(Kpart, source);
688
689 K = Kpart & 0xFFFFFFFF;
690
691 /* Check if we need to round */
692 if ((K % 10) >= 5)
693 K += 5;
694
695 /* Move down to proper range now rounding is done */
696 K /= 10;
697
698 pll_div->k = K;
699}
700
85488037
MB		 701static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
702 int source, unsigned int freq_in, unsigned int freq_out)
1f53aee0
LG		 703{
704 u16 reg, enable;
705 int offset;
706 struct snd_soc_codec *codec = codec_dai->codec;
707
708 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
709 return -ENODEV;
710
711 if (pll_id == WM8753_PLL1) {
712 offset = 0;
713 enable = 0x10;
776065e3 714 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
1f53aee0
LG		 715 } else {
716 offset = 4;
717 enable = 0x8;
776065e3 718 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
1f53aee0
LG		 719 }
720
721 if (!freq_in || !freq_out) {
722 /* disable PLL */
776065e3
LPC		 723 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
724 snd_soc_write(codec, WM8753_CLOCK, reg);
1f53aee0
LG		 725 return 0;
726 } else {
727 u16 value = 0;
728 struct _pll_div pll_div;
729
730 pll_factors(&pll_div, freq_out * 8, freq_in);
731
732 /* set up N and K PLL divisor ratios */
733 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
734 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776065e3 735 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
1f53aee0
LG		 736
737 /* bits 8:0 = PLL_K[17:9] */
738 value = (pll_div.k & 0x03fe00) >> 9;
776065e3 739 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
1f53aee0
LG		 740
741 /* bits 8:0 = PLL_K[8:0] */
742 value = pll_div.k & 0x0001ff;
776065e3 743 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
1f53aee0
LG		 744
745 /* set PLL as input and enable */
776065e3 746 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
1f53aee0 747 (pll_div.div2 << 3));
776065e3 748 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
1f53aee0
LG		 749 }
750 return 0;
751}
752
753struct _coeff_div {
754 u32 mclk;
755 u32 rate;
756 u8 sr:5;
757 u8 usb:1;
758};
759
760/* codec hifi mclk (after PLL) clock divider coefficients */
761static const struct _coeff_div coeff_div[] = {
762 /* 8k */
763 {12288000, 8000, 0x6, 0x0},
764 {11289600, 8000, 0x16, 0x0},
765 {18432000, 8000, 0x7, 0x0},
766 {16934400, 8000, 0x17, 0x0},
767 {12000000, 8000, 0x6, 0x1},
768
769 /* 11.025k */
770 {11289600, 11025, 0x18, 0x0},
771 {16934400, 11025, 0x19, 0x0},
772 {12000000, 11025, 0x19, 0x1},
773
774 /* 16k */
775 {12288000, 16000, 0xa, 0x0},
776 {18432000, 16000, 0xb, 0x0},
777 {12000000, 16000, 0xa, 0x1},
778
779 /* 22.05k */
780 {11289600, 22050, 0x1a, 0x0},
781 {16934400, 22050, 0x1b, 0x0},
782 {12000000, 22050, 0x1b, 0x1},
783
784 /* 32k */
785 {12288000, 32000, 0xc, 0x0},
786 {18432000, 32000, 0xd, 0x0},
787 {12000000, 32000, 0xa, 0x1},
788
789 /* 44.1k */
790 {11289600, 44100, 0x10, 0x0},
791 {16934400, 44100, 0x11, 0x0},
792 {12000000, 44100, 0x11, 0x1},
793
794 /* 48k */
795 {12288000, 48000, 0x0, 0x0},
796 {18432000, 48000, 0x1, 0x0},
797 {12000000, 48000, 0x0, 0x1},
798
799 /* 88.2k */
800 {11289600, 88200, 0x1e, 0x0},
801 {16934400, 88200, 0x1f, 0x0},
802 {12000000, 88200, 0x1f, 0x1},
803
804 /* 96k */
805 {12288000, 96000, 0xe, 0x0},
806 {18432000, 96000, 0xf, 0x0},
807 {12000000, 96000, 0xe, 0x1},
808};
809
810static int get_coeff(int mclk, int rate)
811{
812 int i;
813
814 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
815 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
816 return i;
817 }
818 return -EINVAL;
819}
820
821/*
822 * Clock after PLL and dividers
823 */
e550e17f 824static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 825 int clk_id, unsigned int freq, int dir)
826{
827 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 828 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 829
830 switch (freq) {
831 case 11289600:
832 case 12000000:
833 case 12288000:
834 case 16934400:
835 case 18432000:
836 if (clk_id == WM8753_MCLK) {
837 wm8753->sysclk = freq;
838 return 0;
839 } else if (clk_id == WM8753_PCMCLK) {
840 wm8753->pcmclk = freq;
841 return 0;
842 }
843 break;
844 }
845 return -EINVAL;
846}
847
848/*
849 * Set's ADC and Voice DAC format.
850 */
338ee253 851static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 852 unsigned int fmt)
853{
776065e3 854 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
1f53aee0
LG		 855
856 /* interface format */
857 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
858 case SND_SOC_DAIFMT_I2S:
859 voice |= 0x0002;
860 break;
861 case SND_SOC_DAIFMT_RIGHT_J:
862 break;
863 case SND_SOC_DAIFMT_LEFT_J:
864 voice |= 0x0001;
865 break;
866 case SND_SOC_DAIFMT_DSP_A:
867 voice |= 0x0003;
868 break;
869 case SND_SOC_DAIFMT_DSP_B:
870 voice |= 0x0013;
871 break;
872 default:
873 return -EINVAL;
874 }
875
776065e3 876 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 877 return 0;
878}
879
880/*
881 * Set PCM DAI bit size and sample rate.
882 */
883static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 884 struct snd_pcm_hw_params *params,
885 struct snd_soc_dai *dai)
1f53aee0
LG		 886{
887 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 888 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 889 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 890 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
891 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
1f53aee0
LG		 892
893 /* bit size */
894 switch (params_format(params)) {
895 case SNDRV_PCM_FORMAT_S16_LE:
896 break;
897 case SNDRV_PCM_FORMAT_S20_3LE:
898 voice |= 0x0004;
899 break;
900 case SNDRV_PCM_FORMAT_S24_LE:
901 voice |= 0x0008;
902 break;
903 case SNDRV_PCM_FORMAT_S32_LE:
904 voice |= 0x000c;
905 break;
906 }
907
908 /* sample rate */
909 if (params_rate(params) * 384 == wm8753->pcmclk)
910 srate |= 0x80;
776065e3 911 snd_soc_write(codec, WM8753_SRATE1, srate);
1f53aee0 912
776065e3 913 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 914 return 0;
915}
916
917/*
918 * Set's PCM dai fmt and BCLK.
919 */
338ee253 920static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 921 unsigned int fmt)
922{
1f53aee0
LG		 923 u16 voice, ioctl;
924
776065e3
LPC		 925 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
926 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
1f53aee0
LG		 927
928 /* set master/slave audio interface */
929 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
930 case SND_SOC_DAIFMT_CBS_CFS:
931 break;
932 case SND_SOC_DAIFMT_CBM_CFM:
933 ioctl |= 0x2;
934 case SND_SOC_DAIFMT_CBM_CFS:
935 voice |= 0x0040;
936 break;
937 default:
938 return -EINVAL;
939 }
940
941 /* clock inversion */
942 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
943 case SND_SOC_DAIFMT_DSP_A:
944 case SND_SOC_DAIFMT_DSP_B:
945 /* frame inversion not valid for DSP modes */
946 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
947 case SND_SOC_DAIFMT_NB_NF:
948 break;
949 case SND_SOC_DAIFMT_IB_NF:
950 voice |= 0x0080;
951 break;
952 default:
953 return -EINVAL;
954 }
955 break;
956 case SND_SOC_DAIFMT_I2S:
957 case SND_SOC_DAIFMT_RIGHT_J:
958 case SND_SOC_DAIFMT_LEFT_J:
959 voice &= ~0x0010;
960 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
961 case SND_SOC_DAIFMT_NB_NF:
962 break;
963 case SND_SOC_DAIFMT_IB_IF:
964 voice |= 0x0090;
965 break;
966 case SND_SOC_DAIFMT_IB_NF:
967 voice |= 0x0080;
968 break;
969 case SND_SOC_DAIFMT_NB_IF:
970 voice |= 0x0010;
971 break;
972 default:
973 return -EINVAL;
974 }
975 break;
976 default:
977 return -EINVAL;
978 }
979
776065e3
LPC		 980 snd_soc_write(codec, WM8753_PCM, voice);
981 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 982 return 0;
983}
984
e550e17f 985static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 986 int div_id, int div)
987{
988 struct snd_soc_codec *codec = codec_dai->codec;
989 u16 reg;
990
991 switch (div_id) {
992 case WM8753_PCMDIV:
776065e3
LPC		 993 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
994 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1f53aee0
LG		 995 break;
996 case WM8753_BCLKDIV:
776065e3
LPC		 997 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
998 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 999 break;
1000 case WM8753_VXCLKDIV:
776065e3
LPC		 1001 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
1002 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 1003 break;
1004 default:
1005 return -EINVAL;
1006 }
1007 return 0;
1008}
1009
1010/*
1011 * Set's HiFi DAC format.
1012 */
338ee253 1013static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1014 unsigned int fmt)
1015{
776065e3 1016 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1f53aee0
LG		 1017
1018 /* interface format */
1019 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1020 case SND_SOC_DAIFMT_I2S:
1021 hifi |= 0x0002;
1022 break;
1023 case SND_SOC_DAIFMT_RIGHT_J:
1024 break;
1025 case SND_SOC_DAIFMT_LEFT_J:
1026 hifi |= 0x0001;
1027 break;
1028 case SND_SOC_DAIFMT_DSP_A:
1029 hifi |= 0x0003;
1030 break;
1031 case SND_SOC_DAIFMT_DSP_B:
1032 hifi |= 0x0013;
1033 break;
1034 default:
1035 return -EINVAL;
1036 }
1037
776065e3 1038 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1039 return 0;
1040}
1041
1042/*
1043 * Set's I2S DAI format.
1044 */
338ee253 1045static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1046 unsigned int fmt)
1047{
1f53aee0
LG		 1048 u16 ioctl, hifi;
1049
776065e3
LPC		 1050 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1051 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1f53aee0
LG		 1052
1053 /* set master/slave audio interface */
1054 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1055 case SND_SOC_DAIFMT_CBS_CFS:
1056 break;
1057 case SND_SOC_DAIFMT_CBM_CFM:
1058 ioctl |= 0x1;
1059 case SND_SOC_DAIFMT_CBM_CFS:
1060 hifi |= 0x0040;
1061 break;
1062 default:
1063 return -EINVAL;
1064 }
1065
1066 /* clock inversion */
1067 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1068 case SND_SOC_DAIFMT_DSP_A:
1069 case SND_SOC_DAIFMT_DSP_B:
1070 /* frame inversion not valid for DSP modes */
1071 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1072 case SND_SOC_DAIFMT_NB_NF:
1073 break;
1074 case SND_SOC_DAIFMT_IB_NF:
1075 hifi |= 0x0080;
1076 break;
1077 default:
1078 return -EINVAL;
1079 }
1080 break;
1081 case SND_SOC_DAIFMT_I2S:
1082 case SND_SOC_DAIFMT_RIGHT_J:
1083 case SND_SOC_DAIFMT_LEFT_J:
1084 hifi &= ~0x0010;
1085 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1086 case SND_SOC_DAIFMT_NB_NF:
1087 break;
1088 case SND_SOC_DAIFMT_IB_IF:
1089 hifi |= 0x0090;
1090 break;
1091 case SND_SOC_DAIFMT_IB_NF:
1092 hifi |= 0x0080;
1093 break;
1094 case SND_SOC_DAIFMT_NB_IF:
1095 hifi |= 0x0010;
1096 break;
1097 default:
1098 return -EINVAL;
1099 }
1100 break;
1101 default:
1102 return -EINVAL;
1103 }
1104
776065e3
LPC		 1105 snd_soc_write(codec, WM8753_HIFI, hifi);
1106 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1107 return 0;
1108}
1109
1110/*
1111 * Set PCM DAI bit size and sample rate.
1112 */
1113static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1114 struct snd_pcm_hw_params *params,
1115 struct snd_soc_dai *dai)
1f53aee0
LG		 1116{
1117 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1118 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 1119 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 1120 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1121 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1f53aee0
LG		 1122 int coeff;
1123
1124 /* is digital filter coefficient valid ? */
1125 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1126 if (coeff < 0) {
1127 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1128 return coeff;
1129 }
776065e3 1130 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1f53aee0
LG		 1131 coeff_div[coeff].usb);
1132
1133 /* bit size */
1134 switch (params_format(params)) {
1135 case SNDRV_PCM_FORMAT_S16_LE:
1136 break;
1137 case SNDRV_PCM_FORMAT_S20_3LE:
1138 hifi |= 0x0004;
1139 break;
1140 case SNDRV_PCM_FORMAT_S24_LE:
1141 hifi |= 0x0008;
1142 break;
1143 case SNDRV_PCM_FORMAT_S32_LE:
1144 hifi |= 0x000c;
1145 break;
1146 }
1147
776065e3 1148 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1149 return 0;
1150}
1151
338ee253 1152static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1153 unsigned int fmt)
1154{
1f53aee0
LG		 1155 u16 clock;
1156
1157 /* set clk source as pcmclk */
776065e3
LPC		 1158 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1159 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1160
338ee253 1161 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1162}
1163
338ee253 1164static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1165 unsigned int fmt)
1166{
338ee253 1167 return wm8753_hdac_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1168}
1169
338ee253 1170static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1171 unsigned int fmt)
1172{
1f53aee0
LG		 1173 u16 clock;
1174
1175 /* set clk source as pcmclk */
776065e3
LPC		 1176 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1177 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1178
338ee253 1179 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1180}
1181
338ee253 1182static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1183 unsigned int fmt)
1184{
1f53aee0
LG		 1185 u16 clock;
1186
1187 /* set clk source as mclk */
776065e3
LPC		 1188 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1189 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1f53aee0 1190
338ee253 1191 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1f53aee0 1192 return -EINVAL;
338ee253 1193 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1194}
1195
338ee253
LPC		 1196static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1197 unsigned int fmt)
1198{
1199 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1200 int ret = 0;
1201
1202 switch (wm8753->dai_func) {
1203 case 0:
1204 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1205 break;
1206 case 1:
1207 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1208 break;
1209 case 2:
1210 case 3:
1211 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1212 break;
1213 default:
1214 break;
1215 }
1216 if (ret)
1217 return ret;
1218
1219 return wm8753_i2s_set_dai_fmt(codec, fmt);
1220}
1221
1222static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1223 unsigned int fmt)
1224{
1225 struct snd_soc_codec *codec = codec_dai->codec;
1226 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1227
1228 wm8753->hifi_fmt = fmt;
1229
1230 return wm8753_hifi_write_dai_fmt(codec, fmt);
1231};
1232
1233static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1234 unsigned int fmt)
1235{
1236 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1237 int ret = 0;
1238
1239 if (wm8753->dai_func != 0)
1240 return 0;
1241
1242 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1243 if (ret)
1244 return ret;
1245 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1246 if (ret)
1247 return ret;
1248
1249 return 0;
1250};
1251
1252static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1253 unsigned int fmt)
1254{
1255 struct snd_soc_codec *codec = codec_dai->codec;
1256 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1257
1258 wm8753->voice_fmt = fmt;
1259
1260 return wm8753_voice_write_dai_fmt(codec, fmt);
1261};
1262
e550e17f 1263static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1264{
1265 struct snd_soc_codec *codec = dai->codec;
776065e3 1266 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
f0fba2ad 1267 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 1268
1269 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1270 * make sure we check if they are not both active when we mute */
f0fba2ad
LG		 1271 if (mute && wm8753->dai_func == 1) {
1272 if (!codec->active)
776065e3 1273 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0
LG		 1274 } else {
1275 if (mute)
776065e3 1276 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0 1277 else
776065e3 1278 snd_soc_write(codec, WM8753_DAC, mute_reg);
1f53aee0
LG		 1279 }
1280
1281 return 0;
1282}
1283
0be9898a
MB		 1284static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1285 enum snd_soc_bias_level level)
1f53aee0 1286{
776065e3 1287 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1f53aee0 1288
0be9898a
MB		 1289 switch (level) {
1290 case SND_SOC_BIAS_ON:
1f53aee0 1291 /* set vmid to 50k and unmute dac */
776065e3 1292 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1f53aee0 1293 break;
0be9898a 1294 case SND_SOC_BIAS_PREPARE:
1f53aee0 1295 /* set vmid to 5k for quick power up */
776065e3 1296 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1f53aee0 1297 break;
0be9898a 1298 case SND_SOC_BIAS_STANDBY:
1f53aee0 1299 /* mute dac and set vmid to 500k, enable VREF */
776065e3 1300 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1f53aee0 1301 break;
0be9898a 1302 case SND_SOC_BIAS_OFF:
776065e3 1303 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1f53aee0
LG		 1304 break;
1305 }
ce6120cc 1306 codec->dapm.bias_level = level;
1f53aee0
LG		 1307 return 0;
1308}
1309
1310#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1311 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1312 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1313 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1314
1315#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1316 SNDRV_PCM_FMTBIT_S24_LE)
1317
1318/*
25985edc 1319 * The WM8753 supports up to 4 different and mutually exclusive DAI
1f53aee0
LG		 1320 * configurations. This gives 2 PCM's available for use, hifi and voice.
1321 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1322 * is connected between the wm8753 and a BT codec or GSM modem.
1323 *
1324 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1325 * 2. Voice over HIFI DAI - HIFI disabled
1326 * 3. Voice disabled - HIFI over HIFI
1327 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1328 */
338ee253 1329static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
6335d055
EM		 1330 .hw_params = wm8753_i2s_hw_params,
1331 .digital_mute = wm8753_mute,
338ee253 1332 .set_fmt = wm8753_hifi_set_dai_fmt,
6335d055
EM		 1333 .set_clkdiv = wm8753_set_dai_clkdiv,
1334 .set_pll = wm8753_set_dai_pll,
1335 .set_sysclk = wm8753_set_dai_sysclk,
1336};
1337
338ee253 1338static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
6335d055
EM		 1339 .hw_params = wm8753_pcm_hw_params,
1340 .digital_mute = wm8753_mute,
338ee253 1341 .set_fmt = wm8753_voice_set_dai_fmt,
6335d055
EM		 1342 .set_clkdiv = wm8753_set_dai_clkdiv,
1343 .set_pll = wm8753_set_dai_pll,
1344 .set_sysclk = wm8753_set_dai_sysclk,
1345};
1346
338ee253 1347static struct snd_soc_dai_driver wm8753_dai[] = {
1f53aee0 1348/* DAI HiFi mode 1 */
f0fba2ad 1349{ .name = "wm8753-hifi",
1f53aee0
LG		 1350 .playback = {
1351 .stream_name = "HiFi Playback",
1352 .channels_min = 1,
1353 .channels_max = 2,
1354 .rates = WM8753_RATES,
338ee253
LPC		 1355 .formats = WM8753_FORMATS
1356 },
1f53aee0
LG		 1357 .capture = { /* dummy for fast DAI switching */
1358 .stream_name = "Capture",
1359 .channels_min = 1,
1360 .channels_max = 2,
1361 .rates = WM8753_RATES,
338ee253
LPC		 1362 .formats = WM8753_FORMATS
1363 },
1364 .ops = &wm8753_dai_ops_hifi_mode,
1f53aee0
LG		 1365},
1366/* DAI Voice mode 1 */
f0fba2ad 1367{ .name = "wm8753-voice",
1f53aee0
LG		 1368 .playback = {
1369 .stream_name = "Voice Playback",
1370 .channels_min = 1,
1371 .channels_max = 1,
1372 .rates = WM8753_RATES,
338ee253
LPC		 1373 .formats = WM8753_FORMATS,
1374 },
1f53aee0
LG		 1375 .capture = {
1376 .stream_name = "Capture",
1377 .channels_min = 1,
1378 .channels_max = 2,
1379 .rates = WM8753_RATES,
338ee253 1380 .formats = WM8753_FORMATS,
9e70c1f0 1381 },
338ee253
LPC		 1382 .ops = &wm8753_dai_ops_voice_mode,
1383},
9e70c1f0 1384};
1f53aee0 1385
1f53aee0
LG		 1386static void wm8753_work(struct work_struct *work)
1387{
ce6120cc
LG		 1388 struct snd_soc_dapm_context *dapm =
1389 container_of(work, struct snd_soc_dapm_context,
1390 delayed_work.work);
1391 struct snd_soc_codec *codec = dapm->codec;
1392 wm8753_set_bias_level(codec, dapm->bias_level);
1f53aee0
LG		 1393}
1394
f0fba2ad 1395static int wm8753_suspend(struct snd_soc_codec *codec, pm_message_t state)
1f53aee0 1396{
0be9898a 1397 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1398 return 0;
1399}
1400
f0fba2ad 1401static int wm8753_resume(struct snd_soc_codec *codec)
1f53aee0 1402{
776065e3 1403 u16 *reg_cache = codec->reg_cache;
1f53aee0 1404 int i;
1f53aee0 1405
1f53aee0 1406 /* Sync reg_cache with the hardware */
776065e3
LPC		 1407 for (i = 1; i < ARRAY_SIZE(wm8753_reg); i++) {
1408 if (i == WM8753_RESET)
1f53aee0 1409 continue;
e611bd82
MB		 1410
1411 /* No point in writing hardware default values back */
776065e3 1412 if (reg_cache[i] == wm8753_reg[i])
e611bd82
MB		 1413 continue;
1414
776065e3 1415 snd_soc_write(codec, i, reg_cache[i]);
1f53aee0
LG		 1416 }
1417
0be9898a 1418 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1419
1420 /* charge wm8753 caps */
ce6120cc 1421 if (codec->dapm.suspend_bias_level == SND_SOC_BIAS_ON) {
0be9898a 1422 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc
LG		 1423 codec->dapm.bias_level = SND_SOC_BIAS_ON;
1424 schedule_delayed_work(&codec->dapm.delayed_work,
1f53aee0
LG		 1425 msecs_to_jiffies(caps_charge));
1426 }
1427
1428 return 0;
1429}
1430
f0fba2ad 1431static int wm8753_probe(struct snd_soc_codec *codec)
1f53aee0 1432{
f0fba2ad 1433 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1434 int ret;
1f53aee0 1435
ce6120cc 1436 INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work);
c2bac160 1437
f0fba2ad
LG		 1438 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8753->control_type);
1439 if (ret < 0) {
1440 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1441 return ret;
c2bac160
MB		 1442 }
1443
c2bac160
MB		 1444 ret = wm8753_reset(codec);
1445 if (ret < 0) {
f0fba2ad
LG		 1446 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1447 return ret;
c2bac160
MB		 1448 }
1449
f0fba2ad
LG		 1450 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1451 wm8753->dai_func = 0;
1452
c2bac160
MB		 1453 /* charge output caps */
1454 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc 1455 schedule_delayed_work(&codec->dapm.delayed_work,
c2bac160
MB		 1456 msecs_to_jiffies(caps_charge));
1457
1458 /* set the update bits */
776065e3
LPC		 1459 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1460 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
21d17dd2
AL		 1461 snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100);
1462 snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100);
776065e3
LPC		 1463 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1464 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1465 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1466 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1467 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1468 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
c2bac160 1469
f0fba2ad
LG		 1470 snd_soc_add_controls(codec, wm8753_snd_controls,
1471 ARRAY_SIZE(wm8753_snd_controls));
1472 wm8753_add_widgets(codec);
c2bac160
MB		 1473
1474 return 0;
c2bac160
MB		 1475}
1476
f0fba2ad
LG		 1477/* power down chip */
1478static int wm8753_remove(struct snd_soc_codec *codec)
c2bac160 1479{
fdea0571 1480 flush_delayed_work_sync(&codec->dapm.delayed_work);
f0fba2ad
LG		 1481 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1482
1483 return 0;
c2bac160
MB		 1484}
1485
f0fba2ad
LG		 1486static struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
1487 .probe = wm8753_probe,
1488 .remove = wm8753_remove,
1489 .suspend = wm8753_suspend,
1490 .resume = wm8753_resume,
1491 .set_bias_level = wm8753_set_bias_level,
e5eec34c 1492 .reg_cache_size = ARRAY_SIZE(wm8753_reg),
f0fba2ad
LG		 1493 .reg_word_size = sizeof(u16),
1494 .reg_cache_default = wm8753_reg,
1495};
69e169da 1496
70e14122
MB		 1497static const struct of_device_id wm8753_of_match[] = {
1498 { .compatible = "wlf,wm8753", },
1499 { }
1500};
1501MODULE_DEVICE_TABLE(of, wm8753_of_match);
1502
f0fba2ad
LG		 1503#if defined(CONFIG_SPI_MASTER)
1504static int __devinit wm8753_spi_probe(struct spi_device *spi)
69e169da 1505{
c2bac160 1506 struct wm8753_priv *wm8753;
f0fba2ad 1507 int ret;
69e169da 1508
c2bac160
MB		 1509 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1510 if (wm8753 == NULL)
1511 return -ENOMEM;
69e169da 1512
f0fba2ad
LG		 1513 wm8753->control_type = SND_SOC_SPI;
1514 spi_set_drvdata(spi, wm8753);
c2bac160 1515
f0fba2ad
LG		 1516 ret = snd_soc_register_codec(&spi->dev,
1517 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1518 if (ret < 0)
1519 kfree(wm8753);
1520 return ret;
69e169da
MB		 1521}
1522
f0fba2ad 1523static int __devexit wm8753_spi_remove(struct spi_device *spi)
69e169da 1524{
f0fba2ad
LG		 1525 snd_soc_unregister_codec(&spi->dev);
1526 kfree(spi_get_drvdata(spi));
1527 return 0;
69e169da
MB		 1528}
1529
f0fba2ad 1530static struct spi_driver wm8753_spi_driver = {
69e169da 1531 .driver = {
63010634 1532 .name = "wm8753",
f0fba2ad 1533 .owner = THIS_MODULE,
70e14122 1534 .of_match_table = wm8753_of_match,
69e169da 1535 },
f0fba2ad
LG		 1536 .probe = wm8753_spi_probe,
1537 .remove = __devexit_p(wm8753_spi_remove),
69e169da 1538};
f0fba2ad 1539#endif /* CONFIG_SPI_MASTER */
69e169da 1540
f0fba2ad
LG		 1541#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1542static __devinit int wm8753_i2c_probe(struct i2c_client *i2c,
1543 const struct i2c_device_id *id)
69e169da 1544{
c2bac160 1545 struct wm8753_priv *wm8753;
f0fba2ad 1546 int ret;
c2bac160
MB		 1547
1548 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1549 if (wm8753 == NULL)
1550 return -ENOMEM;
69e169da 1551
f0fba2ad 1552 i2c_set_clientdata(i2c, wm8753);
f0fba2ad 1553 wm8753->control_type = SND_SOC_I2C;
69e169da 1554
f0fba2ad
LG		 1555 ret = snd_soc_register_codec(&i2c->dev,
1556 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1557 if (ret < 0)
1558 kfree(wm8753);
1559 return ret;
69e169da
MB		 1560}
1561
f0fba2ad 1562static __devexit int wm8753_i2c_remove(struct i2c_client *client)
69e169da 1563{
f0fba2ad
LG		 1564 snd_soc_unregister_codec(&client->dev);
1565 kfree(i2c_get_clientdata(client));
69e169da
MB		 1566 return 0;
1567}
1568
f0fba2ad
LG		 1569static const struct i2c_device_id wm8753_i2c_id[] = {
1570 { "wm8753", 0 },
1571 { }
1572};
1573MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1574
1575static struct i2c_driver wm8753_i2c_driver = {
69e169da 1576 .driver = {
63010634 1577 .name = "wm8753",
f0fba2ad 1578 .owner = THIS_MODULE,
70e14122 1579 .of_match_table = wm8753_of_match,
69e169da 1580 },
f0fba2ad
LG		 1581 .probe = wm8753_i2c_probe,
1582 .remove = __devexit_p(wm8753_i2c_remove),
1583 .id_table = wm8753_i2c_id,
69e169da
MB		 1584};
1585#endif
1586
c9b3a40f 1587static int __init wm8753_modinit(void)
64089b84 1588{
f0fba2ad 1589 int ret = 0;
c2bac160
MB		 1590#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1591 ret = i2c_add_driver(&wm8753_i2c_driver);
f0fba2ad
LG		 1592 if (ret != 0) {
1593 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1594 ret);
1595 }
c2bac160
MB		 1596#endif
1597#if defined(CONFIG_SPI_MASTER)
1598 ret = spi_register_driver(&wm8753_spi_driver);
f0fba2ad
LG		 1599 if (ret != 0) {
1600 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1601 ret);
1602 }
c2bac160 1603#endif
f0fba2ad 1604 return ret;
64089b84
MB		 1605}
1606module_init(wm8753_modinit);
1607
1608static void __exit wm8753_exit(void)
1609{
c2bac160
MB		 1610#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1611 i2c_del_driver(&wm8753_i2c_driver);
1612#endif
1613#if defined(CONFIG_SPI_MASTER)
1614 spi_unregister_driver(&wm8753_spi_driver);
1615#endif
64089b84
MB		 1616}
1617module_exit(wm8753_exit);
1618
1f53aee0
LG		 1619MODULE_DESCRIPTION("ASoC WM8753 driver");
1620MODULE_AUTHOR("Liam Girdwood");
1621MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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