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1f53aee0 LG |
1 | /* |
2 | * wm8753.c -- WM8753 ALSA Soc Audio driver | |
3 | * | |
656baaeb | 4 | * Copyright 2003-11 Wolfson Microelectronics PLC. |
d331124d | 5 | * Author: Liam Girdwood <lrg@slimlogic.co.uk> |
1f53aee0 LG |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; either version 2 of the License, or (at your | |
10 | * option) any later version. | |
11 | * | |
12 | * Notes: | |
13 | * The WM8753 is a low power, high quality stereo codec with integrated PCM | |
14 | * codec designed for portable digital telephony applications. | |
15 | * | |
16 | * Dual DAI:- | |
17 | * | |
18 | * This driver support 2 DAI PCM's. This makes the default PCM available for | |
19 | * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for | |
20 | * voice. | |
21 | * | |
22 | * Please note that the voice PCM can be connected directly to a Bluetooth | |
23 | * codec or GSM modem and thus cannot be read or written to, although it is | |
24 | * available to be configured with snd_hw_params(), etc and kcontrols in the | |
25 | * normal alsa manner. | |
26 | * | |
27 | * Fast DAI switching:- | |
28 | * | |
29 | * The driver can now fast switch between the DAI configurations via a | |
30 | * an alsa kcontrol. This allows the PCM to remain open. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/moduleparam.h> | |
1f53aee0 LG |
36 | #include <linux/kernel.h> |
37 | #include <linux/init.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/pm.h> | |
40 | #include <linux/i2c.h> | |
70e14122 | 41 | #include <linux/of_device.h> |
d3398ff0 | 42 | #include <linux/regmap.h> |
dd0c0c80 | 43 | #include <linux/spi/spi.h> |
5a0e3ad6 | 44 | #include <linux/slab.h> |
1f53aee0 LG |
45 | #include <sound/core.h> |
46 | #include <sound/pcm.h> | |
47 | #include <sound/pcm_params.h> | |
48 | #include <sound/soc.h> | |
1f53aee0 | 49 | #include <sound/initval.h> |
2d6a4ac9 | 50 | #include <sound/tlv.h> |
1f53aee0 LG |
51 | #include <asm/div64.h> |
52 | ||
53 | #include "wm8753.h" | |
54 | ||
1f53aee0 LG |
55 | static int caps_charge = 2000; |
56 | module_param(caps_charge, int, 0); | |
57 | MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)"); | |
58 | ||
338ee253 LPC |
59 | static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec, |
60 | unsigned int fmt); | |
61 | static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec, | |
62 | unsigned int fmt); | |
1f53aee0 | 63 | |
1f53aee0 LG |
64 | /* |
65 | * wm8753 register cache | |
66 | * We can't read the WM8753 register space when we | |
67 | * are using 2 wire for device control, so we cache them instead. | |
68 | */ | |
d3398ff0 MB |
69 | static const struct reg_default wm8753_reg_defaults[] = { |
70 | { 0x00, 0x0000 }, | |
71 | { 0x01, 0x0008 }, | |
72 | { 0x02, 0x0000 }, | |
73 | { 0x03, 0x000a }, | |
74 | { 0x04, 0x000a }, | |
75 | { 0x05, 0x0033 }, | |
76 | { 0x06, 0x0000 }, | |
77 | { 0x07, 0x0007 }, | |
78 | { 0x08, 0x00ff }, | |
79 | { 0x09, 0x00ff }, | |
80 | { 0x0a, 0x000f }, | |
81 | { 0x0b, 0x000f }, | |
82 | { 0x0c, 0x007b }, | |
83 | { 0x0d, 0x0000 }, | |
84 | { 0x0e, 0x0032 }, | |
85 | { 0x0f, 0x0000 }, | |
86 | { 0x10, 0x00c3 }, | |
87 | { 0x11, 0x00c3 }, | |
88 | { 0x12, 0x00c0 }, | |
89 | { 0x13, 0x0000 }, | |
90 | { 0x14, 0x0000 }, | |
91 | { 0x15, 0x0000 }, | |
92 | { 0x16, 0x0000 }, | |
93 | { 0x17, 0x0000 }, | |
94 | { 0x18, 0x0000 }, | |
95 | { 0x19, 0x0000 }, | |
96 | { 0x1a, 0x0000 }, | |
97 | { 0x1b, 0x0000 }, | |
98 | { 0x1c, 0x0000 }, | |
99 | { 0x1d, 0x0000 }, | |
100 | { 0x1e, 0x0000 }, | |
101 | { 0x1f, 0x0000 }, | |
102 | { 0x20, 0x0055 }, | |
103 | { 0x21, 0x0005 }, | |
104 | { 0x22, 0x0050 }, | |
105 | { 0x23, 0x0055 }, | |
106 | { 0x24, 0x0050 }, | |
107 | { 0x25, 0x0055 }, | |
108 | { 0x26, 0x0050 }, | |
109 | { 0x27, 0x0055 }, | |
110 | { 0x28, 0x0079 }, | |
111 | { 0x29, 0x0079 }, | |
112 | { 0x2a, 0x0079 }, | |
113 | { 0x2b, 0x0079 }, | |
114 | { 0x2c, 0x0079 }, | |
115 | { 0x2d, 0x0000 }, | |
116 | { 0x2e, 0x0000 }, | |
117 | { 0x2f, 0x0000 }, | |
118 | { 0x30, 0x0000 }, | |
119 | { 0x31, 0x0097 }, | |
120 | { 0x32, 0x0097 }, | |
121 | { 0x33, 0x0000 }, | |
122 | { 0x34, 0x0004 }, | |
123 | { 0x35, 0x0000 }, | |
124 | { 0x36, 0x0083 }, | |
125 | { 0x37, 0x0024 }, | |
126 | { 0x38, 0x01ba }, | |
127 | { 0x39, 0x0000 }, | |
128 | { 0x3a, 0x0083 }, | |
129 | { 0x3b, 0x0024 }, | |
130 | { 0x3c, 0x01ba }, | |
131 | { 0x3d, 0x0000 }, | |
132 | { 0x3e, 0x0000 }, | |
133 | { 0x3f, 0x0000 }, | |
1f53aee0 LG |
134 | }; |
135 | ||
d3398ff0 MB |
136 | static bool wm8753_volatile(struct device *dev, unsigned int reg) |
137 | { | |
138 | return reg == WM8753_RESET; | |
139 | } | |
140 | ||
141 | static bool wm8753_writeable(struct device *dev, unsigned int reg) | |
142 | { | |
143 | return reg <= WM8753_ADCTL2; | |
144 | } | |
145 | ||
c2bac160 MB |
146 | /* codec private data */ |
147 | struct wm8753_priv { | |
d3398ff0 | 148 | struct regmap *regmap; |
c2bac160 MB |
149 | unsigned int sysclk; |
150 | unsigned int pcmclk; | |
338ee253 LPC |
151 | |
152 | unsigned int voice_fmt; | |
153 | unsigned int hifi_fmt; | |
154 | ||
f0fba2ad | 155 | int dai_func; |
c2bac160 MB |
156 | }; |
157 | ||
776065e3 | 158 | #define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0) |
1f53aee0 LG |
159 | |
160 | /* | |
161 | * WM8753 Controls | |
162 | */ | |
163 | static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"}; | |
164 | static const char *wm8753_base_filter[] = | |
165 | {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz", | |
166 | "100Hz @ 8kHz", "200Hz @ 8kHz"}; | |
167 | static const char *wm8753_treble[] = {"8kHz", "4kHz"}; | |
168 | static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"}; | |
169 | static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"}; | |
170 | static const char *wm8753_3d_func[] = {"Capture", "Playback"}; | |
171 | static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"}; | |
172 | static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"}; | |
173 | static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"}; | |
174 | static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"}; | |
175 | static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"}; | |
176 | static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2", | |
177 | "Line 1", "Line 2"}; | |
178 | static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"}; | |
179 | static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"}; | |
180 | static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"}; | |
181 | static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"}; | |
182 | static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2", | |
183 | "Right PGA"}; | |
184 | static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right", | |
185 | "Left + Right"}; | |
186 | static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"}; | |
187 | static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"}; | |
188 | static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"}; | |
189 | static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"}; | |
190 | static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left", | |
191 | "Analogue Mix Right", "Digital Mono Mix"}; | |
192 | static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k", | |
193 | "82Hz @ 8kHz", "170Hz @ 8kHz"}; | |
194 | static const char *wm8753_adc_filter[] = {"HiFi", "Voice"}; | |
195 | static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"}; | |
196 | static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"}; | |
197 | static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC", | |
198 | "Channel Swap"}; | |
ae092c9e | 199 | static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"}; |
1f53aee0 LG |
200 | |
201 | static const struct soc_enum wm8753_enum[] = { | |
202 | SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base), | |
203 | SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter), | |
204 | SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble), | |
205 | SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func), | |
206 | SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type), | |
207 | SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func), | |
208 | SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc), | |
209 | SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc), | |
210 | SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp), | |
211 | SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix), | |
212 | SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase), | |
213 | SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix), | |
214 | SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux), | |
215 | SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux), | |
216 | SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux), | |
217 | SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel), | |
218 | SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux), | |
219 | SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src), | |
220 | SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3), | |
221 | SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4), | |
222 | SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel), | |
223 | SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel), | |
224 | SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc), | |
225 | SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp), | |
226 | SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter), | |
227 | SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel), | |
228 | SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode), | |
229 | SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel), | |
ae092c9e | 230 | SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase), |
1f53aee0 LG |
231 | }; |
232 | ||
233 | ||
234 | static int wm8753_get_dai(struct snd_kcontrol *kcontrol, | |
235 | struct snd_ctl_elem_value *ucontrol) | |
236 | { | |
237 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
338ee253 | 238 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
1f53aee0 | 239 | |
338ee253 | 240 | ucontrol->value.integer.value[0] = wm8753->dai_func; |
1f53aee0 LG |
241 | return 0; |
242 | } | |
243 | ||
244 | static int wm8753_set_dai(struct snd_kcontrol *kcontrol, | |
245 | struct snd_ctl_elem_value *ucontrol) | |
246 | { | |
247 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
f0fba2ad | 248 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
338ee253 LPC |
249 | u16 ioctl; |
250 | ||
2391a0e0 TJL |
251 | if (wm8753->dai_func == ucontrol->value.integer.value[0]) |
252 | return 0; | |
253 | ||
338ee253 LPC |
254 | if (codec->active) |
255 | return -EBUSY; | |
256 | ||
257 | ioctl = snd_soc_read(codec, WM8753_IOCTL); | |
258 | ||
259 | wm8753->dai_func = ucontrol->value.integer.value[0]; | |
260 | ||
261 | if (((ioctl >> 2) & 0x3) == wm8753->dai_func) | |
262 | return 1; | |
263 | ||
264 | ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2); | |
265 | snd_soc_write(codec, WM8753_IOCTL, ioctl); | |
1f53aee0 | 266 | |
1f53aee0 | 267 | |
338ee253 LPC |
268 | wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt); |
269 | wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt); | |
1f53aee0 | 270 | |
1f53aee0 LG |
271 | return 1; |
272 | } | |
273 | ||
2cc8c609 MM |
274 | static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0); |
275 | static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0); | |
276 | static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); | |
277 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); | |
278 | static const unsigned int out_tlv[] = { | |
279 | TLV_DB_RANGE_HEAD(2), | |
280 | /* 0000000 - 0101111 = "Analogue mute" */ | |
281 | 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0), | |
282 | 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0), | |
283 | }; | |
284 | static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0); | |
285 | static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0); | |
286 | static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0); | |
2d6a4ac9 | 287 | |
1f53aee0 | 288 | static const struct snd_kcontrol_new wm8753_snd_controls[] = { |
2cc8c609 MM |
289 | SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv), |
290 | ||
291 | SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0, | |
292 | adc_tlv), | |
293 | ||
294 | SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V, | |
295 | 0, 127, 0, out_tlv), | |
296 | SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0, | |
297 | 127, 0, out_tlv), | |
298 | ||
299 | SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv), | |
300 | ||
301 | SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7, | |
302 | 1, mix_tlv), | |
303 | SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4, | |
304 | 7, 1, mix_tlv), | |
305 | SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7, | |
306 | 1, voice_mix_tlv), | |
307 | ||
308 | SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7, | |
309 | 1, 0), | |
310 | SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7, | |
311 | 1, 0), | |
312 | ||
313 | SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv), | |
314 | SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1, | |
315 | mix_tlv), | |
316 | SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1, | |
317 | voice_mix_tlv), | |
1f53aee0 LG |
318 | SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0), |
319 | ||
320 | SOC_ENUM("Bass Boost", wm8753_enum[0]), | |
321 | SOC_ENUM("Bass Filter", wm8753_enum[1]), | |
322 | SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1), | |
323 | ||
324 | SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1), | |
325 | SOC_ENUM("Treble Cut-off", wm8753_enum[2]), | |
326 | ||
2cc8c609 MM |
327 | SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1, |
328 | rec_mix_tlv), | |
329 | SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1, | |
330 | rec_mix_tlv), | |
1f53aee0 | 331 | |
2cc8c609 MM |
332 | SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0, |
333 | pga_tlv), | |
1f53aee0 LG |
334 | SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0), |
335 | SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1), | |
336 | ||
337 | SOC_ENUM("Capture Filter Select", wm8753_enum[23]), | |
338 | SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]), | |
339 | SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1), | |
340 | ||
341 | SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0), | |
342 | SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0), | |
343 | SOC_ENUM("ALC Capture Function", wm8753_enum[3]), | |
344 | SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0), | |
345 | SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1), | |
346 | SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1), | |
347 | SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0), | |
348 | SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0), | |
349 | SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]), | |
350 | SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0), | |
351 | ||
352 | SOC_ENUM("3D Function", wm8753_enum[5]), | |
353 | SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]), | |
354 | SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]), | |
355 | SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0), | |
356 | SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0), | |
357 | ||
358 | SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0), | |
359 | SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0), | |
360 | ||
361 | SOC_ENUM("De-emphasis", wm8753_enum[8]), | |
362 | SOC_ENUM("Playback Mono Mix", wm8753_enum[9]), | |
363 | SOC_ENUM("Playback Phase", wm8753_enum[10]), | |
364 | ||
2cc8c609 MM |
365 | SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv), |
366 | SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv), | |
1f53aee0 LG |
367 | |
368 | SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai), | |
369 | ||
370 | SOC_ENUM("ADC Data Select", wm8753_enum[27]), | |
ae092c9e | 371 | SOC_ENUM("ROUT2 Phase", wm8753_enum[28]), |
1f53aee0 LG |
372 | }; |
373 | ||
1f53aee0 LG |
374 | /* |
375 | * _DAPM_ Controls | |
376 | */ | |
377 | ||
378 | /* Left Mixer */ | |
379 | static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = { | |
380 | SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0), | |
381 | SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0), | |
382 | SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0), | |
383 | SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0), | |
384 | }; | |
385 | ||
386 | /* Right mixer */ | |
387 | static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = { | |
388 | SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0), | |
389 | SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0), | |
390 | SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0), | |
391 | SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0), | |
392 | }; | |
393 | ||
394 | /* Mono mixer */ | |
395 | static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = { | |
396 | SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0), | |
397 | SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0), | |
398 | SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0), | |
399 | SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0), | |
400 | SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0), | |
401 | }; | |
402 | ||
403 | /* Mono 2 Mux */ | |
404 | static const struct snd_kcontrol_new wm8753_mono2_controls = | |
405 | SOC_DAPM_ENUM("Route", wm8753_enum[17]); | |
406 | ||
407 | /* Out 3 Mux */ | |
408 | static const struct snd_kcontrol_new wm8753_out3_controls = | |
409 | SOC_DAPM_ENUM("Route", wm8753_enum[18]); | |
410 | ||
411 | /* Out 4 Mux */ | |
412 | static const struct snd_kcontrol_new wm8753_out4_controls = | |
413 | SOC_DAPM_ENUM("Route", wm8753_enum[19]); | |
414 | ||
415 | /* ADC Mono Mix */ | |
416 | static const struct snd_kcontrol_new wm8753_adc_mono_controls = | |
417 | SOC_DAPM_ENUM("Route", wm8753_enum[22]); | |
418 | ||
419 | /* Record mixer */ | |
420 | static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = { | |
421 | SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0), | |
422 | SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0), | |
423 | SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0), | |
424 | }; | |
425 | ||
426 | /* Left ADC mux */ | |
427 | static const struct snd_kcontrol_new wm8753_adc_left_controls = | |
428 | SOC_DAPM_ENUM("Route", wm8753_enum[21]); | |
429 | ||
430 | /* Right ADC mux */ | |
431 | static const struct snd_kcontrol_new wm8753_adc_right_controls = | |
432 | SOC_DAPM_ENUM("Route", wm8753_enum[20]); | |
433 | ||
434 | /* MIC mux */ | |
435 | static const struct snd_kcontrol_new wm8753_mic_mux_controls = | |
436 | SOC_DAPM_ENUM("Route", wm8753_enum[16]); | |
437 | ||
438 | /* ALC mixer */ | |
439 | static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = { | |
440 | SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0), | |
441 | SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0), | |
442 | SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0), | |
443 | SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0), | |
444 | }; | |
445 | ||
446 | /* Left Line mux */ | |
447 | static const struct snd_kcontrol_new wm8753_line_left_controls = | |
448 | SOC_DAPM_ENUM("Route", wm8753_enum[14]); | |
449 | ||
450 | /* Right Line mux */ | |
451 | static const struct snd_kcontrol_new wm8753_line_right_controls = | |
452 | SOC_DAPM_ENUM("Route", wm8753_enum[13]); | |
453 | ||
454 | /* Mono Line mux */ | |
455 | static const struct snd_kcontrol_new wm8753_line_mono_controls = | |
456 | SOC_DAPM_ENUM("Route", wm8753_enum[12]); | |
457 | ||
458 | /* Line mux and mixer */ | |
459 | static const struct snd_kcontrol_new wm8753_line_mux_mix_controls = | |
460 | SOC_DAPM_ENUM("Route", wm8753_enum[11]); | |
461 | ||
462 | /* Rx mux and mixer */ | |
463 | static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls = | |
464 | SOC_DAPM_ENUM("Route", wm8753_enum[15]); | |
465 | ||
466 | /* Mic Selector Mux */ | |
467 | static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls = | |
468 | SOC_DAPM_ENUM("Route", wm8753_enum[25]); | |
469 | ||
470 | static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = { | |
471 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0), | |
472 | SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0, | |
473 | &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)), | |
474 | SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0), | |
475 | SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0), | |
476 | SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0), | |
477 | SND_SOC_DAPM_OUTPUT("LOUT1"), | |
478 | SND_SOC_DAPM_OUTPUT("LOUT2"), | |
479 | SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0, | |
480 | &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)), | |
481 | SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0), | |
482 | SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0), | |
483 | SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0), | |
484 | SND_SOC_DAPM_OUTPUT("ROUT1"), | |
485 | SND_SOC_DAPM_OUTPUT("ROUT2"), | |
486 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0, | |
487 | &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)), | |
488 | SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0), | |
489 | SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0), | |
490 | SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0), | |
491 | SND_SOC_DAPM_OUTPUT("MONO1"), | |
492 | SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls), | |
493 | SND_SOC_DAPM_OUTPUT("MONO2"), | |
494 | SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0), | |
495 | SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls), | |
496 | SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0), | |
497 | SND_SOC_DAPM_OUTPUT("OUT3"), | |
498 | SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls), | |
499 | SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0), | |
500 | SND_SOC_DAPM_OUTPUT("OUT4"), | |
501 | SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0, | |
502 | &wm8753_record_mixer_controls[0], | |
503 | ARRAY_SIZE(wm8753_record_mixer_controls)), | |
504 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0), | |
505 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0), | |
506 | SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0, | |
507 | &wm8753_adc_mono_controls), | |
508 | SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0, | |
509 | &wm8753_adc_mono_controls), | |
510 | SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0, | |
511 | &wm8753_adc_left_controls), | |
512 | SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0, | |
513 | &wm8753_adc_right_controls), | |
514 | SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0, | |
515 | &wm8753_mic_mux_controls), | |
516 | SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0), | |
517 | SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0), | |
518 | SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0, | |
519 | &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)), | |
520 | SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0, | |
521 | &wm8753_line_left_controls), | |
522 | SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0, | |
523 | &wm8753_line_right_controls), | |
524 | SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0, | |
525 | &wm8753_line_mono_controls), | |
526 | SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0, | |
527 | &wm8753_line_mux_mix_controls), | |
528 | SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0, | |
529 | &wm8753_rx_mux_mix_controls), | |
530 | SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0), | |
531 | SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0), | |
532 | SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0, | |
533 | &wm8753_mic_sel_mux_controls), | |
534 | SND_SOC_DAPM_INPUT("LINE1"), | |
535 | SND_SOC_DAPM_INPUT("LINE2"), | |
536 | SND_SOC_DAPM_INPUT("RXP"), | |
537 | SND_SOC_DAPM_INPUT("RXN"), | |
538 | SND_SOC_DAPM_INPUT("ACIN"), | |
539 | SND_SOC_DAPM_OUTPUT("ACOP"), | |
540 | SND_SOC_DAPM_INPUT("MIC1N"), | |
541 | SND_SOC_DAPM_INPUT("MIC1"), | |
542 | SND_SOC_DAPM_INPUT("MIC2N"), | |
543 | SND_SOC_DAPM_INPUT("MIC2"), | |
544 | SND_SOC_DAPM_VMID("VREF"), | |
545 | }; | |
546 | ||
56a926dd | 547 | static const struct snd_soc_dapm_route wm8753_dapm_routes[] = { |
1f53aee0 LG |
548 | /* left mixer */ |
549 | {"Left Mixer", "Left Playback Switch", "Left DAC"}, | |
550 | {"Left Mixer", "Voice Playback Switch", "Voice DAC"}, | |
551 | {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, | |
552 | {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"}, | |
553 | ||
554 | /* right mixer */ | |
555 | {"Right Mixer", "Right Playback Switch", "Right DAC"}, | |
556 | {"Right Mixer", "Voice Playback Switch", "Voice DAC"}, | |
557 | {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, | |
558 | {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"}, | |
559 | ||
560 | /* mono mixer */ | |
561 | {"Mono Mixer", "Voice Playback Switch", "Voice DAC"}, | |
562 | {"Mono Mixer", "Left Playback Switch", "Left DAC"}, | |
563 | {"Mono Mixer", "Right Playback Switch", "Right DAC"}, | |
564 | {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, | |
565 | {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"}, | |
566 | ||
567 | /* left out */ | |
568 | {"Left Out 1", NULL, "Left Mixer"}, | |
569 | {"Left Out 2", NULL, "Left Mixer"}, | |
570 | {"LOUT1", NULL, "Left Out 1"}, | |
571 | {"LOUT2", NULL, "Left Out 2"}, | |
572 | ||
573 | /* right out */ | |
574 | {"Right Out 1", NULL, "Right Mixer"}, | |
575 | {"Right Out 2", NULL, "Right Mixer"}, | |
576 | {"ROUT1", NULL, "Right Out 1"}, | |
577 | {"ROUT2", NULL, "Right Out 2"}, | |
578 | ||
579 | /* mono 1 out */ | |
580 | {"Mono Out 1", NULL, "Mono Mixer"}, | |
581 | {"MONO1", NULL, "Mono Out 1"}, | |
582 | ||
583 | /* mono 2 out */ | |
584 | {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"}, | |
585 | {"Mono 2 Mux", "Inverted Mono 1", "MONO1"}, | |
586 | {"Mono 2 Mux", "Left", "Left Mixer"}, | |
587 | {"Mono 2 Mux", "Right", "Right Mixer"}, | |
588 | {"Mono Out 2", NULL, "Mono 2 Mux"}, | |
589 | {"MONO2", NULL, "Mono Out 2"}, | |
590 | ||
591 | /* out 3 */ | |
592 | {"Out3 Left + Right", NULL, "Left Mixer"}, | |
593 | {"Out3 Left + Right", NULL, "Right Mixer"}, | |
594 | {"Out3 Mux", "VREF", "VREF"}, | |
595 | {"Out3 Mux", "Left + Right", "Out3 Left + Right"}, | |
596 | {"Out3 Mux", "ROUT2", "ROUT2"}, | |
597 | {"Out 3", NULL, "Out3 Mux"}, | |
598 | {"OUT3", NULL, "Out 3"}, | |
599 | ||
600 | /* out 4 */ | |
601 | {"Out4 Mux", "VREF", "VREF"}, | |
4037314a | 602 | {"Out4 Mux", "Capture ST", "Playback Mixer"}, |
1f53aee0 LG |
603 | {"Out4 Mux", "LOUT2", "LOUT2"}, |
604 | {"Out 4", NULL, "Out4 Mux"}, | |
605 | {"OUT4", NULL, "Out 4"}, | |
606 | ||
607 | /* record mixer */ | |
608 | {"Playback Mixer", "Left Capture Switch", "Left Mixer"}, | |
609 | {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"}, | |
610 | {"Playback Mixer", "Right Capture Switch", "Right Mixer"}, | |
611 | ||
612 | /* Mic/SideTone Mux */ | |
613 | {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"}, | |
614 | {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"}, | |
615 | {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"}, | |
616 | {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"}, | |
617 | ||
618 | /* Capture Left Mux */ | |
619 | {"Capture Left Mux", "PGA", "Left Capture Volume"}, | |
620 | {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"}, | |
621 | {"Capture Left Mux", "Line", "LINE1"}, | |
622 | ||
623 | /* Capture Right Mux */ | |
624 | {"Capture Right Mux", "PGA", "Right Capture Volume"}, | |
625 | {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"}, | |
4037314a | 626 | {"Capture Right Mux", "Sidetone", "Playback Mixer"}, |
1f53aee0 LG |
627 | |
628 | /* Mono Capture mixer-mux */ | |
629 | {"Capture Right Mixer", "Stereo", "Capture Right Mux"}, | |
877ae707 | 630 | {"Capture Left Mixer", "Stereo", "Capture Left Mux"}, |
1f53aee0 LG |
631 | {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"}, |
632 | {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"}, | |
633 | {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"}, | |
634 | {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"}, | |
635 | {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"}, | |
636 | {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"}, | |
637 | {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"}, | |
638 | {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"}, | |
639 | ||
640 | /* ADC */ | |
641 | {"Left ADC", NULL, "Capture Left Mixer"}, | |
642 | {"Right ADC", NULL, "Capture Right Mixer"}, | |
643 | ||
644 | /* Left Capture Volume */ | |
645 | {"Left Capture Volume", NULL, "ACIN"}, | |
646 | ||
647 | /* Right Capture Volume */ | |
648 | {"Right Capture Volume", NULL, "Mic 2 Volume"}, | |
649 | ||
650 | /* ALC Mixer */ | |
651 | {"ALC Mixer", "Line Capture Switch", "Line Mixer"}, | |
652 | {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"}, | |
653 | {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"}, | |
654 | {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"}, | |
655 | ||
656 | /* Line Left Mux */ | |
657 | {"Line Left Mux", "Line 1", "LINE1"}, | |
658 | {"Line Left Mux", "Rx Mix", "Rx Mixer"}, | |
659 | ||
660 | /* Line Right Mux */ | |
661 | {"Line Right Mux", "Line 2", "LINE2"}, | |
662 | {"Line Right Mux", "Rx Mix", "Rx Mixer"}, | |
663 | ||
664 | /* Line Mono Mux */ | |
665 | {"Line Mono Mux", "Line Mix", "Line Mixer"}, | |
666 | {"Line Mono Mux", "Rx Mix", "Rx Mixer"}, | |
667 | ||
668 | /* Line Mixer/Mux */ | |
669 | {"Line Mixer", "Line 1 + 2", "LINE1"}, | |
670 | {"Line Mixer", "Line 1 - 2", "LINE1"}, | |
671 | {"Line Mixer", "Line 1 + 2", "LINE2"}, | |
672 | {"Line Mixer", "Line 1 - 2", "LINE2"}, | |
673 | {"Line Mixer", "Line 1", "LINE1"}, | |
674 | {"Line Mixer", "Line 2", "LINE2"}, | |
675 | ||
676 | /* Rx Mixer/Mux */ | |
677 | {"Rx Mixer", "RXP - RXN", "RXP"}, | |
678 | {"Rx Mixer", "RXP + RXN", "RXP"}, | |
679 | {"Rx Mixer", "RXP - RXN", "RXN"}, | |
680 | {"Rx Mixer", "RXP + RXN", "RXN"}, | |
681 | {"Rx Mixer", "RXP", "RXP"}, | |
682 | {"Rx Mixer", "RXN", "RXN"}, | |
683 | ||
684 | /* Mic 1 Volume */ | |
685 | {"Mic 1 Volume", NULL, "MIC1N"}, | |
686 | {"Mic 1 Volume", NULL, "Mic Selection Mux"}, | |
687 | ||
688 | /* Mic 2 Volume */ | |
689 | {"Mic 2 Volume", NULL, "MIC2N"}, | |
690 | {"Mic 2 Volume", NULL, "MIC2"}, | |
691 | ||
692 | /* Mic Selector Mux */ | |
693 | {"Mic Selection Mux", "Mic 1", "MIC1"}, | |
694 | {"Mic Selection Mux", "Mic 2", "MIC2N"}, | |
695 | {"Mic Selection Mux", "Mic 3", "MIC2"}, | |
696 | ||
697 | /* ACOP */ | |
698 | {"ACOP", NULL, "ALC Mixer"}, | |
1f53aee0 LG |
699 | }; |
700 | ||
1f53aee0 LG |
701 | /* PLL divisors */ |
702 | struct _pll_div { | |
703 | u32 div2:1; | |
704 | u32 n:4; | |
705 | u32 k:24; | |
706 | }; | |
707 | ||
708 | /* The size in bits of the pll divide multiplied by 10 | |
709 | * to allow rounding later */ | |
710 | #define FIXED_PLL_SIZE ((1 << 22) * 10) | |
711 | ||
712 | static void pll_factors(struct _pll_div *pll_div, unsigned int target, | |
713 | unsigned int source) | |
714 | { | |
715 | u64 Kpart; | |
716 | unsigned int K, Ndiv, Nmod; | |
717 | ||
718 | Ndiv = target / source; | |
719 | if (Ndiv < 6) { | |
720 | source >>= 1; | |
721 | pll_div->div2 = 1; | |
722 | Ndiv = target / source; | |
723 | } else | |
724 | pll_div->div2 = 0; | |
725 | ||
726 | if ((Ndiv < 6) || (Ndiv > 12)) | |
727 | printk(KERN_WARNING | |
449bd54d | 728 | "wm8753: unsupported N = %u\n", Ndiv); |
1f53aee0 LG |
729 | |
730 | pll_div->n = Ndiv; | |
731 | Nmod = target % source; | |
732 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; | |
733 | ||
734 | do_div(Kpart, source); | |
735 | ||
736 | K = Kpart & 0xFFFFFFFF; | |
737 | ||
738 | /* Check if we need to round */ | |
739 | if ((K % 10) >= 5) | |
740 | K += 5; | |
741 | ||
742 | /* Move down to proper range now rounding is done */ | |
743 | K /= 10; | |
744 | ||
745 | pll_div->k = K; | |
746 | } | |
747 | ||
85488037 MB |
748 | static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
749 | int source, unsigned int freq_in, unsigned int freq_out) | |
1f53aee0 LG |
750 | { |
751 | u16 reg, enable; | |
752 | int offset; | |
753 | struct snd_soc_codec *codec = codec_dai->codec; | |
754 | ||
755 | if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2) | |
756 | return -ENODEV; | |
757 | ||
758 | if (pll_id == WM8753_PLL1) { | |
759 | offset = 0; | |
760 | enable = 0x10; | |
776065e3 | 761 | reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef; |
1f53aee0 LG |
762 | } else { |
763 | offset = 4; | |
764 | enable = 0x8; | |
776065e3 | 765 | reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7; |
1f53aee0 LG |
766 | } |
767 | ||
768 | if (!freq_in || !freq_out) { | |
769 | /* disable PLL */ | |
776065e3 LPC |
770 | snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026); |
771 | snd_soc_write(codec, WM8753_CLOCK, reg); | |
1f53aee0 LG |
772 | return 0; |
773 | } else { | |
774 | u16 value = 0; | |
775 | struct _pll_div pll_div; | |
776 | ||
777 | pll_factors(&pll_div, freq_out * 8, freq_in); | |
778 | ||
779 | /* set up N and K PLL divisor ratios */ | |
780 | /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ | |
781 | value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18); | |
776065e3 | 782 | snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value); |
1f53aee0 LG |
783 | |
784 | /* bits 8:0 = PLL_K[17:9] */ | |
785 | value = (pll_div.k & 0x03fe00) >> 9; | |
776065e3 | 786 | snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value); |
1f53aee0 LG |
787 | |
788 | /* bits 8:0 = PLL_K[8:0] */ | |
789 | value = pll_div.k & 0x0001ff; | |
776065e3 | 790 | snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value); |
1f53aee0 LG |
791 | |
792 | /* set PLL as input and enable */ | |
776065e3 | 793 | snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 | |
1f53aee0 | 794 | (pll_div.div2 << 3)); |
776065e3 | 795 | snd_soc_write(codec, WM8753_CLOCK, reg | enable); |
1f53aee0 LG |
796 | } |
797 | return 0; | |
798 | } | |
799 | ||
800 | struct _coeff_div { | |
801 | u32 mclk; | |
802 | u32 rate; | |
803 | u8 sr:5; | |
804 | u8 usb:1; | |
805 | }; | |
806 | ||
807 | /* codec hifi mclk (after PLL) clock divider coefficients */ | |
808 | static const struct _coeff_div coeff_div[] = { | |
809 | /* 8k */ | |
810 | {12288000, 8000, 0x6, 0x0}, | |
811 | {11289600, 8000, 0x16, 0x0}, | |
812 | {18432000, 8000, 0x7, 0x0}, | |
813 | {16934400, 8000, 0x17, 0x0}, | |
814 | {12000000, 8000, 0x6, 0x1}, | |
815 | ||
816 | /* 11.025k */ | |
817 | {11289600, 11025, 0x18, 0x0}, | |
818 | {16934400, 11025, 0x19, 0x0}, | |
819 | {12000000, 11025, 0x19, 0x1}, | |
820 | ||
821 | /* 16k */ | |
822 | {12288000, 16000, 0xa, 0x0}, | |
823 | {18432000, 16000, 0xb, 0x0}, | |
824 | {12000000, 16000, 0xa, 0x1}, | |
825 | ||
826 | /* 22.05k */ | |
827 | {11289600, 22050, 0x1a, 0x0}, | |
828 | {16934400, 22050, 0x1b, 0x0}, | |
829 | {12000000, 22050, 0x1b, 0x1}, | |
830 | ||
831 | /* 32k */ | |
832 | {12288000, 32000, 0xc, 0x0}, | |
833 | {18432000, 32000, 0xd, 0x0}, | |
834 | {12000000, 32000, 0xa, 0x1}, | |
835 | ||
836 | /* 44.1k */ | |
837 | {11289600, 44100, 0x10, 0x0}, | |
838 | {16934400, 44100, 0x11, 0x0}, | |
839 | {12000000, 44100, 0x11, 0x1}, | |
840 | ||
841 | /* 48k */ | |
842 | {12288000, 48000, 0x0, 0x0}, | |
843 | {18432000, 48000, 0x1, 0x0}, | |
844 | {12000000, 48000, 0x0, 0x1}, | |
845 | ||
846 | /* 88.2k */ | |
847 | {11289600, 88200, 0x1e, 0x0}, | |
848 | {16934400, 88200, 0x1f, 0x0}, | |
849 | {12000000, 88200, 0x1f, 0x1}, | |
850 | ||
851 | /* 96k */ | |
852 | {12288000, 96000, 0xe, 0x0}, | |
853 | {18432000, 96000, 0xf, 0x0}, | |
854 | {12000000, 96000, 0xe, 0x1}, | |
855 | }; | |
856 | ||
857 | static int get_coeff(int mclk, int rate) | |
858 | { | |
859 | int i; | |
860 | ||
861 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
862 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
863 | return i; | |
864 | } | |
865 | return -EINVAL; | |
866 | } | |
867 | ||
868 | /* | |
869 | * Clock after PLL and dividers | |
870 | */ | |
e550e17f | 871 | static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
1f53aee0 LG |
872 | int clk_id, unsigned int freq, int dir) |
873 | { | |
874 | struct snd_soc_codec *codec = codec_dai->codec; | |
b2c812e2 | 875 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
1f53aee0 LG |
876 | |
877 | switch (freq) { | |
878 | case 11289600: | |
879 | case 12000000: | |
880 | case 12288000: | |
881 | case 16934400: | |
882 | case 18432000: | |
883 | if (clk_id == WM8753_MCLK) { | |
884 | wm8753->sysclk = freq; | |
885 | return 0; | |
886 | } else if (clk_id == WM8753_PCMCLK) { | |
887 | wm8753->pcmclk = freq; | |
888 | return 0; | |
889 | } | |
890 | break; | |
891 | } | |
892 | return -EINVAL; | |
893 | } | |
894 | ||
895 | /* | |
896 | * Set's ADC and Voice DAC format. | |
897 | */ | |
338ee253 | 898 | static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
899 | unsigned int fmt) |
900 | { | |
776065e3 | 901 | u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec; |
1f53aee0 LG |
902 | |
903 | /* interface format */ | |
904 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
905 | case SND_SOC_DAIFMT_I2S: | |
906 | voice |= 0x0002; | |
907 | break; | |
908 | case SND_SOC_DAIFMT_RIGHT_J: | |
909 | break; | |
910 | case SND_SOC_DAIFMT_LEFT_J: | |
911 | voice |= 0x0001; | |
912 | break; | |
913 | case SND_SOC_DAIFMT_DSP_A: | |
914 | voice |= 0x0003; | |
915 | break; | |
916 | case SND_SOC_DAIFMT_DSP_B: | |
917 | voice |= 0x0013; | |
918 | break; | |
919 | default: | |
920 | return -EINVAL; | |
921 | } | |
922 | ||
776065e3 | 923 | snd_soc_write(codec, WM8753_PCM, voice); |
1f53aee0 LG |
924 | return 0; |
925 | } | |
926 | ||
927 | /* | |
928 | * Set PCM DAI bit size and sample rate. | |
929 | */ | |
930 | static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
931 | struct snd_pcm_hw_params *params, |
932 | struct snd_soc_dai *dai) | |
1f53aee0 | 933 | { |
e6968a17 | 934 | struct snd_soc_codec *codec = dai->codec; |
b2c812e2 | 935 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
776065e3 LPC |
936 | u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3; |
937 | u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f; | |
1f53aee0 LG |
938 | |
939 | /* bit size */ | |
940 | switch (params_format(params)) { | |
941 | case SNDRV_PCM_FORMAT_S16_LE: | |
942 | break; | |
943 | case SNDRV_PCM_FORMAT_S20_3LE: | |
944 | voice |= 0x0004; | |
945 | break; | |
946 | case SNDRV_PCM_FORMAT_S24_LE: | |
947 | voice |= 0x0008; | |
948 | break; | |
949 | case SNDRV_PCM_FORMAT_S32_LE: | |
950 | voice |= 0x000c; | |
951 | break; | |
952 | } | |
953 | ||
954 | /* sample rate */ | |
955 | if (params_rate(params) * 384 == wm8753->pcmclk) | |
956 | srate |= 0x80; | |
776065e3 | 957 | snd_soc_write(codec, WM8753_SRATE1, srate); |
1f53aee0 | 958 | |
776065e3 | 959 | snd_soc_write(codec, WM8753_PCM, voice); |
1f53aee0 LG |
960 | return 0; |
961 | } | |
962 | ||
963 | /* | |
964 | * Set's PCM dai fmt and BCLK. | |
965 | */ | |
338ee253 | 966 | static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
967 | unsigned int fmt) |
968 | { | |
1f53aee0 LG |
969 | u16 voice, ioctl; |
970 | ||
776065e3 LPC |
971 | voice = snd_soc_read(codec, WM8753_PCM) & 0x011f; |
972 | ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d; | |
1f53aee0 LG |
973 | |
974 | /* set master/slave audio interface */ | |
975 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
976 | case SND_SOC_DAIFMT_CBS_CFS: | |
977 | break; | |
978 | case SND_SOC_DAIFMT_CBM_CFM: | |
979 | ioctl |= 0x2; | |
980 | case SND_SOC_DAIFMT_CBM_CFS: | |
981 | voice |= 0x0040; | |
982 | break; | |
983 | default: | |
984 | return -EINVAL; | |
985 | } | |
986 | ||
987 | /* clock inversion */ | |
988 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
989 | case SND_SOC_DAIFMT_DSP_A: | |
990 | case SND_SOC_DAIFMT_DSP_B: | |
991 | /* frame inversion not valid for DSP modes */ | |
992 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
993 | case SND_SOC_DAIFMT_NB_NF: | |
994 | break; | |
995 | case SND_SOC_DAIFMT_IB_NF: | |
996 | voice |= 0x0080; | |
997 | break; | |
998 | default: | |
999 | return -EINVAL; | |
1000 | } | |
1001 | break; | |
1002 | case SND_SOC_DAIFMT_I2S: | |
1003 | case SND_SOC_DAIFMT_RIGHT_J: | |
1004 | case SND_SOC_DAIFMT_LEFT_J: | |
1005 | voice &= ~0x0010; | |
1006 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
1007 | case SND_SOC_DAIFMT_NB_NF: | |
1008 | break; | |
1009 | case SND_SOC_DAIFMT_IB_IF: | |
1010 | voice |= 0x0090; | |
1011 | break; | |
1012 | case SND_SOC_DAIFMT_IB_NF: | |
1013 | voice |= 0x0080; | |
1014 | break; | |
1015 | case SND_SOC_DAIFMT_NB_IF: | |
1016 | voice |= 0x0010; | |
1017 | break; | |
1018 | default: | |
1019 | return -EINVAL; | |
1020 | } | |
1021 | break; | |
1022 | default: | |
1023 | return -EINVAL; | |
1024 | } | |
1025 | ||
776065e3 LPC |
1026 | snd_soc_write(codec, WM8753_PCM, voice); |
1027 | snd_soc_write(codec, WM8753_IOCTL, ioctl); | |
1f53aee0 LG |
1028 | return 0; |
1029 | } | |
1030 | ||
e550e17f | 1031 | static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai, |
1f53aee0 LG |
1032 | int div_id, int div) |
1033 | { | |
1034 | struct snd_soc_codec *codec = codec_dai->codec; | |
1035 | u16 reg; | |
1036 | ||
1037 | switch (div_id) { | |
1038 | case WM8753_PCMDIV: | |
776065e3 LPC |
1039 | reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f; |
1040 | snd_soc_write(codec, WM8753_CLOCK, reg | div); | |
1f53aee0 LG |
1041 | break; |
1042 | case WM8753_BCLKDIV: | |
776065e3 LPC |
1043 | reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7; |
1044 | snd_soc_write(codec, WM8753_SRATE2, reg | div); | |
1f53aee0 LG |
1045 | break; |
1046 | case WM8753_VXCLKDIV: | |
776065e3 LPC |
1047 | reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f; |
1048 | snd_soc_write(codec, WM8753_SRATE2, reg | div); | |
1f53aee0 LG |
1049 | break; |
1050 | default: | |
1051 | return -EINVAL; | |
1052 | } | |
1053 | return 0; | |
1054 | } | |
1055 | ||
1056 | /* | |
1057 | * Set's HiFi DAC format. | |
1058 | */ | |
338ee253 | 1059 | static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
1060 | unsigned int fmt) |
1061 | { | |
776065e3 | 1062 | u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0; |
1f53aee0 LG |
1063 | |
1064 | /* interface format */ | |
1065 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
1066 | case SND_SOC_DAIFMT_I2S: | |
1067 | hifi |= 0x0002; | |
1068 | break; | |
1069 | case SND_SOC_DAIFMT_RIGHT_J: | |
1070 | break; | |
1071 | case SND_SOC_DAIFMT_LEFT_J: | |
1072 | hifi |= 0x0001; | |
1073 | break; | |
1074 | case SND_SOC_DAIFMT_DSP_A: | |
1075 | hifi |= 0x0003; | |
1076 | break; | |
1077 | case SND_SOC_DAIFMT_DSP_B: | |
1078 | hifi |= 0x0013; | |
1079 | break; | |
1080 | default: | |
1081 | return -EINVAL; | |
1082 | } | |
1083 | ||
776065e3 | 1084 | snd_soc_write(codec, WM8753_HIFI, hifi); |
1f53aee0 LG |
1085 | return 0; |
1086 | } | |
1087 | ||
1088 | /* | |
1089 | * Set's I2S DAI format. | |
1090 | */ | |
338ee253 | 1091 | static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
1092 | unsigned int fmt) |
1093 | { | |
1f53aee0 LG |
1094 | u16 ioctl, hifi; |
1095 | ||
776065e3 LPC |
1096 | hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f; |
1097 | ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae; | |
1f53aee0 LG |
1098 | |
1099 | /* set master/slave audio interface */ | |
1100 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
1101 | case SND_SOC_DAIFMT_CBS_CFS: | |
1102 | break; | |
1103 | case SND_SOC_DAIFMT_CBM_CFM: | |
1104 | ioctl |= 0x1; | |
1105 | case SND_SOC_DAIFMT_CBM_CFS: | |
1106 | hifi |= 0x0040; | |
1107 | break; | |
1108 | default: | |
1109 | return -EINVAL; | |
1110 | } | |
1111 | ||
1112 | /* clock inversion */ | |
1113 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
1114 | case SND_SOC_DAIFMT_DSP_A: | |
1115 | case SND_SOC_DAIFMT_DSP_B: | |
1116 | /* frame inversion not valid for DSP modes */ | |
1117 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
1118 | case SND_SOC_DAIFMT_NB_NF: | |
1119 | break; | |
1120 | case SND_SOC_DAIFMT_IB_NF: | |
1121 | hifi |= 0x0080; | |
1122 | break; | |
1123 | default: | |
1124 | return -EINVAL; | |
1125 | } | |
1126 | break; | |
1127 | case SND_SOC_DAIFMT_I2S: | |
1128 | case SND_SOC_DAIFMT_RIGHT_J: | |
1129 | case SND_SOC_DAIFMT_LEFT_J: | |
1130 | hifi &= ~0x0010; | |
1131 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
1132 | case SND_SOC_DAIFMT_NB_NF: | |
1133 | break; | |
1134 | case SND_SOC_DAIFMT_IB_IF: | |
1135 | hifi |= 0x0090; | |
1136 | break; | |
1137 | case SND_SOC_DAIFMT_IB_NF: | |
1138 | hifi |= 0x0080; | |
1139 | break; | |
1140 | case SND_SOC_DAIFMT_NB_IF: | |
1141 | hifi |= 0x0010; | |
1142 | break; | |
1143 | default: | |
1144 | return -EINVAL; | |
1145 | } | |
1146 | break; | |
1147 | default: | |
1148 | return -EINVAL; | |
1149 | } | |
1150 | ||
776065e3 LPC |
1151 | snd_soc_write(codec, WM8753_HIFI, hifi); |
1152 | snd_soc_write(codec, WM8753_IOCTL, ioctl); | |
1f53aee0 LG |
1153 | return 0; |
1154 | } | |
1155 | ||
1156 | /* | |
1157 | * Set PCM DAI bit size and sample rate. | |
1158 | */ | |
1159 | static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
1160 | struct snd_pcm_hw_params *params, |
1161 | struct snd_soc_dai *dai) | |
1f53aee0 | 1162 | { |
e6968a17 | 1163 | struct snd_soc_codec *codec = dai->codec; |
b2c812e2 | 1164 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
776065e3 LPC |
1165 | u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0; |
1166 | u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3; | |
1f53aee0 LG |
1167 | int coeff; |
1168 | ||
1169 | /* is digital filter coefficient valid ? */ | |
1170 | coeff = get_coeff(wm8753->sysclk, params_rate(params)); | |
1171 | if (coeff < 0) { | |
1172 | printk(KERN_ERR "wm8753 invalid MCLK or rate\n"); | |
1173 | return coeff; | |
1174 | } | |
776065e3 | 1175 | snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) | |
1f53aee0 LG |
1176 | coeff_div[coeff].usb); |
1177 | ||
1178 | /* bit size */ | |
1179 | switch (params_format(params)) { | |
1180 | case SNDRV_PCM_FORMAT_S16_LE: | |
1181 | break; | |
1182 | case SNDRV_PCM_FORMAT_S20_3LE: | |
1183 | hifi |= 0x0004; | |
1184 | break; | |
1185 | case SNDRV_PCM_FORMAT_S24_LE: | |
1186 | hifi |= 0x0008; | |
1187 | break; | |
1188 | case SNDRV_PCM_FORMAT_S32_LE: | |
1189 | hifi |= 0x000c; | |
1190 | break; | |
1191 | } | |
1192 | ||
776065e3 | 1193 | snd_soc_write(codec, WM8753_HIFI, hifi); |
1f53aee0 LG |
1194 | return 0; |
1195 | } | |
1196 | ||
338ee253 | 1197 | static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
1198 | unsigned int fmt) |
1199 | { | |
1f53aee0 LG |
1200 | u16 clock; |
1201 | ||
1202 | /* set clk source as pcmclk */ | |
776065e3 LPC |
1203 | clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb; |
1204 | snd_soc_write(codec, WM8753_CLOCK, clock); | |
1f53aee0 | 1205 | |
338ee253 | 1206 | return wm8753_vdac_adc_set_dai_fmt(codec, fmt); |
1f53aee0 LG |
1207 | } |
1208 | ||
338ee253 | 1209 | static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
1210 | unsigned int fmt) |
1211 | { | |
338ee253 | 1212 | return wm8753_hdac_set_dai_fmt(codec, fmt); |
1f53aee0 LG |
1213 | } |
1214 | ||
338ee253 | 1215 | static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
1216 | unsigned int fmt) |
1217 | { | |
1f53aee0 LG |
1218 | u16 clock; |
1219 | ||
1220 | /* set clk source as pcmclk */ | |
776065e3 LPC |
1221 | clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb; |
1222 | snd_soc_write(codec, WM8753_CLOCK, clock); | |
1f53aee0 | 1223 | |
338ee253 | 1224 | return wm8753_vdac_adc_set_dai_fmt(codec, fmt); |
1f53aee0 LG |
1225 | } |
1226 | ||
338ee253 | 1227 | static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec, |
1f53aee0 LG |
1228 | unsigned int fmt) |
1229 | { | |
1f53aee0 LG |
1230 | u16 clock; |
1231 | ||
1232 | /* set clk source as mclk */ | |
776065e3 LPC |
1233 | clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb; |
1234 | snd_soc_write(codec, WM8753_CLOCK, clock | 0x4); | |
1f53aee0 | 1235 | |
338ee253 | 1236 | if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0) |
1f53aee0 | 1237 | return -EINVAL; |
338ee253 | 1238 | return wm8753_vdac_adc_set_dai_fmt(codec, fmt); |
1f53aee0 LG |
1239 | } |
1240 | ||
338ee253 LPC |
1241 | static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec, |
1242 | unsigned int fmt) | |
1243 | { | |
1244 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); | |
1245 | int ret = 0; | |
1246 | ||
1247 | switch (wm8753->dai_func) { | |
1248 | case 0: | |
1249 | ret = wm8753_mode1h_set_dai_fmt(codec, fmt); | |
1250 | break; | |
1251 | case 1: | |
1252 | ret = wm8753_mode2_set_dai_fmt(codec, fmt); | |
1253 | break; | |
1254 | case 2: | |
1255 | case 3: | |
1256 | ret = wm8753_mode3_4_set_dai_fmt(codec, fmt); | |
1257 | break; | |
1258 | default: | |
1259 | break; | |
1260 | } | |
1261 | if (ret) | |
1262 | return ret; | |
1263 | ||
1264 | return wm8753_i2s_set_dai_fmt(codec, fmt); | |
1265 | } | |
1266 | ||
1267 | static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
1268 | unsigned int fmt) | |
1269 | { | |
1270 | struct snd_soc_codec *codec = codec_dai->codec; | |
1271 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); | |
1272 | ||
1273 | wm8753->hifi_fmt = fmt; | |
1274 | ||
1275 | return wm8753_hifi_write_dai_fmt(codec, fmt); | |
1276 | }; | |
1277 | ||
1278 | static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec, | |
1279 | unsigned int fmt) | |
1280 | { | |
1281 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); | |
1282 | int ret = 0; | |
1283 | ||
1284 | if (wm8753->dai_func != 0) | |
1285 | return 0; | |
1286 | ||
1287 | ret = wm8753_mode1v_set_dai_fmt(codec, fmt); | |
1288 | if (ret) | |
1289 | return ret; | |
1290 | ret = wm8753_pcm_set_dai_fmt(codec, fmt); | |
1291 | if (ret) | |
1292 | return ret; | |
1293 | ||
1294 | return 0; | |
1295 | }; | |
1296 | ||
1297 | static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
1298 | unsigned int fmt) | |
1299 | { | |
1300 | struct snd_soc_codec *codec = codec_dai->codec; | |
1301 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); | |
1302 | ||
1303 | wm8753->voice_fmt = fmt; | |
1304 | ||
1305 | return wm8753_voice_write_dai_fmt(codec, fmt); | |
1306 | }; | |
1307 | ||
e550e17f | 1308 | static int wm8753_mute(struct snd_soc_dai *dai, int mute) |
1f53aee0 LG |
1309 | { |
1310 | struct snd_soc_codec *codec = dai->codec; | |
776065e3 | 1311 | u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7; |
f0fba2ad | 1312 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
1f53aee0 LG |
1313 | |
1314 | /* the digital mute covers the HiFi and Voice DAC's on the WM8753. | |
1315 | * make sure we check if they are not both active when we mute */ | |
f0fba2ad LG |
1316 | if (mute && wm8753->dai_func == 1) { |
1317 | if (!codec->active) | |
776065e3 | 1318 | snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8); |
1f53aee0 LG |
1319 | } else { |
1320 | if (mute) | |
776065e3 | 1321 | snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8); |
1f53aee0 | 1322 | else |
776065e3 | 1323 | snd_soc_write(codec, WM8753_DAC, mute_reg); |
1f53aee0 LG |
1324 | } |
1325 | ||
1326 | return 0; | |
1327 | } | |
1328 | ||
0be9898a MB |
1329 | static int wm8753_set_bias_level(struct snd_soc_codec *codec, |
1330 | enum snd_soc_bias_level level) | |
1f53aee0 | 1331 | { |
776065e3 | 1332 | u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e; |
1f53aee0 | 1333 | |
0be9898a MB |
1334 | switch (level) { |
1335 | case SND_SOC_BIAS_ON: | |
1f53aee0 | 1336 | /* set vmid to 50k and unmute dac */ |
776065e3 | 1337 | snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0); |
1f53aee0 | 1338 | break; |
0be9898a | 1339 | case SND_SOC_BIAS_PREPARE: |
1f53aee0 | 1340 | /* set vmid to 5k for quick power up */ |
776065e3 | 1341 | snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1); |
1f53aee0 | 1342 | break; |
0be9898a | 1343 | case SND_SOC_BIAS_STANDBY: |
1f53aee0 | 1344 | /* mute dac and set vmid to 500k, enable VREF */ |
776065e3 | 1345 | snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141); |
1f53aee0 | 1346 | break; |
0be9898a | 1347 | case SND_SOC_BIAS_OFF: |
776065e3 | 1348 | snd_soc_write(codec, WM8753_PWR1, 0x0001); |
1f53aee0 LG |
1349 | break; |
1350 | } | |
ce6120cc | 1351 | codec->dapm.bias_level = level; |
1f53aee0 LG |
1352 | return 0; |
1353 | } | |
1354 | ||
1355 | #define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ | |
60fc684a MB |
1356 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ |
1357 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ | |
1358 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
1f53aee0 LG |
1359 | |
1360 | #define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
1361 | SNDRV_PCM_FMTBIT_S24_LE) | |
1362 | ||
1363 | /* | |
25985edc | 1364 | * The WM8753 supports up to 4 different and mutually exclusive DAI |
1f53aee0 LG |
1365 | * configurations. This gives 2 PCM's available for use, hifi and voice. |
1366 | * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI | |
1367 | * is connected between the wm8753 and a BT codec or GSM modem. | |
1368 | * | |
1369 | * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI | |
1370 | * 2. Voice over HIFI DAI - HIFI disabled | |
1371 | * 3. Voice disabled - HIFI over HIFI | |
1372 | * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture | |
1373 | */ | |
85e7652d | 1374 | static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = { |
6335d055 EM |
1375 | .hw_params = wm8753_i2s_hw_params, |
1376 | .digital_mute = wm8753_mute, | |
338ee253 | 1377 | .set_fmt = wm8753_hifi_set_dai_fmt, |
6335d055 EM |
1378 | .set_clkdiv = wm8753_set_dai_clkdiv, |
1379 | .set_pll = wm8753_set_dai_pll, | |
1380 | .set_sysclk = wm8753_set_dai_sysclk, | |
1381 | }; | |
1382 | ||
85e7652d | 1383 | static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = { |
6335d055 EM |
1384 | .hw_params = wm8753_pcm_hw_params, |
1385 | .digital_mute = wm8753_mute, | |
338ee253 | 1386 | .set_fmt = wm8753_voice_set_dai_fmt, |
6335d055 EM |
1387 | .set_clkdiv = wm8753_set_dai_clkdiv, |
1388 | .set_pll = wm8753_set_dai_pll, | |
1389 | .set_sysclk = wm8753_set_dai_sysclk, | |
1390 | }; | |
1391 | ||
338ee253 | 1392 | static struct snd_soc_dai_driver wm8753_dai[] = { |
1f53aee0 | 1393 | /* DAI HiFi mode 1 */ |
f0fba2ad | 1394 | { .name = "wm8753-hifi", |
1f53aee0 LG |
1395 | .playback = { |
1396 | .stream_name = "HiFi Playback", | |
1397 | .channels_min = 1, | |
1398 | .channels_max = 2, | |
1399 | .rates = WM8753_RATES, | |
338ee253 LPC |
1400 | .formats = WM8753_FORMATS |
1401 | }, | |
1f53aee0 LG |
1402 | .capture = { /* dummy for fast DAI switching */ |
1403 | .stream_name = "Capture", | |
1404 | .channels_min = 1, | |
1405 | .channels_max = 2, | |
1406 | .rates = WM8753_RATES, | |
338ee253 LPC |
1407 | .formats = WM8753_FORMATS |
1408 | }, | |
1409 | .ops = &wm8753_dai_ops_hifi_mode, | |
1f53aee0 LG |
1410 | }, |
1411 | /* DAI Voice mode 1 */ | |
f0fba2ad | 1412 | { .name = "wm8753-voice", |
1f53aee0 LG |
1413 | .playback = { |
1414 | .stream_name = "Voice Playback", | |
1415 | .channels_min = 1, | |
1416 | .channels_max = 1, | |
1417 | .rates = WM8753_RATES, | |
338ee253 LPC |
1418 | .formats = WM8753_FORMATS, |
1419 | }, | |
1f53aee0 LG |
1420 | .capture = { |
1421 | .stream_name = "Capture", | |
1422 | .channels_min = 1, | |
1423 | .channels_max = 2, | |
1424 | .rates = WM8753_RATES, | |
338ee253 | 1425 | .formats = WM8753_FORMATS, |
9e70c1f0 | 1426 | }, |
338ee253 LPC |
1427 | .ops = &wm8753_dai_ops_voice_mode, |
1428 | }, | |
9e70c1f0 | 1429 | }; |
1f53aee0 | 1430 | |
1f53aee0 LG |
1431 | static void wm8753_work(struct work_struct *work) |
1432 | { | |
ce6120cc LG |
1433 | struct snd_soc_dapm_context *dapm = |
1434 | container_of(work, struct snd_soc_dapm_context, | |
1435 | delayed_work.work); | |
1436 | struct snd_soc_codec *codec = dapm->codec; | |
1437 | wm8753_set_bias_level(codec, dapm->bias_level); | |
1f53aee0 LG |
1438 | } |
1439 | ||
84b315ee | 1440 | static int wm8753_suspend(struct snd_soc_codec *codec) |
1f53aee0 | 1441 | { |
0be9898a | 1442 | wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF); |
d3398ff0 | 1443 | codec->cache_sync = 1; |
1f53aee0 LG |
1444 | return 0; |
1445 | } | |
1446 | ||
f0fba2ad | 1447 | static int wm8753_resume(struct snd_soc_codec *codec) |
1f53aee0 | 1448 | { |
d3398ff0 | 1449 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
e611bd82 | 1450 | |
d3398ff0 | 1451 | regcache_sync(wm8753->regmap); |
1f53aee0 | 1452 | |
0be9898a | 1453 | wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1f53aee0 LG |
1454 | |
1455 | /* charge wm8753 caps */ | |
ce6120cc | 1456 | if (codec->dapm.suspend_bias_level == SND_SOC_BIAS_ON) { |
0be9898a | 1457 | wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE); |
ce6120cc LG |
1458 | codec->dapm.bias_level = SND_SOC_BIAS_ON; |
1459 | schedule_delayed_work(&codec->dapm.delayed_work, | |
1f53aee0 LG |
1460 | msecs_to_jiffies(caps_charge)); |
1461 | } | |
1462 | ||
1463 | return 0; | |
1464 | } | |
1465 | ||
f0fba2ad | 1466 | static int wm8753_probe(struct snd_soc_codec *codec) |
1f53aee0 | 1467 | { |
f0fba2ad | 1468 | struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); |
776065e3 | 1469 | int ret; |
1f53aee0 | 1470 | |
ce6120cc | 1471 | INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work); |
c2bac160 | 1472 | |
d3398ff0 MB |
1473 | codec->control_data = wm8753->regmap; |
1474 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP); | |
f0fba2ad LG |
1475 | if (ret < 0) { |
1476 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | |
1477 | return ret; | |
c2bac160 MB |
1478 | } |
1479 | ||
c2bac160 MB |
1480 | ret = wm8753_reset(codec); |
1481 | if (ret < 0) { | |
f0fba2ad LG |
1482 | dev_err(codec->dev, "Failed to issue reset: %d\n", ret); |
1483 | return ret; | |
c2bac160 MB |
1484 | } |
1485 | ||
f0fba2ad LG |
1486 | wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1487 | wm8753->dai_func = 0; | |
1488 | ||
c2bac160 MB |
1489 | /* charge output caps */ |
1490 | wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE); | |
ce6120cc | 1491 | schedule_delayed_work(&codec->dapm.delayed_work, |
c2bac160 MB |
1492 | msecs_to_jiffies(caps_charge)); |
1493 | ||
1494 | /* set the update bits */ | |
776065e3 LPC |
1495 | snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100); |
1496 | snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100); | |
21d17dd2 AL |
1497 | snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100); |
1498 | snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100); | |
776065e3 LPC |
1499 | snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100); |
1500 | snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100); | |
1501 | snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100); | |
1502 | snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100); | |
1503 | snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100); | |
1504 | snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100); | |
c2bac160 | 1505 | |
c2bac160 | 1506 | return 0; |
c2bac160 MB |
1507 | } |
1508 | ||
f0fba2ad LG |
1509 | /* power down chip */ |
1510 | static int wm8753_remove(struct snd_soc_codec *codec) | |
c2bac160 | 1511 | { |
fdea0571 | 1512 | flush_delayed_work_sync(&codec->dapm.delayed_work); |
f0fba2ad LG |
1513 | wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1514 | ||
1515 | return 0; | |
c2bac160 MB |
1516 | } |
1517 | ||
f0fba2ad LG |
1518 | static struct snd_soc_codec_driver soc_codec_dev_wm8753 = { |
1519 | .probe = wm8753_probe, | |
1520 | .remove = wm8753_remove, | |
1521 | .suspend = wm8753_suspend, | |
1522 | .resume = wm8753_resume, | |
1523 | .set_bias_level = wm8753_set_bias_level, | |
56a926dd MB |
1524 | |
1525 | .controls = wm8753_snd_controls, | |
1526 | .num_controls = ARRAY_SIZE(wm8753_snd_controls), | |
1527 | .dapm_widgets = wm8753_dapm_widgets, | |
1528 | .num_dapm_widgets = ARRAY_SIZE(wm8753_dapm_widgets), | |
1529 | .dapm_routes = wm8753_dapm_routes, | |
1530 | .num_dapm_routes = ARRAY_SIZE(wm8753_dapm_routes), | |
f0fba2ad | 1531 | }; |
69e169da | 1532 | |
70e14122 MB |
1533 | static const struct of_device_id wm8753_of_match[] = { |
1534 | { .compatible = "wlf,wm8753", }, | |
1535 | { } | |
1536 | }; | |
1537 | MODULE_DEVICE_TABLE(of, wm8753_of_match); | |
1538 | ||
d3398ff0 MB |
1539 | static const struct regmap_config wm8753_regmap = { |
1540 | .reg_bits = 7, | |
1541 | .val_bits = 9, | |
1542 | ||
1543 | .max_register = WM8753_ADCTL2, | |
1544 | .writeable_reg = wm8753_writeable, | |
1545 | .volatile_reg = wm8753_volatile, | |
1546 | ||
1547 | .cache_type = REGCACHE_RBTREE, | |
1548 | .reg_defaults = wm8753_reg_defaults, | |
1549 | .num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults), | |
1550 | }; | |
1551 | ||
f0fba2ad LG |
1552 | #if defined(CONFIG_SPI_MASTER) |
1553 | static int __devinit wm8753_spi_probe(struct spi_device *spi) | |
69e169da | 1554 | { |
c2bac160 | 1555 | struct wm8753_priv *wm8753; |
f0fba2ad | 1556 | int ret; |
69e169da | 1557 | |
2c823d14 MB |
1558 | wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv), |
1559 | GFP_KERNEL); | |
c2bac160 MB |
1560 | if (wm8753 == NULL) |
1561 | return -ENOMEM; | |
69e169da | 1562 | |
f0fba2ad | 1563 | spi_set_drvdata(spi, wm8753); |
c2bac160 | 1564 | |
d3398ff0 MB |
1565 | wm8753->regmap = regmap_init_spi(spi, &wm8753_regmap); |
1566 | if (IS_ERR(wm8753->regmap)) { | |
1567 | ret = PTR_ERR(wm8753->regmap); | |
1568 | dev_err(&spi->dev, "Failed to allocate register map: %d\n", | |
1569 | ret); | |
1570 | goto err; | |
1571 | } | |
1572 | ||
1573 | ret = snd_soc_register_codec(&spi->dev, &soc_codec_dev_wm8753, | |
1574 | wm8753_dai, ARRAY_SIZE(wm8753_dai)); | |
1575 | if (ret != 0) { | |
1576 | dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret); | |
1577 | goto err_regmap; | |
1578 | } | |
ad20ff92 DGC |
1579 | |
1580 | return 0; | |
1581 | ||
d3398ff0 MB |
1582 | err_regmap: |
1583 | regmap_exit(wm8753->regmap); | |
1584 | err: | |
f0fba2ad | 1585 | return ret; |
69e169da MB |
1586 | } |
1587 | ||
f0fba2ad | 1588 | static int __devexit wm8753_spi_remove(struct spi_device *spi) |
69e169da | 1589 | { |
d3398ff0 MB |
1590 | struct wm8753_priv *wm8753 = spi_get_drvdata(spi); |
1591 | ||
f0fba2ad | 1592 | snd_soc_unregister_codec(&spi->dev); |
d3398ff0 MB |
1593 | regmap_exit(wm8753->regmap); |
1594 | kfree(wm8753); | |
f0fba2ad | 1595 | return 0; |
69e169da MB |
1596 | } |
1597 | ||
f0fba2ad | 1598 | static struct spi_driver wm8753_spi_driver = { |
69e169da | 1599 | .driver = { |
63010634 | 1600 | .name = "wm8753", |
f0fba2ad | 1601 | .owner = THIS_MODULE, |
70e14122 | 1602 | .of_match_table = wm8753_of_match, |
69e169da | 1603 | }, |
f0fba2ad LG |
1604 | .probe = wm8753_spi_probe, |
1605 | .remove = __devexit_p(wm8753_spi_remove), | |
69e169da | 1606 | }; |
f0fba2ad | 1607 | #endif /* CONFIG_SPI_MASTER */ |
69e169da | 1608 | |
f0fba2ad LG |
1609 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
1610 | static __devinit int wm8753_i2c_probe(struct i2c_client *i2c, | |
1611 | const struct i2c_device_id *id) | |
69e169da | 1612 | { |
c2bac160 | 1613 | struct wm8753_priv *wm8753; |
f0fba2ad | 1614 | int ret; |
c2bac160 | 1615 | |
2c823d14 MB |
1616 | wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv), |
1617 | GFP_KERNEL); | |
c2bac160 MB |
1618 | if (wm8753 == NULL) |
1619 | return -ENOMEM; | |
69e169da | 1620 | |
f0fba2ad | 1621 | i2c_set_clientdata(i2c, wm8753); |
69e169da | 1622 | |
d3398ff0 MB |
1623 | wm8753->regmap = regmap_init_i2c(i2c, &wm8753_regmap); |
1624 | if (IS_ERR(wm8753->regmap)) { | |
1625 | ret = PTR_ERR(wm8753->regmap); | |
1626 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", | |
1627 | ret); | |
1628 | goto err; | |
1629 | } | |
1630 | ||
1631 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8753, | |
1632 | wm8753_dai, ARRAY_SIZE(wm8753_dai)); | |
1633 | if (ret != 0) { | |
1634 | dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); | |
1635 | goto err_regmap; | |
1636 | } | |
2c823d14 | 1637 | |
ad20ff92 DGC |
1638 | return 0; |
1639 | ||
d3398ff0 MB |
1640 | err_regmap: |
1641 | regmap_exit(wm8753->regmap); | |
1642 | err: | |
f0fba2ad | 1643 | return ret; |
69e169da MB |
1644 | } |
1645 | ||
f0fba2ad | 1646 | static __devexit int wm8753_i2c_remove(struct i2c_client *client) |
69e169da | 1647 | { |
d3398ff0 MB |
1648 | struct wm8753_priv *wm8753 = i2c_get_clientdata(client); |
1649 | ||
f0fba2ad | 1650 | snd_soc_unregister_codec(&client->dev); |
d3398ff0 | 1651 | regmap_exit(wm8753->regmap); |
69e169da MB |
1652 | return 0; |
1653 | } | |
1654 | ||
f0fba2ad LG |
1655 | static const struct i2c_device_id wm8753_i2c_id[] = { |
1656 | { "wm8753", 0 }, | |
1657 | { } | |
1658 | }; | |
1659 | MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id); | |
1660 | ||
1661 | static struct i2c_driver wm8753_i2c_driver = { | |
69e169da | 1662 | .driver = { |
63010634 | 1663 | .name = "wm8753", |
f0fba2ad | 1664 | .owner = THIS_MODULE, |
70e14122 | 1665 | .of_match_table = wm8753_of_match, |
69e169da | 1666 | }, |
f0fba2ad LG |
1667 | .probe = wm8753_i2c_probe, |
1668 | .remove = __devexit_p(wm8753_i2c_remove), | |
1669 | .id_table = wm8753_i2c_id, | |
69e169da MB |
1670 | }; |
1671 | #endif | |
1672 | ||
c9b3a40f | 1673 | static int __init wm8753_modinit(void) |
64089b84 | 1674 | { |
f0fba2ad | 1675 | int ret = 0; |
c2bac160 MB |
1676 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
1677 | ret = i2c_add_driver(&wm8753_i2c_driver); | |
f0fba2ad LG |
1678 | if (ret != 0) { |
1679 | printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n", | |
1680 | ret); | |
1681 | } | |
c2bac160 MB |
1682 | #endif |
1683 | #if defined(CONFIG_SPI_MASTER) | |
1684 | ret = spi_register_driver(&wm8753_spi_driver); | |
f0fba2ad LG |
1685 | if (ret != 0) { |
1686 | printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n", | |
1687 | ret); | |
1688 | } | |
c2bac160 | 1689 | #endif |
f0fba2ad | 1690 | return ret; |
64089b84 MB |
1691 | } |
1692 | module_init(wm8753_modinit); | |
1693 | ||
1694 | static void __exit wm8753_exit(void) | |
1695 | { | |
c2bac160 MB |
1696 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
1697 | i2c_del_driver(&wm8753_i2c_driver); | |
1698 | #endif | |
1699 | #if defined(CONFIG_SPI_MASTER) | |
1700 | spi_unregister_driver(&wm8753_spi_driver); | |
1701 | #endif | |
64089b84 MB |
1702 | } |
1703 | module_exit(wm8753_exit); | |
1704 | ||
1f53aee0 LG |
1705 | MODULE_DESCRIPTION("ASoC WM8753 driver"); |
1706 | MODULE_AUTHOR("Liam Girdwood"); | |
1707 | MODULE_LICENSE("GPL"); |