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ASoC: Move WM8993 resource acquisition and device reset to bus probe
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
70e14122 41#include <linux/of_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
5a0e3ad6 43#include <linux/slab.h>
1f53aee0
LG		 44#include <sound/core.h>
45#include <sound/pcm.h>
46#include <sound/pcm_params.h>
47#include <sound/soc.h>
1f53aee0 48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
1f53aee0
LG		 54static int caps_charge = 2000;
55module_param(caps_charge, int, 0);
56MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
57
338ee253
LPC		 58static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
59 unsigned int fmt);
60static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
61 unsigned int fmt);
1f53aee0 62
1f53aee0
LG		 63/*
64 * wm8753 register cache
65 * We can't read the WM8753 register space when we
66 * are using 2 wire for device control, so we cache them instead.
67 */
68static const u16 wm8753_reg[] = {
776065e3
LPC		 69 0x0000, 0x0008, 0x0000, 0x000a,
70 0x000a, 0x0033, 0x0000, 0x0007,
71 0x00ff, 0x00ff, 0x000f, 0x000f,
72 0x007b, 0x0000, 0x0032, 0x0000,
73 0x00c3, 0x00c3, 0x00c0, 0x0000,
1f53aee0
LG		 74 0x0000, 0x0000, 0x0000, 0x0000,
75 0x0000, 0x0000, 0x0000, 0x0000,
1f53aee0 76 0x0000, 0x0000, 0x0000, 0x0000,
776065e3
LPC		 77 0x0055, 0x0005, 0x0050, 0x0055,
78 0x0050, 0x0055, 0x0050, 0x0055,
79 0x0079, 0x0079, 0x0079, 0x0079,
80 0x0079, 0x0000, 0x0000, 0x0000,
81 0x0000, 0x0097, 0x0097, 0x0000,
82 0x0004, 0x0000, 0x0083, 0x0024,
83 0x01ba, 0x0000, 0x0083, 0x0024,
84 0x01ba, 0x0000, 0x0000, 0x0000
1f53aee0
LG		 85};
86
c2bac160
MB		 87/* codec private data */
88struct wm8753_priv {
f0fba2ad 89 enum snd_soc_control_type control_type;
c2bac160
MB		 90 unsigned int sysclk;
91 unsigned int pcmclk;
338ee253
LPC		 92
93 unsigned int voice_fmt;
94 unsigned int hifi_fmt;
95
f0fba2ad 96 int dai_func;
c2bac160
MB		 97};
98
776065e3 99#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
1f53aee0
LG		 100
101/*
102 * WM8753 Controls
103 */
104static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
105static const char *wm8753_base_filter[] =
106 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
107 "100Hz @ 8kHz", "200Hz @ 8kHz"};
108static const char *wm8753_treble[] = {"8kHz", "4kHz"};
109static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
110static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
111static const char *wm8753_3d_func[] = {"Capture", "Playback"};
112static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
113static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
114static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
115static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
116static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
117static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
118 "Line 1", "Line 2"};
119static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
120static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
121static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
122static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
123static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
124 "Right PGA"};
125static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
126 "Left + Right"};
127static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
128static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
129static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
130static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
131static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
132 "Analogue Mix Right", "Digital Mono Mix"};
133static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
134 "82Hz @ 8kHz", "170Hz @ 8kHz"};
135static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
136static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
137static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
138static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
139 "Channel Swap"};
ae092c9e 140static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 141
142static const struct soc_enum wm8753_enum[] = {
143SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
144SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
145SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
146SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
147SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
148SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
149SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
150SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
151SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
152SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
153SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
154SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
155SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
156SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
157SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
158SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
159SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
160SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
161SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
162SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
163SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
164SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
165SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
166SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
167SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
168SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
169SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
170SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 171SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 172};
173
174
175static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
176 struct snd_ctl_elem_value *ucontrol)
177{
178 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
338ee253 179 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0 180
338ee253 181 ucontrol->value.integer.value[0] = wm8753->dai_func;
1f53aee0
LG		 182 return 0;
183}
184
185static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
186 struct snd_ctl_elem_value *ucontrol)
187{
188 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
f0fba2ad 189 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
338ee253
LPC		 190 u16 ioctl;
191
2391a0e0
TJL		 192 if (wm8753->dai_func == ucontrol->value.integer.value[0])
193 return 0;
194
338ee253
LPC		 195 if (codec->active)
196 return -EBUSY;
197
198 ioctl = snd_soc_read(codec, WM8753_IOCTL);
199
200 wm8753->dai_func = ucontrol->value.integer.value[0];
201
202 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
203 return 1;
204
205 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
206 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0 207
1f53aee0 208
338ee253
LPC		 209 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
210 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
1f53aee0 211
1f53aee0
LG		 212 return 1;
213}
214
2cc8c609
MM		 215static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
216static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
217static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
218static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
219static const unsigned int out_tlv[] = {
220 TLV_DB_RANGE_HEAD(2),
221 /* 0000000 - 0101111 = "Analogue mute" */
222 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
223 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
224};
225static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
226static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
227static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 228
1f53aee0 229static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 230SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
231
232SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
233 adc_tlv),
234
235SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
236 0, 127, 0, out_tlv),
237SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
238 127, 0, out_tlv),
239
240SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
241
242SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
243 1, mix_tlv),
244SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
245 7, 1, mix_tlv),
246SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
247 1, voice_mix_tlv),
248
249SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
250 1, 0),
251SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
252 1, 0),
253
254SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
255SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
256 mix_tlv),
257SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
258 voice_mix_tlv),
1f53aee0
LG		 259SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
260
261SOC_ENUM("Bass Boost", wm8753_enum[0]),
262SOC_ENUM("Bass Filter", wm8753_enum[1]),
263SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
264
265SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
266SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
267
2cc8c609
MM		 268SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
269 rec_mix_tlv),
270SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
271 rec_mix_tlv),
1f53aee0 272
2cc8c609
MM		 273SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
274 pga_tlv),
1f53aee0
LG		 275SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
276SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
277
278SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
279SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
280SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
281
282SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
283SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
284SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
285SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
286SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
287SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
288SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
289SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
290SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
291SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
292
293SOC_ENUM("3D Function", wm8753_enum[5]),
294SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
295SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
296SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
297SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
298
299SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
300SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
301
302SOC_ENUM("De-emphasis", wm8753_enum[8]),
303SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
304SOC_ENUM("Playback Phase", wm8753_enum[10]),
305
2cc8c609
MM		 306SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
307SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 308
309SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
310
311SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 312SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 313};
314
1f53aee0
LG		 315/*
316 * _DAPM_ Controls
317 */
318
319/* Left Mixer */
320static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
321SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
322SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
323SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
324SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
325};
326
327/* Right mixer */
328static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
329SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
330SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
331SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
332SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
333};
334
335/* Mono mixer */
336static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
337SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
338SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
339SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
340SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
341SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
342};
343
344/* Mono 2 Mux */
345static const struct snd_kcontrol_new wm8753_mono2_controls =
346SOC_DAPM_ENUM("Route", wm8753_enum[17]);
347
348/* Out 3 Mux */
349static const struct snd_kcontrol_new wm8753_out3_controls =
350SOC_DAPM_ENUM("Route", wm8753_enum[18]);
351
352/* Out 4 Mux */
353static const struct snd_kcontrol_new wm8753_out4_controls =
354SOC_DAPM_ENUM("Route", wm8753_enum[19]);
355
356/* ADC Mono Mix */
357static const struct snd_kcontrol_new wm8753_adc_mono_controls =
358SOC_DAPM_ENUM("Route", wm8753_enum[22]);
359
360/* Record mixer */
361static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
362SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
363SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
364SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
365};
366
367/* Left ADC mux */
368static const struct snd_kcontrol_new wm8753_adc_left_controls =
369SOC_DAPM_ENUM("Route", wm8753_enum[21]);
370
371/* Right ADC mux */
372static const struct snd_kcontrol_new wm8753_adc_right_controls =
373SOC_DAPM_ENUM("Route", wm8753_enum[20]);
374
375/* MIC mux */
376static const struct snd_kcontrol_new wm8753_mic_mux_controls =
377SOC_DAPM_ENUM("Route", wm8753_enum[16]);
378
379/* ALC mixer */
380static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
381SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
382SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
383SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
384SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
385};
386
387/* Left Line mux */
388static const struct snd_kcontrol_new wm8753_line_left_controls =
389SOC_DAPM_ENUM("Route", wm8753_enum[14]);
390
391/* Right Line mux */
392static const struct snd_kcontrol_new wm8753_line_right_controls =
393SOC_DAPM_ENUM("Route", wm8753_enum[13]);
394
395/* Mono Line mux */
396static const struct snd_kcontrol_new wm8753_line_mono_controls =
397SOC_DAPM_ENUM("Route", wm8753_enum[12]);
398
399/* Line mux and mixer */
400static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
401SOC_DAPM_ENUM("Route", wm8753_enum[11]);
402
403/* Rx mux and mixer */
404static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
405SOC_DAPM_ENUM("Route", wm8753_enum[15]);
406
407/* Mic Selector Mux */
408static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
409SOC_DAPM_ENUM("Route", wm8753_enum[25]);
410
411static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
412SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
413SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
414 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
415SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
416SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
417SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
418SND_SOC_DAPM_OUTPUT("LOUT1"),
419SND_SOC_DAPM_OUTPUT("LOUT2"),
420SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
421 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
422SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
423SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
424SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
425SND_SOC_DAPM_OUTPUT("ROUT1"),
426SND_SOC_DAPM_OUTPUT("ROUT2"),
427SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
428 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
429SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
430SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
431SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
432SND_SOC_DAPM_OUTPUT("MONO1"),
433SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
434SND_SOC_DAPM_OUTPUT("MONO2"),
435SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
436SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
437SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
438SND_SOC_DAPM_OUTPUT("OUT3"),
439SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
440SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
441SND_SOC_DAPM_OUTPUT("OUT4"),
442SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
443 &wm8753_record_mixer_controls[0],
444 ARRAY_SIZE(wm8753_record_mixer_controls)),
445SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
446SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
447SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
448 &wm8753_adc_mono_controls),
449SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
450 &wm8753_adc_mono_controls),
451SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
452 &wm8753_adc_left_controls),
453SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
454 &wm8753_adc_right_controls),
455SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
456 &wm8753_mic_mux_controls),
457SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
458SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
459SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
460 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
461SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
462 &wm8753_line_left_controls),
463SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
464 &wm8753_line_right_controls),
465SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
466 &wm8753_line_mono_controls),
467SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
468 &wm8753_line_mux_mix_controls),
469SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
470 &wm8753_rx_mux_mix_controls),
471SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
472SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
473SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
474 &wm8753_mic_sel_mux_controls),
475SND_SOC_DAPM_INPUT("LINE1"),
476SND_SOC_DAPM_INPUT("LINE2"),
477SND_SOC_DAPM_INPUT("RXP"),
478SND_SOC_DAPM_INPUT("RXN"),
479SND_SOC_DAPM_INPUT("ACIN"),
480SND_SOC_DAPM_OUTPUT("ACOP"),
481SND_SOC_DAPM_INPUT("MIC1N"),
482SND_SOC_DAPM_INPUT("MIC1"),
483SND_SOC_DAPM_INPUT("MIC2N"),
484SND_SOC_DAPM_INPUT("MIC2"),
485SND_SOC_DAPM_VMID("VREF"),
486};
487
56a926dd 488static const struct snd_soc_dapm_route wm8753_dapm_routes[] = {
1f53aee0
LG		 489 /* left mixer */
490 {"Left Mixer", "Left Playback Switch", "Left DAC"},
491 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
492 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
493 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
494
495 /* right mixer */
496 {"Right Mixer", "Right Playback Switch", "Right DAC"},
497 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
498 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
499 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
500
501 /* mono mixer */
502 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
503 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
504 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
505 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
506 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
507
508 /* left out */
509 {"Left Out 1", NULL, "Left Mixer"},
510 {"Left Out 2", NULL, "Left Mixer"},
511 {"LOUT1", NULL, "Left Out 1"},
512 {"LOUT2", NULL, "Left Out 2"},
513
514 /* right out */
515 {"Right Out 1", NULL, "Right Mixer"},
516 {"Right Out 2", NULL, "Right Mixer"},
517 {"ROUT1", NULL, "Right Out 1"},
518 {"ROUT2", NULL, "Right Out 2"},
519
520 /* mono 1 out */
521 {"Mono Out 1", NULL, "Mono Mixer"},
522 {"MONO1", NULL, "Mono Out 1"},
523
524 /* mono 2 out */
525 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
526 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
527 {"Mono 2 Mux", "Left", "Left Mixer"},
528 {"Mono 2 Mux", "Right", "Right Mixer"},
529 {"Mono Out 2", NULL, "Mono 2 Mux"},
530 {"MONO2", NULL, "Mono Out 2"},
531
532 /* out 3 */
533 {"Out3 Left + Right", NULL, "Left Mixer"},
534 {"Out3 Left + Right", NULL, "Right Mixer"},
535 {"Out3 Mux", "VREF", "VREF"},
536 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
537 {"Out3 Mux", "ROUT2", "ROUT2"},
538 {"Out 3", NULL, "Out3 Mux"},
539 {"OUT3", NULL, "Out 3"},
540
541 /* out 4 */
542 {"Out4 Mux", "VREF", "VREF"},
4037314a 543 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 544 {"Out4 Mux", "LOUT2", "LOUT2"},
545 {"Out 4", NULL, "Out4 Mux"},
546 {"OUT4", NULL, "Out 4"},
547
548 /* record mixer */
549 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
550 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
551 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
552
553 /* Mic/SideTone Mux */
554 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
555 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
556 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
557 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
558
559 /* Capture Left Mux */
560 {"Capture Left Mux", "PGA", "Left Capture Volume"},
561 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
562 {"Capture Left Mux", "Line", "LINE1"},
563
564 /* Capture Right Mux */
565 {"Capture Right Mux", "PGA", "Right Capture Volume"},
566 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 567 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 568
569 /* Mono Capture mixer-mux */
570 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
877ae707 571 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
1f53aee0
LG		 572 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
573 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
574 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
575 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
576 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
577 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
578 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
579 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
580
581 /* ADC */
582 {"Left ADC", NULL, "Capture Left Mixer"},
583 {"Right ADC", NULL, "Capture Right Mixer"},
584
585 /* Left Capture Volume */
586 {"Left Capture Volume", NULL, "ACIN"},
587
588 /* Right Capture Volume */
589 {"Right Capture Volume", NULL, "Mic 2 Volume"},
590
591 /* ALC Mixer */
592 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
593 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
594 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
595 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
596
597 /* Line Left Mux */
598 {"Line Left Mux", "Line 1", "LINE1"},
599 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
600
601 /* Line Right Mux */
602 {"Line Right Mux", "Line 2", "LINE2"},
603 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
604
605 /* Line Mono Mux */
606 {"Line Mono Mux", "Line Mix", "Line Mixer"},
607 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
608
609 /* Line Mixer/Mux */
610 {"Line Mixer", "Line 1 + 2", "LINE1"},
611 {"Line Mixer", "Line 1 - 2", "LINE1"},
612 {"Line Mixer", "Line 1 + 2", "LINE2"},
613 {"Line Mixer", "Line 1 - 2", "LINE2"},
614 {"Line Mixer", "Line 1", "LINE1"},
615 {"Line Mixer", "Line 2", "LINE2"},
616
617 /* Rx Mixer/Mux */
618 {"Rx Mixer", "RXP - RXN", "RXP"},
619 {"Rx Mixer", "RXP + RXN", "RXP"},
620 {"Rx Mixer", "RXP - RXN", "RXN"},
621 {"Rx Mixer", "RXP + RXN", "RXN"},
622 {"Rx Mixer", "RXP", "RXP"},
623 {"Rx Mixer", "RXN", "RXN"},
624
625 /* Mic 1 Volume */
626 {"Mic 1 Volume", NULL, "MIC1N"},
627 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
628
629 /* Mic 2 Volume */
630 {"Mic 2 Volume", NULL, "MIC2N"},
631 {"Mic 2 Volume", NULL, "MIC2"},
632
633 /* Mic Selector Mux */
634 {"Mic Selection Mux", "Mic 1", "MIC1"},
635 {"Mic Selection Mux", "Mic 2", "MIC2N"},
636 {"Mic Selection Mux", "Mic 3", "MIC2"},
637
638 /* ACOP */
639 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 640};
641
1f53aee0
LG		 642/* PLL divisors */
643struct _pll_div {
644 u32 div2:1;
645 u32 n:4;
646 u32 k:24;
647};
648
649/* The size in bits of the pll divide multiplied by 10
650 * to allow rounding later */
651#define FIXED_PLL_SIZE ((1 << 22) * 10)
652
653static void pll_factors(struct _pll_div *pll_div, unsigned int target,
654 unsigned int source)
655{
656 u64 Kpart;
657 unsigned int K, Ndiv, Nmod;
658
659 Ndiv = target / source;
660 if (Ndiv < 6) {
661 source >>= 1;
662 pll_div->div2 = 1;
663 Ndiv = target / source;
664 } else
665 pll_div->div2 = 0;
666
667 if ((Ndiv < 6) || (Ndiv > 12))
668 printk(KERN_WARNING
449bd54d 669 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 670
671 pll_div->n = Ndiv;
672 Nmod = target % source;
673 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
674
675 do_div(Kpart, source);
676
677 K = Kpart & 0xFFFFFFFF;
678
679 /* Check if we need to round */
680 if ((K % 10) >= 5)
681 K += 5;
682
683 /* Move down to proper range now rounding is done */
684 K /= 10;
685
686 pll_div->k = K;
687}
688
85488037
MB		 689static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
690 int source, unsigned int freq_in, unsigned int freq_out)
1f53aee0
LG		 691{
692 u16 reg, enable;
693 int offset;
694 struct snd_soc_codec *codec = codec_dai->codec;
695
696 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
697 return -ENODEV;
698
699 if (pll_id == WM8753_PLL1) {
700 offset = 0;
701 enable = 0x10;
776065e3 702 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
1f53aee0
LG		 703 } else {
704 offset = 4;
705 enable = 0x8;
776065e3 706 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
1f53aee0
LG		 707 }
708
709 if (!freq_in || !freq_out) {
710 /* disable PLL */
776065e3
LPC		 711 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
712 snd_soc_write(codec, WM8753_CLOCK, reg);
1f53aee0
LG		 713 return 0;
714 } else {
715 u16 value = 0;
716 struct _pll_div pll_div;
717
718 pll_factors(&pll_div, freq_out * 8, freq_in);
719
720 /* set up N and K PLL divisor ratios */
721 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
722 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776065e3 723 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
1f53aee0
LG		 724
725 /* bits 8:0 = PLL_K[17:9] */
726 value = (pll_div.k & 0x03fe00) >> 9;
776065e3 727 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
1f53aee0
LG		 728
729 /* bits 8:0 = PLL_K[8:0] */
730 value = pll_div.k & 0x0001ff;
776065e3 731 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
1f53aee0
LG		 732
733 /* set PLL as input and enable */
776065e3 734 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
1f53aee0 735 (pll_div.div2 << 3));
776065e3 736 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
1f53aee0
LG		 737 }
738 return 0;
739}
740
741struct _coeff_div {
742 u32 mclk;
743 u32 rate;
744 u8 sr:5;
745 u8 usb:1;
746};
747
748/* codec hifi mclk (after PLL) clock divider coefficients */
749static const struct _coeff_div coeff_div[] = {
750 /* 8k */
751 {12288000, 8000, 0x6, 0x0},
752 {11289600, 8000, 0x16, 0x0},
753 {18432000, 8000, 0x7, 0x0},
754 {16934400, 8000, 0x17, 0x0},
755 {12000000, 8000, 0x6, 0x1},
756
757 /* 11.025k */
758 {11289600, 11025, 0x18, 0x0},
759 {16934400, 11025, 0x19, 0x0},
760 {12000000, 11025, 0x19, 0x1},
761
762 /* 16k */
763 {12288000, 16000, 0xa, 0x0},
764 {18432000, 16000, 0xb, 0x0},
765 {12000000, 16000, 0xa, 0x1},
766
767 /* 22.05k */
768 {11289600, 22050, 0x1a, 0x0},
769 {16934400, 22050, 0x1b, 0x0},
770 {12000000, 22050, 0x1b, 0x1},
771
772 /* 32k */
773 {12288000, 32000, 0xc, 0x0},
774 {18432000, 32000, 0xd, 0x0},
775 {12000000, 32000, 0xa, 0x1},
776
777 /* 44.1k */
778 {11289600, 44100, 0x10, 0x0},
779 {16934400, 44100, 0x11, 0x0},
780 {12000000, 44100, 0x11, 0x1},
781
782 /* 48k */
783 {12288000, 48000, 0x0, 0x0},
784 {18432000, 48000, 0x1, 0x0},
785 {12000000, 48000, 0x0, 0x1},
786
787 /* 88.2k */
788 {11289600, 88200, 0x1e, 0x0},
789 {16934400, 88200, 0x1f, 0x0},
790 {12000000, 88200, 0x1f, 0x1},
791
792 /* 96k */
793 {12288000, 96000, 0xe, 0x0},
794 {18432000, 96000, 0xf, 0x0},
795 {12000000, 96000, 0xe, 0x1},
796};
797
798static int get_coeff(int mclk, int rate)
799{
800 int i;
801
802 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
803 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
804 return i;
805 }
806 return -EINVAL;
807}
808
809/*
810 * Clock after PLL and dividers
811 */
e550e17f 812static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 813 int clk_id, unsigned int freq, int dir)
814{
815 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 816 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 817
818 switch (freq) {
819 case 11289600:
820 case 12000000:
821 case 12288000:
822 case 16934400:
823 case 18432000:
824 if (clk_id == WM8753_MCLK) {
825 wm8753->sysclk = freq;
826 return 0;
827 } else if (clk_id == WM8753_PCMCLK) {
828 wm8753->pcmclk = freq;
829 return 0;
830 }
831 break;
832 }
833 return -EINVAL;
834}
835
836/*
837 * Set's ADC and Voice DAC format.
838 */
338ee253 839static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 840 unsigned int fmt)
841{
776065e3 842 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
1f53aee0
LG		 843
844 /* interface format */
845 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
846 case SND_SOC_DAIFMT_I2S:
847 voice |= 0x0002;
848 break;
849 case SND_SOC_DAIFMT_RIGHT_J:
850 break;
851 case SND_SOC_DAIFMT_LEFT_J:
852 voice |= 0x0001;
853 break;
854 case SND_SOC_DAIFMT_DSP_A:
855 voice |= 0x0003;
856 break;
857 case SND_SOC_DAIFMT_DSP_B:
858 voice |= 0x0013;
859 break;
860 default:
861 return -EINVAL;
862 }
863
776065e3 864 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 865 return 0;
866}
867
868/*
869 * Set PCM DAI bit size and sample rate.
870 */
871static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 872 struct snd_pcm_hw_params *params,
873 struct snd_soc_dai *dai)
1f53aee0
LG		 874{
875 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 876 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 877 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 878 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
879 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
1f53aee0
LG		 880
881 /* bit size */
882 switch (params_format(params)) {
883 case SNDRV_PCM_FORMAT_S16_LE:
884 break;
885 case SNDRV_PCM_FORMAT_S20_3LE:
886 voice |= 0x0004;
887 break;
888 case SNDRV_PCM_FORMAT_S24_LE:
889 voice |= 0x0008;
890 break;
891 case SNDRV_PCM_FORMAT_S32_LE:
892 voice |= 0x000c;
893 break;
894 }
895
896 /* sample rate */
897 if (params_rate(params) * 384 == wm8753->pcmclk)
898 srate |= 0x80;
776065e3 899 snd_soc_write(codec, WM8753_SRATE1, srate);
1f53aee0 900
776065e3 901 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 902 return 0;
903}
904
905/*
906 * Set's PCM dai fmt and BCLK.
907 */
338ee253 908static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 909 unsigned int fmt)
910{
1f53aee0
LG		 911 u16 voice, ioctl;
912
776065e3
LPC		 913 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
914 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
1f53aee0
LG		 915
916 /* set master/slave audio interface */
917 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
918 case SND_SOC_DAIFMT_CBS_CFS:
919 break;
920 case SND_SOC_DAIFMT_CBM_CFM:
921 ioctl |= 0x2;
922 case SND_SOC_DAIFMT_CBM_CFS:
923 voice |= 0x0040;
924 break;
925 default:
926 return -EINVAL;
927 }
928
929 /* clock inversion */
930 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
931 case SND_SOC_DAIFMT_DSP_A:
932 case SND_SOC_DAIFMT_DSP_B:
933 /* frame inversion not valid for DSP modes */
934 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
935 case SND_SOC_DAIFMT_NB_NF:
936 break;
937 case SND_SOC_DAIFMT_IB_NF:
938 voice |= 0x0080;
939 break;
940 default:
941 return -EINVAL;
942 }
943 break;
944 case SND_SOC_DAIFMT_I2S:
945 case SND_SOC_DAIFMT_RIGHT_J:
946 case SND_SOC_DAIFMT_LEFT_J:
947 voice &= ~0x0010;
948 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
949 case SND_SOC_DAIFMT_NB_NF:
950 break;
951 case SND_SOC_DAIFMT_IB_IF:
952 voice |= 0x0090;
953 break;
954 case SND_SOC_DAIFMT_IB_NF:
955 voice |= 0x0080;
956 break;
957 case SND_SOC_DAIFMT_NB_IF:
958 voice |= 0x0010;
959 break;
960 default:
961 return -EINVAL;
962 }
963 break;
964 default:
965 return -EINVAL;
966 }
967
776065e3
LPC		 968 snd_soc_write(codec, WM8753_PCM, voice);
969 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 970 return 0;
971}
972
e550e17f 973static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 974 int div_id, int div)
975{
976 struct snd_soc_codec *codec = codec_dai->codec;
977 u16 reg;
978
979 switch (div_id) {
980 case WM8753_PCMDIV:
776065e3
LPC		 981 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
982 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1f53aee0
LG		 983 break;
984 case WM8753_BCLKDIV:
776065e3
LPC		 985 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
986 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 987 break;
988 case WM8753_VXCLKDIV:
776065e3
LPC		 989 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
990 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 991 break;
992 default:
993 return -EINVAL;
994 }
995 return 0;
996}
997
998/*
999 * Set's HiFi DAC format.
1000 */
338ee253 1001static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1002 unsigned int fmt)
1003{
776065e3 1004 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1f53aee0
LG		 1005
1006 /* interface format */
1007 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1008 case SND_SOC_DAIFMT_I2S:
1009 hifi |= 0x0002;
1010 break;
1011 case SND_SOC_DAIFMT_RIGHT_J:
1012 break;
1013 case SND_SOC_DAIFMT_LEFT_J:
1014 hifi |= 0x0001;
1015 break;
1016 case SND_SOC_DAIFMT_DSP_A:
1017 hifi |= 0x0003;
1018 break;
1019 case SND_SOC_DAIFMT_DSP_B:
1020 hifi |= 0x0013;
1021 break;
1022 default:
1023 return -EINVAL;
1024 }
1025
776065e3 1026 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1027 return 0;
1028}
1029
1030/*
1031 * Set's I2S DAI format.
1032 */
338ee253 1033static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1034 unsigned int fmt)
1035{
1f53aee0
LG		 1036 u16 ioctl, hifi;
1037
776065e3
LPC		 1038 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1039 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1f53aee0
LG		 1040
1041 /* set master/slave audio interface */
1042 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1043 case SND_SOC_DAIFMT_CBS_CFS:
1044 break;
1045 case SND_SOC_DAIFMT_CBM_CFM:
1046 ioctl |= 0x1;
1047 case SND_SOC_DAIFMT_CBM_CFS:
1048 hifi |= 0x0040;
1049 break;
1050 default:
1051 return -EINVAL;
1052 }
1053
1054 /* clock inversion */
1055 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1056 case SND_SOC_DAIFMT_DSP_A:
1057 case SND_SOC_DAIFMT_DSP_B:
1058 /* frame inversion not valid for DSP modes */
1059 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1060 case SND_SOC_DAIFMT_NB_NF:
1061 break;
1062 case SND_SOC_DAIFMT_IB_NF:
1063 hifi |= 0x0080;
1064 break;
1065 default:
1066 return -EINVAL;
1067 }
1068 break;
1069 case SND_SOC_DAIFMT_I2S:
1070 case SND_SOC_DAIFMT_RIGHT_J:
1071 case SND_SOC_DAIFMT_LEFT_J:
1072 hifi &= ~0x0010;
1073 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1074 case SND_SOC_DAIFMT_NB_NF:
1075 break;
1076 case SND_SOC_DAIFMT_IB_IF:
1077 hifi |= 0x0090;
1078 break;
1079 case SND_SOC_DAIFMT_IB_NF:
1080 hifi |= 0x0080;
1081 break;
1082 case SND_SOC_DAIFMT_NB_IF:
1083 hifi |= 0x0010;
1084 break;
1085 default:
1086 return -EINVAL;
1087 }
1088 break;
1089 default:
1090 return -EINVAL;
1091 }
1092
776065e3
LPC		 1093 snd_soc_write(codec, WM8753_HIFI, hifi);
1094 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1095 return 0;
1096}
1097
1098/*
1099 * Set PCM DAI bit size and sample rate.
1100 */
1101static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1102 struct snd_pcm_hw_params *params,
1103 struct snd_soc_dai *dai)
1f53aee0
LG		 1104{
1105 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1106 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 1107 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 1108 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1109 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1f53aee0
LG		 1110 int coeff;
1111
1112 /* is digital filter coefficient valid ? */
1113 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1114 if (coeff < 0) {
1115 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1116 return coeff;
1117 }
776065e3 1118 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1f53aee0
LG		 1119 coeff_div[coeff].usb);
1120
1121 /* bit size */
1122 switch (params_format(params)) {
1123 case SNDRV_PCM_FORMAT_S16_LE:
1124 break;
1125 case SNDRV_PCM_FORMAT_S20_3LE:
1126 hifi |= 0x0004;
1127 break;
1128 case SNDRV_PCM_FORMAT_S24_LE:
1129 hifi |= 0x0008;
1130 break;
1131 case SNDRV_PCM_FORMAT_S32_LE:
1132 hifi |= 0x000c;
1133 break;
1134 }
1135
776065e3 1136 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1137 return 0;
1138}
1139
338ee253 1140static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1141 unsigned int fmt)
1142{
1f53aee0
LG		 1143 u16 clock;
1144
1145 /* set clk source as pcmclk */
776065e3
LPC		 1146 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1147 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1148
338ee253 1149 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1150}
1151
338ee253 1152static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1153 unsigned int fmt)
1154{
338ee253 1155 return wm8753_hdac_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1156}
1157
338ee253 1158static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1159 unsigned int fmt)
1160{
1f53aee0
LG		 1161 u16 clock;
1162
1163 /* set clk source as pcmclk */
776065e3
LPC		 1164 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1165 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1166
338ee253 1167 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1168}
1169
338ee253 1170static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1171 unsigned int fmt)
1172{
1f53aee0
LG		 1173 u16 clock;
1174
1175 /* set clk source as mclk */
776065e3
LPC		 1176 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1177 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1f53aee0 1178
338ee253 1179 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1f53aee0 1180 return -EINVAL;
338ee253 1181 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1182}
1183
338ee253
LPC		 1184static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1185 unsigned int fmt)
1186{
1187 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1188 int ret = 0;
1189
1190 switch (wm8753->dai_func) {
1191 case 0:
1192 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1193 break;
1194 case 1:
1195 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1196 break;
1197 case 2:
1198 case 3:
1199 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1200 break;
1201 default:
1202 break;
1203 }
1204 if (ret)
1205 return ret;
1206
1207 return wm8753_i2s_set_dai_fmt(codec, fmt);
1208}
1209
1210static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1211 unsigned int fmt)
1212{
1213 struct snd_soc_codec *codec = codec_dai->codec;
1214 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1215
1216 wm8753->hifi_fmt = fmt;
1217
1218 return wm8753_hifi_write_dai_fmt(codec, fmt);
1219};
1220
1221static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1222 unsigned int fmt)
1223{
1224 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1225 int ret = 0;
1226
1227 if (wm8753->dai_func != 0)
1228 return 0;
1229
1230 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1231 if (ret)
1232 return ret;
1233 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1234 if (ret)
1235 return ret;
1236
1237 return 0;
1238};
1239
1240static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1241 unsigned int fmt)
1242{
1243 struct snd_soc_codec *codec = codec_dai->codec;
1244 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1245
1246 wm8753->voice_fmt = fmt;
1247
1248 return wm8753_voice_write_dai_fmt(codec, fmt);
1249};
1250
e550e17f 1251static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1252{
1253 struct snd_soc_codec *codec = dai->codec;
776065e3 1254 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
f0fba2ad 1255 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 1256
1257 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1258 * make sure we check if they are not both active when we mute */
f0fba2ad
LG		 1259 if (mute && wm8753->dai_func == 1) {
1260 if (!codec->active)
776065e3 1261 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0
LG		 1262 } else {
1263 if (mute)
776065e3 1264 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0 1265 else
776065e3 1266 snd_soc_write(codec, WM8753_DAC, mute_reg);
1f53aee0
LG		 1267 }
1268
1269 return 0;
1270}
1271
0be9898a
MB		 1272static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1273 enum snd_soc_bias_level level)
1f53aee0 1274{
776065e3 1275 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1f53aee0 1276
0be9898a
MB		 1277 switch (level) {
1278 case SND_SOC_BIAS_ON:
1f53aee0 1279 /* set vmid to 50k and unmute dac */
776065e3 1280 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1f53aee0 1281 break;
0be9898a 1282 case SND_SOC_BIAS_PREPARE:
1f53aee0 1283 /* set vmid to 5k for quick power up */
776065e3 1284 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1f53aee0 1285 break;
0be9898a 1286 case SND_SOC_BIAS_STANDBY:
1f53aee0 1287 /* mute dac and set vmid to 500k, enable VREF */
776065e3 1288 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1f53aee0 1289 break;
0be9898a 1290 case SND_SOC_BIAS_OFF:
776065e3 1291 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1f53aee0
LG		 1292 break;
1293 }
ce6120cc 1294 codec->dapm.bias_level = level;
1f53aee0
LG		 1295 return 0;
1296}
1297
1298#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1299 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1300 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1301 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1302
1303#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1304 SNDRV_PCM_FMTBIT_S24_LE)
1305
1306/*
25985edc 1307 * The WM8753 supports up to 4 different and mutually exclusive DAI
1f53aee0
LG		 1308 * configurations. This gives 2 PCM's available for use, hifi and voice.
1309 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1310 * is connected between the wm8753 and a BT codec or GSM modem.
1311 *
1312 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1313 * 2. Voice over HIFI DAI - HIFI disabled
1314 * 3. Voice disabled - HIFI over HIFI
1315 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1316 */
85e7652d 1317static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
6335d055
EM		 1318 .hw_params = wm8753_i2s_hw_params,
1319 .digital_mute = wm8753_mute,
338ee253 1320 .set_fmt = wm8753_hifi_set_dai_fmt,
6335d055
EM		 1321 .set_clkdiv = wm8753_set_dai_clkdiv,
1322 .set_pll = wm8753_set_dai_pll,
1323 .set_sysclk = wm8753_set_dai_sysclk,
1324};
1325
85e7652d 1326static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
6335d055
EM		 1327 .hw_params = wm8753_pcm_hw_params,
1328 .digital_mute = wm8753_mute,
338ee253 1329 .set_fmt = wm8753_voice_set_dai_fmt,
6335d055
EM		 1330 .set_clkdiv = wm8753_set_dai_clkdiv,
1331 .set_pll = wm8753_set_dai_pll,
1332 .set_sysclk = wm8753_set_dai_sysclk,
1333};
1334
338ee253 1335static struct snd_soc_dai_driver wm8753_dai[] = {
1f53aee0 1336/* DAI HiFi mode 1 */
f0fba2ad 1337{ .name = "wm8753-hifi",
1f53aee0
LG		 1338 .playback = {
1339 .stream_name = "HiFi Playback",
1340 .channels_min = 1,
1341 .channels_max = 2,
1342 .rates = WM8753_RATES,
338ee253
LPC		 1343 .formats = WM8753_FORMATS
1344 },
1f53aee0
LG		 1345 .capture = { /* dummy for fast DAI switching */
1346 .stream_name = "Capture",
1347 .channels_min = 1,
1348 .channels_max = 2,
1349 .rates = WM8753_RATES,
338ee253
LPC		 1350 .formats = WM8753_FORMATS
1351 },
1352 .ops = &wm8753_dai_ops_hifi_mode,
1f53aee0
LG		 1353},
1354/* DAI Voice mode 1 */
f0fba2ad 1355{ .name = "wm8753-voice",
1f53aee0
LG		 1356 .playback = {
1357 .stream_name = "Voice Playback",
1358 .channels_min = 1,
1359 .channels_max = 1,
1360 .rates = WM8753_RATES,
338ee253
LPC		 1361 .formats = WM8753_FORMATS,
1362 },
1f53aee0
LG		 1363 .capture = {
1364 .stream_name = "Capture",
1365 .channels_min = 1,
1366 .channels_max = 2,
1367 .rates = WM8753_RATES,
338ee253 1368 .formats = WM8753_FORMATS,
9e70c1f0 1369 },
338ee253
LPC		 1370 .ops = &wm8753_dai_ops_voice_mode,
1371},
9e70c1f0 1372};
1f53aee0 1373
1f53aee0
LG		 1374static void wm8753_work(struct work_struct *work)
1375{
ce6120cc
LG		 1376 struct snd_soc_dapm_context *dapm =
1377 container_of(work, struct snd_soc_dapm_context,
1378 delayed_work.work);
1379 struct snd_soc_codec *codec = dapm->codec;
1380 wm8753_set_bias_level(codec, dapm->bias_level);
1f53aee0
LG		 1381}
1382
84b315ee 1383static int wm8753_suspend(struct snd_soc_codec *codec)
1f53aee0 1384{
0be9898a 1385 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1386 return 0;
1387}
1388
f0fba2ad 1389static int wm8753_resume(struct snd_soc_codec *codec)
1f53aee0 1390{
776065e3 1391 u16 *reg_cache = codec->reg_cache;
1f53aee0 1392 int i;
1f53aee0 1393
1f53aee0 1394 /* Sync reg_cache with the hardware */
776065e3
LPC		 1395 for (i = 1; i < ARRAY_SIZE(wm8753_reg); i++) {
1396 if (i == WM8753_RESET)
1f53aee0 1397 continue;
e611bd82
MB		 1398
1399 /* No point in writing hardware default values back */
776065e3 1400 if (reg_cache[i] == wm8753_reg[i])
e611bd82
MB		 1401 continue;
1402
776065e3 1403 snd_soc_write(codec, i, reg_cache[i]);
1f53aee0
LG		 1404 }
1405
0be9898a 1406 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1407
1408 /* charge wm8753 caps */
ce6120cc 1409 if (codec->dapm.suspend_bias_level == SND_SOC_BIAS_ON) {
0be9898a 1410 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc
LG		 1411 codec->dapm.bias_level = SND_SOC_BIAS_ON;
1412 schedule_delayed_work(&codec->dapm.delayed_work,
1f53aee0
LG		 1413 msecs_to_jiffies(caps_charge));
1414 }
1415
1416 return 0;
1417}
1418
f0fba2ad 1419static int wm8753_probe(struct snd_soc_codec *codec)
1f53aee0 1420{
f0fba2ad 1421 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1422 int ret;
1f53aee0 1423
ce6120cc 1424 INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work);
c2bac160 1425
f0fba2ad
LG		 1426 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8753->control_type);
1427 if (ret < 0) {
1428 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1429 return ret;
c2bac160
MB		 1430 }
1431
c2bac160
MB		 1432 ret = wm8753_reset(codec);
1433 if (ret < 0) {
f0fba2ad
LG		 1434 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1435 return ret;
c2bac160
MB		 1436 }
1437
f0fba2ad
LG		 1438 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1439 wm8753->dai_func = 0;
1440
c2bac160
MB		 1441 /* charge output caps */
1442 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc 1443 schedule_delayed_work(&codec->dapm.delayed_work,
c2bac160
MB		 1444 msecs_to_jiffies(caps_charge));
1445
1446 /* set the update bits */
776065e3
LPC		 1447 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1448 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
21d17dd2
AL		 1449 snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100);
1450 snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100);
776065e3
LPC		 1451 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1452 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1453 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1454 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1455 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1456 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
c2bac160 1457
c2bac160 1458 return 0;
c2bac160
MB		 1459}
1460
f0fba2ad
LG		 1461/* power down chip */
1462static int wm8753_remove(struct snd_soc_codec *codec)
c2bac160 1463{
fdea0571 1464 flush_delayed_work_sync(&codec->dapm.delayed_work);
f0fba2ad
LG		 1465 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1466
1467 return 0;
c2bac160
MB		 1468}
1469
f0fba2ad
LG		 1470static struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
1471 .probe = wm8753_probe,
1472 .remove = wm8753_remove,
1473 .suspend = wm8753_suspend,
1474 .resume = wm8753_resume,
1475 .set_bias_level = wm8753_set_bias_level,
e5eec34c 1476 .reg_cache_size = ARRAY_SIZE(wm8753_reg),
f0fba2ad
LG		 1477 .reg_word_size = sizeof(u16),
1478 .reg_cache_default = wm8753_reg,
56a926dd
MB		 1479
1480 .controls = wm8753_snd_controls,
1481 .num_controls = ARRAY_SIZE(wm8753_snd_controls),
1482 .dapm_widgets = wm8753_dapm_widgets,
1483 .num_dapm_widgets = ARRAY_SIZE(wm8753_dapm_widgets),
1484 .dapm_routes = wm8753_dapm_routes,
1485 .num_dapm_routes = ARRAY_SIZE(wm8753_dapm_routes),
f0fba2ad 1486};
69e169da 1487
70e14122
MB		 1488static const struct of_device_id wm8753_of_match[] = {
1489 { .compatible = "wlf,wm8753", },
1490 { }
1491};
1492MODULE_DEVICE_TABLE(of, wm8753_of_match);
1493
f0fba2ad
LG		 1494#if defined(CONFIG_SPI_MASTER)
1495static int __devinit wm8753_spi_probe(struct spi_device *spi)
69e169da 1496{
c2bac160 1497 struct wm8753_priv *wm8753;
f0fba2ad 1498 int ret;
69e169da 1499
c2bac160
MB		 1500 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1501 if (wm8753 == NULL)
1502 return -ENOMEM;
69e169da 1503
f0fba2ad
LG		 1504 wm8753->control_type = SND_SOC_SPI;
1505 spi_set_drvdata(spi, wm8753);
c2bac160 1506
f0fba2ad
LG		 1507 ret = snd_soc_register_codec(&spi->dev,
1508 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1509 if (ret < 0)
1510 kfree(wm8753);
1511 return ret;
69e169da
MB		 1512}
1513
f0fba2ad 1514static int __devexit wm8753_spi_remove(struct spi_device *spi)
69e169da 1515{
f0fba2ad
LG		 1516 snd_soc_unregister_codec(&spi->dev);
1517 kfree(spi_get_drvdata(spi));
1518 return 0;
69e169da
MB		 1519}
1520
f0fba2ad 1521static struct spi_driver wm8753_spi_driver = {
69e169da 1522 .driver = {
63010634 1523 .name = "wm8753",
f0fba2ad 1524 .owner = THIS_MODULE,
70e14122 1525 .of_match_table = wm8753_of_match,
69e169da 1526 },
f0fba2ad
LG		 1527 .probe = wm8753_spi_probe,
1528 .remove = __devexit_p(wm8753_spi_remove),
69e169da 1529};
f0fba2ad 1530#endif /* CONFIG_SPI_MASTER */
69e169da 1531
f0fba2ad
LG		 1532#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1533static __devinit int wm8753_i2c_probe(struct i2c_client *i2c,
1534 const struct i2c_device_id *id)
69e169da 1535{
c2bac160 1536 struct wm8753_priv *wm8753;
f0fba2ad 1537 int ret;
c2bac160
MB		 1538
1539 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1540 if (wm8753 == NULL)
1541 return -ENOMEM;
69e169da 1542
f0fba2ad 1543 i2c_set_clientdata(i2c, wm8753);
f0fba2ad 1544 wm8753->control_type = SND_SOC_I2C;
69e169da 1545
f0fba2ad
LG		 1546 ret = snd_soc_register_codec(&i2c->dev,
1547 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1548 if (ret < 0)
1549 kfree(wm8753);
1550 return ret;
69e169da
MB		 1551}
1552
f0fba2ad 1553static __devexit int wm8753_i2c_remove(struct i2c_client *client)
69e169da 1554{
f0fba2ad
LG		 1555 snd_soc_unregister_codec(&client->dev);
1556 kfree(i2c_get_clientdata(client));
69e169da
MB		 1557 return 0;
1558}
1559
f0fba2ad
LG		 1560static const struct i2c_device_id wm8753_i2c_id[] = {
1561 { "wm8753", 0 },
1562 { }
1563};
1564MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1565
1566static struct i2c_driver wm8753_i2c_driver = {
69e169da 1567 .driver = {
63010634 1568 .name = "wm8753",
f0fba2ad 1569 .owner = THIS_MODULE,
70e14122 1570 .of_match_table = wm8753_of_match,
69e169da 1571 },
f0fba2ad
LG		 1572 .probe = wm8753_i2c_probe,
1573 .remove = __devexit_p(wm8753_i2c_remove),
1574 .id_table = wm8753_i2c_id,
69e169da
MB		 1575};
1576#endif
1577
c9b3a40f 1578static int __init wm8753_modinit(void)
64089b84 1579{
f0fba2ad 1580 int ret = 0;
c2bac160
MB		 1581#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1582 ret = i2c_add_driver(&wm8753_i2c_driver);
f0fba2ad
LG		 1583 if (ret != 0) {
1584 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1585 ret);
1586 }
c2bac160
MB		 1587#endif
1588#if defined(CONFIG_SPI_MASTER)
1589 ret = spi_register_driver(&wm8753_spi_driver);
f0fba2ad
LG		 1590 if (ret != 0) {
1591 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1592 ret);
1593 }
c2bac160 1594#endif
f0fba2ad 1595 return ret;
64089b84
MB		 1596}
1597module_init(wm8753_modinit);
1598
1599static void __exit wm8753_exit(void)
1600{
c2bac160
MB		 1601#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1602 i2c_del_driver(&wm8753_i2c_driver);
1603#endif
1604#if defined(CONFIG_SPI_MASTER)
1605 spi_unregister_driver(&wm8753_spi_driver);
1606#endif
64089b84
MB		 1607}
1608module_exit(wm8753_exit);
1609
1f53aee0
LG		 1610MODULE_DESCRIPTION("ASoC WM8753 driver");
1611MODULE_AUTHOR("Liam Girdwood");
1612MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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