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ASoC: Fix Zylonite voice interface stereo configurations
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
1f53aee0
LG		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/soc.h>
47#include <sound/soc-dapm.h>
48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
1f53aee0
LG		 54static int caps_charge = 2000;
55module_param(caps_charge, int, 0);
56MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
57
58static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
59 unsigned int mode);
60
61/* codec private data */
62struct wm8753_priv {
63 unsigned int sysclk;
64 unsigned int pcmclk;
65};
66
67/*
68 * wm8753 register cache
69 * We can't read the WM8753 register space when we
70 * are using 2 wire for device control, so we cache them instead.
71 */
72static const u16 wm8753_reg[] = {
73 0x0008, 0x0000, 0x000a, 0x000a,
74 0x0033, 0x0000, 0x0007, 0x00ff,
75 0x00ff, 0x000f, 0x000f, 0x007b,
76 0x0000, 0x0032, 0x0000, 0x00c3,
77 0x00c3, 0x00c0, 0x0000, 0x0000,
78 0x0000, 0x0000, 0x0000, 0x0000,
79 0x0000, 0x0000, 0x0000, 0x0000,
80 0x0000, 0x0000, 0x0000, 0x0055,
81 0x0005, 0x0050, 0x0055, 0x0050,
82 0x0055, 0x0050, 0x0055, 0x0079,
83 0x0079, 0x0079, 0x0079, 0x0079,
84 0x0000, 0x0000, 0x0000, 0x0000,
85 0x0097, 0x0097, 0x0000, 0x0004,
86 0x0000, 0x0083, 0x0024, 0x01ba,
87 0x0000, 0x0083, 0x0024, 0x01ba,
88 0x0000, 0x0000
89};
90
91/*
92 * read wm8753 register cache
93 */
94static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
95 unsigned int reg)
96{
97 u16 *cache = codec->reg_cache;
91432e97 98 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 99 return -1;
100 return cache[reg - 1];
101}
102
103/*
104 * write wm8753 register cache
105 */
106static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
107 unsigned int reg, unsigned int value)
108{
109 u16 *cache = codec->reg_cache;
91432e97 110 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 111 return;
112 cache[reg - 1] = value;
113}
114
115/*
116 * write to the WM8753 register space
117 */
118static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
119 unsigned int value)
120{
121 u8 data[2];
122
123 /* data is
124 * D15..D9 WM8753 register offset
125 * D8...D0 register data
126 */
127 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
128 data[1] = value & 0x00ff;
129
60fc684a 130 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 131 if (codec->hw_write(codec->control_data, data, 2) == 2)
132 return 0;
133 else
134 return -EIO;
135}
136
137#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
138
139/*
140 * WM8753 Controls
141 */
142static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
143static const char *wm8753_base_filter[] =
144 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
145 "100Hz @ 8kHz", "200Hz @ 8kHz"};
146static const char *wm8753_treble[] = {"8kHz", "4kHz"};
147static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
148static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
149static const char *wm8753_3d_func[] = {"Capture", "Playback"};
150static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
151static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
152static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
153static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
154static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
155static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
156 "Line 1", "Line 2"};
157static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
158static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
159static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
160static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
161static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
162 "Right PGA"};
163static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
164 "Left + Right"};
165static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
166static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
167static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
168static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
169static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
170 "Analogue Mix Right", "Digital Mono Mix"};
171static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
172 "82Hz @ 8kHz", "170Hz @ 8kHz"};
173static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
174static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
175static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
176static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
177 "Channel Swap"};
ae092c9e 178static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 179
180static const struct soc_enum wm8753_enum[] = {
181SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
182SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
183SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
184SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
185SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
186SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
187SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
188SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
189SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
190SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
191SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
192SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
193SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
194SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
195SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
196SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
197SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
198SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
199SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
200SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
201SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
202SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
203SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
204SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
205SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
206SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
207SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
208SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 209SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 210};
211
212
213static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
214 struct snd_ctl_elem_value *ucontrol)
215{
216 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
217 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
218
219 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
220 return 0;
221}
222
223static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
224 struct snd_ctl_elem_value *ucontrol)
225{
226 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
227 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
228
60fc684a 229 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 230 return 0;
231
232 mode &= 0xfff3;
233 mode |= (ucontrol->value.integer.value[0] << 2);
234
235 wm8753_write(codec, WM8753_IOCTL, mode);
236 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
237 return 1;
238}
239
2cc8c609
MM		 240static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
241static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
242static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
243static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
244static const unsigned int out_tlv[] = {
245 TLV_DB_RANGE_HEAD(2),
246 /* 0000000 - 0101111 = "Analogue mute" */
247 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
248 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
249};
250static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
251static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
252static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 253
1f53aee0 254static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 255SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
256
257SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
258 adc_tlv),
259
260SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
261 0, 127, 0, out_tlv),
262SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
263 127, 0, out_tlv),
264
265SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
266
267SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
268 1, mix_tlv),
269SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
270 7, 1, mix_tlv),
271SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
272 1, voice_mix_tlv),
273
274SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
275 1, 0),
276SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
277 1, 0),
278
279SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
280SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
281 mix_tlv),
282SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
283 voice_mix_tlv),
1f53aee0
LG		 284SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
285
286SOC_ENUM("Bass Boost", wm8753_enum[0]),
287SOC_ENUM("Bass Filter", wm8753_enum[1]),
288SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
289
290SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
291SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
292
2cc8c609
MM		 293SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
294 rec_mix_tlv),
295SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
296 rec_mix_tlv),
1f53aee0 297
2cc8c609
MM		 298SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
299 pga_tlv),
1f53aee0
LG		 300SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
301SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
302
303SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
304SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
305SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
306
307SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
308SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
309SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
310SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
311SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
312SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
313SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
314SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
315SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
316SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
317
318SOC_ENUM("3D Function", wm8753_enum[5]),
319SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
320SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
321SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
322SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
323
324SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
325SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
326
327SOC_ENUM("De-emphasis", wm8753_enum[8]),
328SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
329SOC_ENUM("Playback Phase", wm8753_enum[10]),
330
2cc8c609
MM		 331SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
332SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 333
334SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
335
336SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 337SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 338};
339
1f53aee0
LG		 340/*
341 * _DAPM_ Controls
342 */
343
344/* Left Mixer */
345static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
346SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
347SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
348SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
349SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
350};
351
352/* Right mixer */
353static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
354SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
355SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
356SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
357SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
358};
359
360/* Mono mixer */
361static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
362SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
363SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
364SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
365SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
366SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
367};
368
369/* Mono 2 Mux */
370static const struct snd_kcontrol_new wm8753_mono2_controls =
371SOC_DAPM_ENUM("Route", wm8753_enum[17]);
372
373/* Out 3 Mux */
374static const struct snd_kcontrol_new wm8753_out3_controls =
375SOC_DAPM_ENUM("Route", wm8753_enum[18]);
376
377/* Out 4 Mux */
378static const struct snd_kcontrol_new wm8753_out4_controls =
379SOC_DAPM_ENUM("Route", wm8753_enum[19]);
380
381/* ADC Mono Mix */
382static const struct snd_kcontrol_new wm8753_adc_mono_controls =
383SOC_DAPM_ENUM("Route", wm8753_enum[22]);
384
385/* Record mixer */
386static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
387SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
388SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
389SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
390};
391
392/* Left ADC mux */
393static const struct snd_kcontrol_new wm8753_adc_left_controls =
394SOC_DAPM_ENUM("Route", wm8753_enum[21]);
395
396/* Right ADC mux */
397static const struct snd_kcontrol_new wm8753_adc_right_controls =
398SOC_DAPM_ENUM("Route", wm8753_enum[20]);
399
400/* MIC mux */
401static const struct snd_kcontrol_new wm8753_mic_mux_controls =
402SOC_DAPM_ENUM("Route", wm8753_enum[16]);
403
404/* ALC mixer */
405static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
406SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
407SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
408SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
409SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
410};
411
412/* Left Line mux */
413static const struct snd_kcontrol_new wm8753_line_left_controls =
414SOC_DAPM_ENUM("Route", wm8753_enum[14]);
415
416/* Right Line mux */
417static const struct snd_kcontrol_new wm8753_line_right_controls =
418SOC_DAPM_ENUM("Route", wm8753_enum[13]);
419
420/* Mono Line mux */
421static const struct snd_kcontrol_new wm8753_line_mono_controls =
422SOC_DAPM_ENUM("Route", wm8753_enum[12]);
423
424/* Line mux and mixer */
425static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
426SOC_DAPM_ENUM("Route", wm8753_enum[11]);
427
428/* Rx mux and mixer */
429static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
430SOC_DAPM_ENUM("Route", wm8753_enum[15]);
431
432/* Mic Selector Mux */
433static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
434SOC_DAPM_ENUM("Route", wm8753_enum[25]);
435
436static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
437SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
438SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
439 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
440SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
441SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
442SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
443SND_SOC_DAPM_OUTPUT("LOUT1"),
444SND_SOC_DAPM_OUTPUT("LOUT2"),
445SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
446 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
447SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
448SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
449SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
450SND_SOC_DAPM_OUTPUT("ROUT1"),
451SND_SOC_DAPM_OUTPUT("ROUT2"),
452SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
453 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
454SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
455SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
456SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
457SND_SOC_DAPM_OUTPUT("MONO1"),
458SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
459SND_SOC_DAPM_OUTPUT("MONO2"),
460SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
461SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
462SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
463SND_SOC_DAPM_OUTPUT("OUT3"),
464SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
465SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
466SND_SOC_DAPM_OUTPUT("OUT4"),
467SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
468 &wm8753_record_mixer_controls[0],
469 ARRAY_SIZE(wm8753_record_mixer_controls)),
470SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
471SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
472SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
473 &wm8753_adc_mono_controls),
474SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
475 &wm8753_adc_mono_controls),
476SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
477 &wm8753_adc_left_controls),
478SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
479 &wm8753_adc_right_controls),
480SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
481 &wm8753_mic_mux_controls),
482SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
483SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
484SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
485 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
486SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
487 &wm8753_line_left_controls),
488SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
489 &wm8753_line_right_controls),
490SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
491 &wm8753_line_mono_controls),
492SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
493 &wm8753_line_mux_mix_controls),
494SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
495 &wm8753_rx_mux_mix_controls),
496SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
497SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
498SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
499 &wm8753_mic_sel_mux_controls),
500SND_SOC_DAPM_INPUT("LINE1"),
501SND_SOC_DAPM_INPUT("LINE2"),
502SND_SOC_DAPM_INPUT("RXP"),
503SND_SOC_DAPM_INPUT("RXN"),
504SND_SOC_DAPM_INPUT("ACIN"),
505SND_SOC_DAPM_OUTPUT("ACOP"),
506SND_SOC_DAPM_INPUT("MIC1N"),
507SND_SOC_DAPM_INPUT("MIC1"),
508SND_SOC_DAPM_INPUT("MIC2N"),
509SND_SOC_DAPM_INPUT("MIC2"),
510SND_SOC_DAPM_VMID("VREF"),
511};
512
a65f0568 513static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 514 /* left mixer */
515 {"Left Mixer", "Left Playback Switch", "Left DAC"},
516 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
517 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
518 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
519
520 /* right mixer */
521 {"Right Mixer", "Right Playback Switch", "Right DAC"},
522 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
523 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
524 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
525
526 /* mono mixer */
527 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
528 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
529 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
530 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
531 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
532
533 /* left out */
534 {"Left Out 1", NULL, "Left Mixer"},
535 {"Left Out 2", NULL, "Left Mixer"},
536 {"LOUT1", NULL, "Left Out 1"},
537 {"LOUT2", NULL, "Left Out 2"},
538
539 /* right out */
540 {"Right Out 1", NULL, "Right Mixer"},
541 {"Right Out 2", NULL, "Right Mixer"},
542 {"ROUT1", NULL, "Right Out 1"},
543 {"ROUT2", NULL, "Right Out 2"},
544
545 /* mono 1 out */
546 {"Mono Out 1", NULL, "Mono Mixer"},
547 {"MONO1", NULL, "Mono Out 1"},
548
549 /* mono 2 out */
550 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
551 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
552 {"Mono 2 Mux", "Left", "Left Mixer"},
553 {"Mono 2 Mux", "Right", "Right Mixer"},
554 {"Mono Out 2", NULL, "Mono 2 Mux"},
555 {"MONO2", NULL, "Mono Out 2"},
556
557 /* out 3 */
558 {"Out3 Left + Right", NULL, "Left Mixer"},
559 {"Out3 Left + Right", NULL, "Right Mixer"},
560 {"Out3 Mux", "VREF", "VREF"},
561 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
562 {"Out3 Mux", "ROUT2", "ROUT2"},
563 {"Out 3", NULL, "Out3 Mux"},
564 {"OUT3", NULL, "Out 3"},
565
566 /* out 4 */
567 {"Out4 Mux", "VREF", "VREF"},
4037314a 568 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 569 {"Out4 Mux", "LOUT2", "LOUT2"},
570 {"Out 4", NULL, "Out4 Mux"},
571 {"OUT4", NULL, "Out 4"},
572
573 /* record mixer */
574 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
575 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
576 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
577
578 /* Mic/SideTone Mux */
579 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
580 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
581 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
582 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
583
584 /* Capture Left Mux */
585 {"Capture Left Mux", "PGA", "Left Capture Volume"},
586 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
587 {"Capture Left Mux", "Line", "LINE1"},
588
589 /* Capture Right Mux */
590 {"Capture Right Mux", "PGA", "Right Capture Volume"},
591 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 592 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 593
594 /* Mono Capture mixer-mux */
595 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
596 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
597 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
598 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
599 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
600 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
601 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
602 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
603 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
604
605 /* ADC */
606 {"Left ADC", NULL, "Capture Left Mixer"},
607 {"Right ADC", NULL, "Capture Right Mixer"},
608
609 /* Left Capture Volume */
610 {"Left Capture Volume", NULL, "ACIN"},
611
612 /* Right Capture Volume */
613 {"Right Capture Volume", NULL, "Mic 2 Volume"},
614
615 /* ALC Mixer */
616 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
617 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
618 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
619 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
620
621 /* Line Left Mux */
622 {"Line Left Mux", "Line 1", "LINE1"},
623 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
624
625 /* Line Right Mux */
626 {"Line Right Mux", "Line 2", "LINE2"},
627 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
628
629 /* Line Mono Mux */
630 {"Line Mono Mux", "Line Mix", "Line Mixer"},
631 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
632
633 /* Line Mixer/Mux */
634 {"Line Mixer", "Line 1 + 2", "LINE1"},
635 {"Line Mixer", "Line 1 - 2", "LINE1"},
636 {"Line Mixer", "Line 1 + 2", "LINE2"},
637 {"Line Mixer", "Line 1 - 2", "LINE2"},
638 {"Line Mixer", "Line 1", "LINE1"},
639 {"Line Mixer", "Line 2", "LINE2"},
640
641 /* Rx Mixer/Mux */
642 {"Rx Mixer", "RXP - RXN", "RXP"},
643 {"Rx Mixer", "RXP + RXN", "RXP"},
644 {"Rx Mixer", "RXP - RXN", "RXN"},
645 {"Rx Mixer", "RXP + RXN", "RXN"},
646 {"Rx Mixer", "RXP", "RXP"},
647 {"Rx Mixer", "RXN", "RXN"},
648
649 /* Mic 1 Volume */
650 {"Mic 1 Volume", NULL, "MIC1N"},
651 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
652
653 /* Mic 2 Volume */
654 {"Mic 2 Volume", NULL, "MIC2N"},
655 {"Mic 2 Volume", NULL, "MIC2"},
656
657 /* Mic Selector Mux */
658 {"Mic Selection Mux", "Mic 1", "MIC1"},
659 {"Mic Selection Mux", "Mic 2", "MIC2N"},
660 {"Mic Selection Mux", "Mic 3", "MIC2"},
661
662 /* ACOP */
663 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 664};
665
666static int wm8753_add_widgets(struct snd_soc_codec *codec)
667{
a65f0568
MB		 668 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
669 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 670
a65f0568 671 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 672
673 snd_soc_dapm_new_widgets(codec);
674 return 0;
675}
676
677/* PLL divisors */
678struct _pll_div {
679 u32 div2:1;
680 u32 n:4;
681 u32 k:24;
682};
683
684/* The size in bits of the pll divide multiplied by 10
685 * to allow rounding later */
686#define FIXED_PLL_SIZE ((1 << 22) * 10)
687
688static void pll_factors(struct _pll_div *pll_div, unsigned int target,
689 unsigned int source)
690{
691 u64 Kpart;
692 unsigned int K, Ndiv, Nmod;
693
694 Ndiv = target / source;
695 if (Ndiv < 6) {
696 source >>= 1;
697 pll_div->div2 = 1;
698 Ndiv = target / source;
699 } else
700 pll_div->div2 = 0;
701
702 if ((Ndiv < 6) || (Ndiv > 12))
703 printk(KERN_WARNING
60fc684a 704 "wm8753: unsupported N = %d\n", Ndiv);
1f53aee0
LG		 705
706 pll_div->n = Ndiv;
707 Nmod = target % source;
708 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
709
710 do_div(Kpart, source);
711
712 K = Kpart & 0xFFFFFFFF;
713
714 /* Check if we need to round */
715 if ((K % 10) >= 5)
716 K += 5;
717
718 /* Move down to proper range now rounding is done */
719 K /= 10;
720
721 pll_div->k = K;
722}
723
e550e17f 724static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 725 int pll_id, unsigned int freq_in, unsigned int freq_out)
726{
727 u16 reg, enable;
728 int offset;
729 struct snd_soc_codec *codec = codec_dai->codec;
730
731 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
732 return -ENODEV;
733
734 if (pll_id == WM8753_PLL1) {
735 offset = 0;
736 enable = 0x10;
737 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
738 } else {
739 offset = 4;
740 enable = 0x8;
741 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
742 }
743
744 if (!freq_in || !freq_out) {
745 /* disable PLL */
746 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
747 wm8753_write(codec, WM8753_CLOCK, reg);
748 return 0;
749 } else {
750 u16 value = 0;
751 struct _pll_div pll_div;
752
753 pll_factors(&pll_div, freq_out * 8, freq_in);
754
755 /* set up N and K PLL divisor ratios */
756 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
757 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
758 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
759
760 /* bits 8:0 = PLL_K[17:9] */
761 value = (pll_div.k & 0x03fe00) >> 9;
762 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
763
764 /* bits 8:0 = PLL_K[8:0] */
765 value = pll_div.k & 0x0001ff;
766 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
767
768 /* set PLL as input and enable */
769 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
770 (pll_div.div2 << 3));
771 wm8753_write(codec, WM8753_CLOCK, reg | enable);
772 }
773 return 0;
774}
775
776struct _coeff_div {
777 u32 mclk;
778 u32 rate;
779 u8 sr:5;
780 u8 usb:1;
781};
782
783/* codec hifi mclk (after PLL) clock divider coefficients */
784static const struct _coeff_div coeff_div[] = {
785 /* 8k */
786 {12288000, 8000, 0x6, 0x0},
787 {11289600, 8000, 0x16, 0x0},
788 {18432000, 8000, 0x7, 0x0},
789 {16934400, 8000, 0x17, 0x0},
790 {12000000, 8000, 0x6, 0x1},
791
792 /* 11.025k */
793 {11289600, 11025, 0x18, 0x0},
794 {16934400, 11025, 0x19, 0x0},
795 {12000000, 11025, 0x19, 0x1},
796
797 /* 16k */
798 {12288000, 16000, 0xa, 0x0},
799 {18432000, 16000, 0xb, 0x0},
800 {12000000, 16000, 0xa, 0x1},
801
802 /* 22.05k */
803 {11289600, 22050, 0x1a, 0x0},
804 {16934400, 22050, 0x1b, 0x0},
805 {12000000, 22050, 0x1b, 0x1},
806
807 /* 32k */
808 {12288000, 32000, 0xc, 0x0},
809 {18432000, 32000, 0xd, 0x0},
810 {12000000, 32000, 0xa, 0x1},
811
812 /* 44.1k */
813 {11289600, 44100, 0x10, 0x0},
814 {16934400, 44100, 0x11, 0x0},
815 {12000000, 44100, 0x11, 0x1},
816
817 /* 48k */
818 {12288000, 48000, 0x0, 0x0},
819 {18432000, 48000, 0x1, 0x0},
820 {12000000, 48000, 0x0, 0x1},
821
822 /* 88.2k */
823 {11289600, 88200, 0x1e, 0x0},
824 {16934400, 88200, 0x1f, 0x0},
825 {12000000, 88200, 0x1f, 0x1},
826
827 /* 96k */
828 {12288000, 96000, 0xe, 0x0},
829 {18432000, 96000, 0xf, 0x0},
830 {12000000, 96000, 0xe, 0x1},
831};
832
833static int get_coeff(int mclk, int rate)
834{
835 int i;
836
837 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
838 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
839 return i;
840 }
841 return -EINVAL;
842}
843
844/*
845 * Clock after PLL and dividers
846 */
e550e17f 847static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 848 int clk_id, unsigned int freq, int dir)
849{
850 struct snd_soc_codec *codec = codec_dai->codec;
851 struct wm8753_priv *wm8753 = codec->private_data;
852
853 switch (freq) {
854 case 11289600:
855 case 12000000:
856 case 12288000:
857 case 16934400:
858 case 18432000:
859 if (clk_id == WM8753_MCLK) {
860 wm8753->sysclk = freq;
861 return 0;
862 } else if (clk_id == WM8753_PCMCLK) {
863 wm8753->pcmclk = freq;
864 return 0;
865 }
866 break;
867 }
868 return -EINVAL;
869}
870
871/*
872 * Set's ADC and Voice DAC format.
873 */
e550e17f 874static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 875 unsigned int fmt)
876{
877 struct snd_soc_codec *codec = codec_dai->codec;
878 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
879
880 /* interface format */
881 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
882 case SND_SOC_DAIFMT_I2S:
883 voice |= 0x0002;
884 break;
885 case SND_SOC_DAIFMT_RIGHT_J:
886 break;
887 case SND_SOC_DAIFMT_LEFT_J:
888 voice |= 0x0001;
889 break;
890 case SND_SOC_DAIFMT_DSP_A:
891 voice |= 0x0003;
892 break;
893 case SND_SOC_DAIFMT_DSP_B:
894 voice |= 0x0013;
895 break;
896 default:
897 return -EINVAL;
898 }
899
900 wm8753_write(codec, WM8753_PCM, voice);
901 return 0;
902}
903
904/*
905 * Set PCM DAI bit size and sample rate.
906 */
907static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 908 struct snd_pcm_hw_params *params,
909 struct snd_soc_dai *dai)
1f53aee0
LG		 910{
911 struct snd_soc_pcm_runtime *rtd = substream->private_data;
912 struct snd_soc_device *socdev = rtd->socdev;
6627a653 913 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 914 struct wm8753_priv *wm8753 = codec->private_data;
915 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
916 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
917
918 /* bit size */
919 switch (params_format(params)) {
920 case SNDRV_PCM_FORMAT_S16_LE:
921 break;
922 case SNDRV_PCM_FORMAT_S20_3LE:
923 voice |= 0x0004;
924 break;
925 case SNDRV_PCM_FORMAT_S24_LE:
926 voice |= 0x0008;
927 break;
928 case SNDRV_PCM_FORMAT_S32_LE:
929 voice |= 0x000c;
930 break;
931 }
932
933 /* sample rate */
934 if (params_rate(params) * 384 == wm8753->pcmclk)
935 srate |= 0x80;
936 wm8753_write(codec, WM8753_SRATE1, srate);
937
938 wm8753_write(codec, WM8753_PCM, voice);
939 return 0;
940}
941
942/*
943 * Set's PCM dai fmt and BCLK.
944 */
e550e17f 945static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 946 unsigned int fmt)
947{
948 struct snd_soc_codec *codec = codec_dai->codec;
949 u16 voice, ioctl;
950
951 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
952 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
953
954 /* set master/slave audio interface */
955 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
956 case SND_SOC_DAIFMT_CBS_CFS:
957 break;
958 case SND_SOC_DAIFMT_CBM_CFM:
959 ioctl |= 0x2;
960 case SND_SOC_DAIFMT_CBM_CFS:
961 voice |= 0x0040;
962 break;
963 default:
964 return -EINVAL;
965 }
966
967 /* clock inversion */
968 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
969 case SND_SOC_DAIFMT_DSP_A:
970 case SND_SOC_DAIFMT_DSP_B:
971 /* frame inversion not valid for DSP modes */
972 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
973 case SND_SOC_DAIFMT_NB_NF:
974 break;
975 case SND_SOC_DAIFMT_IB_NF:
976 voice |= 0x0080;
977 break;
978 default:
979 return -EINVAL;
980 }
981 break;
982 case SND_SOC_DAIFMT_I2S:
983 case SND_SOC_DAIFMT_RIGHT_J:
984 case SND_SOC_DAIFMT_LEFT_J:
985 voice &= ~0x0010;
986 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
987 case SND_SOC_DAIFMT_NB_NF:
988 break;
989 case SND_SOC_DAIFMT_IB_IF:
990 voice |= 0x0090;
991 break;
992 case SND_SOC_DAIFMT_IB_NF:
993 voice |= 0x0080;
994 break;
995 case SND_SOC_DAIFMT_NB_IF:
996 voice |= 0x0010;
997 break;
998 default:
999 return -EINVAL;
1000 }
1001 break;
1002 default:
1003 return -EINVAL;
1004 }
1005
1006 wm8753_write(codec, WM8753_PCM, voice);
1007 wm8753_write(codec, WM8753_IOCTL, ioctl);
1008 return 0;
1009}
1010
e550e17f 1011static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1012 int div_id, int div)
1013{
1014 struct snd_soc_codec *codec = codec_dai->codec;
1015 u16 reg;
1016
1017 switch (div_id) {
1018 case WM8753_PCMDIV:
1019 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1020 wm8753_write(codec, WM8753_CLOCK, reg | div);
1021 break;
1022 case WM8753_BCLKDIV:
1023 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1024 wm8753_write(codec, WM8753_SRATE2, reg | div);
1025 break;
1026 case WM8753_VXCLKDIV:
1027 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1028 wm8753_write(codec, WM8753_SRATE2, reg | div);
1029 break;
1030 default:
1031 return -EINVAL;
1032 }
1033 return 0;
1034}
1035
1036/*
1037 * Set's HiFi DAC format.
1038 */
e550e17f 1039static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1040 unsigned int fmt)
1041{
1042 struct snd_soc_codec *codec = codec_dai->codec;
1043 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1044
1045 /* interface format */
1046 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1047 case SND_SOC_DAIFMT_I2S:
1048 hifi |= 0x0002;
1049 break;
1050 case SND_SOC_DAIFMT_RIGHT_J:
1051 break;
1052 case SND_SOC_DAIFMT_LEFT_J:
1053 hifi |= 0x0001;
1054 break;
1055 case SND_SOC_DAIFMT_DSP_A:
1056 hifi |= 0x0003;
1057 break;
1058 case SND_SOC_DAIFMT_DSP_B:
1059 hifi |= 0x0013;
1060 break;
1061 default:
1062 return -EINVAL;
1063 }
1064
1065 wm8753_write(codec, WM8753_HIFI, hifi);
1066 return 0;
1067}
1068
1069/*
1070 * Set's I2S DAI format.
1071 */
e550e17f 1072static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1073 unsigned int fmt)
1074{
1075 struct snd_soc_codec *codec = codec_dai->codec;
1076 u16 ioctl, hifi;
1077
1078 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1079 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1080
1081 /* set master/slave audio interface */
1082 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1083 case SND_SOC_DAIFMT_CBS_CFS:
1084 break;
1085 case SND_SOC_DAIFMT_CBM_CFM:
1086 ioctl |= 0x1;
1087 case SND_SOC_DAIFMT_CBM_CFS:
1088 hifi |= 0x0040;
1089 break;
1090 default:
1091 return -EINVAL;
1092 }
1093
1094 /* clock inversion */
1095 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1096 case SND_SOC_DAIFMT_DSP_A:
1097 case SND_SOC_DAIFMT_DSP_B:
1098 /* frame inversion not valid for DSP modes */
1099 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1100 case SND_SOC_DAIFMT_NB_NF:
1101 break;
1102 case SND_SOC_DAIFMT_IB_NF:
1103 hifi |= 0x0080;
1104 break;
1105 default:
1106 return -EINVAL;
1107 }
1108 break;
1109 case SND_SOC_DAIFMT_I2S:
1110 case SND_SOC_DAIFMT_RIGHT_J:
1111 case SND_SOC_DAIFMT_LEFT_J:
1112 hifi &= ~0x0010;
1113 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1114 case SND_SOC_DAIFMT_NB_NF:
1115 break;
1116 case SND_SOC_DAIFMT_IB_IF:
1117 hifi |= 0x0090;
1118 break;
1119 case SND_SOC_DAIFMT_IB_NF:
1120 hifi |= 0x0080;
1121 break;
1122 case SND_SOC_DAIFMT_NB_IF:
1123 hifi |= 0x0010;
1124 break;
1125 default:
1126 return -EINVAL;
1127 }
1128 break;
1129 default:
1130 return -EINVAL;
1131 }
1132
1133 wm8753_write(codec, WM8753_HIFI, hifi);
1134 wm8753_write(codec, WM8753_IOCTL, ioctl);
1135 return 0;
1136}
1137
1138/*
1139 * Set PCM DAI bit size and sample rate.
1140 */
1141static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1142 struct snd_pcm_hw_params *params,
1143 struct snd_soc_dai *dai)
1f53aee0
LG		 1144{
1145 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1146 struct snd_soc_device *socdev = rtd->socdev;
6627a653 1147 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1148 struct wm8753_priv *wm8753 = codec->private_data;
1149 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1150 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1151 int coeff;
1152
1153 /* is digital filter coefficient valid ? */
1154 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1155 if (coeff < 0) {
1156 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1157 return coeff;
1158 }
1159 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1160 coeff_div[coeff].usb);
1161
1162 /* bit size */
1163 switch (params_format(params)) {
1164 case SNDRV_PCM_FORMAT_S16_LE:
1165 break;
1166 case SNDRV_PCM_FORMAT_S20_3LE:
1167 hifi |= 0x0004;
1168 break;
1169 case SNDRV_PCM_FORMAT_S24_LE:
1170 hifi |= 0x0008;
1171 break;
1172 case SNDRV_PCM_FORMAT_S32_LE:
1173 hifi |= 0x000c;
1174 break;
1175 }
1176
1177 wm8753_write(codec, WM8753_HIFI, hifi);
1178 return 0;
1179}
1180
e550e17f 1181static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1182 unsigned int fmt)
1183{
1184 struct snd_soc_codec *codec = codec_dai->codec;
1185 u16 clock;
1186
1187 /* set clk source as pcmclk */
1188 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1189 wm8753_write(codec, WM8753_CLOCK, clock);
1190
1191 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1192 return -EINVAL;
1193 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1194}
1195
e550e17f 1196static int wm8753_mode1h_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1197 unsigned int fmt)
1198{
1199 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1200 return -EINVAL;
1201 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1202}
1203
e550e17f 1204static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1205 unsigned int fmt)
1206{
1207 struct snd_soc_codec *codec = codec_dai->codec;
1208 u16 clock;
1209
1210 /* set clk source as pcmclk */
1211 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1212 wm8753_write(codec, WM8753_CLOCK, clock);
1213
1214 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1215 return -EINVAL;
1216 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1217}
1218
e550e17f 1219static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1220 unsigned int fmt)
1221{
1222 struct snd_soc_codec *codec = codec_dai->codec;
1223 u16 clock;
1224
1225 /* set clk source as mclk */
1226 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1227 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1228
1229 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1230 return -EINVAL;
1231 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1232 return -EINVAL;
1233 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1234}
1235
e550e17f 1236static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1237{
1238 struct snd_soc_codec *codec = dai->codec;
1239 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1240
1241 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1242 * make sure we check if they are not both active when we mute */
1243 if (mute && dai->id == 1) {
1244 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1245 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1246 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1247 } else {
1248 if (mute)
1249 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1250 else
1251 wm8753_write(codec, WM8753_DAC, mute_reg);
1252 }
1253
1254 return 0;
1255}
1256
0be9898a
MB		 1257static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1258 enum snd_soc_bias_level level)
1f53aee0
LG		 1259{
1260 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1261
0be9898a
MB		 1262 switch (level) {
1263 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1264 /* set vmid to 50k and unmute dac */
1265 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1266 break;
0be9898a 1267 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1268 /* set vmid to 5k for quick power up */
1269 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1270 break;
0be9898a 1271 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1272 /* mute dac and set vmid to 500k, enable VREF */
1273 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1274 break;
0be9898a 1275 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1276 wm8753_write(codec, WM8753_PWR1, 0x0001);
1277 break;
1278 }
0be9898a 1279 codec->bias_level = level;
1f53aee0
LG		 1280 return 0;
1281}
1282
1283#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1284 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1285 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1286 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1287
1288#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1289 SNDRV_PCM_FMTBIT_S24_LE)
1290
1291/*
1292 * The WM8753 supports upto 4 different and mutually exclusive DAI
1293 * configurations. This gives 2 PCM's available for use, hifi and voice.
1294 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1295 * is connected between the wm8753 and a BT codec or GSM modem.
1296 *
1297 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1298 * 2. Voice over HIFI DAI - HIFI disabled
1299 * 3. Voice disabled - HIFI over HIFI
1300 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1301 */
e550e17f 1302static const struct snd_soc_dai wm8753_all_dai[] = {
1f53aee0
LG		 1303/* DAI HiFi mode 1 */
1304{ .name = "WM8753 HiFi",
1305 .id = 1,
1306 .playback = {
1307 .stream_name = "HiFi Playback",
1308 .channels_min = 1,
1309 .channels_max = 2,
1310 .rates = WM8753_RATES,
dee89c4d 1311 .formats = WM8753_FORMATS},
1f53aee0
LG		 1312 .capture = { /* dummy for fast DAI switching */
1313 .stream_name = "Capture",
1314 .channels_min = 1,
1315 .channels_max = 2,
1316 .rates = WM8753_RATES,
dee89c4d 1317 .formats = WM8753_FORMATS},
1f53aee0 1318 .ops = {
dee89c4d 1319 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1320 .digital_mute = wm8753_mute,
1321 .set_fmt = wm8753_mode1h_set_dai_fmt,
1322 .set_clkdiv = wm8753_set_dai_clkdiv,
1323 .set_pll = wm8753_set_dai_pll,
1324 .set_sysclk = wm8753_set_dai_sysclk,
1325 },
1326},
1327/* DAI Voice mode 1 */
1328{ .name = "WM8753 Voice",
1329 .id = 1,
1330 .playback = {
1331 .stream_name = "Voice Playback",
1332 .channels_min = 1,
1333 .channels_max = 1,
1334 .rates = WM8753_RATES,
1335 .formats = WM8753_FORMATS,},
1336 .capture = {
1337 .stream_name = "Capture",
1338 .channels_min = 1,
1339 .channels_max = 2,
1340 .rates = WM8753_RATES,
1341 .formats = WM8753_FORMATS,},
1342 .ops = {
dee89c4d 1343 .hw_params = wm8753_pcm_hw_params,
1f53aee0
LG		 1344 .digital_mute = wm8753_mute,
1345 .set_fmt = wm8753_mode1v_set_dai_fmt,
1346 .set_clkdiv = wm8753_set_dai_clkdiv,
1347 .set_pll = wm8753_set_dai_pll,
1348 .set_sysclk = wm8753_set_dai_sysclk,
1349 },
1350},
1351/* DAI HiFi mode 2 - dummy */
1352{ .name = "WM8753 HiFi",
1353 .id = 2,
1354},
1355/* DAI Voice mode 2 */
1356{ .name = "WM8753 Voice",
1357 .id = 2,
1358 .playback = {
1359 .stream_name = "Voice Playback",
1360 .channels_min = 1,
1361 .channels_max = 1,
1362 .rates = WM8753_RATES,
1363 .formats = WM8753_FORMATS,},
1364 .capture = {
1365 .stream_name = "Capture",
1366 .channels_min = 1,
1367 .channels_max = 2,
1368 .rates = WM8753_RATES,
1369 .formats = WM8753_FORMATS,},
1370 .ops = {
dee89c4d 1371 .hw_params = wm8753_pcm_hw_params,
1f53aee0
LG		 1372 .digital_mute = wm8753_mute,
1373 .set_fmt = wm8753_mode2_set_dai_fmt,
1374 .set_clkdiv = wm8753_set_dai_clkdiv,
1375 .set_pll = wm8753_set_dai_pll,
1376 .set_sysclk = wm8753_set_dai_sysclk,
1377 },
1378},
1379/* DAI HiFi mode 3 */
1380{ .name = "WM8753 HiFi",
1381 .id = 3,
1382 .playback = {
1383 .stream_name = "HiFi Playback",
1384 .channels_min = 1,
1385 .channels_max = 2,
1386 .rates = WM8753_RATES,
1387 .formats = WM8753_FORMATS,},
1388 .capture = {
1389 .stream_name = "Capture",
1390 .channels_min = 1,
1391 .channels_max = 2,
1392 .rates = WM8753_RATES,
1393 .formats = WM8753_FORMATS,},
1394 .ops = {
dee89c4d 1395 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1396 .digital_mute = wm8753_mute,
1397 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1398 .set_clkdiv = wm8753_set_dai_clkdiv,
1399 .set_pll = wm8753_set_dai_pll,
1400 .set_sysclk = wm8753_set_dai_sysclk,
1401 },
1402},
1403/* DAI Voice mode 3 - dummy */
1404{ .name = "WM8753 Voice",
1405 .id = 3,
1406},
1407/* DAI HiFi mode 4 */
1408{ .name = "WM8753 HiFi",
1409 .id = 4,
1410 .playback = {
1411 .stream_name = "HiFi Playback",
1412 .channels_min = 1,
1413 .channels_max = 2,
1414 .rates = WM8753_RATES,
1415 .formats = WM8753_FORMATS,},
1416 .capture = {
1417 .stream_name = "Capture",
1418 .channels_min = 1,
1419 .channels_max = 2,
1420 .rates = WM8753_RATES,
1421 .formats = WM8753_FORMATS,},
1422 .ops = {
dee89c4d 1423 .hw_params = wm8753_i2s_hw_params,
1f53aee0
LG		 1424 .digital_mute = wm8753_mute,
1425 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1426 .set_clkdiv = wm8753_set_dai_clkdiv,
1427 .set_pll = wm8753_set_dai_pll,
1428 .set_sysclk = wm8753_set_dai_sysclk,
1429 },
1430},
1431/* DAI Voice mode 4 - dummy */
1432{ .name = "WM8753 Voice",
1433 .id = 4,
1434},
1435};
1436
9e70c1f0
MB		 1437struct snd_soc_dai wm8753_dai[] = {
1438 {
1439 .name = "WM8753 DAI 0",
1440 },
1441 {
1442 .name = "WM8753 DAI 1",
1443 },
1444};
1f53aee0
LG		 1445EXPORT_SYMBOL_GPL(wm8753_dai);
1446
1447static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1448{
1449 if (mode < 4) {
1450 int playback_active, capture_active, codec_active, pop_wait;
1451 void *private_data;
31b59cf9 1452 struct list_head list;
1f53aee0
LG		 1453
1454 playback_active = wm8753_dai[0].playback.active;
1455 capture_active = wm8753_dai[0].capture.active;
1456 codec_active = wm8753_dai[0].active;
1457 private_data = wm8753_dai[0].private_data;
1458 pop_wait = wm8753_dai[0].pop_wait;
31b59cf9 1459 list = wm8753_dai[0].list;
1f53aee0
LG		 1460 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1461 wm8753_dai[0].playback.active = playback_active;
1462 wm8753_dai[0].capture.active = capture_active;
1463 wm8753_dai[0].active = codec_active;
1464 wm8753_dai[0].private_data = private_data;
1465 wm8753_dai[0].pop_wait = pop_wait;
31b59cf9 1466 wm8753_dai[0].list = list;
1f53aee0
LG		 1467
1468 playback_active = wm8753_dai[1].playback.active;
1469 capture_active = wm8753_dai[1].capture.active;
1470 codec_active = wm8753_dai[1].active;
1471 private_data = wm8753_dai[1].private_data;
1472 pop_wait = wm8753_dai[1].pop_wait;
31b59cf9 1473 list = wm8753_dai[1].list;
1f53aee0
LG		 1474 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1475 wm8753_dai[1].playback.active = playback_active;
1476 wm8753_dai[1].capture.active = capture_active;
1477 wm8753_dai[1].active = codec_active;
1478 wm8753_dai[1].private_data = private_data;
1479 wm8753_dai[1].pop_wait = pop_wait;
31b59cf9 1480 wm8753_dai[1].list = list;
1f53aee0
LG		 1481 }
1482 wm8753_dai[0].codec = codec;
1483 wm8753_dai[1].codec = codec;
1484}
1485
1486static void wm8753_work(struct work_struct *work)
1487{
1488 struct snd_soc_codec *codec =
1489 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1490 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1491}
1492
1493static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1494{
1495 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1496 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1497
1498 /* we only need to suspend if we are a valid card */
60fc684a 1499 if (!codec->card)
1f53aee0 1500 return 0;
60fc684a 1501
0be9898a 1502 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1503 return 0;
1504}
1505
1506static int wm8753_resume(struct platform_device *pdev)
1507{
1508 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1509 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1510 int i;
1511 u8 data[2];
1512 u16 *cache = codec->reg_cache;
1513
1514 /* we only need to resume if we are a valid card */
60fc684a 1515 if (!codec->card)
1f53aee0
LG		 1516 return 0;
1517
1518 /* Sync reg_cache with the hardware */
1519 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1520 if (i + 1 == WM8753_RESET)
1521 continue;
1522 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1523 data[1] = cache[i] & 0x00ff;
1524 codec->hw_write(codec->control_data, data, 2);
1525 }
1526
0be9898a 1527 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1528
1529 /* charge wm8753 caps */
0be9898a
MB		 1530 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1531 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1532 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1533 schedule_delayed_work(&codec->delayed_work,
1534 msecs_to_jiffies(caps_charge));
1535 }
1536
1537 return 0;
1538}
1539
1540/*
1541 * initialise the WM8753 driver
1542 * register the mixer and dsp interfaces with the kernel
1543 */
1544static int wm8753_init(struct snd_soc_device *socdev)
1545{
6627a653 1546 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1547 int reg, ret = 0;
1548
1549 codec->name = "WM8753";
1550 codec->owner = THIS_MODULE;
1551 codec->read = wm8753_read_reg_cache;
1552 codec->write = wm8753_write;
0be9898a 1553 codec->set_bias_level = wm8753_set_bias_level;
1f53aee0
LG		 1554 codec->dai = wm8753_dai;
1555 codec->num_dai = 2;
d751b233 1556 codec->reg_cache_size = ARRAY_SIZE(wm8753_reg);
1f53aee0
LG		 1557 codec->reg_cache = kmemdup(wm8753_reg, sizeof(wm8753_reg), GFP_KERNEL);
1558
1559 if (codec->reg_cache == NULL)
1560 return -ENOMEM;
1561
1562 wm8753_set_dai_mode(codec, 0);
1563
eeb1080b
MB		 1564 ret = wm8753_reset(codec);
1565 if (ret < 0) {
1566 printk(KERN_ERR "wm8753: failed to reset device\n");
1567 return ret;
1568 }
1f53aee0
LG		 1569
1570 /* register pcms */
1571 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1572 if (ret < 0) {
1573 printk(KERN_ERR "wm8753: failed to create pcms\n");
1574 goto pcm_err;
1575 }
1576
1577 /* charge output caps */
0be9898a
MB		 1578 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1579 codec->bias_level = SND_SOC_BIAS_STANDBY;
1f53aee0
LG		 1580 schedule_delayed_work(&codec->delayed_work,
1581 msecs_to_jiffies(caps_charge));
1582
1583 /* set the update bits */
1584 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1585 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1586 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1587 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1588 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1589 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1590 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1591 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1592 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1593 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1594 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1595 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1596 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1597 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1598 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1599 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1600 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1601 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1602 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1603 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1604
3e8e1952
IM		 1605 snd_soc_add_controls(codec, wm8753_snd_controls,
1606 ARRAY_SIZE(wm8753_snd_controls));
1f53aee0 1607 wm8753_add_widgets(codec);
968a6025 1608 ret = snd_soc_init_card(socdev);
1f53aee0 1609 if (ret < 0) {
60fc684a 1610 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1611 goto card_err;
60fc684a
MB		 1612 }
1613
1f53aee0
LG		 1614 return ret;
1615
1616card_err:
1617 snd_soc_free_pcms(socdev);
1618 snd_soc_dapm_free(socdev);
1619pcm_err:
1620 kfree(codec->reg_cache);
1621 return ret;
1622}
1623
1624/* If the i2c layer weren't so broken, we could pass this kind of data
1625 around */
1626static struct snd_soc_device *wm8753_socdev;
1627
60fc684a 1628#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0
LG		 1629
1630/*
1631 * WM8753 2 wire address is determined by GPIO5
1632 * state during powerup.
1633 * low = 0x1a
1634 * high = 0x1b
1635 */
1f53aee0 1636
ad4503d8
JD		 1637static int wm8753_i2c_probe(struct i2c_client *i2c,
1638 const struct i2c_device_id *id)
1f53aee0
LG		 1639{
1640 struct snd_soc_device *socdev = wm8753_socdev;
6627a653 1641 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1642 int ret;
1643
1f53aee0
LG		 1644 i2c_set_clientdata(i2c, codec);
1645 codec->control_data = i2c;
1646
1f53aee0 1647 ret = wm8753_init(socdev);
ad4503d8 1648 if (ret < 0)
a5c95e90 1649 pr_err("failed to initialise WM8753\n");
1f53aee0 1650
1f53aee0
LG		 1651 return ret;
1652}
1653
ad4503d8 1654static int wm8753_i2c_remove(struct i2c_client *client)
1f53aee0
LG		 1655{
1656 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1f53aee0 1657 kfree(codec->reg_cache);
1f53aee0
LG		 1658 return 0;
1659}
1660
ad4503d8
JD		 1661static const struct i2c_device_id wm8753_i2c_id[] = {
1662 { "wm8753", 0 },
1663 { }
1664};
1665MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1f53aee0 1666
1f53aee0
LG		 1667static struct i2c_driver wm8753_i2c_driver = {
1668 .driver = {
1669 .name = "WM8753 I2C Codec",
1670 .owner = THIS_MODULE,
1671 },
ad4503d8
JD		 1672 .probe = wm8753_i2c_probe,
1673 .remove = wm8753_i2c_remove,
1674 .id_table = wm8753_i2c_id,
1f53aee0
LG		 1675};
1676
ad4503d8
JD		 1677static int wm8753_add_i2c_device(struct platform_device *pdev,
1678 const struct wm8753_setup_data *setup)
1679{
1680 struct i2c_board_info info;
1681 struct i2c_adapter *adapter;
1682 struct i2c_client *client;
1683 int ret;
1684
1685 ret = i2c_add_driver(&wm8753_i2c_driver);
1686 if (ret != 0) {
1687 dev_err(&pdev->dev, "can't add i2c driver\n");
1688 return ret;
1689 }
1690
1691 memset(&info, 0, sizeof(struct i2c_board_info));
1692 info.addr = setup->i2c_address;
1693 strlcpy(info.type, "wm8753", I2C_NAME_SIZE);
1694
1695 adapter = i2c_get_adapter(setup->i2c_bus);
1696 if (!adapter) {
1697 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
1698 setup->i2c_bus);
1699 goto err_driver;
1700 }
1701
1702 client = i2c_new_device(adapter, &info);
1703 i2c_put_adapter(adapter);
1704 if (!client) {
1705 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
1706 (unsigned int)info.addr);
1707 goto err_driver;
1708 }
1709
1710 return 0;
1711
1712err_driver:
1713 i2c_del_driver(&wm8753_i2c_driver);
1714 return -ENODEV;
1715}
1f53aee0
LG		 1716#endif
1717
dd0c0c80
MB		 1718#if defined(CONFIG_SPI_MASTER)
1719static int __devinit wm8753_spi_probe(struct spi_device *spi)
1720{
1721 struct snd_soc_device *socdev = wm8753_socdev;
6627a653 1722 struct snd_soc_codec *codec = socdev->card->codec;
dd0c0c80
MB		 1723 int ret;
1724
1725 codec->control_data = spi;
1726
1727 ret = wm8753_init(socdev);
1728 if (ret < 0)
1729 dev_err(&spi->dev, "failed to initialise WM8753\n");
1730
1731 return ret;
1732}
1733
1734static int __devexit wm8753_spi_remove(struct spi_device *spi)
1735{
1736 return 0;
1737}
1738
1739static struct spi_driver wm8753_spi_driver = {
1740 .driver = {
1741 .name = "wm8753",
1742 .bus = &spi_bus_type,
1743 .owner = THIS_MODULE,
1744 },
1745 .probe = wm8753_spi_probe,
1746 .remove = __devexit_p(wm8753_spi_remove),
1747};
1748
1749static int wm8753_spi_write(struct spi_device *spi, const char *data, int len)
1750{
1751 struct spi_transfer t;
1752 struct spi_message m;
1753 u8 msg[2];
1754
1755 if (len <= 0)
1756 return 0;
1757
1758 msg[0] = data[0];
1759 msg[1] = data[1];
1760
1761 spi_message_init(&m);
1762 memset(&t, 0, (sizeof t));
1763
1764 t.tx_buf = &msg[0];
1765 t.len = len;
1766
1767 spi_message_add_tail(&t, &m);
1768 spi_sync(spi, &m);
1769
1770 return len;
1771}
1772#endif
1773
1774
1f53aee0
LG		 1775static int wm8753_probe(struct platform_device *pdev)
1776{
1777 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1778 struct wm8753_setup_data *setup;
1779 struct snd_soc_codec *codec;
1780 struct wm8753_priv *wm8753;
1781 int ret = 0;
1782
1f53aee0
LG		 1783 setup = socdev->codec_data;
1784 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
1785 if (codec == NULL)
1786 return -ENOMEM;
1787
1788 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1789 if (wm8753 == NULL) {
1790 kfree(codec);
1791 return -ENOMEM;
1792 }
1793
1794 codec->private_data = wm8753;
6627a653 1795 socdev->card->codec = codec;
1f53aee0
LG		 1796 mutex_init(&codec->mutex);
1797 INIT_LIST_HEAD(&codec->dapm_widgets);
1798 INIT_LIST_HEAD(&codec->dapm_paths);
1799 wm8753_socdev = socdev;
1800 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1801
60fc684a 1802#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0 1803 if (setup->i2c_address) {
1f53aee0 1804 codec->hw_write = (hw_write_t)i2c_master_send;
ad4503d8 1805 ret = wm8753_add_i2c_device(pdev, setup);
1f53aee0 1806 }
dd0c0c80
MB		 1807#endif
1808#if defined(CONFIG_SPI_MASTER)
1809 if (setup->spi) {
1810 codec->hw_write = (hw_write_t)wm8753_spi_write;
1811 ret = spi_register_driver(&wm8753_spi_driver);
1812 if (ret != 0)
1813 printk(KERN_ERR "can't add spi driver");
1814 }
1f53aee0 1815#endif
3051e41a
JD		 1816
1817 if (ret != 0) {
1818 kfree(codec->private_data);
1819 kfree(codec);
1820 }
1f53aee0
LG		 1821 return ret;
1822}
1823
1824/*
1825 * This function forces any delayed work to be queued and run.
1826 */
1827static int run_delayed_work(struct delayed_work *dwork)
1828{
1829 int ret;
1830
1831 /* cancel any work waiting to be queued. */
1832 ret = cancel_delayed_work(dwork);
1833
1834 /* if there was any work waiting then we run it now and
1835 * wait for it's completion */
1836 if (ret) {
1837 schedule_delayed_work(dwork, 0);
1838 flush_scheduled_work();
1839 }
1840 return ret;
1841}
1842
1843/* power down chip */
1844static int wm8753_remove(struct platform_device *pdev)
1845{
1846 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1847 struct snd_soc_codec *codec = socdev->card->codec;
93e051d2 1848 struct wm8753_setup_data *setup = socdev->codec_data;
1f53aee0
LG		 1849
1850 if (codec->control_data)
0be9898a 1851 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1852 run_delayed_work(&codec->delayed_work);
1853 snd_soc_free_pcms(socdev);
1854 snd_soc_dapm_free(socdev);
60fc684a 1855#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
93e051d2
MB		 1856 if (setup->i2c_address) {
1857 i2c_unregister_device(codec->control_data);
1858 i2c_del_driver(&wm8753_i2c_driver);
1859 }
dd0c0c80
MB		 1860#endif
1861#if defined(CONFIG_SPI_MASTER)
93e051d2
MB		 1862 if (setup->spi)
1863 spi_unregister_driver(&wm8753_spi_driver);
1f53aee0
LG		 1864#endif
1865 kfree(codec->private_data);
1866 kfree(codec);
1867
1868 return 0;
1869}
1870
1871struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1872 .probe = wm8753_probe,
1873 .remove = wm8753_remove,
1874 .suspend = wm8753_suspend,
1875 .resume = wm8753_resume,
1876};
1f53aee0
LG		 1877EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1878
c9b3a40f 1879static int __init wm8753_modinit(void)
64089b84
MB		 1880{
1881 return snd_soc_register_dais(wm8753_dai, ARRAY_SIZE(wm8753_dai));
1882}
1883module_init(wm8753_modinit);
1884
1885static void __exit wm8753_exit(void)
1886{
1887 snd_soc_unregister_dais(wm8753_dai, ARRAY_SIZE(wm8753_dai));
1888}
1889module_exit(wm8753_exit);
1890
1f53aee0
LG		 1891MODULE_DESCRIPTION("ASoC WM8753 driver");
1892MODULE_AUTHOR("Liam Girdwood");
1893MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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