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ALSA: ASoC: Add custom SOC_SINGLE_TLV for tlv320aic23 codec
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Notes:
14 * The WM8753 is a low power, high quality stereo codec with integrated PCM
15 * codec designed for portable digital telephony applications.
16 *
17 * Dual DAI:-
18 *
19 * This driver support 2 DAI PCM's. This makes the default PCM available for
20 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
21 * voice.
22 *
23 * Please note that the voice PCM can be connected directly to a Bluetooth
24 * codec or GSM modem and thus cannot be read or written to, although it is
25 * available to be configured with snd_hw_params(), etc and kcontrols in the
26 * normal alsa manner.
27 *
28 * Fast DAI switching:-
29 *
30 * The driver can now fast switch between the DAI configurations via a
31 * an alsa kcontrol. This allows the PCM to remain open.
32 *
33 */
34
35#include <linux/module.h>
36#include <linux/moduleparam.h>
1f53aee0
LG		 37#include <linux/kernel.h>
38#include <linux/init.h>
39#include <linux/delay.h>
40#include <linux/pm.h>
41#include <linux/i2c.h>
42#include <linux/platform_device.h>
1f53aee0
LG		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/soc.h>
47#include <sound/soc-dapm.h>
48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
54#define AUDIO_NAME "wm8753"
55#define WM8753_VERSION "0.16"
56
1f53aee0
LG		 57static int caps_charge = 2000;
58module_param(caps_charge, int, 0);
59MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
60
61static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
62 unsigned int mode);
63
64/* codec private data */
65struct wm8753_priv {
66 unsigned int sysclk;
67 unsigned int pcmclk;
68};
69
70/*
71 * wm8753 register cache
72 * We can't read the WM8753 register space when we
73 * are using 2 wire for device control, so we cache them instead.
74 */
75static const u16 wm8753_reg[] = {
76 0x0008, 0x0000, 0x000a, 0x000a,
77 0x0033, 0x0000, 0x0007, 0x00ff,
78 0x00ff, 0x000f, 0x000f, 0x007b,
79 0x0000, 0x0032, 0x0000, 0x00c3,
80 0x00c3, 0x00c0, 0x0000, 0x0000,
81 0x0000, 0x0000, 0x0000, 0x0000,
82 0x0000, 0x0000, 0x0000, 0x0000,
83 0x0000, 0x0000, 0x0000, 0x0055,
84 0x0005, 0x0050, 0x0055, 0x0050,
85 0x0055, 0x0050, 0x0055, 0x0079,
86 0x0079, 0x0079, 0x0079, 0x0079,
87 0x0000, 0x0000, 0x0000, 0x0000,
88 0x0097, 0x0097, 0x0000, 0x0004,
89 0x0000, 0x0083, 0x0024, 0x01ba,
90 0x0000, 0x0083, 0x0024, 0x01ba,
91 0x0000, 0x0000
92};
93
94/*
95 * read wm8753 register cache
96 */
97static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
98 unsigned int reg)
99{
100 u16 *cache = codec->reg_cache;
101 if (reg < 1 || reg > (ARRAY_SIZE(wm8753_reg) + 1))
102 return -1;
103 return cache[reg - 1];
104}
105
106/*
107 * write wm8753 register cache
108 */
109static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
110 unsigned int reg, unsigned int value)
111{
112 u16 *cache = codec->reg_cache;
113 if (reg < 1 || reg > 0x3f)
114 return;
115 cache[reg - 1] = value;
116}
117
118/*
119 * write to the WM8753 register space
120 */
121static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
122 unsigned int value)
123{
124 u8 data[2];
125
126 /* data is
127 * D15..D9 WM8753 register offset
128 * D8...D0 register data
129 */
130 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
131 data[1] = value & 0x00ff;
132
60fc684a 133 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 134 if (codec->hw_write(codec->control_data, data, 2) == 2)
135 return 0;
136 else
137 return -EIO;
138}
139
140#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
141
142/*
143 * WM8753 Controls
144 */
145static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
146static const char *wm8753_base_filter[] =
147 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
148 "100Hz @ 8kHz", "200Hz @ 8kHz"};
149static const char *wm8753_treble[] = {"8kHz", "4kHz"};
150static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
151static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
152static const char *wm8753_3d_func[] = {"Capture", "Playback"};
153static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
154static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
155static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
156static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
157static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
158static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
159 "Line 1", "Line 2"};
160static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
161static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
162static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
163static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
164static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
165 "Right PGA"};
166static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
167 "Left + Right"};
168static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
169static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
170static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
171static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
172static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
173 "Analogue Mix Right", "Digital Mono Mix"};
174static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
175 "82Hz @ 8kHz", "170Hz @ 8kHz"};
176static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
177static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
178static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
179static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
180 "Channel Swap"};
ae092c9e 181static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 182
183static const struct soc_enum wm8753_enum[] = {
184SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
185SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
186SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
187SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
188SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
189SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
190SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
191SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
192SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
193SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
194SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
195SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
196SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
197SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
198SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
199SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
200SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
201SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
202SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
203SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
204SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
205SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
206SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
207SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
208SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
209SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
210SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
211SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 212SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 213};
214
215
216static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
217 struct snd_ctl_elem_value *ucontrol)
218{
219 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
220 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
221
222 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
223 return 0;
224}
225
226static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
227 struct snd_ctl_elem_value *ucontrol)
228{
229 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
230 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
231
60fc684a 232 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 233 return 0;
234
235 mode &= 0xfff3;
236 mode |= (ucontrol->value.integer.value[0] << 2);
237
238 wm8753_write(codec, WM8753_IOCTL, mode);
239 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
240 return 1;
241}
242
2cc8c609
MM		 243static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
244static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
245static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
246static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
247static const unsigned int out_tlv[] = {
248 TLV_DB_RANGE_HEAD(2),
249 /* 0000000 - 0101111 = "Analogue mute" */
250 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
251 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
252};
253static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
254static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
255static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 256
1f53aee0 257static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 258SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
259
260SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
261 adc_tlv),
262
263SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
264 0, 127, 0, out_tlv),
265SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
266 127, 0, out_tlv),
267
268SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
269
270SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
271 1, mix_tlv),
272SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
273 7, 1, mix_tlv),
274SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
275 1, voice_mix_tlv),
276
277SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
278 1, 0),
279SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
280 1, 0),
281
282SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
283SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
284 mix_tlv),
285SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
286 voice_mix_tlv),
1f53aee0
LG		 287SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
288
289SOC_ENUM("Bass Boost", wm8753_enum[0]),
290SOC_ENUM("Bass Filter", wm8753_enum[1]),
291SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
292
293SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
294SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
295
2cc8c609
MM		 296SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
297 rec_mix_tlv),
298SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
299 rec_mix_tlv),
1f53aee0 300
2cc8c609
MM		 301SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
302 pga_tlv),
1f53aee0
LG		 303SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
304SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
305
306SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
307SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
308SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
309
310SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
311SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
312SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
313SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
314SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
315SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
316SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
317SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
318SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
319SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
320
321SOC_ENUM("3D Function", wm8753_enum[5]),
322SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
323SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
324SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
325SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
326
327SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
328SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
329
330SOC_ENUM("De-emphasis", wm8753_enum[8]),
331SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
332SOC_ENUM("Playback Phase", wm8753_enum[10]),
333
2cc8c609
MM		 334SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
335SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 336
337SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
338
339SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 340SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 341};
342
343/* add non dapm controls */
344static int wm8753_add_controls(struct snd_soc_codec *codec)
345{
346 int err, i;
347
348 for (i = 0; i < ARRAY_SIZE(wm8753_snd_controls); i++) {
349 err = snd_ctl_add(codec->card,
60fc684a
MB		 350 snd_soc_cnew(&wm8753_snd_controls[i],
351 codec, NULL));
1f53aee0
LG		 352 if (err < 0)
353 return err;
354 }
355 return 0;
356}
357
358/*
359 * _DAPM_ Controls
360 */
361
362/* Left Mixer */
363static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
364SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
365SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
366SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
367SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
368};
369
370/* Right mixer */
371static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
372SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
373SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
374SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
375SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
376};
377
378/* Mono mixer */
379static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
380SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
381SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
382SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
383SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
384SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
385};
386
387/* Mono 2 Mux */
388static const struct snd_kcontrol_new wm8753_mono2_controls =
389SOC_DAPM_ENUM("Route", wm8753_enum[17]);
390
391/* Out 3 Mux */
392static const struct snd_kcontrol_new wm8753_out3_controls =
393SOC_DAPM_ENUM("Route", wm8753_enum[18]);
394
395/* Out 4 Mux */
396static const struct snd_kcontrol_new wm8753_out4_controls =
397SOC_DAPM_ENUM("Route", wm8753_enum[19]);
398
399/* ADC Mono Mix */
400static const struct snd_kcontrol_new wm8753_adc_mono_controls =
401SOC_DAPM_ENUM("Route", wm8753_enum[22]);
402
403/* Record mixer */
404static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
405SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
406SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
407SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
408};
409
410/* Left ADC mux */
411static const struct snd_kcontrol_new wm8753_adc_left_controls =
412SOC_DAPM_ENUM("Route", wm8753_enum[21]);
413
414/* Right ADC mux */
415static const struct snd_kcontrol_new wm8753_adc_right_controls =
416SOC_DAPM_ENUM("Route", wm8753_enum[20]);
417
418/* MIC mux */
419static const struct snd_kcontrol_new wm8753_mic_mux_controls =
420SOC_DAPM_ENUM("Route", wm8753_enum[16]);
421
422/* ALC mixer */
423static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
424SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
425SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
426SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
427SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
428};
429
430/* Left Line mux */
431static const struct snd_kcontrol_new wm8753_line_left_controls =
432SOC_DAPM_ENUM("Route", wm8753_enum[14]);
433
434/* Right Line mux */
435static const struct snd_kcontrol_new wm8753_line_right_controls =
436SOC_DAPM_ENUM("Route", wm8753_enum[13]);
437
438/* Mono Line mux */
439static const struct snd_kcontrol_new wm8753_line_mono_controls =
440SOC_DAPM_ENUM("Route", wm8753_enum[12]);
441
442/* Line mux and mixer */
443static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
444SOC_DAPM_ENUM("Route", wm8753_enum[11]);
445
446/* Rx mux and mixer */
447static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
448SOC_DAPM_ENUM("Route", wm8753_enum[15]);
449
450/* Mic Selector Mux */
451static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
452SOC_DAPM_ENUM("Route", wm8753_enum[25]);
453
454static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
455SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
456SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
457 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
458SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
459SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
460SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
461SND_SOC_DAPM_OUTPUT("LOUT1"),
462SND_SOC_DAPM_OUTPUT("LOUT2"),
463SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
464 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
465SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
466SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
467SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
468SND_SOC_DAPM_OUTPUT("ROUT1"),
469SND_SOC_DAPM_OUTPUT("ROUT2"),
470SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
471 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
472SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
473SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
474SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
475SND_SOC_DAPM_OUTPUT("MONO1"),
476SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
477SND_SOC_DAPM_OUTPUT("MONO2"),
478SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
479SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
480SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
481SND_SOC_DAPM_OUTPUT("OUT3"),
482SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
483SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
484SND_SOC_DAPM_OUTPUT("OUT4"),
485SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
486 &wm8753_record_mixer_controls[0],
487 ARRAY_SIZE(wm8753_record_mixer_controls)),
488SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
489SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
490SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
491 &wm8753_adc_mono_controls),
492SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
493 &wm8753_adc_mono_controls),
494SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
495 &wm8753_adc_left_controls),
496SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
497 &wm8753_adc_right_controls),
498SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
499 &wm8753_mic_mux_controls),
500SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
501SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
502SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
503 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
504SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
505 &wm8753_line_left_controls),
506SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
507 &wm8753_line_right_controls),
508SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
509 &wm8753_line_mono_controls),
510SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
511 &wm8753_line_mux_mix_controls),
512SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
513 &wm8753_rx_mux_mix_controls),
514SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
515SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
516SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
517 &wm8753_mic_sel_mux_controls),
518SND_SOC_DAPM_INPUT("LINE1"),
519SND_SOC_DAPM_INPUT("LINE2"),
520SND_SOC_DAPM_INPUT("RXP"),
521SND_SOC_DAPM_INPUT("RXN"),
522SND_SOC_DAPM_INPUT("ACIN"),
523SND_SOC_DAPM_OUTPUT("ACOP"),
524SND_SOC_DAPM_INPUT("MIC1N"),
525SND_SOC_DAPM_INPUT("MIC1"),
526SND_SOC_DAPM_INPUT("MIC2N"),
527SND_SOC_DAPM_INPUT("MIC2"),
528SND_SOC_DAPM_VMID("VREF"),
529};
530
a65f0568 531static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 532 /* left mixer */
533 {"Left Mixer", "Left Playback Switch", "Left DAC"},
534 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
535 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
536 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
537
538 /* right mixer */
539 {"Right Mixer", "Right Playback Switch", "Right DAC"},
540 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
541 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
542 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
543
544 /* mono mixer */
545 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
546 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
547 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
548 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
549 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
550
551 /* left out */
552 {"Left Out 1", NULL, "Left Mixer"},
553 {"Left Out 2", NULL, "Left Mixer"},
554 {"LOUT1", NULL, "Left Out 1"},
555 {"LOUT2", NULL, "Left Out 2"},
556
557 /* right out */
558 {"Right Out 1", NULL, "Right Mixer"},
559 {"Right Out 2", NULL, "Right Mixer"},
560 {"ROUT1", NULL, "Right Out 1"},
561 {"ROUT2", NULL, "Right Out 2"},
562
563 /* mono 1 out */
564 {"Mono Out 1", NULL, "Mono Mixer"},
565 {"MONO1", NULL, "Mono Out 1"},
566
567 /* mono 2 out */
568 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
569 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
570 {"Mono 2 Mux", "Left", "Left Mixer"},
571 {"Mono 2 Mux", "Right", "Right Mixer"},
572 {"Mono Out 2", NULL, "Mono 2 Mux"},
573 {"MONO2", NULL, "Mono Out 2"},
574
575 /* out 3 */
576 {"Out3 Left + Right", NULL, "Left Mixer"},
577 {"Out3 Left + Right", NULL, "Right Mixer"},
578 {"Out3 Mux", "VREF", "VREF"},
579 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
580 {"Out3 Mux", "ROUT2", "ROUT2"},
581 {"Out 3", NULL, "Out3 Mux"},
582 {"OUT3", NULL, "Out 3"},
583
584 /* out 4 */
585 {"Out4 Mux", "VREF", "VREF"},
4037314a 586 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 587 {"Out4 Mux", "LOUT2", "LOUT2"},
588 {"Out 4", NULL, "Out4 Mux"},
589 {"OUT4", NULL, "Out 4"},
590
591 /* record mixer */
592 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
593 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
594 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
595
596 /* Mic/SideTone Mux */
597 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
598 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
599 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
600 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
601
602 /* Capture Left Mux */
603 {"Capture Left Mux", "PGA", "Left Capture Volume"},
604 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
605 {"Capture Left Mux", "Line", "LINE1"},
606
607 /* Capture Right Mux */
608 {"Capture Right Mux", "PGA", "Right Capture Volume"},
609 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 610 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 611
612 /* Mono Capture mixer-mux */
613 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
614 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
615 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
616 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
617 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
618 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
619 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
620 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
621 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
622
623 /* ADC */
624 {"Left ADC", NULL, "Capture Left Mixer"},
625 {"Right ADC", NULL, "Capture Right Mixer"},
626
627 /* Left Capture Volume */
628 {"Left Capture Volume", NULL, "ACIN"},
629
630 /* Right Capture Volume */
631 {"Right Capture Volume", NULL, "Mic 2 Volume"},
632
633 /* ALC Mixer */
634 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
635 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
636 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
637 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
638
639 /* Line Left Mux */
640 {"Line Left Mux", "Line 1", "LINE1"},
641 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
642
643 /* Line Right Mux */
644 {"Line Right Mux", "Line 2", "LINE2"},
645 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
646
647 /* Line Mono Mux */
648 {"Line Mono Mux", "Line Mix", "Line Mixer"},
649 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
650
651 /* Line Mixer/Mux */
652 {"Line Mixer", "Line 1 + 2", "LINE1"},
653 {"Line Mixer", "Line 1 - 2", "LINE1"},
654 {"Line Mixer", "Line 1 + 2", "LINE2"},
655 {"Line Mixer", "Line 1 - 2", "LINE2"},
656 {"Line Mixer", "Line 1", "LINE1"},
657 {"Line Mixer", "Line 2", "LINE2"},
658
659 /* Rx Mixer/Mux */
660 {"Rx Mixer", "RXP - RXN", "RXP"},
661 {"Rx Mixer", "RXP + RXN", "RXP"},
662 {"Rx Mixer", "RXP - RXN", "RXN"},
663 {"Rx Mixer", "RXP + RXN", "RXN"},
664 {"Rx Mixer", "RXP", "RXP"},
665 {"Rx Mixer", "RXN", "RXN"},
666
667 /* Mic 1 Volume */
668 {"Mic 1 Volume", NULL, "MIC1N"},
669 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
670
671 /* Mic 2 Volume */
672 {"Mic 2 Volume", NULL, "MIC2N"},
673 {"Mic 2 Volume", NULL, "MIC2"},
674
675 /* Mic Selector Mux */
676 {"Mic Selection Mux", "Mic 1", "MIC1"},
677 {"Mic Selection Mux", "Mic 2", "MIC2N"},
678 {"Mic Selection Mux", "Mic 3", "MIC2"},
679
680 /* ACOP */
681 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 682};
683
684static int wm8753_add_widgets(struct snd_soc_codec *codec)
685{
a65f0568
MB		 686 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
687 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 688
a65f0568 689 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 690
691 snd_soc_dapm_new_widgets(codec);
692 return 0;
693}
694
695/* PLL divisors */
696struct _pll_div {
697 u32 div2:1;
698 u32 n:4;
699 u32 k:24;
700};
701
702/* The size in bits of the pll divide multiplied by 10
703 * to allow rounding later */
704#define FIXED_PLL_SIZE ((1 << 22) * 10)
705
706static void pll_factors(struct _pll_div *pll_div, unsigned int target,
707 unsigned int source)
708{
709 u64 Kpart;
710 unsigned int K, Ndiv, Nmod;
711
712 Ndiv = target / source;
713 if (Ndiv < 6) {
714 source >>= 1;
715 pll_div->div2 = 1;
716 Ndiv = target / source;
717 } else
718 pll_div->div2 = 0;
719
720 if ((Ndiv < 6) || (Ndiv > 12))
721 printk(KERN_WARNING
60fc684a 722 "wm8753: unsupported N = %d\n", Ndiv);
1f53aee0
LG		 723
724 pll_div->n = Ndiv;
725 Nmod = target % source;
726 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
727
728 do_div(Kpart, source);
729
730 K = Kpart & 0xFFFFFFFF;
731
732 /* Check if we need to round */
733 if ((K % 10) >= 5)
734 K += 5;
735
736 /* Move down to proper range now rounding is done */
737 K /= 10;
738
739 pll_div->k = K;
740}
741
e550e17f 742static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 743 int pll_id, unsigned int freq_in, unsigned int freq_out)
744{
745 u16 reg, enable;
746 int offset;
747 struct snd_soc_codec *codec = codec_dai->codec;
748
749 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
750 return -ENODEV;
751
752 if (pll_id == WM8753_PLL1) {
753 offset = 0;
754 enable = 0x10;
755 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
756 } else {
757 offset = 4;
758 enable = 0x8;
759 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
760 }
761
762 if (!freq_in || !freq_out) {
763 /* disable PLL */
764 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
765 wm8753_write(codec, WM8753_CLOCK, reg);
766 return 0;
767 } else {
768 u16 value = 0;
769 struct _pll_div pll_div;
770
771 pll_factors(&pll_div, freq_out * 8, freq_in);
772
773 /* set up N and K PLL divisor ratios */
774 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
775 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
777
778 /* bits 8:0 = PLL_K[17:9] */
779 value = (pll_div.k & 0x03fe00) >> 9;
780 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
781
782 /* bits 8:0 = PLL_K[8:0] */
783 value = pll_div.k & 0x0001ff;
784 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
785
786 /* set PLL as input and enable */
787 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
788 (pll_div.div2 << 3));
789 wm8753_write(codec, WM8753_CLOCK, reg | enable);
790 }
791 return 0;
792}
793
794struct _coeff_div {
795 u32 mclk;
796 u32 rate;
797 u8 sr:5;
798 u8 usb:1;
799};
800
801/* codec hifi mclk (after PLL) clock divider coefficients */
802static const struct _coeff_div coeff_div[] = {
803 /* 8k */
804 {12288000, 8000, 0x6, 0x0},
805 {11289600, 8000, 0x16, 0x0},
806 {18432000, 8000, 0x7, 0x0},
807 {16934400, 8000, 0x17, 0x0},
808 {12000000, 8000, 0x6, 0x1},
809
810 /* 11.025k */
811 {11289600, 11025, 0x18, 0x0},
812 {16934400, 11025, 0x19, 0x0},
813 {12000000, 11025, 0x19, 0x1},
814
815 /* 16k */
816 {12288000, 16000, 0xa, 0x0},
817 {18432000, 16000, 0xb, 0x0},
818 {12000000, 16000, 0xa, 0x1},
819
820 /* 22.05k */
821 {11289600, 22050, 0x1a, 0x0},
822 {16934400, 22050, 0x1b, 0x0},
823 {12000000, 22050, 0x1b, 0x1},
824
825 /* 32k */
826 {12288000, 32000, 0xc, 0x0},
827 {18432000, 32000, 0xd, 0x0},
828 {12000000, 32000, 0xa, 0x1},
829
830 /* 44.1k */
831 {11289600, 44100, 0x10, 0x0},
832 {16934400, 44100, 0x11, 0x0},
833 {12000000, 44100, 0x11, 0x1},
834
835 /* 48k */
836 {12288000, 48000, 0x0, 0x0},
837 {18432000, 48000, 0x1, 0x0},
838 {12000000, 48000, 0x0, 0x1},
839
840 /* 88.2k */
841 {11289600, 88200, 0x1e, 0x0},
842 {16934400, 88200, 0x1f, 0x0},
843 {12000000, 88200, 0x1f, 0x1},
844
845 /* 96k */
846 {12288000, 96000, 0xe, 0x0},
847 {18432000, 96000, 0xf, 0x0},
848 {12000000, 96000, 0xe, 0x1},
849};
850
851static int get_coeff(int mclk, int rate)
852{
853 int i;
854
855 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
856 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
857 return i;
858 }
859 return -EINVAL;
860}
861
862/*
863 * Clock after PLL and dividers
864 */
e550e17f 865static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 866 int clk_id, unsigned int freq, int dir)
867{
868 struct snd_soc_codec *codec = codec_dai->codec;
869 struct wm8753_priv *wm8753 = codec->private_data;
870
871 switch (freq) {
872 case 11289600:
873 case 12000000:
874 case 12288000:
875 case 16934400:
876 case 18432000:
877 if (clk_id == WM8753_MCLK) {
878 wm8753->sysclk = freq;
879 return 0;
880 } else if (clk_id == WM8753_PCMCLK) {
881 wm8753->pcmclk = freq;
882 return 0;
883 }
884 break;
885 }
886 return -EINVAL;
887}
888
889/*
890 * Set's ADC and Voice DAC format.
891 */
e550e17f 892static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 893 unsigned int fmt)
894{
895 struct snd_soc_codec *codec = codec_dai->codec;
896 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
897
898 /* interface format */
899 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
900 case SND_SOC_DAIFMT_I2S:
901 voice |= 0x0002;
902 break;
903 case SND_SOC_DAIFMT_RIGHT_J:
904 break;
905 case SND_SOC_DAIFMT_LEFT_J:
906 voice |= 0x0001;
907 break;
908 case SND_SOC_DAIFMT_DSP_A:
909 voice |= 0x0003;
910 break;
911 case SND_SOC_DAIFMT_DSP_B:
912 voice |= 0x0013;
913 break;
914 default:
915 return -EINVAL;
916 }
917
918 wm8753_write(codec, WM8753_PCM, voice);
919 return 0;
920}
921
922/*
923 * Set PCM DAI bit size and sample rate.
924 */
925static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
926 struct snd_pcm_hw_params *params)
927{
928 struct snd_soc_pcm_runtime *rtd = substream->private_data;
929 struct snd_soc_device *socdev = rtd->socdev;
930 struct snd_soc_codec *codec = socdev->codec;
931 struct wm8753_priv *wm8753 = codec->private_data;
932 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
933 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
934
935 /* bit size */
936 switch (params_format(params)) {
937 case SNDRV_PCM_FORMAT_S16_LE:
938 break;
939 case SNDRV_PCM_FORMAT_S20_3LE:
940 voice |= 0x0004;
941 break;
942 case SNDRV_PCM_FORMAT_S24_LE:
943 voice |= 0x0008;
944 break;
945 case SNDRV_PCM_FORMAT_S32_LE:
946 voice |= 0x000c;
947 break;
948 }
949
950 /* sample rate */
951 if (params_rate(params) * 384 == wm8753->pcmclk)
952 srate |= 0x80;
953 wm8753_write(codec, WM8753_SRATE1, srate);
954
955 wm8753_write(codec, WM8753_PCM, voice);
956 return 0;
957}
958
959/*
960 * Set's PCM dai fmt and BCLK.
961 */
e550e17f 962static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 963 unsigned int fmt)
964{
965 struct snd_soc_codec *codec = codec_dai->codec;
966 u16 voice, ioctl;
967
968 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
969 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
970
971 /* set master/slave audio interface */
972 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
973 case SND_SOC_DAIFMT_CBS_CFS:
974 break;
975 case SND_SOC_DAIFMT_CBM_CFM:
976 ioctl |= 0x2;
977 case SND_SOC_DAIFMT_CBM_CFS:
978 voice |= 0x0040;
979 break;
980 default:
981 return -EINVAL;
982 }
983
984 /* clock inversion */
985 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
986 case SND_SOC_DAIFMT_DSP_A:
987 case SND_SOC_DAIFMT_DSP_B:
988 /* frame inversion not valid for DSP modes */
989 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
990 case SND_SOC_DAIFMT_NB_NF:
991 break;
992 case SND_SOC_DAIFMT_IB_NF:
993 voice |= 0x0080;
994 break;
995 default:
996 return -EINVAL;
997 }
998 break;
999 case SND_SOC_DAIFMT_I2S:
1000 case SND_SOC_DAIFMT_RIGHT_J:
1001 case SND_SOC_DAIFMT_LEFT_J:
1002 voice &= ~0x0010;
1003 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1004 case SND_SOC_DAIFMT_NB_NF:
1005 break;
1006 case SND_SOC_DAIFMT_IB_IF:
1007 voice |= 0x0090;
1008 break;
1009 case SND_SOC_DAIFMT_IB_NF:
1010 voice |= 0x0080;
1011 break;
1012 case SND_SOC_DAIFMT_NB_IF:
1013 voice |= 0x0010;
1014 break;
1015 default:
1016 return -EINVAL;
1017 }
1018 break;
1019 default:
1020 return -EINVAL;
1021 }
1022
1023 wm8753_write(codec, WM8753_PCM, voice);
1024 wm8753_write(codec, WM8753_IOCTL, ioctl);
1025 return 0;
1026}
1027
e550e17f 1028static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1029 int div_id, int div)
1030{
1031 struct snd_soc_codec *codec = codec_dai->codec;
1032 u16 reg;
1033
1034 switch (div_id) {
1035 case WM8753_PCMDIV:
1036 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1037 wm8753_write(codec, WM8753_CLOCK, reg | div);
1038 break;
1039 case WM8753_BCLKDIV:
1040 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1041 wm8753_write(codec, WM8753_SRATE2, reg | div);
1042 break;
1043 case WM8753_VXCLKDIV:
1044 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1045 wm8753_write(codec, WM8753_SRATE2, reg | div);
1046 break;
1047 default:
1048 return -EINVAL;
1049 }
1050 return 0;
1051}
1052
1053/*
1054 * Set's HiFi DAC format.
1055 */
e550e17f 1056static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1057 unsigned int fmt)
1058{
1059 struct snd_soc_codec *codec = codec_dai->codec;
1060 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1061
1062 /* interface format */
1063 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1064 case SND_SOC_DAIFMT_I2S:
1065 hifi |= 0x0002;
1066 break;
1067 case SND_SOC_DAIFMT_RIGHT_J:
1068 break;
1069 case SND_SOC_DAIFMT_LEFT_J:
1070 hifi |= 0x0001;
1071 break;
1072 case SND_SOC_DAIFMT_DSP_A:
1073 hifi |= 0x0003;
1074 break;
1075 case SND_SOC_DAIFMT_DSP_B:
1076 hifi |= 0x0013;
1077 break;
1078 default:
1079 return -EINVAL;
1080 }
1081
1082 wm8753_write(codec, WM8753_HIFI, hifi);
1083 return 0;
1084}
1085
1086/*
1087 * Set's I2S DAI format.
1088 */
e550e17f 1089static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1090 unsigned int fmt)
1091{
1092 struct snd_soc_codec *codec = codec_dai->codec;
1093 u16 ioctl, hifi;
1094
1095 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1096 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1097
1098 /* set master/slave audio interface */
1099 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1100 case SND_SOC_DAIFMT_CBS_CFS:
1101 break;
1102 case SND_SOC_DAIFMT_CBM_CFM:
1103 ioctl |= 0x1;
1104 case SND_SOC_DAIFMT_CBM_CFS:
1105 hifi |= 0x0040;
1106 break;
1107 default:
1108 return -EINVAL;
1109 }
1110
1111 /* clock inversion */
1112 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1113 case SND_SOC_DAIFMT_DSP_A:
1114 case SND_SOC_DAIFMT_DSP_B:
1115 /* frame inversion not valid for DSP modes */
1116 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1117 case SND_SOC_DAIFMT_NB_NF:
1118 break;
1119 case SND_SOC_DAIFMT_IB_NF:
1120 hifi |= 0x0080;
1121 break;
1122 default:
1123 return -EINVAL;
1124 }
1125 break;
1126 case SND_SOC_DAIFMT_I2S:
1127 case SND_SOC_DAIFMT_RIGHT_J:
1128 case SND_SOC_DAIFMT_LEFT_J:
1129 hifi &= ~0x0010;
1130 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1131 case SND_SOC_DAIFMT_NB_NF:
1132 break;
1133 case SND_SOC_DAIFMT_IB_IF:
1134 hifi |= 0x0090;
1135 break;
1136 case SND_SOC_DAIFMT_IB_NF:
1137 hifi |= 0x0080;
1138 break;
1139 case SND_SOC_DAIFMT_NB_IF:
1140 hifi |= 0x0010;
1141 break;
1142 default:
1143 return -EINVAL;
1144 }
1145 break;
1146 default:
1147 return -EINVAL;
1148 }
1149
1150 wm8753_write(codec, WM8753_HIFI, hifi);
1151 wm8753_write(codec, WM8753_IOCTL, ioctl);
1152 return 0;
1153}
1154
1155/*
1156 * Set PCM DAI bit size and sample rate.
1157 */
1158static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1159 struct snd_pcm_hw_params *params)
1160{
1161 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1162 struct snd_soc_device *socdev = rtd->socdev;
1163 struct snd_soc_codec *codec = socdev->codec;
1164 struct wm8753_priv *wm8753 = codec->private_data;
1165 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1166 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1167 int coeff;
1168
1169 /* is digital filter coefficient valid ? */
1170 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1171 if (coeff < 0) {
1172 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1173 return coeff;
1174 }
1175 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1176 coeff_div[coeff].usb);
1177
1178 /* bit size */
1179 switch (params_format(params)) {
1180 case SNDRV_PCM_FORMAT_S16_LE:
1181 break;
1182 case SNDRV_PCM_FORMAT_S20_3LE:
1183 hifi |= 0x0004;
1184 break;
1185 case SNDRV_PCM_FORMAT_S24_LE:
1186 hifi |= 0x0008;
1187 break;
1188 case SNDRV_PCM_FORMAT_S32_LE:
1189 hifi |= 0x000c;
1190 break;
1191 }
1192
1193 wm8753_write(codec, WM8753_HIFI, hifi);
1194 return 0;
1195}
1196
e550e17f 1197static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1198 unsigned int fmt)
1199{
1200 struct snd_soc_codec *codec = codec_dai->codec;
1201 u16 clock;
1202
1203 /* set clk source as pcmclk */
1204 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1205 wm8753_write(codec, WM8753_CLOCK, clock);
1206
1207 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1208 return -EINVAL;
1209 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1210}
1211
e550e17f 1212static int wm8753_mode1h_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1213 unsigned int fmt)
1214{
1215 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1216 return -EINVAL;
1217 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1218}
1219
e550e17f 1220static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1221 unsigned int fmt)
1222{
1223 struct snd_soc_codec *codec = codec_dai->codec;
1224 u16 clock;
1225
1226 /* set clk source as pcmclk */
1227 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1228 wm8753_write(codec, WM8753_CLOCK, clock);
1229
1230 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1231 return -EINVAL;
1232 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1233}
1234
e550e17f 1235static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1236 unsigned int fmt)
1237{
1238 struct snd_soc_codec *codec = codec_dai->codec;
1239 u16 clock;
1240
1241 /* set clk source as mclk */
1242 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1243 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1244
1245 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1246 return -EINVAL;
1247 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1248 return -EINVAL;
1249 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1250}
1251
e550e17f 1252static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1253{
1254 struct snd_soc_codec *codec = dai->codec;
1255 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1256
1257 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1258 * make sure we check if they are not both active when we mute */
1259 if (mute && dai->id == 1) {
1260 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1261 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1262 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1263 } else {
1264 if (mute)
1265 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1266 else
1267 wm8753_write(codec, WM8753_DAC, mute_reg);
1268 }
1269
1270 return 0;
1271}
1272
0be9898a
MB		 1273static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1274 enum snd_soc_bias_level level)
1f53aee0
LG		 1275{
1276 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1277
0be9898a
MB		 1278 switch (level) {
1279 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1280 /* set vmid to 50k and unmute dac */
1281 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1282 break;
0be9898a 1283 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1284 /* set vmid to 5k for quick power up */
1285 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1286 break;
0be9898a 1287 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1288 /* mute dac and set vmid to 500k, enable VREF */
1289 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1290 break;
0be9898a 1291 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1292 wm8753_write(codec, WM8753_PWR1, 0x0001);
1293 break;
1294 }
0be9898a 1295 codec->bias_level = level;
1f53aee0
LG		 1296 return 0;
1297}
1298
1299#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1300 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1301 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1302 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1303
1304#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1305 SNDRV_PCM_FMTBIT_S24_LE)
1306
1307/*
1308 * The WM8753 supports upto 4 different and mutually exclusive DAI
1309 * configurations. This gives 2 PCM's available for use, hifi and voice.
1310 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1311 * is connected between the wm8753 and a BT codec or GSM modem.
1312 *
1313 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1314 * 2. Voice over HIFI DAI - HIFI disabled
1315 * 3. Voice disabled - HIFI over HIFI
1316 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1317 */
e550e17f 1318static const struct snd_soc_dai wm8753_all_dai[] = {
1f53aee0
LG		 1319/* DAI HiFi mode 1 */
1320{ .name = "WM8753 HiFi",
1321 .id = 1,
1322 .playback = {
1323 .stream_name = "HiFi Playback",
1324 .channels_min = 1,
1325 .channels_max = 2,
1326 .rates = WM8753_RATES,
1327 .formats = WM8753_FORMATS,},
1328 .capture = { /* dummy for fast DAI switching */
1329 .stream_name = "Capture",
1330 .channels_min = 1,
1331 .channels_max = 2,
1332 .rates = WM8753_RATES,
1333 .formats = WM8753_FORMATS,},
1334 .ops = {
1335 .hw_params = wm8753_i2s_hw_params,},
1336 .dai_ops = {
1337 .digital_mute = wm8753_mute,
1338 .set_fmt = wm8753_mode1h_set_dai_fmt,
1339 .set_clkdiv = wm8753_set_dai_clkdiv,
1340 .set_pll = wm8753_set_dai_pll,
1341 .set_sysclk = wm8753_set_dai_sysclk,
1342 },
1343},
1344/* DAI Voice mode 1 */
1345{ .name = "WM8753 Voice",
1346 .id = 1,
1347 .playback = {
1348 .stream_name = "Voice Playback",
1349 .channels_min = 1,
1350 .channels_max = 1,
1351 .rates = WM8753_RATES,
1352 .formats = WM8753_FORMATS,},
1353 .capture = {
1354 .stream_name = "Capture",
1355 .channels_min = 1,
1356 .channels_max = 2,
1357 .rates = WM8753_RATES,
1358 .formats = WM8753_FORMATS,},
1359 .ops = {
1360 .hw_params = wm8753_pcm_hw_params,},
1361 .dai_ops = {
1362 .digital_mute = wm8753_mute,
1363 .set_fmt = wm8753_mode1v_set_dai_fmt,
1364 .set_clkdiv = wm8753_set_dai_clkdiv,
1365 .set_pll = wm8753_set_dai_pll,
1366 .set_sysclk = wm8753_set_dai_sysclk,
1367 },
1368},
1369/* DAI HiFi mode 2 - dummy */
1370{ .name = "WM8753 HiFi",
1371 .id = 2,
1372},
1373/* DAI Voice mode 2 */
1374{ .name = "WM8753 Voice",
1375 .id = 2,
1376 .playback = {
1377 .stream_name = "Voice Playback",
1378 .channels_min = 1,
1379 .channels_max = 1,
1380 .rates = WM8753_RATES,
1381 .formats = WM8753_FORMATS,},
1382 .capture = {
1383 .stream_name = "Capture",
1384 .channels_min = 1,
1385 .channels_max = 2,
1386 .rates = WM8753_RATES,
1387 .formats = WM8753_FORMATS,},
1388 .ops = {
1389 .hw_params = wm8753_pcm_hw_params,},
1390 .dai_ops = {
1391 .digital_mute = wm8753_mute,
1392 .set_fmt = wm8753_mode2_set_dai_fmt,
1393 .set_clkdiv = wm8753_set_dai_clkdiv,
1394 .set_pll = wm8753_set_dai_pll,
1395 .set_sysclk = wm8753_set_dai_sysclk,
1396 },
1397},
1398/* DAI HiFi mode 3 */
1399{ .name = "WM8753 HiFi",
1400 .id = 3,
1401 .playback = {
1402 .stream_name = "HiFi Playback",
1403 .channels_min = 1,
1404 .channels_max = 2,
1405 .rates = WM8753_RATES,
1406 .formats = WM8753_FORMATS,},
1407 .capture = {
1408 .stream_name = "Capture",
1409 .channels_min = 1,
1410 .channels_max = 2,
1411 .rates = WM8753_RATES,
1412 .formats = WM8753_FORMATS,},
1413 .ops = {
1414 .hw_params = wm8753_i2s_hw_params,},
1415 .dai_ops = {
1416 .digital_mute = wm8753_mute,
1417 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1418 .set_clkdiv = wm8753_set_dai_clkdiv,
1419 .set_pll = wm8753_set_dai_pll,
1420 .set_sysclk = wm8753_set_dai_sysclk,
1421 },
1422},
1423/* DAI Voice mode 3 - dummy */
1424{ .name = "WM8753 Voice",
1425 .id = 3,
1426},
1427/* DAI HiFi mode 4 */
1428{ .name = "WM8753 HiFi",
1429 .id = 4,
1430 .playback = {
1431 .stream_name = "HiFi Playback",
1432 .channels_min = 1,
1433 .channels_max = 2,
1434 .rates = WM8753_RATES,
1435 .formats = WM8753_FORMATS,},
1436 .capture = {
1437 .stream_name = "Capture",
1438 .channels_min = 1,
1439 .channels_max = 2,
1440 .rates = WM8753_RATES,
1441 .formats = WM8753_FORMATS,},
1442 .ops = {
1443 .hw_params = wm8753_i2s_hw_params,},
1444 .dai_ops = {
1445 .digital_mute = wm8753_mute,
1446 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1447 .set_clkdiv = wm8753_set_dai_clkdiv,
1448 .set_pll = wm8753_set_dai_pll,
1449 .set_sysclk = wm8753_set_dai_sysclk,
1450 },
1451},
1452/* DAI Voice mode 4 - dummy */
1453{ .name = "WM8753 Voice",
1454 .id = 4,
1455},
1456};
1457
e550e17f 1458struct snd_soc_dai wm8753_dai[2];
1f53aee0
LG		 1459EXPORT_SYMBOL_GPL(wm8753_dai);
1460
1461static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1462{
1463 if (mode < 4) {
1464 int playback_active, capture_active, codec_active, pop_wait;
1465 void *private_data;
1466
1467 playback_active = wm8753_dai[0].playback.active;
1468 capture_active = wm8753_dai[0].capture.active;
1469 codec_active = wm8753_dai[0].active;
1470 private_data = wm8753_dai[0].private_data;
1471 pop_wait = wm8753_dai[0].pop_wait;
1472 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1473 wm8753_dai[0].playback.active = playback_active;
1474 wm8753_dai[0].capture.active = capture_active;
1475 wm8753_dai[0].active = codec_active;
1476 wm8753_dai[0].private_data = private_data;
1477 wm8753_dai[0].pop_wait = pop_wait;
1478
1479 playback_active = wm8753_dai[1].playback.active;
1480 capture_active = wm8753_dai[1].capture.active;
1481 codec_active = wm8753_dai[1].active;
1482 private_data = wm8753_dai[1].private_data;
1483 pop_wait = wm8753_dai[1].pop_wait;
1484 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1485 wm8753_dai[1].playback.active = playback_active;
1486 wm8753_dai[1].capture.active = capture_active;
1487 wm8753_dai[1].active = codec_active;
1488 wm8753_dai[1].private_data = private_data;
1489 wm8753_dai[1].pop_wait = pop_wait;
1490 }
1491 wm8753_dai[0].codec = codec;
1492 wm8753_dai[1].codec = codec;
1493}
1494
1495static void wm8753_work(struct work_struct *work)
1496{
1497 struct snd_soc_codec *codec =
1498 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1499 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1500}
1501
1502static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1503{
1504 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1505 struct snd_soc_codec *codec = socdev->codec;
1506
1507 /* we only need to suspend if we are a valid card */
60fc684a 1508 if (!codec->card)
1f53aee0 1509 return 0;
60fc684a 1510
0be9898a 1511 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1512 return 0;
1513}
1514
1515static int wm8753_resume(struct platform_device *pdev)
1516{
1517 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1518 struct snd_soc_codec *codec = socdev->codec;
1519 int i;
1520 u8 data[2];
1521 u16 *cache = codec->reg_cache;
1522
1523 /* we only need to resume if we are a valid card */
60fc684a 1524 if (!codec->card)
1f53aee0
LG		 1525 return 0;
1526
1527 /* Sync reg_cache with the hardware */
1528 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1529 if (i + 1 == WM8753_RESET)
1530 continue;
1531 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1532 data[1] = cache[i] & 0x00ff;
1533 codec->hw_write(codec->control_data, data, 2);
1534 }
1535
0be9898a 1536 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1537
1538 /* charge wm8753 caps */
0be9898a
MB		 1539 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1540 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1541 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1542 schedule_delayed_work(&codec->delayed_work,
1543 msecs_to_jiffies(caps_charge));
1544 }
1545
1546 return 0;
1547}
1548
1549/*
1550 * initialise the WM8753 driver
1551 * register the mixer and dsp interfaces with the kernel
1552 */
1553static int wm8753_init(struct snd_soc_device *socdev)
1554{
1555 struct snd_soc_codec *codec = socdev->codec;
1556 int reg, ret = 0;
1557
1558 codec->name = "WM8753";
1559 codec->owner = THIS_MODULE;
1560 codec->read = wm8753_read_reg_cache;
1561 codec->write = wm8753_write;
0be9898a 1562 codec->set_bias_level = wm8753_set_bias_level;
1f53aee0
LG		 1563 codec->dai = wm8753_dai;
1564 codec->num_dai = 2;
d751b233 1565 codec->reg_cache_size = ARRAY_SIZE(wm8753_reg);
1f53aee0
LG		 1566 codec->reg_cache = kmemdup(wm8753_reg, sizeof(wm8753_reg), GFP_KERNEL);
1567
1568 if (codec->reg_cache == NULL)
1569 return -ENOMEM;
1570
1571 wm8753_set_dai_mode(codec, 0);
1572
1573 wm8753_reset(codec);
1574
1575 /* register pcms */
1576 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1577 if (ret < 0) {
1578 printk(KERN_ERR "wm8753: failed to create pcms\n");
1579 goto pcm_err;
1580 }
1581
1582 /* charge output caps */
0be9898a
MB		 1583 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1584 codec->bias_level = SND_SOC_BIAS_STANDBY;
1f53aee0
LG		 1585 schedule_delayed_work(&codec->delayed_work,
1586 msecs_to_jiffies(caps_charge));
1587
1588 /* set the update bits */
1589 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1590 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1591 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1592 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1593 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1594 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1595 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1596 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1597 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1598 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1599 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1600 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1601 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1602 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1603 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1604 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1605 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1606 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1607 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1608 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1609
1610 wm8753_add_controls(codec);
1611 wm8753_add_widgets(codec);
1612 ret = snd_soc_register_card(socdev);
1613 if (ret < 0) {
60fc684a 1614 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1615 goto card_err;
60fc684a
MB		 1616 }
1617
1f53aee0
LG		 1618 return ret;
1619
1620card_err:
1621 snd_soc_free_pcms(socdev);
1622 snd_soc_dapm_free(socdev);
1623pcm_err:
1624 kfree(codec->reg_cache);
1625 return ret;
1626}
1627
1628/* If the i2c layer weren't so broken, we could pass this kind of data
1629 around */
1630static struct snd_soc_device *wm8753_socdev;
1631
60fc684a 1632#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0
LG		 1633
1634/*
1635 * WM8753 2 wire address is determined by GPIO5
1636 * state during powerup.
1637 * low = 0x1a
1638 * high = 0x1b
1639 */
1f53aee0 1640
ad4503d8
JD		 1641static int wm8753_i2c_probe(struct i2c_client *i2c,
1642 const struct i2c_device_id *id)
1f53aee0
LG		 1643{
1644 struct snd_soc_device *socdev = wm8753_socdev;
1f53aee0 1645 struct snd_soc_codec *codec = socdev->codec;
1f53aee0
LG		 1646 int ret;
1647
1f53aee0
LG		 1648 i2c_set_clientdata(i2c, codec);
1649 codec->control_data = i2c;
1650
1f53aee0 1651 ret = wm8753_init(socdev);
ad4503d8 1652 if (ret < 0)
a5c95e90 1653 pr_err("failed to initialise WM8753\n");
1f53aee0 1654
1f53aee0
LG		 1655 return ret;
1656}
1657
ad4503d8 1658static int wm8753_i2c_remove(struct i2c_client *client)
1f53aee0
LG		 1659{
1660 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1f53aee0 1661 kfree(codec->reg_cache);
1f53aee0
LG		 1662 return 0;
1663}
1664
ad4503d8
JD		 1665static const struct i2c_device_id wm8753_i2c_id[] = {
1666 { "wm8753", 0 },
1667 { }
1668};
1669MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1f53aee0 1670
1f53aee0
LG		 1671static struct i2c_driver wm8753_i2c_driver = {
1672 .driver = {
1673 .name = "WM8753 I2C Codec",
1674 .owner = THIS_MODULE,
1675 },
ad4503d8
JD		 1676 .probe = wm8753_i2c_probe,
1677 .remove = wm8753_i2c_remove,
1678 .id_table = wm8753_i2c_id,
1f53aee0
LG		 1679};
1680
ad4503d8
JD		 1681static int wm8753_add_i2c_device(struct platform_device *pdev,
1682 const struct wm8753_setup_data *setup)
1683{
1684 struct i2c_board_info info;
1685 struct i2c_adapter *adapter;
1686 struct i2c_client *client;
1687 int ret;
1688
1689 ret = i2c_add_driver(&wm8753_i2c_driver);
1690 if (ret != 0) {
1691 dev_err(&pdev->dev, "can't add i2c driver\n");
1692 return ret;
1693 }
1694
1695 memset(&info, 0, sizeof(struct i2c_board_info));
1696 info.addr = setup->i2c_address;
1697 strlcpy(info.type, "wm8753", I2C_NAME_SIZE);
1698
1699 adapter = i2c_get_adapter(setup->i2c_bus);
1700 if (!adapter) {
1701 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
1702 setup->i2c_bus);
1703 goto err_driver;
1704 }
1705
1706 client = i2c_new_device(adapter, &info);
1707 i2c_put_adapter(adapter);
1708 if (!client) {
1709 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
1710 (unsigned int)info.addr);
1711 goto err_driver;
1712 }
1713
1714 return 0;
1715
1716err_driver:
1717 i2c_del_driver(&wm8753_i2c_driver);
1718 return -ENODEV;
1719}
1f53aee0
LG		 1720#endif
1721
1722static int wm8753_probe(struct platform_device *pdev)
1723{
1724 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1725 struct wm8753_setup_data *setup;
1726 struct snd_soc_codec *codec;
1727 struct wm8753_priv *wm8753;
1728 int ret = 0;
1729
a5c95e90 1730 pr_info("WM8753 Audio Codec %s", WM8753_VERSION);
1f53aee0
LG		 1731
1732 setup = socdev->codec_data;
1733 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
1734 if (codec == NULL)
1735 return -ENOMEM;
1736
1737 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1738 if (wm8753 == NULL) {
1739 kfree(codec);
1740 return -ENOMEM;
1741 }
1742
1743 codec->private_data = wm8753;
1744 socdev->codec = codec;
1745 mutex_init(&codec->mutex);
1746 INIT_LIST_HEAD(&codec->dapm_widgets);
1747 INIT_LIST_HEAD(&codec->dapm_paths);
1748 wm8753_socdev = socdev;
1749 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1750
60fc684a 1751#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1f53aee0 1752 if (setup->i2c_address) {
1f53aee0 1753 codec->hw_write = (hw_write_t)i2c_master_send;
ad4503d8 1754 ret = wm8753_add_i2c_device(pdev, setup);
1f53aee0
LG		 1755 }
1756#else
1757 /* Add other interfaces here */
1758#endif
3051e41a
JD		 1759
1760 if (ret != 0) {
1761 kfree(codec->private_data);
1762 kfree(codec);
1763 }
1f53aee0
LG		 1764 return ret;
1765}
1766
1767/*
1768 * This function forces any delayed work to be queued and run.
1769 */
1770static int run_delayed_work(struct delayed_work *dwork)
1771{
1772 int ret;
1773
1774 /* cancel any work waiting to be queued. */
1775 ret = cancel_delayed_work(dwork);
1776
1777 /* if there was any work waiting then we run it now and
1778 * wait for it's completion */
1779 if (ret) {
1780 schedule_delayed_work(dwork, 0);
1781 flush_scheduled_work();
1782 }
1783 return ret;
1784}
1785
1786/* power down chip */
1787static int wm8753_remove(struct platform_device *pdev)
1788{
1789 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1790 struct snd_soc_codec *codec = socdev->codec;
1791
1792 if (codec->control_data)
0be9898a 1793 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1794 run_delayed_work(&codec->delayed_work);
1795 snd_soc_free_pcms(socdev);
1796 snd_soc_dapm_free(socdev);
60fc684a 1797#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ad4503d8 1798 i2c_unregister_device(codec->control_data);
1f53aee0
LG		 1799 i2c_del_driver(&wm8753_i2c_driver);
1800#endif
1801 kfree(codec->private_data);
1802 kfree(codec);
1803
1804 return 0;
1805}
1806
1807struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1808 .probe = wm8753_probe,
1809 .remove = wm8753_remove,
1810 .suspend = wm8753_suspend,
1811 .resume = wm8753_resume,
1812};
1f53aee0
LG		 1813EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1814
1815MODULE_DESCRIPTION("ASoC WM8753 driver");
1816MODULE_AUTHOR("Liam Girdwood");
1817MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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