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ASoC: use a valid device for dev_err() in Zylonite
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
5a0e3ad6 43#include <linux/slab.h>
1f53aee0
LG		 44#include <sound/core.h>
45#include <sound/pcm.h>
46#include <sound/pcm_params.h>
47#include <sound/soc.h>
1f53aee0 48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
1f53aee0
LG		 54static int caps_charge = 2000;
55module_param(caps_charge, int, 0);
56MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
57
338ee253
LPC		 58static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
59 unsigned int fmt);
60static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
61 unsigned int fmt);
1f53aee0 62
1f53aee0
LG		 63/*
64 * wm8753 register cache
65 * We can't read the WM8753 register space when we
66 * are using 2 wire for device control, so we cache them instead.
67 */
68static const u16 wm8753_reg[] = {
776065e3
LPC		 69 0x0000, 0x0008, 0x0000, 0x000a,
70 0x000a, 0x0033, 0x0000, 0x0007,
71 0x00ff, 0x00ff, 0x000f, 0x000f,
72 0x007b, 0x0000, 0x0032, 0x0000,
73 0x00c3, 0x00c3, 0x00c0, 0x0000,
1f53aee0
LG		 74 0x0000, 0x0000, 0x0000, 0x0000,
75 0x0000, 0x0000, 0x0000, 0x0000,
1f53aee0 76 0x0000, 0x0000, 0x0000, 0x0000,
776065e3
LPC		 77 0x0055, 0x0005, 0x0050, 0x0055,
78 0x0050, 0x0055, 0x0050, 0x0055,
79 0x0079, 0x0079, 0x0079, 0x0079,
80 0x0079, 0x0000, 0x0000, 0x0000,
81 0x0000, 0x0097, 0x0097, 0x0000,
82 0x0004, 0x0000, 0x0083, 0x0024,
83 0x01ba, 0x0000, 0x0083, 0x0024,
84 0x01ba, 0x0000, 0x0000, 0x0000
1f53aee0
LG		 85};
86
c2bac160
MB		 87/* codec private data */
88struct wm8753_priv {
f0fba2ad 89 enum snd_soc_control_type control_type;
c2bac160
MB		 90 unsigned int sysclk;
91 unsigned int pcmclk;
338ee253
LPC		 92
93 unsigned int voice_fmt;
94 unsigned int hifi_fmt;
95
f0fba2ad 96 int dai_func;
c2bac160
MB		 97};
98
776065e3 99#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
1f53aee0
LG		 100
101/*
102 * WM8753 Controls
103 */
104static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
105static const char *wm8753_base_filter[] =
106 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
107 "100Hz @ 8kHz", "200Hz @ 8kHz"};
108static const char *wm8753_treble[] = {"8kHz", "4kHz"};
109static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
110static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
111static const char *wm8753_3d_func[] = {"Capture", "Playback"};
112static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
113static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
114static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
115static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
116static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
117static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
118 "Line 1", "Line 2"};
119static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
120static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
121static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
122static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
123static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
124 "Right PGA"};
125static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
126 "Left + Right"};
127static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
128static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
129static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
130static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
131static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
132 "Analogue Mix Right", "Digital Mono Mix"};
133static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
134 "82Hz @ 8kHz", "170Hz @ 8kHz"};
135static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
136static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
137static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
138static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
139 "Channel Swap"};
ae092c9e 140static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 141
142static const struct soc_enum wm8753_enum[] = {
143SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
144SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
145SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
146SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
147SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
148SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
149SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
150SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
151SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
152SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
153SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
154SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
155SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
156SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
157SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
158SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
159SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
160SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
161SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
162SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
163SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
164SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
165SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
166SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
167SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
168SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
169SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
170SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 171SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 172};
173
174
175static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
176 struct snd_ctl_elem_value *ucontrol)
177{
178 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
338ee253 179 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0 180
338ee253 181 ucontrol->value.integer.value[0] = wm8753->dai_func;
1f53aee0
LG		 182 return 0;
183}
184
185static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
186 struct snd_ctl_elem_value *ucontrol)
187{
188 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
f0fba2ad 189 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
338ee253
LPC		 190 u16 ioctl;
191
192 if (codec->active)
193 return -EBUSY;
194
195 ioctl = snd_soc_read(codec, WM8753_IOCTL);
196
197 wm8753->dai_func = ucontrol->value.integer.value[0];
198
199 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
200 return 1;
201
202 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
203 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0 204
1f53aee0 205
338ee253
LPC		 206 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
207 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
1f53aee0 208
1f53aee0
LG		 209 return 1;
210}
211
2cc8c609
MM		 212static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
213static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
214static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
215static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
216static const unsigned int out_tlv[] = {
217 TLV_DB_RANGE_HEAD(2),
218 /* 0000000 - 0101111 = "Analogue mute" */
219 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
220 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
221};
222static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
223static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
224static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 225
1f53aee0 226static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 227SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
228
229SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
230 adc_tlv),
231
232SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
233 0, 127, 0, out_tlv),
234SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
235 127, 0, out_tlv),
236
237SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
238
239SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
240 1, mix_tlv),
241SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
242 7, 1, mix_tlv),
243SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
244 1, voice_mix_tlv),
245
246SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
247 1, 0),
248SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
249 1, 0),
250
251SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
252SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
253 mix_tlv),
254SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
255 voice_mix_tlv),
1f53aee0
LG		 256SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
257
258SOC_ENUM("Bass Boost", wm8753_enum[0]),
259SOC_ENUM("Bass Filter", wm8753_enum[1]),
260SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
261
262SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
263SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
264
2cc8c609
MM		 265SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
266 rec_mix_tlv),
267SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
268 rec_mix_tlv),
1f53aee0 269
2cc8c609
MM		 270SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
271 pga_tlv),
1f53aee0
LG		 272SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
273SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
274
275SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
276SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
277SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
278
279SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
280SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
281SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
282SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
283SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
284SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
285SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
286SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
287SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
288SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
289
290SOC_ENUM("3D Function", wm8753_enum[5]),
291SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
292SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
293SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
294SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
295
296SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
297SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
298
299SOC_ENUM("De-emphasis", wm8753_enum[8]),
300SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
301SOC_ENUM("Playback Phase", wm8753_enum[10]),
302
2cc8c609
MM		 303SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
304SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 305
306SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
307
308SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 309SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 310};
311
1f53aee0
LG		 312/*
313 * _DAPM_ Controls
314 */
315
316/* Left Mixer */
317static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
318SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
319SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
320SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
321SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
322};
323
324/* Right mixer */
325static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
326SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
327SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
328SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
329SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
330};
331
332/* Mono mixer */
333static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
334SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
335SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
336SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
337SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
338SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
339};
340
341/* Mono 2 Mux */
342static const struct snd_kcontrol_new wm8753_mono2_controls =
343SOC_DAPM_ENUM("Route", wm8753_enum[17]);
344
345/* Out 3 Mux */
346static const struct snd_kcontrol_new wm8753_out3_controls =
347SOC_DAPM_ENUM("Route", wm8753_enum[18]);
348
349/* Out 4 Mux */
350static const struct snd_kcontrol_new wm8753_out4_controls =
351SOC_DAPM_ENUM("Route", wm8753_enum[19]);
352
353/* ADC Mono Mix */
354static const struct snd_kcontrol_new wm8753_adc_mono_controls =
355SOC_DAPM_ENUM("Route", wm8753_enum[22]);
356
357/* Record mixer */
358static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
359SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
360SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
361SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
362};
363
364/* Left ADC mux */
365static const struct snd_kcontrol_new wm8753_adc_left_controls =
366SOC_DAPM_ENUM("Route", wm8753_enum[21]);
367
368/* Right ADC mux */
369static const struct snd_kcontrol_new wm8753_adc_right_controls =
370SOC_DAPM_ENUM("Route", wm8753_enum[20]);
371
372/* MIC mux */
373static const struct snd_kcontrol_new wm8753_mic_mux_controls =
374SOC_DAPM_ENUM("Route", wm8753_enum[16]);
375
376/* ALC mixer */
377static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
378SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
379SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
380SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
381SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
382};
383
384/* Left Line mux */
385static const struct snd_kcontrol_new wm8753_line_left_controls =
386SOC_DAPM_ENUM("Route", wm8753_enum[14]);
387
388/* Right Line mux */
389static const struct snd_kcontrol_new wm8753_line_right_controls =
390SOC_DAPM_ENUM("Route", wm8753_enum[13]);
391
392/* Mono Line mux */
393static const struct snd_kcontrol_new wm8753_line_mono_controls =
394SOC_DAPM_ENUM("Route", wm8753_enum[12]);
395
396/* Line mux and mixer */
397static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
398SOC_DAPM_ENUM("Route", wm8753_enum[11]);
399
400/* Rx mux and mixer */
401static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
402SOC_DAPM_ENUM("Route", wm8753_enum[15]);
403
404/* Mic Selector Mux */
405static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
406SOC_DAPM_ENUM("Route", wm8753_enum[25]);
407
408static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
409SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
410SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
411 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
412SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
413SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
414SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
415SND_SOC_DAPM_OUTPUT("LOUT1"),
416SND_SOC_DAPM_OUTPUT("LOUT2"),
417SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
418 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
419SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
420SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
421SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
422SND_SOC_DAPM_OUTPUT("ROUT1"),
423SND_SOC_DAPM_OUTPUT("ROUT2"),
424SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
425 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
426SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
427SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
428SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
429SND_SOC_DAPM_OUTPUT("MONO1"),
430SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
431SND_SOC_DAPM_OUTPUT("MONO2"),
432SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
433SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
434SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
435SND_SOC_DAPM_OUTPUT("OUT3"),
436SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
437SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
438SND_SOC_DAPM_OUTPUT("OUT4"),
439SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
440 &wm8753_record_mixer_controls[0],
441 ARRAY_SIZE(wm8753_record_mixer_controls)),
442SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
443SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
444SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
445 &wm8753_adc_mono_controls),
446SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
447 &wm8753_adc_mono_controls),
448SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
449 &wm8753_adc_left_controls),
450SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
451 &wm8753_adc_right_controls),
452SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
453 &wm8753_mic_mux_controls),
454SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
455SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
456SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
457 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
458SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
459 &wm8753_line_left_controls),
460SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
461 &wm8753_line_right_controls),
462SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
463 &wm8753_line_mono_controls),
464SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
465 &wm8753_line_mux_mix_controls),
466SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
467 &wm8753_rx_mux_mix_controls),
468SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
469SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
470SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
471 &wm8753_mic_sel_mux_controls),
472SND_SOC_DAPM_INPUT("LINE1"),
473SND_SOC_DAPM_INPUT("LINE2"),
474SND_SOC_DAPM_INPUT("RXP"),
475SND_SOC_DAPM_INPUT("RXN"),
476SND_SOC_DAPM_INPUT("ACIN"),
477SND_SOC_DAPM_OUTPUT("ACOP"),
478SND_SOC_DAPM_INPUT("MIC1N"),
479SND_SOC_DAPM_INPUT("MIC1"),
480SND_SOC_DAPM_INPUT("MIC2N"),
481SND_SOC_DAPM_INPUT("MIC2"),
482SND_SOC_DAPM_VMID("VREF"),
483};
484
a65f0568 485static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 486 /* left mixer */
487 {"Left Mixer", "Left Playback Switch", "Left DAC"},
488 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
489 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
490 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
491
492 /* right mixer */
493 {"Right Mixer", "Right Playback Switch", "Right DAC"},
494 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
495 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
496 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
497
498 /* mono mixer */
499 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
500 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
501 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
502 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
503 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
504
505 /* left out */
506 {"Left Out 1", NULL, "Left Mixer"},
507 {"Left Out 2", NULL, "Left Mixer"},
508 {"LOUT1", NULL, "Left Out 1"},
509 {"LOUT2", NULL, "Left Out 2"},
510
511 /* right out */
512 {"Right Out 1", NULL, "Right Mixer"},
513 {"Right Out 2", NULL, "Right Mixer"},
514 {"ROUT1", NULL, "Right Out 1"},
515 {"ROUT2", NULL, "Right Out 2"},
516
517 /* mono 1 out */
518 {"Mono Out 1", NULL, "Mono Mixer"},
519 {"MONO1", NULL, "Mono Out 1"},
520
521 /* mono 2 out */
522 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
523 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
524 {"Mono 2 Mux", "Left", "Left Mixer"},
525 {"Mono 2 Mux", "Right", "Right Mixer"},
526 {"Mono Out 2", NULL, "Mono 2 Mux"},
527 {"MONO2", NULL, "Mono Out 2"},
528
529 /* out 3 */
530 {"Out3 Left + Right", NULL, "Left Mixer"},
531 {"Out3 Left + Right", NULL, "Right Mixer"},
532 {"Out3 Mux", "VREF", "VREF"},
533 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
534 {"Out3 Mux", "ROUT2", "ROUT2"},
535 {"Out 3", NULL, "Out3 Mux"},
536 {"OUT3", NULL, "Out 3"},
537
538 /* out 4 */
539 {"Out4 Mux", "VREF", "VREF"},
4037314a 540 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 541 {"Out4 Mux", "LOUT2", "LOUT2"},
542 {"Out 4", NULL, "Out4 Mux"},
543 {"OUT4", NULL, "Out 4"},
544
545 /* record mixer */
546 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
547 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
548 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
549
550 /* Mic/SideTone Mux */
551 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
552 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
553 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
554 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
555
556 /* Capture Left Mux */
557 {"Capture Left Mux", "PGA", "Left Capture Volume"},
558 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
559 {"Capture Left Mux", "Line", "LINE1"},
560
561 /* Capture Right Mux */
562 {"Capture Right Mux", "PGA", "Right Capture Volume"},
563 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 564 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 565
566 /* Mono Capture mixer-mux */
567 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
877ae707 568 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
1f53aee0
LG		 569 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
570 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
571 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
572 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
573 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
574 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
575 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
576 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
577
578 /* ADC */
579 {"Left ADC", NULL, "Capture Left Mixer"},
580 {"Right ADC", NULL, "Capture Right Mixer"},
581
582 /* Left Capture Volume */
583 {"Left Capture Volume", NULL, "ACIN"},
584
585 /* Right Capture Volume */
586 {"Right Capture Volume", NULL, "Mic 2 Volume"},
587
588 /* ALC Mixer */
589 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
590 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
591 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
592 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
593
594 /* Line Left Mux */
595 {"Line Left Mux", "Line 1", "LINE1"},
596 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
597
598 /* Line Right Mux */
599 {"Line Right Mux", "Line 2", "LINE2"},
600 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
601
602 /* Line Mono Mux */
603 {"Line Mono Mux", "Line Mix", "Line Mixer"},
604 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
605
606 /* Line Mixer/Mux */
607 {"Line Mixer", "Line 1 + 2", "LINE1"},
608 {"Line Mixer", "Line 1 - 2", "LINE1"},
609 {"Line Mixer", "Line 1 + 2", "LINE2"},
610 {"Line Mixer", "Line 1 - 2", "LINE2"},
611 {"Line Mixer", "Line 1", "LINE1"},
612 {"Line Mixer", "Line 2", "LINE2"},
613
614 /* Rx Mixer/Mux */
615 {"Rx Mixer", "RXP - RXN", "RXP"},
616 {"Rx Mixer", "RXP + RXN", "RXP"},
617 {"Rx Mixer", "RXP - RXN", "RXN"},
618 {"Rx Mixer", "RXP + RXN", "RXN"},
619 {"Rx Mixer", "RXP", "RXP"},
620 {"Rx Mixer", "RXN", "RXN"},
621
622 /* Mic 1 Volume */
623 {"Mic 1 Volume", NULL, "MIC1N"},
624 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
625
626 /* Mic 2 Volume */
627 {"Mic 2 Volume", NULL, "MIC2N"},
628 {"Mic 2 Volume", NULL, "MIC2"},
629
630 /* Mic Selector Mux */
631 {"Mic Selection Mux", "Mic 1", "MIC1"},
632 {"Mic Selection Mux", "Mic 2", "MIC2N"},
633 {"Mic Selection Mux", "Mic 3", "MIC2"},
634
635 /* ACOP */
636 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 637};
638
639static int wm8753_add_widgets(struct snd_soc_codec *codec)
640{
ce6120cc 641 struct snd_soc_dapm_context *dapm = &codec->dapm;
1f53aee0 642
ce6120cc
LG		 643 snd_soc_dapm_new_controls(dapm, wm8753_dapm_widgets,
644 ARRAY_SIZE(wm8753_dapm_widgets));
645 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1f53aee0 646
1f53aee0
LG		 647 return 0;
648}
649
650/* PLL divisors */
651struct _pll_div {
652 u32 div2:1;
653 u32 n:4;
654 u32 k:24;
655};
656
657/* The size in bits of the pll divide multiplied by 10
658 * to allow rounding later */
659#define FIXED_PLL_SIZE ((1 << 22) * 10)
660
661static void pll_factors(struct _pll_div *pll_div, unsigned int target,
662 unsigned int source)
663{
664 u64 Kpart;
665 unsigned int K, Ndiv, Nmod;
666
667 Ndiv = target / source;
668 if (Ndiv < 6) {
669 source >>= 1;
670 pll_div->div2 = 1;
671 Ndiv = target / source;
672 } else
673 pll_div->div2 = 0;
674
675 if ((Ndiv < 6) || (Ndiv > 12))
676 printk(KERN_WARNING
449bd54d 677 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 678
679 pll_div->n = Ndiv;
680 Nmod = target % source;
681 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
682
683 do_div(Kpart, source);
684
685 K = Kpart & 0xFFFFFFFF;
686
687 /* Check if we need to round */
688 if ((K % 10) >= 5)
689 K += 5;
690
691 /* Move down to proper range now rounding is done */
692 K /= 10;
693
694 pll_div->k = K;
695}
696
85488037
MB		 697static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
698 int source, unsigned int freq_in, unsigned int freq_out)
1f53aee0
LG		 699{
700 u16 reg, enable;
701 int offset;
702 struct snd_soc_codec *codec = codec_dai->codec;
703
704 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
705 return -ENODEV;
706
707 if (pll_id == WM8753_PLL1) {
708 offset = 0;
709 enable = 0x10;
776065e3 710 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
1f53aee0
LG		 711 } else {
712 offset = 4;
713 enable = 0x8;
776065e3 714 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
1f53aee0
LG		 715 }
716
717 if (!freq_in || !freq_out) {
718 /* disable PLL */
776065e3
LPC		 719 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
720 snd_soc_write(codec, WM8753_CLOCK, reg);
1f53aee0
LG		 721 return 0;
722 } else {
723 u16 value = 0;
724 struct _pll_div pll_div;
725
726 pll_factors(&pll_div, freq_out * 8, freq_in);
727
728 /* set up N and K PLL divisor ratios */
729 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
730 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776065e3 731 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
1f53aee0
LG		 732
733 /* bits 8:0 = PLL_K[17:9] */
734 value = (pll_div.k & 0x03fe00) >> 9;
776065e3 735 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
1f53aee0
LG		 736
737 /* bits 8:0 = PLL_K[8:0] */
738 value = pll_div.k & 0x0001ff;
776065e3 739 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
1f53aee0
LG		 740
741 /* set PLL as input and enable */
776065e3 742 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
1f53aee0 743 (pll_div.div2 << 3));
776065e3 744 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
1f53aee0
LG		 745 }
746 return 0;
747}
748
749struct _coeff_div {
750 u32 mclk;
751 u32 rate;
752 u8 sr:5;
753 u8 usb:1;
754};
755
756/* codec hifi mclk (after PLL) clock divider coefficients */
757static const struct _coeff_div coeff_div[] = {
758 /* 8k */
759 {12288000, 8000, 0x6, 0x0},
760 {11289600, 8000, 0x16, 0x0},
761 {18432000, 8000, 0x7, 0x0},
762 {16934400, 8000, 0x17, 0x0},
763 {12000000, 8000, 0x6, 0x1},
764
765 /* 11.025k */
766 {11289600, 11025, 0x18, 0x0},
767 {16934400, 11025, 0x19, 0x0},
768 {12000000, 11025, 0x19, 0x1},
769
770 /* 16k */
771 {12288000, 16000, 0xa, 0x0},
772 {18432000, 16000, 0xb, 0x0},
773 {12000000, 16000, 0xa, 0x1},
774
775 /* 22.05k */
776 {11289600, 22050, 0x1a, 0x0},
777 {16934400, 22050, 0x1b, 0x0},
778 {12000000, 22050, 0x1b, 0x1},
779
780 /* 32k */
781 {12288000, 32000, 0xc, 0x0},
782 {18432000, 32000, 0xd, 0x0},
783 {12000000, 32000, 0xa, 0x1},
784
785 /* 44.1k */
786 {11289600, 44100, 0x10, 0x0},
787 {16934400, 44100, 0x11, 0x0},
788 {12000000, 44100, 0x11, 0x1},
789
790 /* 48k */
791 {12288000, 48000, 0x0, 0x0},
792 {18432000, 48000, 0x1, 0x0},
793 {12000000, 48000, 0x0, 0x1},
794
795 /* 88.2k */
796 {11289600, 88200, 0x1e, 0x0},
797 {16934400, 88200, 0x1f, 0x0},
798 {12000000, 88200, 0x1f, 0x1},
799
800 /* 96k */
801 {12288000, 96000, 0xe, 0x0},
802 {18432000, 96000, 0xf, 0x0},
803 {12000000, 96000, 0xe, 0x1},
804};
805
806static int get_coeff(int mclk, int rate)
807{
808 int i;
809
810 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
811 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
812 return i;
813 }
814 return -EINVAL;
815}
816
817/*
818 * Clock after PLL and dividers
819 */
e550e17f 820static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 821 int clk_id, unsigned int freq, int dir)
822{
823 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 824 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 825
826 switch (freq) {
827 case 11289600:
828 case 12000000:
829 case 12288000:
830 case 16934400:
831 case 18432000:
832 if (clk_id == WM8753_MCLK) {
833 wm8753->sysclk = freq;
834 return 0;
835 } else if (clk_id == WM8753_PCMCLK) {
836 wm8753->pcmclk = freq;
837 return 0;
838 }
839 break;
840 }
841 return -EINVAL;
842}
843
844/*
845 * Set's ADC and Voice DAC format.
846 */
338ee253 847static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 848 unsigned int fmt)
849{
776065e3 850 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
1f53aee0
LG		 851
852 /* interface format */
853 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
854 case SND_SOC_DAIFMT_I2S:
855 voice |= 0x0002;
856 break;
857 case SND_SOC_DAIFMT_RIGHT_J:
858 break;
859 case SND_SOC_DAIFMT_LEFT_J:
860 voice |= 0x0001;
861 break;
862 case SND_SOC_DAIFMT_DSP_A:
863 voice |= 0x0003;
864 break;
865 case SND_SOC_DAIFMT_DSP_B:
866 voice |= 0x0013;
867 break;
868 default:
869 return -EINVAL;
870 }
871
776065e3 872 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 873 return 0;
874}
875
876/*
877 * Set PCM DAI bit size and sample rate.
878 */
879static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 880 struct snd_pcm_hw_params *params,
881 struct snd_soc_dai *dai)
1f53aee0
LG		 882{
883 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 884 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 885 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 886 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
887 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
1f53aee0
LG		 888
889 /* bit size */
890 switch (params_format(params)) {
891 case SNDRV_PCM_FORMAT_S16_LE:
892 break;
893 case SNDRV_PCM_FORMAT_S20_3LE:
894 voice |= 0x0004;
895 break;
896 case SNDRV_PCM_FORMAT_S24_LE:
897 voice |= 0x0008;
898 break;
899 case SNDRV_PCM_FORMAT_S32_LE:
900 voice |= 0x000c;
901 break;
902 }
903
904 /* sample rate */
905 if (params_rate(params) * 384 == wm8753->pcmclk)
906 srate |= 0x80;
776065e3 907 snd_soc_write(codec, WM8753_SRATE1, srate);
1f53aee0 908
776065e3 909 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 910 return 0;
911}
912
913/*
914 * Set's PCM dai fmt and BCLK.
915 */
338ee253 916static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 917 unsigned int fmt)
918{
1f53aee0
LG		 919 u16 voice, ioctl;
920
776065e3
LPC		 921 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
922 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
1f53aee0
LG		 923
924 /* set master/slave audio interface */
925 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
926 case SND_SOC_DAIFMT_CBS_CFS:
927 break;
928 case SND_SOC_DAIFMT_CBM_CFM:
929 ioctl |= 0x2;
930 case SND_SOC_DAIFMT_CBM_CFS:
931 voice |= 0x0040;
932 break;
933 default:
934 return -EINVAL;
935 }
936
937 /* clock inversion */
938 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
939 case SND_SOC_DAIFMT_DSP_A:
940 case SND_SOC_DAIFMT_DSP_B:
941 /* frame inversion not valid for DSP modes */
942 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
943 case SND_SOC_DAIFMT_NB_NF:
944 break;
945 case SND_SOC_DAIFMT_IB_NF:
946 voice |= 0x0080;
947 break;
948 default:
949 return -EINVAL;
950 }
951 break;
952 case SND_SOC_DAIFMT_I2S:
953 case SND_SOC_DAIFMT_RIGHT_J:
954 case SND_SOC_DAIFMT_LEFT_J:
955 voice &= ~0x0010;
956 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
957 case SND_SOC_DAIFMT_NB_NF:
958 break;
959 case SND_SOC_DAIFMT_IB_IF:
960 voice |= 0x0090;
961 break;
962 case SND_SOC_DAIFMT_IB_NF:
963 voice |= 0x0080;
964 break;
965 case SND_SOC_DAIFMT_NB_IF:
966 voice |= 0x0010;
967 break;
968 default:
969 return -EINVAL;
970 }
971 break;
972 default:
973 return -EINVAL;
974 }
975
776065e3
LPC		 976 snd_soc_write(codec, WM8753_PCM, voice);
977 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 978 return 0;
979}
980
e550e17f 981static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 982 int div_id, int div)
983{
984 struct snd_soc_codec *codec = codec_dai->codec;
985 u16 reg;
986
987 switch (div_id) {
988 case WM8753_PCMDIV:
776065e3
LPC		 989 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
990 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1f53aee0
LG		 991 break;
992 case WM8753_BCLKDIV:
776065e3
LPC		 993 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
994 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 995 break;
996 case WM8753_VXCLKDIV:
776065e3
LPC		 997 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
998 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 999 break;
1000 default:
1001 return -EINVAL;
1002 }
1003 return 0;
1004}
1005
1006/*
1007 * Set's HiFi DAC format.
1008 */
338ee253 1009static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1010 unsigned int fmt)
1011{
776065e3 1012 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1f53aee0
LG		 1013
1014 /* interface format */
1015 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1016 case SND_SOC_DAIFMT_I2S:
1017 hifi |= 0x0002;
1018 break;
1019 case SND_SOC_DAIFMT_RIGHT_J:
1020 break;
1021 case SND_SOC_DAIFMT_LEFT_J:
1022 hifi |= 0x0001;
1023 break;
1024 case SND_SOC_DAIFMT_DSP_A:
1025 hifi |= 0x0003;
1026 break;
1027 case SND_SOC_DAIFMT_DSP_B:
1028 hifi |= 0x0013;
1029 break;
1030 default:
1031 return -EINVAL;
1032 }
1033
776065e3 1034 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1035 return 0;
1036}
1037
1038/*
1039 * Set's I2S DAI format.
1040 */
338ee253 1041static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1042 unsigned int fmt)
1043{
1f53aee0
LG		 1044 u16 ioctl, hifi;
1045
776065e3
LPC		 1046 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1047 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1f53aee0
LG		 1048
1049 /* set master/slave audio interface */
1050 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1051 case SND_SOC_DAIFMT_CBS_CFS:
1052 break;
1053 case SND_SOC_DAIFMT_CBM_CFM:
1054 ioctl |= 0x1;
1055 case SND_SOC_DAIFMT_CBM_CFS:
1056 hifi |= 0x0040;
1057 break;
1058 default:
1059 return -EINVAL;
1060 }
1061
1062 /* clock inversion */
1063 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1064 case SND_SOC_DAIFMT_DSP_A:
1065 case SND_SOC_DAIFMT_DSP_B:
1066 /* frame inversion not valid for DSP modes */
1067 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1068 case SND_SOC_DAIFMT_NB_NF:
1069 break;
1070 case SND_SOC_DAIFMT_IB_NF:
1071 hifi |= 0x0080;
1072 break;
1073 default:
1074 return -EINVAL;
1075 }
1076 break;
1077 case SND_SOC_DAIFMT_I2S:
1078 case SND_SOC_DAIFMT_RIGHT_J:
1079 case SND_SOC_DAIFMT_LEFT_J:
1080 hifi &= ~0x0010;
1081 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1082 case SND_SOC_DAIFMT_NB_NF:
1083 break;
1084 case SND_SOC_DAIFMT_IB_IF:
1085 hifi |= 0x0090;
1086 break;
1087 case SND_SOC_DAIFMT_IB_NF:
1088 hifi |= 0x0080;
1089 break;
1090 case SND_SOC_DAIFMT_NB_IF:
1091 hifi |= 0x0010;
1092 break;
1093 default:
1094 return -EINVAL;
1095 }
1096 break;
1097 default:
1098 return -EINVAL;
1099 }
1100
776065e3
LPC		 1101 snd_soc_write(codec, WM8753_HIFI, hifi);
1102 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1103 return 0;
1104}
1105
1106/*
1107 * Set PCM DAI bit size and sample rate.
1108 */
1109static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1110 struct snd_pcm_hw_params *params,
1111 struct snd_soc_dai *dai)
1f53aee0
LG		 1112{
1113 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1114 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 1115 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 1116 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1117 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1f53aee0
LG		 1118 int coeff;
1119
1120 /* is digital filter coefficient valid ? */
1121 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1122 if (coeff < 0) {
1123 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1124 return coeff;
1125 }
776065e3 1126 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1f53aee0
LG		 1127 coeff_div[coeff].usb);
1128
1129 /* bit size */
1130 switch (params_format(params)) {
1131 case SNDRV_PCM_FORMAT_S16_LE:
1132 break;
1133 case SNDRV_PCM_FORMAT_S20_3LE:
1134 hifi |= 0x0004;
1135 break;
1136 case SNDRV_PCM_FORMAT_S24_LE:
1137 hifi |= 0x0008;
1138 break;
1139 case SNDRV_PCM_FORMAT_S32_LE:
1140 hifi |= 0x000c;
1141 break;
1142 }
1143
776065e3 1144 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1145 return 0;
1146}
1147
338ee253 1148static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1149 unsigned int fmt)
1150{
1f53aee0
LG		 1151 u16 clock;
1152
1153 /* set clk source as pcmclk */
776065e3
LPC		 1154 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1155 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1156
338ee253 1157 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1158}
1159
338ee253 1160static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1161 unsigned int fmt)
1162{
338ee253 1163 return wm8753_hdac_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1164}
1165
338ee253 1166static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1167 unsigned int fmt)
1168{
1f53aee0
LG		 1169 u16 clock;
1170
1171 /* set clk source as pcmclk */
776065e3
LPC		 1172 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1173 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1174
338ee253 1175 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1176}
1177
338ee253 1178static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1179 unsigned int fmt)
1180{
1f53aee0
LG		 1181 u16 clock;
1182
1183 /* set clk source as mclk */
776065e3
LPC		 1184 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1185 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1f53aee0 1186
338ee253 1187 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1f53aee0 1188 return -EINVAL;
338ee253 1189 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1190}
1191
338ee253
LPC		 1192static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1193 unsigned int fmt)
1194{
1195 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1196 int ret = 0;
1197
1198 switch (wm8753->dai_func) {
1199 case 0:
1200 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1201 break;
1202 case 1:
1203 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1204 break;
1205 case 2:
1206 case 3:
1207 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1208 break;
1209 default:
1210 break;
1211 }
1212 if (ret)
1213 return ret;
1214
1215 return wm8753_i2s_set_dai_fmt(codec, fmt);
1216}
1217
1218static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1219 unsigned int fmt)
1220{
1221 struct snd_soc_codec *codec = codec_dai->codec;
1222 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1223
1224 wm8753->hifi_fmt = fmt;
1225
1226 return wm8753_hifi_write_dai_fmt(codec, fmt);
1227};
1228
1229static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1230 unsigned int fmt)
1231{
1232 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1233 int ret = 0;
1234
1235 if (wm8753->dai_func != 0)
1236 return 0;
1237
1238 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1239 if (ret)
1240 return ret;
1241 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1242 if (ret)
1243 return ret;
1244
1245 return 0;
1246};
1247
1248static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1249 unsigned int fmt)
1250{
1251 struct snd_soc_codec *codec = codec_dai->codec;
1252 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1253
1254 wm8753->voice_fmt = fmt;
1255
1256 return wm8753_voice_write_dai_fmt(codec, fmt);
1257};
1258
e550e17f 1259static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1260{
1261 struct snd_soc_codec *codec = dai->codec;
776065e3 1262 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
f0fba2ad 1263 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 1264
1265 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1266 * make sure we check if they are not both active when we mute */
f0fba2ad
LG		 1267 if (mute && wm8753->dai_func == 1) {
1268 if (!codec->active)
776065e3 1269 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0
LG		 1270 } else {
1271 if (mute)
776065e3 1272 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0 1273 else
776065e3 1274 snd_soc_write(codec, WM8753_DAC, mute_reg);
1f53aee0
LG		 1275 }
1276
1277 return 0;
1278}
1279
0be9898a
MB		 1280static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1281 enum snd_soc_bias_level level)
1f53aee0 1282{
776065e3 1283 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1f53aee0 1284
0be9898a
MB		 1285 switch (level) {
1286 case SND_SOC_BIAS_ON:
1f53aee0 1287 /* set vmid to 50k and unmute dac */
776065e3 1288 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1f53aee0 1289 break;
0be9898a 1290 case SND_SOC_BIAS_PREPARE:
1f53aee0 1291 /* set vmid to 5k for quick power up */
776065e3 1292 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1f53aee0 1293 break;
0be9898a 1294 case SND_SOC_BIAS_STANDBY:
1f53aee0 1295 /* mute dac and set vmid to 500k, enable VREF */
776065e3 1296 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1f53aee0 1297 break;
0be9898a 1298 case SND_SOC_BIAS_OFF:
776065e3 1299 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1f53aee0
LG		 1300 break;
1301 }
ce6120cc 1302 codec->dapm.bias_level = level;
1f53aee0
LG		 1303 return 0;
1304}
1305
1306#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1307 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1308 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1309 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1310
1311#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1312 SNDRV_PCM_FMTBIT_S24_LE)
1313
1314/*
25985edc 1315 * The WM8753 supports up to 4 different and mutually exclusive DAI
1f53aee0
LG		 1316 * configurations. This gives 2 PCM's available for use, hifi and voice.
1317 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1318 * is connected between the wm8753 and a BT codec or GSM modem.
1319 *
1320 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1321 * 2. Voice over HIFI DAI - HIFI disabled
1322 * 3. Voice disabled - HIFI over HIFI
1323 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1324 */
338ee253 1325static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
6335d055
EM		 1326 .hw_params = wm8753_i2s_hw_params,
1327 .digital_mute = wm8753_mute,
338ee253 1328 .set_fmt = wm8753_hifi_set_dai_fmt,
6335d055
EM		 1329 .set_clkdiv = wm8753_set_dai_clkdiv,
1330 .set_pll = wm8753_set_dai_pll,
1331 .set_sysclk = wm8753_set_dai_sysclk,
1332};
1333
338ee253 1334static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
6335d055
EM		 1335 .hw_params = wm8753_pcm_hw_params,
1336 .digital_mute = wm8753_mute,
338ee253 1337 .set_fmt = wm8753_voice_set_dai_fmt,
6335d055
EM		 1338 .set_clkdiv = wm8753_set_dai_clkdiv,
1339 .set_pll = wm8753_set_dai_pll,
1340 .set_sysclk = wm8753_set_dai_sysclk,
1341};
1342
338ee253 1343static struct snd_soc_dai_driver wm8753_dai[] = {
1f53aee0 1344/* DAI HiFi mode 1 */
f0fba2ad 1345{ .name = "wm8753-hifi",
1f53aee0
LG		 1346 .playback = {
1347 .stream_name = "HiFi Playback",
1348 .channels_min = 1,
1349 .channels_max = 2,
1350 .rates = WM8753_RATES,
338ee253
LPC		 1351 .formats = WM8753_FORMATS
1352 },
1f53aee0
LG		 1353 .capture = { /* dummy for fast DAI switching */
1354 .stream_name = "Capture",
1355 .channels_min = 1,
1356 .channels_max = 2,
1357 .rates = WM8753_RATES,
338ee253
LPC		 1358 .formats = WM8753_FORMATS
1359 },
1360 .ops = &wm8753_dai_ops_hifi_mode,
1f53aee0
LG		 1361},
1362/* DAI Voice mode 1 */
f0fba2ad 1363{ .name = "wm8753-voice",
1f53aee0
LG		 1364 .playback = {
1365 .stream_name = "Voice Playback",
1366 .channels_min = 1,
1367 .channels_max = 1,
1368 .rates = WM8753_RATES,
338ee253
LPC		 1369 .formats = WM8753_FORMATS,
1370 },
1f53aee0
LG		 1371 .capture = {
1372 .stream_name = "Capture",
1373 .channels_min = 1,
1374 .channels_max = 2,
1375 .rates = WM8753_RATES,
338ee253 1376 .formats = WM8753_FORMATS,
9e70c1f0 1377 },
338ee253
LPC		 1378 .ops = &wm8753_dai_ops_voice_mode,
1379},
9e70c1f0 1380};
1f53aee0 1381
1f53aee0
LG		 1382static void wm8753_work(struct work_struct *work)
1383{
ce6120cc
LG		 1384 struct snd_soc_dapm_context *dapm =
1385 container_of(work, struct snd_soc_dapm_context,
1386 delayed_work.work);
1387 struct snd_soc_codec *codec = dapm->codec;
1388 wm8753_set_bias_level(codec, dapm->bias_level);
1f53aee0
LG		 1389}
1390
f0fba2ad 1391static int wm8753_suspend(struct snd_soc_codec *codec, pm_message_t state)
1f53aee0 1392{
0be9898a 1393 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1394 return 0;
1395}
1396
f0fba2ad 1397static int wm8753_resume(struct snd_soc_codec *codec)
1f53aee0 1398{
776065e3 1399 u16 *reg_cache = codec->reg_cache;
1f53aee0 1400 int i;
1f53aee0 1401
1f53aee0 1402 /* Sync reg_cache with the hardware */
776065e3
LPC		 1403 for (i = 1; i < ARRAY_SIZE(wm8753_reg); i++) {
1404 if (i == WM8753_RESET)
1f53aee0 1405 continue;
e611bd82
MB		 1406
1407 /* No point in writing hardware default values back */
776065e3 1408 if (reg_cache[i] == wm8753_reg[i])
e611bd82
MB		 1409 continue;
1410
776065e3 1411 snd_soc_write(codec, i, reg_cache[i]);
1f53aee0
LG		 1412 }
1413
0be9898a 1414 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1415
1416 /* charge wm8753 caps */
ce6120cc 1417 if (codec->dapm.suspend_bias_level == SND_SOC_BIAS_ON) {
0be9898a 1418 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc
LG		 1419 codec->dapm.bias_level = SND_SOC_BIAS_ON;
1420 schedule_delayed_work(&codec->dapm.delayed_work,
1f53aee0
LG		 1421 msecs_to_jiffies(caps_charge));
1422 }
1423
1424 return 0;
1425}
1426
f0fba2ad 1427static int wm8753_probe(struct snd_soc_codec *codec)
1f53aee0 1428{
f0fba2ad 1429 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1430 int ret;
1f53aee0 1431
ce6120cc 1432 INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work);
c2bac160 1433
f0fba2ad
LG		 1434 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8753->control_type);
1435 if (ret < 0) {
1436 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1437 return ret;
c2bac160
MB		 1438 }
1439
c2bac160
MB		 1440 ret = wm8753_reset(codec);
1441 if (ret < 0) {
f0fba2ad
LG		 1442 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1443 return ret;
c2bac160
MB		 1444 }
1445
f0fba2ad
LG		 1446 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1447 wm8753->dai_func = 0;
1448
c2bac160
MB		 1449 /* charge output caps */
1450 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc 1451 schedule_delayed_work(&codec->dapm.delayed_work,
c2bac160
MB		 1452 msecs_to_jiffies(caps_charge));
1453
1454 /* set the update bits */
776065e3
LPC		 1455 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1456 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
1457 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1458 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
1459 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1460 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1461 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1462 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1463 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1464 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
c2bac160 1465
f0fba2ad
LG		 1466 snd_soc_add_controls(codec, wm8753_snd_controls,
1467 ARRAY_SIZE(wm8753_snd_controls));
1468 wm8753_add_widgets(codec);
c2bac160
MB		 1469
1470 return 0;
c2bac160
MB		 1471}
1472
f0fba2ad
LG		 1473/* power down chip */
1474static int wm8753_remove(struct snd_soc_codec *codec)
c2bac160 1475{
fdea0571 1476 flush_delayed_work_sync(&codec->dapm.delayed_work);
f0fba2ad
LG		 1477 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1478
1479 return 0;
c2bac160
MB		 1480}
1481
f0fba2ad
LG		 1482static struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
1483 .probe = wm8753_probe,
1484 .remove = wm8753_remove,
1485 .suspend = wm8753_suspend,
1486 .resume = wm8753_resume,
1487 .set_bias_level = wm8753_set_bias_level,
e5eec34c 1488 .reg_cache_size = ARRAY_SIZE(wm8753_reg),
f0fba2ad
LG		 1489 .reg_word_size = sizeof(u16),
1490 .reg_cache_default = wm8753_reg,
1491};
69e169da 1492
f0fba2ad
LG		 1493#if defined(CONFIG_SPI_MASTER)
1494static int __devinit wm8753_spi_probe(struct spi_device *spi)
69e169da 1495{
c2bac160 1496 struct wm8753_priv *wm8753;
f0fba2ad 1497 int ret;
69e169da 1498
c2bac160
MB		 1499 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1500 if (wm8753 == NULL)
1501 return -ENOMEM;
69e169da 1502
f0fba2ad
LG		 1503 wm8753->control_type = SND_SOC_SPI;
1504 spi_set_drvdata(spi, wm8753);
c2bac160 1505
f0fba2ad
LG		 1506 ret = snd_soc_register_codec(&spi->dev,
1507 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1508 if (ret < 0)
1509 kfree(wm8753);
1510 return ret;
69e169da
MB		 1511}
1512
f0fba2ad 1513static int __devexit wm8753_spi_remove(struct spi_device *spi)
69e169da 1514{
f0fba2ad
LG		 1515 snd_soc_unregister_codec(&spi->dev);
1516 kfree(spi_get_drvdata(spi));
1517 return 0;
69e169da
MB		 1518}
1519
f0fba2ad 1520static struct spi_driver wm8753_spi_driver = {
69e169da 1521 .driver = {
f0fba2ad 1522 .name = "wm8753-codec",
f0fba2ad 1523 .owner = THIS_MODULE,
69e169da 1524 },
f0fba2ad
LG		 1525 .probe = wm8753_spi_probe,
1526 .remove = __devexit_p(wm8753_spi_remove),
69e169da 1527};
f0fba2ad 1528#endif /* CONFIG_SPI_MASTER */
69e169da 1529
f0fba2ad
LG		 1530#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1531static __devinit int wm8753_i2c_probe(struct i2c_client *i2c,
1532 const struct i2c_device_id *id)
69e169da 1533{
c2bac160 1534 struct wm8753_priv *wm8753;
f0fba2ad 1535 int ret;
c2bac160
MB		 1536
1537 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1538 if (wm8753 == NULL)
1539 return -ENOMEM;
69e169da 1540
f0fba2ad 1541 i2c_set_clientdata(i2c, wm8753);
f0fba2ad 1542 wm8753->control_type = SND_SOC_I2C;
69e169da 1543
f0fba2ad
LG		 1544 ret = snd_soc_register_codec(&i2c->dev,
1545 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1546 if (ret < 0)
1547 kfree(wm8753);
1548 return ret;
69e169da
MB		 1549}
1550
f0fba2ad 1551static __devexit int wm8753_i2c_remove(struct i2c_client *client)
69e169da 1552{
f0fba2ad
LG		 1553 snd_soc_unregister_codec(&client->dev);
1554 kfree(i2c_get_clientdata(client));
69e169da
MB		 1555 return 0;
1556}
1557
f0fba2ad
LG		 1558static const struct i2c_device_id wm8753_i2c_id[] = {
1559 { "wm8753", 0 },
1560 { }
1561};
1562MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1563
1564static struct i2c_driver wm8753_i2c_driver = {
69e169da 1565 .driver = {
f0fba2ad
LG		 1566 .name = "wm8753-codec",
1567 .owner = THIS_MODULE,
69e169da 1568 },
f0fba2ad
LG		 1569 .probe = wm8753_i2c_probe,
1570 .remove = __devexit_p(wm8753_i2c_remove),
1571 .id_table = wm8753_i2c_id,
69e169da
MB		 1572};
1573#endif
1574
c9b3a40f 1575static int __init wm8753_modinit(void)
64089b84 1576{
f0fba2ad 1577 int ret = 0;
c2bac160
MB		 1578#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1579 ret = i2c_add_driver(&wm8753_i2c_driver);
f0fba2ad
LG		 1580 if (ret != 0) {
1581 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1582 ret);
1583 }
c2bac160
MB		 1584#endif
1585#if defined(CONFIG_SPI_MASTER)
1586 ret = spi_register_driver(&wm8753_spi_driver);
f0fba2ad
LG		 1587 if (ret != 0) {
1588 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1589 ret);
1590 }
c2bac160 1591#endif
f0fba2ad 1592 return ret;
64089b84
MB		 1593}
1594module_init(wm8753_modinit);
1595
1596static void __exit wm8753_exit(void)
1597{
c2bac160
MB		 1598#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1599 i2c_del_driver(&wm8753_i2c_driver);
1600#endif
1601#if defined(CONFIG_SPI_MASTER)
1602 spi_unregister_driver(&wm8753_spi_driver);
1603#endif
64089b84
MB		 1604}
1605module_exit(wm8753_exit);
1606
1f53aee0
LG		 1607MODULE_DESCRIPTION("ASoC WM8753 driver");
1608MODULE_AUTHOR("Liam Girdwood");
1609MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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