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c046fd4d DP |
1 | /* |
2 | * wm8770.c -- WM8770 ALSA SoC Audio driver | |
3 | * | |
4 | * Copyright 2010 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/moduleparam.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/delay.h> | |
13c7d08f | 17 | #include <linux/of_device.h> |
c046fd4d | 18 | #include <linux/pm.h> |
c046fd4d | 19 | #include <linux/spi/spi.h> |
dc43b046 | 20 | #include <linux/regmap.h> |
c046fd4d DP |
21 | #include <linux/regulator/consumer.h> |
22 | #include <linux/slab.h> | |
23 | #include <sound/core.h> | |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/soc.h> | |
c046fd4d DP |
27 | #include <sound/initval.h> |
28 | #include <sound/tlv.h> | |
29 | ||
30 | #include "wm8770.h" | |
31 | ||
32 | #define WM8770_NUM_SUPPLIES 3 | |
33 | static const char *wm8770_supply_names[WM8770_NUM_SUPPLIES] = { | |
34 | "AVDD1", | |
35 | "AVDD2", | |
36 | "DVDD" | |
37 | }; | |
38 | ||
dc43b046 MB |
39 | static const struct reg_default wm8770_reg_defaults[] = { |
40 | { 0, 0x7f }, | |
41 | { 1, 0x7f }, | |
42 | { 2, 0x7f }, | |
43 | { 3, 0x7f }, | |
44 | { 4, 0x7f }, | |
45 | { 5, 0x7f }, | |
46 | { 6, 0x7f }, | |
47 | { 7, 0x7f }, | |
48 | { 8, 0x7f }, | |
49 | { 9, 0xff }, | |
50 | { 10, 0xff }, | |
51 | { 11, 0xff }, | |
52 | { 12, 0xff }, | |
53 | { 13, 0xff }, | |
54 | { 14, 0xff }, | |
55 | { 15, 0xff }, | |
56 | { 16, 0xff }, | |
57 | { 17, 0xff }, | |
58 | { 18, 0 }, | |
59 | { 19, 0x90 }, | |
60 | { 20, 0 }, | |
61 | { 21, 0 }, | |
62 | { 22, 0x22 }, | |
63 | { 23, 0x22 }, | |
64 | { 24, 0x3e }, | |
65 | { 25, 0xc }, | |
66 | { 26, 0xc }, | |
67 | { 27, 0x100 }, | |
68 | { 28, 0x189 }, | |
69 | { 29, 0x189 }, | |
70 | { 30, 0x8770 }, | |
c046fd4d DP |
71 | }; |
72 | ||
dc43b046 MB |
73 | static bool wm8770_volatile_reg(struct device *dev, unsigned int reg) |
74 | { | |
75 | switch (reg) { | |
76 | case WM8770_RESET: | |
77 | return true; | |
78 | default: | |
79 | return false; | |
80 | } | |
81 | } | |
82 | ||
c046fd4d | 83 | struct wm8770_priv { |
dc43b046 | 84 | struct regmap *regmap; |
c046fd4d DP |
85 | struct regulator_bulk_data supplies[WM8770_NUM_SUPPLIES]; |
86 | struct notifier_block disable_nb[WM8770_NUM_SUPPLIES]; | |
87 | struct snd_soc_codec *codec; | |
88 | int sysclk; | |
89 | }; | |
90 | ||
91 | static int vout12supply_event(struct snd_soc_dapm_widget *w, | |
92 | struct snd_kcontrol *kcontrol, int event); | |
93 | static int vout34supply_event(struct snd_soc_dapm_widget *w, | |
94 | struct snd_kcontrol *kcontrol, int event); | |
95 | ||
96 | /* | |
97 | * We can't use the same notifier block for more than one supply and | |
98 | * there's no way I can see to get from a callback to the caller | |
99 | * except container_of(). | |
100 | */ | |
101 | #define WM8770_REGULATOR_EVENT(n) \ | |
102 | static int wm8770_regulator_event_##n(struct notifier_block *nb, \ | |
103 | unsigned long event, void *data) \ | |
104 | { \ | |
105 | struct wm8770_priv *wm8770 = container_of(nb, struct wm8770_priv, \ | |
106 | disable_nb[n]); \ | |
107 | if (event & REGULATOR_EVENT_DISABLE) { \ | |
dc43b046 | 108 | regcache_mark_dirty(wm8770->regmap); \ |
c046fd4d DP |
109 | } \ |
110 | return 0; \ | |
111 | } | |
112 | ||
113 | WM8770_REGULATOR_EVENT(0) | |
114 | WM8770_REGULATOR_EVENT(1) | |
115 | WM8770_REGULATOR_EVENT(2) | |
116 | ||
117 | static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0); | |
118 | static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1); | |
119 | static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1); | |
120 | ||
121 | static const char *dac_phase_text[][2] = { | |
122 | { "DAC1 Normal", "DAC1 Inverted" }, | |
123 | { "DAC2 Normal", "DAC2 Inverted" }, | |
124 | { "DAC3 Normal", "DAC3 Inverted" }, | |
125 | { "DAC4 Normal", "DAC4 Inverted" }, | |
126 | }; | |
127 | ||
128 | static const struct soc_enum dac_phase[] = { | |
129 | SOC_ENUM_DOUBLE(WM8770_DACPHASE, 0, 1, 2, dac_phase_text[0]), | |
130 | SOC_ENUM_DOUBLE(WM8770_DACPHASE, 2, 3, 2, dac_phase_text[1]), | |
131 | SOC_ENUM_DOUBLE(WM8770_DACPHASE, 4, 5, 2, dac_phase_text[2]), | |
132 | SOC_ENUM_DOUBLE(WM8770_DACPHASE, 6, 7, 2, dac_phase_text[3]), | |
133 | }; | |
134 | ||
135 | static const struct snd_kcontrol_new wm8770_snd_controls[] = { | |
136 | /* global DAC playback controls */ | |
137 | SOC_SINGLE_TLV("DAC Playback Volume", WM8770_MSDIGVOL, 0, 255, 0, | |
138 | dac_dig_tlv), | |
139 | SOC_SINGLE("DAC Playback Switch", WM8770_DACMUTE, 4, 1, 1), | |
140 | SOC_SINGLE("DAC Playback ZC Switch", WM8770_DACCTRL1, 0, 1, 0), | |
141 | ||
142 | /* global VOUT playback controls */ | |
143 | SOC_SINGLE_TLV("VOUT Playback Volume", WM8770_MSALGVOL, 0, 127, 0, | |
144 | dac_alg_tlv), | |
145 | SOC_SINGLE("VOUT Playback ZC Switch", WM8770_MSALGVOL, 7, 1, 0), | |
146 | ||
147 | /* VOUT1/2/3/4 specific controls */ | |
148 | SOC_DOUBLE_R_TLV("VOUT1 Playback Volume", WM8770_VOUT1LVOL, | |
149 | WM8770_VOUT1RVOL, 0, 127, 0, dac_alg_tlv), | |
150 | SOC_DOUBLE_R("VOUT1 Playback ZC Switch", WM8770_VOUT1LVOL, | |
151 | WM8770_VOUT1RVOL, 7, 1, 0), | |
152 | SOC_DOUBLE_R_TLV("VOUT2 Playback Volume", WM8770_VOUT2LVOL, | |
153 | WM8770_VOUT2RVOL, 0, 127, 0, dac_alg_tlv), | |
154 | SOC_DOUBLE_R("VOUT2 Playback ZC Switch", WM8770_VOUT2LVOL, | |
155 | WM8770_VOUT2RVOL, 7, 1, 0), | |
156 | SOC_DOUBLE_R_TLV("VOUT3 Playback Volume", WM8770_VOUT3LVOL, | |
157 | WM8770_VOUT3RVOL, 0, 127, 0, dac_alg_tlv), | |
158 | SOC_DOUBLE_R("VOUT3 Playback ZC Switch", WM8770_VOUT3LVOL, | |
159 | WM8770_VOUT3RVOL, 7, 1, 0), | |
160 | SOC_DOUBLE_R_TLV("VOUT4 Playback Volume", WM8770_VOUT4LVOL, | |
161 | WM8770_VOUT4RVOL, 0, 127, 0, dac_alg_tlv), | |
162 | SOC_DOUBLE_R("VOUT4 Playback ZC Switch", WM8770_VOUT4LVOL, | |
163 | WM8770_VOUT4RVOL, 7, 1, 0), | |
164 | ||
165 | /* DAC1/2/3/4 specific controls */ | |
166 | SOC_DOUBLE_R_TLV("DAC1 Playback Volume", WM8770_DAC1LVOL, | |
167 | WM8770_DAC1RVOL, 0, 255, 0, dac_dig_tlv), | |
168 | SOC_SINGLE("DAC1 Deemphasis Switch", WM8770_DACCTRL2, 0, 1, 0), | |
169 | SOC_ENUM("DAC1 Phase", dac_phase[0]), | |
170 | SOC_DOUBLE_R_TLV("DAC2 Playback Volume", WM8770_DAC2LVOL, | |
171 | WM8770_DAC2RVOL, 0, 255, 0, dac_dig_tlv), | |
172 | SOC_SINGLE("DAC2 Deemphasis Switch", WM8770_DACCTRL2, 1, 1, 0), | |
173 | SOC_ENUM("DAC2 Phase", dac_phase[1]), | |
174 | SOC_DOUBLE_R_TLV("DAC3 Playback Volume", WM8770_DAC3LVOL, | |
175 | WM8770_DAC3RVOL, 0, 255, 0, dac_dig_tlv), | |
176 | SOC_SINGLE("DAC3 Deemphasis Switch", WM8770_DACCTRL2, 2, 1, 0), | |
177 | SOC_ENUM("DAC3 Phase", dac_phase[2]), | |
178 | SOC_DOUBLE_R_TLV("DAC4 Playback Volume", WM8770_DAC4LVOL, | |
179 | WM8770_DAC4RVOL, 0, 255, 0, dac_dig_tlv), | |
180 | SOC_SINGLE("DAC4 Deemphasis Switch", WM8770_DACCTRL2, 3, 1, 0), | |
181 | SOC_ENUM("DAC4 Phase", dac_phase[3]), | |
182 | ||
183 | /* ADC specific controls */ | |
184 | SOC_DOUBLE_R_TLV("Capture Volume", WM8770_ADCLCTRL, WM8770_ADCRCTRL, | |
185 | 0, 31, 0, adc_tlv), | |
186 | SOC_DOUBLE_R("Capture Switch", WM8770_ADCLCTRL, WM8770_ADCRCTRL, | |
187 | 5, 1, 1), | |
188 | ||
189 | /* other controls */ | |
190 | SOC_SINGLE("ADC 128x Oversampling Switch", WM8770_MSTRCTRL, 3, 1, 0), | |
191 | SOC_SINGLE("ADC Highpass Filter Switch", WM8770_IFACECTRL, 8, 1, 1) | |
192 | }; | |
193 | ||
194 | static const char *ain_text[] = { | |
195 | "AIN1", "AIN2", "AIN3", "AIN4", | |
196 | "AIN5", "AIN6", "AIN7", "AIN8" | |
197 | }; | |
198 | ||
7a6c0a58 TI |
199 | static SOC_ENUM_DOUBLE_DECL(ain_enum, |
200 | WM8770_ADCMUX, 0, 4, ain_text); | |
c046fd4d DP |
201 | |
202 | static const struct snd_kcontrol_new ain_mux = | |
203 | SOC_DAPM_ENUM("Capture Mux", ain_enum); | |
204 | ||
205 | static const struct snd_kcontrol_new vout1_mix_controls[] = { | |
206 | SOC_DAPM_SINGLE("DAC1 Switch", WM8770_OUTMUX1, 0, 1, 0), | |
207 | SOC_DAPM_SINGLE("AUX1 Switch", WM8770_OUTMUX1, 1, 1, 0), | |
208 | SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX1, 2, 1, 0) | |
209 | }; | |
210 | ||
211 | static const struct snd_kcontrol_new vout2_mix_controls[] = { | |
212 | SOC_DAPM_SINGLE("DAC2 Switch", WM8770_OUTMUX1, 3, 1, 0), | |
213 | SOC_DAPM_SINGLE("AUX2 Switch", WM8770_OUTMUX1, 4, 1, 0), | |
214 | SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX1, 5, 1, 0) | |
215 | }; | |
216 | ||
217 | static const struct snd_kcontrol_new vout3_mix_controls[] = { | |
218 | SOC_DAPM_SINGLE("DAC3 Switch", WM8770_OUTMUX2, 0, 1, 0), | |
219 | SOC_DAPM_SINGLE("AUX3 Switch", WM8770_OUTMUX2, 1, 1, 0), | |
220 | SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX2, 2, 1, 0) | |
221 | }; | |
222 | ||
223 | static const struct snd_kcontrol_new vout4_mix_controls[] = { | |
224 | SOC_DAPM_SINGLE("DAC4 Switch", WM8770_OUTMUX2, 3, 1, 0), | |
225 | SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX2, 4, 1, 0) | |
226 | }; | |
227 | ||
228 | static const struct snd_soc_dapm_widget wm8770_dapm_widgets[] = { | |
229 | SND_SOC_DAPM_INPUT("AUX1"), | |
230 | SND_SOC_DAPM_INPUT("AUX2"), | |
231 | SND_SOC_DAPM_INPUT("AUX3"), | |
232 | ||
233 | SND_SOC_DAPM_INPUT("AIN1"), | |
234 | SND_SOC_DAPM_INPUT("AIN2"), | |
235 | SND_SOC_DAPM_INPUT("AIN3"), | |
236 | SND_SOC_DAPM_INPUT("AIN4"), | |
237 | SND_SOC_DAPM_INPUT("AIN5"), | |
238 | SND_SOC_DAPM_INPUT("AIN6"), | |
239 | SND_SOC_DAPM_INPUT("AIN7"), | |
240 | SND_SOC_DAPM_INPUT("AIN8"), | |
241 | ||
242 | SND_SOC_DAPM_MUX("Capture Mux", WM8770_ADCMUX, 8, 1, &ain_mux), | |
243 | ||
244 | SND_SOC_DAPM_ADC("ADC", "Capture", WM8770_PWDNCTRL, 1, 1), | |
245 | ||
246 | SND_SOC_DAPM_DAC("DAC1", "Playback", WM8770_PWDNCTRL, 2, 1), | |
247 | SND_SOC_DAPM_DAC("DAC2", "Playback", WM8770_PWDNCTRL, 3, 1), | |
248 | SND_SOC_DAPM_DAC("DAC3", "Playback", WM8770_PWDNCTRL, 4, 1), | |
249 | SND_SOC_DAPM_DAC("DAC4", "Playback", WM8770_PWDNCTRL, 5, 1), | |
250 | ||
251 | SND_SOC_DAPM_SUPPLY("VOUT12 Supply", SND_SOC_NOPM, 0, 0, | |
252 | vout12supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | |
253 | SND_SOC_DAPM_SUPPLY("VOUT34 Supply", SND_SOC_NOPM, 0, 0, | |
254 | vout34supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | |
255 | ||
256 | SND_SOC_DAPM_MIXER("VOUT1 Mixer", SND_SOC_NOPM, 0, 0, | |
257 | vout1_mix_controls, ARRAY_SIZE(vout1_mix_controls)), | |
258 | SND_SOC_DAPM_MIXER("VOUT2 Mixer", SND_SOC_NOPM, 0, 0, | |
259 | vout2_mix_controls, ARRAY_SIZE(vout2_mix_controls)), | |
260 | SND_SOC_DAPM_MIXER("VOUT3 Mixer", SND_SOC_NOPM, 0, 0, | |
261 | vout3_mix_controls, ARRAY_SIZE(vout3_mix_controls)), | |
262 | SND_SOC_DAPM_MIXER("VOUT4 Mixer", SND_SOC_NOPM, 0, 0, | |
263 | vout4_mix_controls, ARRAY_SIZE(vout4_mix_controls)), | |
264 | ||
265 | SND_SOC_DAPM_OUTPUT("VOUT1"), | |
266 | SND_SOC_DAPM_OUTPUT("VOUT2"), | |
267 | SND_SOC_DAPM_OUTPUT("VOUT3"), | |
268 | SND_SOC_DAPM_OUTPUT("VOUT4") | |
269 | }; | |
270 | ||
271 | static const struct snd_soc_dapm_route wm8770_intercon[] = { | |
272 | { "Capture Mux", "AIN1", "AIN1" }, | |
273 | { "Capture Mux", "AIN2", "AIN2" }, | |
274 | { "Capture Mux", "AIN3", "AIN3" }, | |
275 | { "Capture Mux", "AIN4", "AIN4" }, | |
276 | { "Capture Mux", "AIN5", "AIN5" }, | |
277 | { "Capture Mux", "AIN6", "AIN6" }, | |
278 | { "Capture Mux", "AIN7", "AIN7" }, | |
279 | { "Capture Mux", "AIN8", "AIN8" }, | |
280 | ||
281 | { "ADC", NULL, "Capture Mux" }, | |
282 | ||
283 | { "VOUT1 Mixer", NULL, "VOUT12 Supply" }, | |
284 | { "VOUT1 Mixer", "DAC1 Switch", "DAC1" }, | |
285 | { "VOUT1 Mixer", "AUX1 Switch", "AUX1" }, | |
286 | { "VOUT1 Mixer", "Bypass Switch", "Capture Mux" }, | |
287 | ||
288 | { "VOUT2 Mixer", NULL, "VOUT12 Supply" }, | |
289 | { "VOUT2 Mixer", "DAC2 Switch", "DAC2" }, | |
290 | { "VOUT2 Mixer", "AUX2 Switch", "AUX2" }, | |
291 | { "VOUT2 Mixer", "Bypass Switch", "Capture Mux" }, | |
292 | ||
293 | { "VOUT3 Mixer", NULL, "VOUT34 Supply" }, | |
294 | { "VOUT3 Mixer", "DAC3 Switch", "DAC3" }, | |
295 | { "VOUT3 Mixer", "AUX3 Switch", "AUX3" }, | |
296 | { "VOUT3 Mixer", "Bypass Switch", "Capture Mux" }, | |
297 | ||
298 | { "VOUT4 Mixer", NULL, "VOUT34 Supply" }, | |
299 | { "VOUT4 Mixer", "DAC4 Switch", "DAC4" }, | |
300 | { "VOUT4 Mixer", "Bypass Switch", "Capture Mux" }, | |
301 | ||
302 | { "VOUT1", NULL, "VOUT1 Mixer" }, | |
303 | { "VOUT2", NULL, "VOUT2 Mixer" }, | |
304 | { "VOUT3", NULL, "VOUT3 Mixer" }, | |
305 | { "VOUT4", NULL, "VOUT4 Mixer" } | |
306 | }; | |
307 | ||
308 | static int vout12supply_event(struct snd_soc_dapm_widget *w, | |
309 | struct snd_kcontrol *kcontrol, int event) | |
310 | { | |
c3495aea | 311 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
c046fd4d DP |
312 | |
313 | switch (event) { | |
314 | case SND_SOC_DAPM_PRE_PMU: | |
315 | snd_soc_update_bits(codec, WM8770_OUTMUX1, 0x180, 0); | |
316 | break; | |
317 | case SND_SOC_DAPM_POST_PMD: | |
318 | snd_soc_update_bits(codec, WM8770_OUTMUX1, 0x180, 0x180); | |
319 | break; | |
320 | } | |
321 | ||
322 | return 0; | |
323 | } | |
324 | ||
325 | static int vout34supply_event(struct snd_soc_dapm_widget *w, | |
326 | struct snd_kcontrol *kcontrol, int event) | |
327 | { | |
c3495aea | 328 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
c046fd4d DP |
329 | |
330 | switch (event) { | |
331 | case SND_SOC_DAPM_PRE_PMU: | |
332 | snd_soc_update_bits(codec, WM8770_OUTMUX2, 0x180, 0); | |
333 | break; | |
334 | case SND_SOC_DAPM_POST_PMD: | |
335 | snd_soc_update_bits(codec, WM8770_OUTMUX2, 0x180, 0x180); | |
336 | break; | |
337 | } | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | static int wm8770_reset(struct snd_soc_codec *codec) | |
343 | { | |
344 | return snd_soc_write(codec, WM8770_RESET, 0); | |
345 | } | |
346 | ||
347 | static int wm8770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |
348 | { | |
349 | struct snd_soc_codec *codec; | |
350 | int iface, master; | |
351 | ||
352 | codec = dai->codec; | |
353 | ||
354 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
355 | case SND_SOC_DAIFMT_CBM_CFM: | |
356 | master = 0x100; | |
357 | break; | |
358 | case SND_SOC_DAIFMT_CBS_CFS: | |
359 | master = 0; | |
360 | break; | |
361 | default: | |
362 | return -EINVAL; | |
363 | } | |
364 | ||
365 | iface = 0; | |
366 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
367 | case SND_SOC_DAIFMT_I2S: | |
368 | iface |= 0x2; | |
369 | break; | |
370 | case SND_SOC_DAIFMT_RIGHT_J: | |
371 | break; | |
372 | case SND_SOC_DAIFMT_LEFT_J: | |
373 | iface |= 0x1; | |
374 | break; | |
375 | default: | |
376 | return -EINVAL; | |
377 | } | |
378 | ||
379 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
380 | case SND_SOC_DAIFMT_NB_NF: | |
381 | break; | |
382 | case SND_SOC_DAIFMT_IB_IF: | |
383 | iface |= 0xc; | |
384 | break; | |
385 | case SND_SOC_DAIFMT_IB_NF: | |
386 | iface |= 0x8; | |
387 | break; | |
388 | case SND_SOC_DAIFMT_NB_IF: | |
389 | iface |= 0x4; | |
390 | break; | |
391 | default: | |
392 | return -EINVAL; | |
393 | } | |
394 | ||
395 | snd_soc_update_bits(codec, WM8770_IFACECTRL, 0xf, iface); | |
396 | snd_soc_update_bits(codec, WM8770_MSTRCTRL, 0x100, master); | |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
401 | static const int mclk_ratios[] = { | |
402 | 128, | |
403 | 192, | |
404 | 256, | |
405 | 384, | |
406 | 512, | |
407 | 768 | |
408 | }; | |
409 | ||
410 | static int wm8770_hw_params(struct snd_pcm_substream *substream, | |
411 | struct snd_pcm_hw_params *params, | |
412 | struct snd_soc_dai *dai) | |
413 | { | |
414 | struct snd_soc_codec *codec; | |
415 | struct wm8770_priv *wm8770; | |
416 | int i; | |
417 | int iface; | |
418 | int shift; | |
419 | int ratio; | |
420 | ||
421 | codec = dai->codec; | |
422 | wm8770 = snd_soc_codec_get_drvdata(codec); | |
423 | ||
424 | iface = 0; | |
18ce1da9 MB |
425 | switch (params_width(params)) { |
426 | case 16: | |
c046fd4d | 427 | break; |
18ce1da9 | 428 | case 20: |
c046fd4d DP |
429 | iface |= 0x10; |
430 | break; | |
18ce1da9 | 431 | case 24: |
c046fd4d DP |
432 | iface |= 0x20; |
433 | break; | |
18ce1da9 | 434 | case 32: |
c046fd4d DP |
435 | iface |= 0x30; |
436 | break; | |
437 | } | |
438 | ||
439 | switch (substream->stream) { | |
440 | case SNDRV_PCM_STREAM_PLAYBACK: | |
441 | i = 0; | |
442 | shift = 4; | |
443 | break; | |
444 | case SNDRV_PCM_STREAM_CAPTURE: | |
445 | i = 2; | |
446 | shift = 0; | |
447 | break; | |
448 | default: | |
449 | return -EINVAL; | |
450 | } | |
451 | ||
452 | /* Only need to set MCLK/LRCLK ratio if we're master */ | |
453 | if (snd_soc_read(codec, WM8770_MSTRCTRL) & 0x100) { | |
454 | for (; i < ARRAY_SIZE(mclk_ratios); ++i) { | |
455 | ratio = wm8770->sysclk / params_rate(params); | |
456 | if (ratio == mclk_ratios[i]) | |
457 | break; | |
458 | } | |
459 | ||
460 | if (i == ARRAY_SIZE(mclk_ratios)) { | |
461 | dev_err(codec->dev, | |
462 | "Unable to configure MCLK ratio %d/%d\n", | |
463 | wm8770->sysclk, params_rate(params)); | |
464 | return -EINVAL; | |
465 | } | |
466 | ||
467 | dev_dbg(codec->dev, "MCLK is %dfs\n", mclk_ratios[i]); | |
468 | ||
469 | snd_soc_update_bits(codec, WM8770_MSTRCTRL, 0x7 << shift, | |
470 | i << shift); | |
471 | } | |
472 | ||
473 | snd_soc_update_bits(codec, WM8770_IFACECTRL, 0x30, iface); | |
474 | ||
475 | return 0; | |
476 | } | |
477 | ||
478 | static int wm8770_mute(struct snd_soc_dai *dai, int mute) | |
479 | { | |
480 | struct snd_soc_codec *codec; | |
481 | ||
482 | codec = dai->codec; | |
483 | return snd_soc_update_bits(codec, WM8770_DACMUTE, 0x10, | |
484 | !!mute << 4); | |
485 | } | |
486 | ||
487 | static int wm8770_set_sysclk(struct snd_soc_dai *dai, | |
488 | int clk_id, unsigned int freq, int dir) | |
489 | { | |
490 | struct snd_soc_codec *codec; | |
491 | struct wm8770_priv *wm8770; | |
492 | ||
493 | codec = dai->codec; | |
494 | wm8770 = snd_soc_codec_get_drvdata(codec); | |
495 | wm8770->sysclk = freq; | |
496 | return 0; | |
497 | } | |
498 | ||
c046fd4d DP |
499 | static int wm8770_set_bias_level(struct snd_soc_codec *codec, |
500 | enum snd_soc_bias_level level) | |
501 | { | |
502 | int ret; | |
503 | struct wm8770_priv *wm8770; | |
504 | ||
505 | wm8770 = snd_soc_codec_get_drvdata(codec); | |
506 | ||
507 | switch (level) { | |
508 | case SND_SOC_BIAS_ON: | |
509 | break; | |
510 | case SND_SOC_BIAS_PREPARE: | |
511 | break; | |
512 | case SND_SOC_BIAS_STANDBY: | |
ef075ca6 | 513 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { |
c046fd4d DP |
514 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies), |
515 | wm8770->supplies); | |
516 | if (ret) { | |
517 | dev_err(codec->dev, | |
518 | "Failed to enable supplies: %d\n", | |
519 | ret); | |
520 | return ret; | |
521 | } | |
dc43b046 MB |
522 | |
523 | regcache_sync(wm8770->regmap); | |
524 | ||
c046fd4d DP |
525 | /* global powerup */ |
526 | snd_soc_write(codec, WM8770_PWDNCTRL, 0); | |
527 | } | |
528 | break; | |
529 | case SND_SOC_BIAS_OFF: | |
530 | /* global powerdown */ | |
531 | snd_soc_write(codec, WM8770_PWDNCTRL, 1); | |
532 | regulator_bulk_disable(ARRAY_SIZE(wm8770->supplies), | |
533 | wm8770->supplies); | |
534 | break; | |
535 | } | |
536 | ||
c046fd4d DP |
537 | return 0; |
538 | } | |
539 | ||
540 | #define WM8770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ | |
541 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
542 | ||
85e7652d | 543 | static const struct snd_soc_dai_ops wm8770_dai_ops = { |
c046fd4d DP |
544 | .digital_mute = wm8770_mute, |
545 | .hw_params = wm8770_hw_params, | |
546 | .set_fmt = wm8770_set_fmt, | |
547 | .set_sysclk = wm8770_set_sysclk, | |
548 | }; | |
549 | ||
550 | static struct snd_soc_dai_driver wm8770_dai = { | |
551 | .name = "wm8770-hifi", | |
552 | .playback = { | |
553 | .stream_name = "Playback", | |
554 | .channels_min = 2, | |
555 | .channels_max = 2, | |
556 | .rates = SNDRV_PCM_RATE_8000_192000, | |
557 | .formats = WM8770_FORMATS | |
558 | }, | |
559 | .capture = { | |
560 | .stream_name = "Capture", | |
561 | .channels_min = 2, | |
562 | .channels_max = 2, | |
563 | .rates = SNDRV_PCM_RATE_8000_96000, | |
564 | .formats = WM8770_FORMATS | |
565 | }, | |
566 | .ops = &wm8770_dai_ops, | |
567 | .symmetric_rates = 1 | |
568 | }; | |
569 | ||
c046fd4d DP |
570 | static int wm8770_probe(struct snd_soc_codec *codec) |
571 | { | |
572 | struct wm8770_priv *wm8770; | |
573 | int ret; | |
c046fd4d DP |
574 | |
575 | wm8770 = snd_soc_codec_get_drvdata(codec); | |
576 | wm8770->codec = codec; | |
577 | ||
c046fd4d DP |
578 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies), |
579 | wm8770->supplies); | |
580 | if (ret) { | |
581 | dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); | |
f81ad942 | 582 | return ret; |
c046fd4d DP |
583 | } |
584 | ||
585 | ret = wm8770_reset(codec); | |
586 | if (ret < 0) { | |
587 | dev_err(codec->dev, "Failed to issue reset: %d\n", ret); | |
588 | goto err_reg_enable; | |
589 | } | |
590 | ||
c046fd4d DP |
591 | /* latch the volume update bits */ |
592 | snd_soc_update_bits(codec, WM8770_MSDIGVOL, 0x100, 0x100); | |
593 | snd_soc_update_bits(codec, WM8770_MSALGVOL, 0x100, 0x100); | |
594 | snd_soc_update_bits(codec, WM8770_VOUT1RVOL, 0x100, 0x100); | |
595 | snd_soc_update_bits(codec, WM8770_VOUT2RVOL, 0x100, 0x100); | |
596 | snd_soc_update_bits(codec, WM8770_VOUT3RVOL, 0x100, 0x100); | |
597 | snd_soc_update_bits(codec, WM8770_VOUT4RVOL, 0x100, 0x100); | |
598 | snd_soc_update_bits(codec, WM8770_DAC1RVOL, 0x100, 0x100); | |
599 | snd_soc_update_bits(codec, WM8770_DAC2RVOL, 0x100, 0x100); | |
600 | snd_soc_update_bits(codec, WM8770_DAC3RVOL, 0x100, 0x100); | |
601 | snd_soc_update_bits(codec, WM8770_DAC4RVOL, 0x100, 0x100); | |
602 | ||
603 | /* mute all DACs */ | |
604 | snd_soc_update_bits(codec, WM8770_DACMUTE, 0x10, 0x10); | |
605 | ||
c046fd4d DP |
606 | err_reg_enable: |
607 | regulator_bulk_disable(ARRAY_SIZE(wm8770->supplies), wm8770->supplies); | |
c046fd4d DP |
608 | return ret; |
609 | } | |
610 | ||
f802d6c0 | 611 | static const struct snd_soc_codec_driver soc_codec_dev_wm8770 = { |
c046fd4d | 612 | .probe = wm8770_probe, |
c046fd4d | 613 | .set_bias_level = wm8770_set_bias_level, |
eb3032f8 | 614 | .idle_bias_off = true, |
c6300bb8 | 615 | |
baa48471 KM |
616 | .component_driver = { |
617 | .controls = wm8770_snd_controls, | |
618 | .num_controls = ARRAY_SIZE(wm8770_snd_controls), | |
619 | .dapm_widgets = wm8770_dapm_widgets, | |
620 | .num_dapm_widgets = ARRAY_SIZE(wm8770_dapm_widgets), | |
621 | .dapm_routes = wm8770_intercon, | |
622 | .num_dapm_routes = ARRAY_SIZE(wm8770_intercon), | |
623 | }, | |
c046fd4d DP |
624 | }; |
625 | ||
13c7d08f MB |
626 | static const struct of_device_id wm8770_of_match[] = { |
627 | { .compatible = "wlf,wm8770", }, | |
628 | { } | |
629 | }; | |
630 | MODULE_DEVICE_TABLE(of, wm8770_of_match); | |
631 | ||
dc43b046 MB |
632 | static const struct regmap_config wm8770_regmap = { |
633 | .reg_bits = 7, | |
634 | .val_bits = 9, | |
635 | .max_register = WM8770_RESET, | |
636 | ||
637 | .reg_defaults = wm8770_reg_defaults, | |
638 | .num_reg_defaults = ARRAY_SIZE(wm8770_reg_defaults), | |
639 | .cache_type = REGCACHE_RBTREE, | |
640 | ||
641 | .volatile_reg = wm8770_volatile_reg, | |
642 | }; | |
643 | ||
7a79e94e | 644 | static int wm8770_spi_probe(struct spi_device *spi) |
c046fd4d DP |
645 | { |
646 | struct wm8770_priv *wm8770; | |
f81ad942 | 647 | int ret, i; |
c046fd4d | 648 | |
3025ae45 MB |
649 | wm8770 = devm_kzalloc(&spi->dev, sizeof(struct wm8770_priv), |
650 | GFP_KERNEL); | |
c046fd4d DP |
651 | if (!wm8770) |
652 | return -ENOMEM; | |
653 | ||
f81ad942 MB |
654 | for (i = 0; i < ARRAY_SIZE(wm8770->supplies); i++) |
655 | wm8770->supplies[i].supply = wm8770_supply_names[i]; | |
656 | ||
657 | ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8770->supplies), | |
658 | wm8770->supplies); | |
659 | if (ret) { | |
660 | dev_err(&spi->dev, "Failed to request supplies: %d\n", ret); | |
661 | return ret; | |
662 | } | |
663 | ||
664 | wm8770->disable_nb[0].notifier_call = wm8770_regulator_event_0; | |
665 | wm8770->disable_nb[1].notifier_call = wm8770_regulator_event_1; | |
666 | wm8770->disable_nb[2].notifier_call = wm8770_regulator_event_2; | |
667 | ||
668 | /* This should really be moved into the regulator core */ | |
669 | for (i = 0; i < ARRAY_SIZE(wm8770->supplies); i++) { | |
670 | ret = regulator_register_notifier(wm8770->supplies[i].consumer, | |
671 | &wm8770->disable_nb[i]); | |
672 | if (ret) { | |
673 | dev_err(&spi->dev, | |
674 | "Failed to register regulator notifier: %d\n", | |
675 | ret); | |
676 | } | |
677 | } | |
678 | ||
dc43b046 MB |
679 | wm8770->regmap = devm_regmap_init_spi(spi, &wm8770_regmap); |
680 | if (IS_ERR(wm8770->regmap)) | |
681 | return PTR_ERR(wm8770->regmap); | |
682 | ||
c046fd4d DP |
683 | spi_set_drvdata(spi, wm8770); |
684 | ||
685 | ret = snd_soc_register_codec(&spi->dev, | |
686 | &soc_codec_dev_wm8770, &wm8770_dai, 1); | |
3025ae45 | 687 | |
c046fd4d DP |
688 | return ret; |
689 | } | |
690 | ||
7a79e94e | 691 | static int wm8770_spi_remove(struct spi_device *spi) |
c046fd4d | 692 | { |
f81ad942 MB |
693 | struct wm8770_priv *wm8770 = spi_get_drvdata(spi); |
694 | int i; | |
695 | ||
696 | for (i = 0; i < ARRAY_SIZE(wm8770->supplies); ++i) | |
697 | regulator_unregister_notifier(wm8770->supplies[i].consumer, | |
698 | &wm8770->disable_nb[i]); | |
699 | ||
c046fd4d | 700 | snd_soc_unregister_codec(&spi->dev); |
f81ad942 | 701 | |
c046fd4d DP |
702 | return 0; |
703 | } | |
704 | ||
705 | static struct spi_driver wm8770_spi_driver = { | |
706 | .driver = { | |
707 | .name = "wm8770", | |
13c7d08f | 708 | .of_match_table = wm8770_of_match, |
c046fd4d DP |
709 | }, |
710 | .probe = wm8770_spi_probe, | |
7a79e94e | 711 | .remove = wm8770_spi_remove |
c046fd4d | 712 | }; |
c046fd4d | 713 | |
a5c88780 | 714 | module_spi_driver(wm8770_spi_driver); |
c046fd4d DP |
715 | |
716 | MODULE_DESCRIPTION("ASoC WM8770 driver"); | |
717 | MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>"); | |
718 | MODULE_LICENSE("GPL"); |