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ASoC: Don't resync WM8903 register cache on reset
[deliverable/linux.git] / sound / soc / codecs / wm8940.c
CommitLineData
0b5e92c5
JC		 1/*
2 * wm8940.c -- WM8940 ALSA Soc Audio driver
3 *
4 * Author: Jonathan Cameron <jic23@cam.ac.uk>
5 *
6 * Based on wm8510.c
7 * Copyright 2006 Wolfson Microelectronics PLC.
8 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Not currently handled:
15 * Notch filter control
16 * AUXMode (inverting vs mixer)
17 * No means to obtain current gain if alc enabled.
18 * No use made of gpio
19 * Fast VMID discharge for power down
20 * Soft Start
21 * DLR and ALR Swaps not enabled
22 * Digital Sidetone not supported
23 */
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/kernel.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/i2c.h>
0b5e92c5 31#include <linux/spi/spi.h>
5a0e3ad6 32#include <linux/slab.h>
0b5e92c5
JC		 33#include <sound/core.h>
34#include <sound/pcm.h>
35#include <sound/pcm_params.h>
36#include <sound/soc.h>
0b5e92c5
JC		 37#include <sound/initval.h>
38#include <sound/tlv.h>
39
40#include "wm8940.h"
41
42struct wm8940_priv {
43 unsigned int sysclk;
f0fba2ad 44 enum snd_soc_control_type control_type;
0b5e92c5
JC		 45};
46
788b6e8e
AL		 47static int wm8940_volatile_register(struct snd_soc_codec *codec,
48 unsigned int reg)
49{
50 switch (reg) {
51 case WM8940_SOFTRESET:
52 return 1;
53 default:
54 return 0;
55 }
56}
57
0b5e92c5
JC		 58static u16 wm8940_reg_defaults[] = {
59 0x8940, /* Soft Reset */
60 0x0000, /* Power 1 */
61 0x0000, /* Power 2 */
62 0x0000, /* Power 3 */
63 0x0010, /* Interface Control */
64 0x0000, /* Companding Control */
65 0x0140, /* Clock Control */
66 0x0000, /* Additional Controls */
67 0x0000, /* GPIO Control */
68 0x0002, /* Auto Increment Control */
69 0x0000, /* DAC Control */
70 0x00FF, /* DAC Volume */
71 0,
72 0,
73 0x0100, /* ADC Control */
74 0x00FF, /* ADC Volume */
75 0x0000, /* Notch Filter 1 Control 1 */
76 0x0000, /* Notch Filter 1 Control 2 */
77 0x0000, /* Notch Filter 2 Control 1 */
78 0x0000, /* Notch Filter 2 Control 2 */
79 0x0000, /* Notch Filter 3 Control 1 */
80 0x0000, /* Notch Filter 3 Control 2 */
81 0x0000, /* Notch Filter 4 Control 1 */
82 0x0000, /* Notch Filter 4 Control 2 */
83 0x0032, /* DAC Limit Control 1 */
84 0x0000, /* DAC Limit Control 2 */
85 0,
86 0,
87 0,
88 0,
89 0,
90 0,
91 0x0038, /* ALC Control 1 */
92 0x000B, /* ALC Control 2 */
93 0x0032, /* ALC Control 3 */
94 0x0000, /* Noise Gate */
95 0x0041, /* PLLN */
96 0x000C, /* PLLK1 */
97 0x0093, /* PLLK2 */
98 0x00E9, /* PLLK3 */
99 0,
100 0,
101 0x0030, /* ALC Control 4 */
102 0,
103 0x0002, /* Input Control */
104 0x0050, /* PGA Gain */
105 0,
106 0x0002, /* ADC Boost Control */
107 0,
108 0x0002, /* Output Control */
109 0x0000, /* Speaker Mixer Control */
110 0,
111 0,
112 0,
113 0x0079, /* Speaker Volume */
114 0,
115 0x0000, /* Mono Mixer Control */
116};
117
0b5e92c5
JC		 118static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
119static const struct soc_enum wm8940_adc_companding_enum
120= SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 1, 4, wm8940_companding);
121static const struct soc_enum wm8940_dac_companding_enum
122= SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 3, 4, wm8940_companding);
123
124static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
125static const struct soc_enum wm8940_alc_mode_enum
126= SOC_ENUM_SINGLE(WM8940_ALC3, 8, 2, wm8940_alc_mode_text);
127
128static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
129static const struct soc_enum wm8940_mic_bias_level_enum
130= SOC_ENUM_SINGLE(WM8940_INPUTCTL, 8, 2, wm8940_mic_bias_level_text);
131
132static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
133static const struct soc_enum wm8940_filter_mode_enum
134= SOC_ENUM_SINGLE(WM8940_ADC, 7, 2, wm8940_filter_mode_text);
135
6be01cfb
MB		 136static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
137static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
138static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
139static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
140static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
141static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
142static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
143static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
144static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
145static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
0b5e92c5
JC		 146
147static const struct snd_kcontrol_new wm8940_snd_controls[] = {
148 SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
149 6, 1, 0),
150 SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
151 SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
152
153 SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
154 SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
155 SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
156 3, 7, 1, wm8940_alc_max_tlv),
157 SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
158 0, 7, 0, wm8940_alc_min_tlv),
159 SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
160 0, 14, 0, wm8940_alc_tar_tlv),
161 SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
162 SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
163 SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
164 SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
165 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
166 3, 1, 0),
167 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
168 0, 7, 0),
169
170 SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
171 SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
172 SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
173 SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
174 4, 9, 1, wm8940_lim_thresh_tlv),
175 SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
176 0, 12, 0, wm8940_lim_boost_tlv),
177
178 SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
179 SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
180 0, 63, 0, wm8940_pga_vol_tlv),
181 SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
182 0, 255, 0, wm8940_adc_tlv),
183 SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
184 0, 255, 0, wm8940_adc_tlv),
185 SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
186 SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
187 8, 1, 0, wm8940_capture_boost_vol_tlv),
188 SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
189 0, 63, 0, wm8940_spk_vol_tlv),
190 SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
191
192 SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
193 8, 1, 1, wm8940_att_tlv),
194 SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
195
196 SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
197 SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
198 7, 1, 1, wm8940_att_tlv),
199
200 SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
201 SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
202 SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
203 SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
204 SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
205 SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
206 SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
207};
208
209static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
210 SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
211 SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
212 SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
213};
214
215static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
216 SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
217 SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
218 SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
219};
220
6be01cfb 221static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
0b5e92c5
JC		 222static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
223 SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
224 SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
225 0, 7, 0, wm8940_boost_vol_tlv),
226 SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
227 4, 7, 0, wm8940_boost_vol_tlv),
228};
229
230static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
231 SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
232 SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
233 SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
234};
235
236static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
237 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
238 &wm8940_speaker_mixer_controls[0],
239 ARRAY_SIZE(wm8940_speaker_mixer_controls)),
240 SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
241 &wm8940_mono_mixer_controls[0],
242 ARRAY_SIZE(wm8940_mono_mixer_controls)),
243 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
244
245 SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
246 SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
247 SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
248 SND_SOC_DAPM_OUTPUT("MONOOUT"),
249 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
250 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
251
252 SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
253 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
254 SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
255 &wm8940_micpga_controls[0],
256 ARRAY_SIZE(wm8940_micpga_controls)),
257 SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
258 &wm8940_input_boost_controls[0],
259 ARRAY_SIZE(wm8940_input_boost_controls)),
260 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
261
262 SND_SOC_DAPM_INPUT("MICN"),
263 SND_SOC_DAPM_INPUT("MICP"),
264 SND_SOC_DAPM_INPUT("AUX"),
265};
266
267static const struct snd_soc_dapm_route audio_map[] = {
268 /* Mono output mixer */
269 {"Mono Mixer", "PCM Playback Switch", "DAC"},
270 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
271 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
272
273 /* Speaker output mixer */
274 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
275 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
276 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
277
278 /* Outputs */
279 {"Mono Out", NULL, "Mono Mixer"},
280 {"MONOOUT", NULL, "Mono Out"},
281 {"SpkN Out", NULL, "Speaker Mixer"},
282 {"SpkP Out", NULL, "Speaker Mixer"},
283 {"SPKOUTN", NULL, "SpkN Out"},
284 {"SPKOUTP", NULL, "SpkP Out"},
285
286 /* Microphone PGA */
287 {"Mic PGA", "MICN Switch", "MICN"},
288 {"Mic PGA", "MICP Switch", "MICP"},
289 {"Mic PGA", "AUX Switch", "AUX"},
290
291 /* Boost Mixer */
292 {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
293 {"Boost Mixer", "Mic Volume", "MICP"},
294 {"Boost Mixer", "Aux Volume", "Aux Input"},
295
296 {"ADC", NULL, "Boost Mixer"},
297};
298
299static int wm8940_add_widgets(struct snd_soc_codec *codec)
300{
ce6120cc 301 struct snd_soc_dapm_context *dapm = &codec->dapm;
0b5e92c5
JC		 302 int ret;
303
ce6120cc 304 ret = snd_soc_dapm_new_controls(dapm, wm8940_dapm_widgets,
0b5e92c5
JC		 305 ARRAY_SIZE(wm8940_dapm_widgets));
306 if (ret)
307 goto error_ret;
ce6120cc 308 ret = snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
0b5e92c5
JC		 309
310error_ret:
311 return ret;
312}
313
8d50e447 314#define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
0b5e92c5
JC		 315
316static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
317 unsigned int fmt)
318{
319 struct snd_soc_codec *codec = codec_dai->codec;
8d50e447
MB		 320 u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
321 u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
0b5e92c5
JC		 322
323 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
324 case SND_SOC_DAIFMT_CBM_CFM:
325 clk |= 1;
326 break;
327 case SND_SOC_DAIFMT_CBS_CFS:
328 break;
329 default:
330 return -EINVAL;
331 }
8d50e447 332 snd_soc_write(codec, WM8940_CLOCK, clk);
0b5e92c5
JC		 333
334 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
335 case SND_SOC_DAIFMT_I2S:
336 iface |= (2 << 3);
337 break;
338 case SND_SOC_DAIFMT_LEFT_J:
339 iface |= (1 << 3);
340 break;
341 case SND_SOC_DAIFMT_RIGHT_J:
342 break;
343 case SND_SOC_DAIFMT_DSP_A:
344 iface |= (3 << 3);
345 break;
346 case SND_SOC_DAIFMT_DSP_B:
347 iface |= (3 << 3) | (1 << 7);
348 break;
349 }
350
351 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
352 case SND_SOC_DAIFMT_NB_NF:
353 break;
354 case SND_SOC_DAIFMT_NB_IF:
355 iface |= (1 << 7);
356 break;
357 case SND_SOC_DAIFMT_IB_NF:
358 iface |= (1 << 8);
359 break;
360 case SND_SOC_DAIFMT_IB_IF:
361 iface |= (1 << 8) | (1 << 7);
362 break;
363 }
364
8d50e447 365 snd_soc_write(codec, WM8940_IFACE, iface);
0b5e92c5
JC		 366
367 return 0;
368}
369
370static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
371 struct snd_pcm_hw_params *params,
372 struct snd_soc_dai *dai)
373{
374 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 375 struct snd_soc_codec *codec = rtd->codec;
8d50e447
MB		 376 u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
377 u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
378 u16 companding = snd_soc_read(codec,
0b5e92c5
JC		 379 WM8940_COMPANDINGCTL) & 0xFFDF;
380 int ret;
381
382 /* LoutR control */
383 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
384 && params_channels(params) == 2)
385 iface |= (1 << 9);
386
387 switch (params_rate(params)) {
b3172f22 388 case 8000:
0b5e92c5
JC		 389 addcntrl |= (0x5 << 1);
390 break;
b3172f22 391 case 11025:
0b5e92c5
JC		 392 addcntrl |= (0x4 << 1);
393 break;
b3172f22 394 case 16000:
0b5e92c5
JC		 395 addcntrl |= (0x3 << 1);
396 break;
b3172f22 397 case 22050:
0b5e92c5
JC		 398 addcntrl |= (0x2 << 1);
399 break;
b3172f22 400 case 32000:
0b5e92c5
JC		 401 addcntrl |= (0x1 << 1);
402 break;
b3172f22
GL		 403 case 44100:
404 case 48000:
0b5e92c5
JC		 405 break;
406 }
8d50e447 407 ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
0b5e92c5
JC		 408 if (ret)
409 goto error_ret;
410
411 switch (params_format(params)) {
412 case SNDRV_PCM_FORMAT_S8:
413 companding = companding | (1 << 5);
414 break;
415 case SNDRV_PCM_FORMAT_S16_LE:
416 break;
417 case SNDRV_PCM_FORMAT_S20_3LE:
418 iface |= (1 << 5);
419 break;
420 case SNDRV_PCM_FORMAT_S24_LE:
421 iface |= (2 << 5);
422 break;
423 case SNDRV_PCM_FORMAT_S32_LE:
424 iface |= (3 << 5);
425 break;
426 }
8d50e447 427 ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
0b5e92c5
JC		 428 if (ret)
429 goto error_ret;
8d50e447 430 ret = snd_soc_write(codec, WM8940_IFACE, iface);
0b5e92c5
JC		 431
432error_ret:
433 return ret;
434}
435
436static int wm8940_mute(struct snd_soc_dai *dai, int mute)
437{
438 struct snd_soc_codec *codec = dai->codec;
8d50e447 439 u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
0b5e92c5
JC		 440
441 if (mute)
442 mute_reg |= 0x40;
443
8d50e447 444 return snd_soc_write(codec, WM8940_DAC, mute_reg);
0b5e92c5
JC		 445}
446
447static int wm8940_set_bias_level(struct snd_soc_codec *codec,
448 enum snd_soc_bias_level level)
449{
450 u16 val;
8d50e447 451 u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
0b5e92c5
JC		 452 int ret = 0;
453
454 switch (level) {
455 case SND_SOC_BIAS_ON:
456 /* ensure bufioen and biasen */
457 pwr_reg |= (1 << 2) | (1 << 3);
458 /* Enable thermal shutdown */
8d50e447
MB		 459 val = snd_soc_read(codec, WM8940_OUTPUTCTL);
460 ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
0b5e92c5
JC		 461 if (ret)
462 break;
463 /* set vmid to 75k */
8d50e447 464 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
0b5e92c5
JC		 465 break;
466 case SND_SOC_BIAS_PREPARE:
467 /* ensure bufioen and biasen */
468 pwr_reg |= (1 << 2) | (1 << 3);
8d50e447 469 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
0b5e92c5
JC		 470 break;
471 case SND_SOC_BIAS_STANDBY:
788b6e8e
AL		 472 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
473 ret = snd_soc_cache_sync(codec);
474 if (ret < 0) {
475 dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
476 return ret;
477 }
478 }
479
0b5e92c5
JC		 480 /* ensure bufioen and biasen */
481 pwr_reg |= (1 << 2) | (1 << 3);
482 /* set vmid to 300k for standby */
8d50e447 483 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
0b5e92c5
JC		 484 break;
485 case SND_SOC_BIAS_OFF:
8d50e447 486 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
0b5e92c5
JC		 487 break;
488 }
489
5927f947
AL		 490 codec->dapm.bias_level = level;
491
0b5e92c5
JC		 492 return ret;
493}
494
495struct pll_ {
496 unsigned int pre_scale:2;
497 unsigned int n:4;
498 unsigned int k;
499};
500
501static struct pll_ pll_div;
502
503/* The size in bits of the pll divide multiplied by 10
504 * to allow rounding later */
505#define FIXED_PLL_SIZE ((1 << 24) * 10)
506static void pll_factors(unsigned int target, unsigned int source)
507{
508 unsigned long long Kpart;
509 unsigned int K, Ndiv, Nmod;
510 /* The left shift ist to avoid accuracy loss when right shifting */
511 Ndiv = target / source;
512
513 if (Ndiv > 12) {
514 source <<= 1;
515 /* Multiply by 2 */
516 pll_div.pre_scale = 0;
517 Ndiv = target / source;
518 } else if (Ndiv < 3) {
519 source >>= 2;
520 /* Divide by 4 */
521 pll_div.pre_scale = 3;
522 Ndiv = target / source;
523 } else if (Ndiv < 6) {
524 source >>= 1;
525 /* divide by 2 */
526 pll_div.pre_scale = 2;
527 Ndiv = target / source;
528 } else
529 pll_div.pre_scale = 1;
530
531 if ((Ndiv < 6) || (Ndiv > 12))
532 printk(KERN_WARNING
533 "WM8940 N value %d outwith recommended range!d\n",
534 Ndiv);
535
536 pll_div.n = Ndiv;
537 Nmod = target % source;
538 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
539
540 do_div(Kpart, source);
541
542 K = Kpart & 0xFFFFFFFF;
543
544 /* Check if we need to round */
545 if ((K % 10) >= 5)
546 K += 5;
547
548 /* Move down to proper range now rounding is done */
549 K /= 10;
550
551 pll_div.k = K;
552}
553
554/* Untested at the moment */
85488037
MB		 555static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
556 int source, unsigned int freq_in, unsigned int freq_out)
0b5e92c5
JC		 557{
558 struct snd_soc_codec *codec = codec_dai->codec;
559 u16 reg;
560
561 /* Turn off PLL */
8d50e447
MB		 562 reg = snd_soc_read(codec, WM8940_POWER1);
563 snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
0b5e92c5
JC		 564
565 if (freq_in == 0 || freq_out == 0) {
566 /* Clock CODEC directly from MCLK */
8d50e447
MB		 567 reg = snd_soc_read(codec, WM8940_CLOCK);
568 snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
0b5e92c5 569 /* Pll power down */
8d50e447 570 snd_soc_write(codec, WM8940_PLLN, (1 << 7));
0b5e92c5
JC		 571 return 0;
572 }
573
574 /* Pll is followed by a frequency divide by 4 */
575 pll_factors(freq_out*4, freq_in);
576 if (pll_div.k)
8d50e447 577 snd_soc_write(codec, WM8940_PLLN,
0b5e92c5
JC		 578 (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
579 else /* No factional component */
8d50e447 580 snd_soc_write(codec, WM8940_PLLN,
0b5e92c5 581 (pll_div.pre_scale << 4) | pll_div.n);
8d50e447
MB		 582 snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
583 snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
584 snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
0b5e92c5 585 /* Enable the PLL */
8d50e447
MB		 586 reg = snd_soc_read(codec, WM8940_POWER1);
587 snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
0b5e92c5
JC		 588
589 /* Run CODEC from PLL instead of MCLK */
8d50e447
MB		 590 reg = snd_soc_read(codec, WM8940_CLOCK);
591 snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
0b5e92c5
JC		 592
593 return 0;
594}
595
596static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
597 int clk_id, unsigned int freq, int dir)
598{
599 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 600 struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
0b5e92c5
JC		 601
602 switch (freq) {
603 case 11289600:
604 case 12000000:
605 case 12288000:
606 case 16934400:
607 case 18432000:
608 wm8940->sysclk = freq;
609 return 0;
610 }
611 return -EINVAL;
612}
613
614static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
615 int div_id, int div)
616{
617 struct snd_soc_codec *codec = codec_dai->codec;
618 u16 reg;
619 int ret = 0;
620
621 switch (div_id) {
622 case WM8940_BCLKDIV:
b272cc76 623 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
8d50e447 624 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
0b5e92c5
JC		 625 break;
626 case WM8940_MCLKDIV:
8d50e447
MB		 627 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
628 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
0b5e92c5
JC		 629 break;
630 case WM8940_OPCLKDIV:
49fa4d9b
AL		 631 reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
632 ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
0b5e92c5
JC		 633 break;
634 }
635 return ret;
636}
637
638#define WM8940_RATES SNDRV_PCM_RATE_8000_48000
639
640#define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
641 SNDRV_PCM_FMTBIT_S16_LE | \
642 SNDRV_PCM_FMTBIT_S20_3LE | \
643 SNDRV_PCM_FMTBIT_S24_LE | \
644 SNDRV_PCM_FMTBIT_S32_LE)
645
85e7652d 646static const struct snd_soc_dai_ops wm8940_dai_ops = {
0b5e92c5
JC		 647 .hw_params = wm8940_i2s_hw_params,
648 .set_sysclk = wm8940_set_dai_sysclk,
649 .digital_mute = wm8940_mute,
650 .set_fmt = wm8940_set_dai_fmt,
651 .set_clkdiv = wm8940_set_dai_clkdiv,
652 .set_pll = wm8940_set_dai_pll,
653};
654
f0fba2ad
LG		 655static struct snd_soc_dai_driver wm8940_dai = {
656 .name = "wm8940-hifi",
0b5e92c5
JC		 657 .playback = {
658 .stream_name = "Playback",
659 .channels_min = 1,
660 .channels_max = 2,
661 .rates = WM8940_RATES,
662 .formats = WM8940_FORMATS,
663 },
664 .capture = {
665 .stream_name = "Capture",
666 .channels_min = 1,
667 .channels_max = 2,
668 .rates = WM8940_RATES,
669 .formats = WM8940_FORMATS,
670 },
671 .ops = &wm8940_dai_ops,
672 .symmetric_rates = 1,
673};
0b5e92c5 674
84b315ee 675static int wm8940_suspend(struct snd_soc_codec *codec)
0b5e92c5 676{
0b5e92c5
JC		 677 return wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
678}
679
f0fba2ad 680static int wm8940_resume(struct snd_soc_codec *codec)
0b5e92c5 681{
788b6e8e
AL		 682 wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
683 return 0;
0b5e92c5
JC		 684}
685
f0fba2ad 686static int wm8940_probe(struct snd_soc_codec *codec)
0b5e92c5 687{
f0fba2ad
LG		 688 struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
689 struct wm8940_setup_data *pdata = codec->dev->platform_data;
0b5e92c5
JC		 690 int ret;
691 u16 reg;
0b5e92c5 692
f0fba2ad 693 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8940->control_type);
e655a435 694 if (ret < 0) {
8d50e447
MB		 695 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
696 return ret;
697 }
698
0b5e92c5
JC		 699 ret = wm8940_reset(codec);
700 if (ret < 0) {
701 dev_err(codec->dev, "Failed to issue reset\n");
702 return ret;
703 }
704
0b5e92c5
JC		 705 wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
706
8d50e447 707 ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
0b5e92c5
JC		 708 if (ret < 0)
709 return ret;
710
711 if (!pdata)
712 dev_warn(codec->dev, "No platform data supplied\n");
713 else {
8d50e447
MB		 714 reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
715 ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
0b5e92c5
JC		 716 if (ret < 0)
717 return ret;
718 }
719
f0fba2ad
LG		 720 ret = snd_soc_add_controls(codec, wm8940_snd_controls,
721 ARRAY_SIZE(wm8940_snd_controls));
722 if (ret)
0b5e92c5 723 return ret;
f0fba2ad 724 ret = wm8940_add_widgets(codec);
f0fba2ad 725 return ret;
0b5e92c5
JC		 726}
727
f0fba2ad 728static int wm8940_remove(struct snd_soc_codec *codec)
0b5e92c5 729{
f0fba2ad
LG		 730 wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
731 return 0;
0b5e92c5
JC		 732}
733
f0fba2ad
LG		 734static struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
735 .probe = wm8940_probe,
736 .remove = wm8940_remove,
737 .suspend = wm8940_suspend,
738 .resume = wm8940_resume,
739 .set_bias_level = wm8940_set_bias_level,
e5eec34c 740 .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults),
f0fba2ad
LG		 741 .reg_word_size = sizeof(u16),
742 .reg_cache_default = wm8940_reg_defaults,
788b6e8e 743 .volatile_register = wm8940_volatile_register,
f0fba2ad
LG		 744};
745
746#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
747static __devinit int wm8940_i2c_probe(struct i2c_client *i2c,
748 const struct i2c_device_id *id)
0b5e92c5
JC		 749{
750 struct wm8940_priv *wm8940;
f0fba2ad 751 int ret;
0b5e92c5 752
f0fba2ad 753 wm8940 = kzalloc(sizeof(struct wm8940_priv), GFP_KERNEL);
0b5e92c5
JC		 754 if (wm8940 == NULL)
755 return -ENOMEM;
756
0b5e92c5 757 i2c_set_clientdata(i2c, wm8940);
7f984b55 758 wm8940->control_type = SND_SOC_I2C;
0b5e92c5 759
f0fba2ad
LG		 760 ret = snd_soc_register_codec(&i2c->dev,
761 &soc_codec_dev_wm8940, &wm8940_dai, 1);
db1e18de
AL		 762 if (ret < 0)
763 kfree(wm8940);
db1e18de 764 return ret;
0b5e92c5
JC		 765}
766
f0fba2ad 767static __devexit int wm8940_i2c_remove(struct i2c_client *client)
0b5e92c5 768{
f0fba2ad
LG		 769 snd_soc_unregister_codec(&client->dev);
770 kfree(i2c_get_clientdata(client));
0b5e92c5
JC		 771 return 0;
772}
773
774static const struct i2c_device_id wm8940_i2c_id[] = {
775 { "wm8940", 0 },
776 { }
777};
778MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
779
780static struct i2c_driver wm8940_i2c_driver = {
781 .driver = {
f0fba2ad 782 .name = "wm8940-codec",
0b5e92c5
JC		 783 .owner = THIS_MODULE,
784 },
f0fba2ad
LG		 785 .probe = wm8940_i2c_probe,
786 .remove = __devexit_p(wm8940_i2c_remove),
0b5e92c5
JC		 787 .id_table = wm8940_i2c_id,
788};
f0fba2ad 789#endif
0b5e92c5
JC		 790
791static int __init wm8940_modinit(void)
792{
f0fba2ad
LG		 793 int ret = 0;
794#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
0b5e92c5 795 ret = i2c_add_driver(&wm8940_i2c_driver);
f0fba2ad
LG		 796 if (ret != 0) {
797 printk(KERN_ERR "Failed to register wm8940 I2C driver: %d\n",
0b5e92c5 798 ret);
f0fba2ad
LG		 799 }
800#endif
0b5e92c5
JC		 801 return ret;
802}
803module_init(wm8940_modinit);
804
805static void __exit wm8940_exit(void)
806{
f0fba2ad 807#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
0b5e92c5 808 i2c_del_driver(&wm8940_i2c_driver);
f0fba2ad 809#endif
0b5e92c5
JC		 810}
811module_exit(wm8940_exit);
812
813MODULE_DESCRIPTION("ASoC WM8940 driver");
814MODULE_AUTHOR("Jonathan Cameron");
815MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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