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0b5e92c5 JC |
1 | /* |
2 | * wm8940.c -- WM8940 ALSA Soc Audio driver | |
3 | * | |
4 | * Author: Jonathan Cameron <jic23@cam.ac.uk> | |
5 | * | |
6 | * Based on wm8510.c | |
7 | * Copyright 2006 Wolfson Microelectronics PLC. | |
8 | * Author: Liam Girdwood <lrg@slimlogic.co.uk> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * Not currently handled: | |
15 | * Notch filter control | |
16 | * AUXMode (inverting vs mixer) | |
17 | * No means to obtain current gain if alc enabled. | |
18 | * No use made of gpio | |
19 | * Fast VMID discharge for power down | |
20 | * Soft Start | |
21 | * DLR and ALR Swaps not enabled | |
22 | * Digital Sidetone not supported | |
23 | */ | |
24 | #include <linux/module.h> | |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/pm.h> | |
30 | #include <linux/i2c.h> | |
31 | #include <linux/platform_device.h> | |
32 | #include <linux/spi/spi.h> | |
5a0e3ad6 | 33 | #include <linux/slab.h> |
0b5e92c5 JC |
34 | #include <sound/core.h> |
35 | #include <sound/pcm.h> | |
36 | #include <sound/pcm_params.h> | |
37 | #include <sound/soc.h> | |
0b5e92c5 JC |
38 | #include <sound/initval.h> |
39 | #include <sound/tlv.h> | |
40 | ||
41 | #include "wm8940.h" | |
42 | ||
43 | struct wm8940_priv { | |
44 | unsigned int sysclk; | |
f0fba2ad | 45 | enum snd_soc_control_type control_type; |
0b5e92c5 JC |
46 | }; |
47 | ||
48 | static u16 wm8940_reg_defaults[] = { | |
49 | 0x8940, /* Soft Reset */ | |
50 | 0x0000, /* Power 1 */ | |
51 | 0x0000, /* Power 2 */ | |
52 | 0x0000, /* Power 3 */ | |
53 | 0x0010, /* Interface Control */ | |
54 | 0x0000, /* Companding Control */ | |
55 | 0x0140, /* Clock Control */ | |
56 | 0x0000, /* Additional Controls */ | |
57 | 0x0000, /* GPIO Control */ | |
58 | 0x0002, /* Auto Increment Control */ | |
59 | 0x0000, /* DAC Control */ | |
60 | 0x00FF, /* DAC Volume */ | |
61 | 0, | |
62 | 0, | |
63 | 0x0100, /* ADC Control */ | |
64 | 0x00FF, /* ADC Volume */ | |
65 | 0x0000, /* Notch Filter 1 Control 1 */ | |
66 | 0x0000, /* Notch Filter 1 Control 2 */ | |
67 | 0x0000, /* Notch Filter 2 Control 1 */ | |
68 | 0x0000, /* Notch Filter 2 Control 2 */ | |
69 | 0x0000, /* Notch Filter 3 Control 1 */ | |
70 | 0x0000, /* Notch Filter 3 Control 2 */ | |
71 | 0x0000, /* Notch Filter 4 Control 1 */ | |
72 | 0x0000, /* Notch Filter 4 Control 2 */ | |
73 | 0x0032, /* DAC Limit Control 1 */ | |
74 | 0x0000, /* DAC Limit Control 2 */ | |
75 | 0, | |
76 | 0, | |
77 | 0, | |
78 | 0, | |
79 | 0, | |
80 | 0, | |
81 | 0x0038, /* ALC Control 1 */ | |
82 | 0x000B, /* ALC Control 2 */ | |
83 | 0x0032, /* ALC Control 3 */ | |
84 | 0x0000, /* Noise Gate */ | |
85 | 0x0041, /* PLLN */ | |
86 | 0x000C, /* PLLK1 */ | |
87 | 0x0093, /* PLLK2 */ | |
88 | 0x00E9, /* PLLK3 */ | |
89 | 0, | |
90 | 0, | |
91 | 0x0030, /* ALC Control 4 */ | |
92 | 0, | |
93 | 0x0002, /* Input Control */ | |
94 | 0x0050, /* PGA Gain */ | |
95 | 0, | |
96 | 0x0002, /* ADC Boost Control */ | |
97 | 0, | |
98 | 0x0002, /* Output Control */ | |
99 | 0x0000, /* Speaker Mixer Control */ | |
100 | 0, | |
101 | 0, | |
102 | 0, | |
103 | 0x0079, /* Speaker Volume */ | |
104 | 0, | |
105 | 0x0000, /* Mono Mixer Control */ | |
106 | }; | |
107 | ||
0b5e92c5 JC |
108 | static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" }; |
109 | static const struct soc_enum wm8940_adc_companding_enum | |
110 | = SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 1, 4, wm8940_companding); | |
111 | static const struct soc_enum wm8940_dac_companding_enum | |
112 | = SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 3, 4, wm8940_companding); | |
113 | ||
114 | static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"}; | |
115 | static const struct soc_enum wm8940_alc_mode_enum | |
116 | = SOC_ENUM_SINGLE(WM8940_ALC3, 8, 2, wm8940_alc_mode_text); | |
117 | ||
118 | static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"}; | |
119 | static const struct soc_enum wm8940_mic_bias_level_enum | |
120 | = SOC_ENUM_SINGLE(WM8940_INPUTCTL, 8, 2, wm8940_mic_bias_level_text); | |
121 | ||
122 | static const char *wm8940_filter_mode_text[] = {"Audio", "Application"}; | |
123 | static const struct soc_enum wm8940_filter_mode_enum | |
124 | = SOC_ENUM_SINGLE(WM8940_ADC, 7, 2, wm8940_filter_mode_text); | |
125 | ||
6be01cfb MB |
126 | static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1); |
127 | static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0); | |
128 | static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0); | |
129 | static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0); | |
130 | static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0); | |
131 | static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0); | |
132 | static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0); | |
133 | static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0); | |
134 | static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1); | |
135 | static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0); | |
0b5e92c5 JC |
136 | |
137 | static const struct snd_kcontrol_new wm8940_snd_controls[] = { | |
138 | SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL, | |
139 | 6, 1, 0), | |
140 | SOC_ENUM("DAC Companding", wm8940_dac_companding_enum), | |
141 | SOC_ENUM("ADC Companding", wm8940_adc_companding_enum), | |
142 | ||
143 | SOC_ENUM("ALC Mode", wm8940_alc_mode_enum), | |
144 | SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0), | |
145 | SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1, | |
146 | 3, 7, 1, wm8940_alc_max_tlv), | |
147 | SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1, | |
148 | 0, 7, 0, wm8940_alc_min_tlv), | |
149 | SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2, | |
150 | 0, 14, 0, wm8940_alc_tar_tlv), | |
151 | SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0), | |
152 | SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0), | |
153 | SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0), | |
154 | SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0), | |
155 | SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE, | |
156 | 3, 1, 0), | |
157 | SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE, | |
158 | 0, 7, 0), | |
159 | ||
160 | SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0), | |
161 | SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0), | |
162 | SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0), | |
163 | SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2, | |
164 | 4, 9, 1, wm8940_lim_thresh_tlv), | |
165 | SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2, | |
166 | 0, 12, 0, wm8940_lim_boost_tlv), | |
167 | ||
168 | SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0), | |
169 | SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN, | |
170 | 0, 63, 0, wm8940_pga_vol_tlv), | |
171 | SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL, | |
172 | 0, 255, 0, wm8940_adc_tlv), | |
173 | SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL, | |
174 | 0, 255, 0, wm8940_adc_tlv), | |
175 | SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum), | |
176 | SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST, | |
177 | 8, 1, 0, wm8940_capture_boost_vol_tlv), | |
178 | SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL, | |
179 | 0, 63, 0, wm8940_spk_vol_tlv), | |
180 | SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1), | |
181 | ||
182 | SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL, | |
183 | 8, 1, 1, wm8940_att_tlv), | |
184 | SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0), | |
185 | ||
186 | SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1), | |
187 | SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX, | |
188 | 7, 1, 1, wm8940_att_tlv), | |
189 | ||
190 | SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0), | |
191 | SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum), | |
192 | SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0), | |
193 | SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0), | |
194 | SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0), | |
195 | SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0), | |
196 | SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0), | |
197 | }; | |
198 | ||
199 | static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = { | |
200 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0), | |
201 | SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0), | |
202 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0), | |
203 | }; | |
204 | ||
205 | static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = { | |
206 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0), | |
207 | SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0), | |
208 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0), | |
209 | }; | |
210 | ||
6be01cfb | 211 | static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1); |
0b5e92c5 JC |
212 | static const struct snd_kcontrol_new wm8940_input_boost_controls[] = { |
213 | SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1), | |
214 | SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST, | |
215 | 0, 7, 0, wm8940_boost_vol_tlv), | |
216 | SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST, | |
217 | 4, 7, 0, wm8940_boost_vol_tlv), | |
218 | }; | |
219 | ||
220 | static const struct snd_kcontrol_new wm8940_micpga_controls[] = { | |
221 | SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0), | |
222 | SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0), | |
223 | SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0), | |
224 | }; | |
225 | ||
226 | static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = { | |
227 | SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0, | |
228 | &wm8940_speaker_mixer_controls[0], | |
229 | ARRAY_SIZE(wm8940_speaker_mixer_controls)), | |
230 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0, | |
231 | &wm8940_mono_mixer_controls[0], | |
232 | ARRAY_SIZE(wm8940_mono_mixer_controls)), | |
233 | SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0), | |
234 | ||
235 | SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0), | |
236 | SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0), | |
237 | SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0), | |
238 | SND_SOC_DAPM_OUTPUT("MONOOUT"), | |
239 | SND_SOC_DAPM_OUTPUT("SPKOUTP"), | |
240 | SND_SOC_DAPM_OUTPUT("SPKOUTN"), | |
241 | ||
242 | SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0), | |
243 | SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0), | |
244 | SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0, | |
245 | &wm8940_micpga_controls[0], | |
246 | ARRAY_SIZE(wm8940_micpga_controls)), | |
247 | SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0, | |
248 | &wm8940_input_boost_controls[0], | |
249 | ARRAY_SIZE(wm8940_input_boost_controls)), | |
250 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0), | |
251 | ||
252 | SND_SOC_DAPM_INPUT("MICN"), | |
253 | SND_SOC_DAPM_INPUT("MICP"), | |
254 | SND_SOC_DAPM_INPUT("AUX"), | |
255 | }; | |
256 | ||
257 | static const struct snd_soc_dapm_route audio_map[] = { | |
258 | /* Mono output mixer */ | |
259 | {"Mono Mixer", "PCM Playback Switch", "DAC"}, | |
260 | {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, | |
261 | {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"}, | |
262 | ||
263 | /* Speaker output mixer */ | |
264 | {"Speaker Mixer", "PCM Playback Switch", "DAC"}, | |
265 | {"Speaker Mixer", "Aux Playback Switch", "Aux Input"}, | |
266 | {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"}, | |
267 | ||
268 | /* Outputs */ | |
269 | {"Mono Out", NULL, "Mono Mixer"}, | |
270 | {"MONOOUT", NULL, "Mono Out"}, | |
271 | {"SpkN Out", NULL, "Speaker Mixer"}, | |
272 | {"SpkP Out", NULL, "Speaker Mixer"}, | |
273 | {"SPKOUTN", NULL, "SpkN Out"}, | |
274 | {"SPKOUTP", NULL, "SpkP Out"}, | |
275 | ||
276 | /* Microphone PGA */ | |
277 | {"Mic PGA", "MICN Switch", "MICN"}, | |
278 | {"Mic PGA", "MICP Switch", "MICP"}, | |
279 | {"Mic PGA", "AUX Switch", "AUX"}, | |
280 | ||
281 | /* Boost Mixer */ | |
282 | {"Boost Mixer", "Mic PGA Switch", "Mic PGA"}, | |
283 | {"Boost Mixer", "Mic Volume", "MICP"}, | |
284 | {"Boost Mixer", "Aux Volume", "Aux Input"}, | |
285 | ||
286 | {"ADC", NULL, "Boost Mixer"}, | |
287 | }; | |
288 | ||
289 | static int wm8940_add_widgets(struct snd_soc_codec *codec) | |
290 | { | |
ce6120cc | 291 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
0b5e92c5 JC |
292 | int ret; |
293 | ||
ce6120cc | 294 | ret = snd_soc_dapm_new_controls(dapm, wm8940_dapm_widgets, |
0b5e92c5 JC |
295 | ARRAY_SIZE(wm8940_dapm_widgets)); |
296 | if (ret) | |
297 | goto error_ret; | |
ce6120cc | 298 | ret = snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); |
0b5e92c5 JC |
299 | |
300 | error_ret: | |
301 | return ret; | |
302 | } | |
303 | ||
8d50e447 | 304 | #define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0); |
0b5e92c5 JC |
305 | |
306 | static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
307 | unsigned int fmt) | |
308 | { | |
309 | struct snd_soc_codec *codec = codec_dai->codec; | |
8d50e447 MB |
310 | u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67; |
311 | u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe; | |
0b5e92c5 JC |
312 | |
313 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
314 | case SND_SOC_DAIFMT_CBM_CFM: | |
315 | clk |= 1; | |
316 | break; | |
317 | case SND_SOC_DAIFMT_CBS_CFS: | |
318 | break; | |
319 | default: | |
320 | return -EINVAL; | |
321 | } | |
8d50e447 | 322 | snd_soc_write(codec, WM8940_CLOCK, clk); |
0b5e92c5 JC |
323 | |
324 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
325 | case SND_SOC_DAIFMT_I2S: | |
326 | iface |= (2 << 3); | |
327 | break; | |
328 | case SND_SOC_DAIFMT_LEFT_J: | |
329 | iface |= (1 << 3); | |
330 | break; | |
331 | case SND_SOC_DAIFMT_RIGHT_J: | |
332 | break; | |
333 | case SND_SOC_DAIFMT_DSP_A: | |
334 | iface |= (3 << 3); | |
335 | break; | |
336 | case SND_SOC_DAIFMT_DSP_B: | |
337 | iface |= (3 << 3) | (1 << 7); | |
338 | break; | |
339 | } | |
340 | ||
341 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
342 | case SND_SOC_DAIFMT_NB_NF: | |
343 | break; | |
344 | case SND_SOC_DAIFMT_NB_IF: | |
345 | iface |= (1 << 7); | |
346 | break; | |
347 | case SND_SOC_DAIFMT_IB_NF: | |
348 | iface |= (1 << 8); | |
349 | break; | |
350 | case SND_SOC_DAIFMT_IB_IF: | |
351 | iface |= (1 << 8) | (1 << 7); | |
352 | break; | |
353 | } | |
354 | ||
8d50e447 | 355 | snd_soc_write(codec, WM8940_IFACE, iface); |
0b5e92c5 JC |
356 | |
357 | return 0; | |
358 | } | |
359 | ||
360 | static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream, | |
361 | struct snd_pcm_hw_params *params, | |
362 | struct snd_soc_dai *dai) | |
363 | { | |
364 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 365 | struct snd_soc_codec *codec = rtd->codec; |
8d50e447 MB |
366 | u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F; |
367 | u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1; | |
368 | u16 companding = snd_soc_read(codec, | |
0b5e92c5 JC |
369 | WM8940_COMPANDINGCTL) & 0xFFDF; |
370 | int ret; | |
371 | ||
372 | /* LoutR control */ | |
373 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE | |
374 | && params_channels(params) == 2) | |
375 | iface |= (1 << 9); | |
376 | ||
377 | switch (params_rate(params)) { | |
b3172f22 | 378 | case 8000: |
0b5e92c5 JC |
379 | addcntrl |= (0x5 << 1); |
380 | break; | |
b3172f22 | 381 | case 11025: |
0b5e92c5 JC |
382 | addcntrl |= (0x4 << 1); |
383 | break; | |
b3172f22 | 384 | case 16000: |
0b5e92c5 JC |
385 | addcntrl |= (0x3 << 1); |
386 | break; | |
b3172f22 | 387 | case 22050: |
0b5e92c5 JC |
388 | addcntrl |= (0x2 << 1); |
389 | break; | |
b3172f22 | 390 | case 32000: |
0b5e92c5 JC |
391 | addcntrl |= (0x1 << 1); |
392 | break; | |
b3172f22 GL |
393 | case 44100: |
394 | case 48000: | |
0b5e92c5 JC |
395 | break; |
396 | } | |
8d50e447 | 397 | ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl); |
0b5e92c5 JC |
398 | if (ret) |
399 | goto error_ret; | |
400 | ||
401 | switch (params_format(params)) { | |
402 | case SNDRV_PCM_FORMAT_S8: | |
403 | companding = companding | (1 << 5); | |
404 | break; | |
405 | case SNDRV_PCM_FORMAT_S16_LE: | |
406 | break; | |
407 | case SNDRV_PCM_FORMAT_S20_3LE: | |
408 | iface |= (1 << 5); | |
409 | break; | |
410 | case SNDRV_PCM_FORMAT_S24_LE: | |
411 | iface |= (2 << 5); | |
412 | break; | |
413 | case SNDRV_PCM_FORMAT_S32_LE: | |
414 | iface |= (3 << 5); | |
415 | break; | |
416 | } | |
8d50e447 | 417 | ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding); |
0b5e92c5 JC |
418 | if (ret) |
419 | goto error_ret; | |
8d50e447 | 420 | ret = snd_soc_write(codec, WM8940_IFACE, iface); |
0b5e92c5 JC |
421 | |
422 | error_ret: | |
423 | return ret; | |
424 | } | |
425 | ||
426 | static int wm8940_mute(struct snd_soc_dai *dai, int mute) | |
427 | { | |
428 | struct snd_soc_codec *codec = dai->codec; | |
8d50e447 | 429 | u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf; |
0b5e92c5 JC |
430 | |
431 | if (mute) | |
432 | mute_reg |= 0x40; | |
433 | ||
8d50e447 | 434 | return snd_soc_write(codec, WM8940_DAC, mute_reg); |
0b5e92c5 JC |
435 | } |
436 | ||
437 | static int wm8940_set_bias_level(struct snd_soc_codec *codec, | |
438 | enum snd_soc_bias_level level) | |
439 | { | |
440 | u16 val; | |
8d50e447 | 441 | u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0; |
0b5e92c5 JC |
442 | int ret = 0; |
443 | ||
444 | switch (level) { | |
445 | case SND_SOC_BIAS_ON: | |
446 | /* ensure bufioen and biasen */ | |
447 | pwr_reg |= (1 << 2) | (1 << 3); | |
448 | /* Enable thermal shutdown */ | |
8d50e447 MB |
449 | val = snd_soc_read(codec, WM8940_OUTPUTCTL); |
450 | ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2); | |
0b5e92c5 JC |
451 | if (ret) |
452 | break; | |
453 | /* set vmid to 75k */ | |
8d50e447 | 454 | ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1); |
0b5e92c5 JC |
455 | break; |
456 | case SND_SOC_BIAS_PREPARE: | |
457 | /* ensure bufioen and biasen */ | |
458 | pwr_reg |= (1 << 2) | (1 << 3); | |
8d50e447 | 459 | ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1); |
0b5e92c5 JC |
460 | break; |
461 | case SND_SOC_BIAS_STANDBY: | |
462 | /* ensure bufioen and biasen */ | |
463 | pwr_reg |= (1 << 2) | (1 << 3); | |
464 | /* set vmid to 300k for standby */ | |
8d50e447 | 465 | ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2); |
0b5e92c5 JC |
466 | break; |
467 | case SND_SOC_BIAS_OFF: | |
8d50e447 | 468 | ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg); |
0b5e92c5 JC |
469 | break; |
470 | } | |
471 | ||
472 | return ret; | |
473 | } | |
474 | ||
475 | struct pll_ { | |
476 | unsigned int pre_scale:2; | |
477 | unsigned int n:4; | |
478 | unsigned int k; | |
479 | }; | |
480 | ||
481 | static struct pll_ pll_div; | |
482 | ||
483 | /* The size in bits of the pll divide multiplied by 10 | |
484 | * to allow rounding later */ | |
485 | #define FIXED_PLL_SIZE ((1 << 24) * 10) | |
486 | static void pll_factors(unsigned int target, unsigned int source) | |
487 | { | |
488 | unsigned long long Kpart; | |
489 | unsigned int K, Ndiv, Nmod; | |
490 | /* The left shift ist to avoid accuracy loss when right shifting */ | |
491 | Ndiv = target / source; | |
492 | ||
493 | if (Ndiv > 12) { | |
494 | source <<= 1; | |
495 | /* Multiply by 2 */ | |
496 | pll_div.pre_scale = 0; | |
497 | Ndiv = target / source; | |
498 | } else if (Ndiv < 3) { | |
499 | source >>= 2; | |
500 | /* Divide by 4 */ | |
501 | pll_div.pre_scale = 3; | |
502 | Ndiv = target / source; | |
503 | } else if (Ndiv < 6) { | |
504 | source >>= 1; | |
505 | /* divide by 2 */ | |
506 | pll_div.pre_scale = 2; | |
507 | Ndiv = target / source; | |
508 | } else | |
509 | pll_div.pre_scale = 1; | |
510 | ||
511 | if ((Ndiv < 6) || (Ndiv > 12)) | |
512 | printk(KERN_WARNING | |
513 | "WM8940 N value %d outwith recommended range!d\n", | |
514 | Ndiv); | |
515 | ||
516 | pll_div.n = Ndiv; | |
517 | Nmod = target % source; | |
518 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; | |
519 | ||
520 | do_div(Kpart, source); | |
521 | ||
522 | K = Kpart & 0xFFFFFFFF; | |
523 | ||
524 | /* Check if we need to round */ | |
525 | if ((K % 10) >= 5) | |
526 | K += 5; | |
527 | ||
528 | /* Move down to proper range now rounding is done */ | |
529 | K /= 10; | |
530 | ||
531 | pll_div.k = K; | |
532 | } | |
533 | ||
534 | /* Untested at the moment */ | |
85488037 MB |
535 | static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
536 | int source, unsigned int freq_in, unsigned int freq_out) | |
0b5e92c5 JC |
537 | { |
538 | struct snd_soc_codec *codec = codec_dai->codec; | |
539 | u16 reg; | |
540 | ||
541 | /* Turn off PLL */ | |
8d50e447 MB |
542 | reg = snd_soc_read(codec, WM8940_POWER1); |
543 | snd_soc_write(codec, WM8940_POWER1, reg & 0x1df); | |
0b5e92c5 JC |
544 | |
545 | if (freq_in == 0 || freq_out == 0) { | |
546 | /* Clock CODEC directly from MCLK */ | |
8d50e447 MB |
547 | reg = snd_soc_read(codec, WM8940_CLOCK); |
548 | snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff); | |
0b5e92c5 | 549 | /* Pll power down */ |
8d50e447 | 550 | snd_soc_write(codec, WM8940_PLLN, (1 << 7)); |
0b5e92c5 JC |
551 | return 0; |
552 | } | |
553 | ||
554 | /* Pll is followed by a frequency divide by 4 */ | |
555 | pll_factors(freq_out*4, freq_in); | |
556 | if (pll_div.k) | |
8d50e447 | 557 | snd_soc_write(codec, WM8940_PLLN, |
0b5e92c5 JC |
558 | (pll_div.pre_scale << 4) | pll_div.n | (1 << 6)); |
559 | else /* No factional component */ | |
8d50e447 | 560 | snd_soc_write(codec, WM8940_PLLN, |
0b5e92c5 | 561 | (pll_div.pre_scale << 4) | pll_div.n); |
8d50e447 MB |
562 | snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18); |
563 | snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff); | |
564 | snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff); | |
0b5e92c5 | 565 | /* Enable the PLL */ |
8d50e447 MB |
566 | reg = snd_soc_read(codec, WM8940_POWER1); |
567 | snd_soc_write(codec, WM8940_POWER1, reg | 0x020); | |
0b5e92c5 JC |
568 | |
569 | /* Run CODEC from PLL instead of MCLK */ | |
8d50e447 MB |
570 | reg = snd_soc_read(codec, WM8940_CLOCK); |
571 | snd_soc_write(codec, WM8940_CLOCK, reg | 0x100); | |
0b5e92c5 JC |
572 | |
573 | return 0; | |
574 | } | |
575 | ||
576 | static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
577 | int clk_id, unsigned int freq, int dir) | |
578 | { | |
579 | struct snd_soc_codec *codec = codec_dai->codec; | |
b2c812e2 | 580 | struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec); |
0b5e92c5 JC |
581 | |
582 | switch (freq) { | |
583 | case 11289600: | |
584 | case 12000000: | |
585 | case 12288000: | |
586 | case 16934400: | |
587 | case 18432000: | |
588 | wm8940->sysclk = freq; | |
589 | return 0; | |
590 | } | |
591 | return -EINVAL; | |
592 | } | |
593 | ||
594 | static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai, | |
595 | int div_id, int div) | |
596 | { | |
597 | struct snd_soc_codec *codec = codec_dai->codec; | |
598 | u16 reg; | |
599 | int ret = 0; | |
600 | ||
601 | switch (div_id) { | |
602 | case WM8940_BCLKDIV: | |
8d50e447 MB |
603 | reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFEF3; |
604 | ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2)); | |
0b5e92c5 JC |
605 | break; |
606 | case WM8940_MCLKDIV: | |
8d50e447 MB |
607 | reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F; |
608 | ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5)); | |
0b5e92c5 JC |
609 | break; |
610 | case WM8940_OPCLKDIV: | |
8d50e447 MB |
611 | reg = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFCF; |
612 | ret = snd_soc_write(codec, WM8940_ADDCNTRL, reg | (div << 4)); | |
0b5e92c5 JC |
613 | break; |
614 | } | |
615 | return ret; | |
616 | } | |
617 | ||
618 | #define WM8940_RATES SNDRV_PCM_RATE_8000_48000 | |
619 | ||
620 | #define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ | |
621 | SNDRV_PCM_FMTBIT_S16_LE | \ | |
622 | SNDRV_PCM_FMTBIT_S20_3LE | \ | |
623 | SNDRV_PCM_FMTBIT_S24_LE | \ | |
624 | SNDRV_PCM_FMTBIT_S32_LE) | |
625 | ||
626 | static struct snd_soc_dai_ops wm8940_dai_ops = { | |
627 | .hw_params = wm8940_i2s_hw_params, | |
628 | .set_sysclk = wm8940_set_dai_sysclk, | |
629 | .digital_mute = wm8940_mute, | |
630 | .set_fmt = wm8940_set_dai_fmt, | |
631 | .set_clkdiv = wm8940_set_dai_clkdiv, | |
632 | .set_pll = wm8940_set_dai_pll, | |
633 | }; | |
634 | ||
f0fba2ad LG |
635 | static struct snd_soc_dai_driver wm8940_dai = { |
636 | .name = "wm8940-hifi", | |
0b5e92c5 JC |
637 | .playback = { |
638 | .stream_name = "Playback", | |
639 | .channels_min = 1, | |
640 | .channels_max = 2, | |
641 | .rates = WM8940_RATES, | |
642 | .formats = WM8940_FORMATS, | |
643 | }, | |
644 | .capture = { | |
645 | .stream_name = "Capture", | |
646 | .channels_min = 1, | |
647 | .channels_max = 2, | |
648 | .rates = WM8940_RATES, | |
649 | .formats = WM8940_FORMATS, | |
650 | }, | |
651 | .ops = &wm8940_dai_ops, | |
652 | .symmetric_rates = 1, | |
653 | }; | |
0b5e92c5 | 654 | |
f0fba2ad | 655 | static int wm8940_suspend(struct snd_soc_codec *codec, pm_message_t state) |
0b5e92c5 | 656 | { |
0b5e92c5 JC |
657 | return wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF); |
658 | } | |
659 | ||
f0fba2ad | 660 | static int wm8940_resume(struct snd_soc_codec *codec) |
0b5e92c5 | 661 | { |
0b5e92c5 JC |
662 | int i; |
663 | int ret; | |
664 | u8 data[3]; | |
665 | u16 *cache = codec->reg_cache; | |
666 | ||
667 | /* Sync reg_cache with the hardware | |
668 | * Could use auto incremented writes to speed this up | |
669 | */ | |
670 | for (i = 0; i < ARRAY_SIZE(wm8940_reg_defaults); i++) { | |
671 | data[0] = i; | |
672 | data[1] = (cache[i] & 0xFF00) >> 8; | |
673 | data[2] = cache[i] & 0x00FF; | |
674 | ret = codec->hw_write(codec->control_data, data, 3); | |
675 | if (ret < 0) | |
676 | goto error_ret; | |
677 | else if (ret != 3) { | |
678 | ret = -EIO; | |
679 | goto error_ret; | |
680 | } | |
681 | } | |
682 | ret = wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
0b5e92c5 JC |
683 | |
684 | error_ret: | |
685 | return ret; | |
686 | } | |
687 | ||
f0fba2ad | 688 | static int wm8940_probe(struct snd_soc_codec *codec) |
0b5e92c5 | 689 | { |
f0fba2ad LG |
690 | struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec); |
691 | struct wm8940_setup_data *pdata = codec->dev->platform_data; | |
0b5e92c5 JC |
692 | int ret; |
693 | u16 reg; | |
0b5e92c5 | 694 | |
f0fba2ad | 695 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8940->control_type); |
e655a435 | 696 | if (ret < 0) { |
8d50e447 MB |
697 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
698 | return ret; | |
699 | } | |
700 | ||
0b5e92c5 JC |
701 | ret = wm8940_reset(codec); |
702 | if (ret < 0) { | |
703 | dev_err(codec->dev, "Failed to issue reset\n"); | |
704 | return ret; | |
705 | } | |
706 | ||
0b5e92c5 JC |
707 | wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
708 | ||
8d50e447 | 709 | ret = snd_soc_write(codec, WM8940_POWER1, 0x180); |
0b5e92c5 JC |
710 | if (ret < 0) |
711 | return ret; | |
712 | ||
713 | if (!pdata) | |
714 | dev_warn(codec->dev, "No platform data supplied\n"); | |
715 | else { | |
8d50e447 MB |
716 | reg = snd_soc_read(codec, WM8940_OUTPUTCTL); |
717 | ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi); | |
0b5e92c5 JC |
718 | if (ret < 0) |
719 | return ret; | |
720 | } | |
721 | ||
f0fba2ad LG |
722 | ret = snd_soc_add_controls(codec, wm8940_snd_controls, |
723 | ARRAY_SIZE(wm8940_snd_controls)); | |
724 | if (ret) | |
0b5e92c5 | 725 | return ret; |
f0fba2ad | 726 | ret = wm8940_add_widgets(codec); |
f0fba2ad | 727 | return ret; |
0b5e92c5 JC |
728 | } |
729 | ||
f0fba2ad | 730 | static int wm8940_remove(struct snd_soc_codec *codec) |
0b5e92c5 | 731 | { |
f0fba2ad LG |
732 | wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF); |
733 | return 0; | |
0b5e92c5 JC |
734 | } |
735 | ||
f0fba2ad LG |
736 | static struct snd_soc_codec_driver soc_codec_dev_wm8940 = { |
737 | .probe = wm8940_probe, | |
738 | .remove = wm8940_remove, | |
739 | .suspend = wm8940_suspend, | |
740 | .resume = wm8940_resume, | |
741 | .set_bias_level = wm8940_set_bias_level, | |
e5eec34c | 742 | .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults), |
f0fba2ad LG |
743 | .reg_word_size = sizeof(u16), |
744 | .reg_cache_default = wm8940_reg_defaults, | |
745 | }; | |
746 | ||
747 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
748 | static __devinit int wm8940_i2c_probe(struct i2c_client *i2c, | |
749 | const struct i2c_device_id *id) | |
0b5e92c5 JC |
750 | { |
751 | struct wm8940_priv *wm8940; | |
f0fba2ad | 752 | int ret; |
0b5e92c5 | 753 | |
f0fba2ad | 754 | wm8940 = kzalloc(sizeof(struct wm8940_priv), GFP_KERNEL); |
0b5e92c5 JC |
755 | if (wm8940 == NULL) |
756 | return -ENOMEM; | |
757 | ||
0b5e92c5 | 758 | i2c_set_clientdata(i2c, wm8940); |
7f984b55 | 759 | wm8940->control_type = SND_SOC_I2C; |
0b5e92c5 | 760 | |
f0fba2ad LG |
761 | ret = snd_soc_register_codec(&i2c->dev, |
762 | &soc_codec_dev_wm8940, &wm8940_dai, 1); | |
db1e18de AL |
763 | if (ret < 0) |
764 | kfree(wm8940); | |
db1e18de | 765 | return ret; |
0b5e92c5 JC |
766 | } |
767 | ||
f0fba2ad | 768 | static __devexit int wm8940_i2c_remove(struct i2c_client *client) |
0b5e92c5 | 769 | { |
f0fba2ad LG |
770 | snd_soc_unregister_codec(&client->dev); |
771 | kfree(i2c_get_clientdata(client)); | |
0b5e92c5 JC |
772 | return 0; |
773 | } | |
774 | ||
775 | static const struct i2c_device_id wm8940_i2c_id[] = { | |
776 | { "wm8940", 0 }, | |
777 | { } | |
778 | }; | |
779 | MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id); | |
780 | ||
781 | static struct i2c_driver wm8940_i2c_driver = { | |
782 | .driver = { | |
f0fba2ad | 783 | .name = "wm8940-codec", |
0b5e92c5 JC |
784 | .owner = THIS_MODULE, |
785 | }, | |
f0fba2ad LG |
786 | .probe = wm8940_i2c_probe, |
787 | .remove = __devexit_p(wm8940_i2c_remove), | |
0b5e92c5 JC |
788 | .id_table = wm8940_i2c_id, |
789 | }; | |
f0fba2ad | 790 | #endif |
0b5e92c5 JC |
791 | |
792 | static int __init wm8940_modinit(void) | |
793 | { | |
f0fba2ad LG |
794 | int ret = 0; |
795 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
0b5e92c5 | 796 | ret = i2c_add_driver(&wm8940_i2c_driver); |
f0fba2ad LG |
797 | if (ret != 0) { |
798 | printk(KERN_ERR "Failed to register wm8940 I2C driver: %d\n", | |
0b5e92c5 | 799 | ret); |
f0fba2ad LG |
800 | } |
801 | #endif | |
0b5e92c5 JC |
802 | return ret; |
803 | } | |
804 | module_init(wm8940_modinit); | |
805 | ||
806 | static void __exit wm8940_exit(void) | |
807 | { | |
f0fba2ad | 808 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
0b5e92c5 | 809 | i2c_del_driver(&wm8940_i2c_driver); |
f0fba2ad | 810 | #endif |
0b5e92c5 JC |
811 | } |
812 | module_exit(wm8940_exit); | |
813 | ||
814 | MODULE_DESCRIPTION("ASoC WM8940 driver"); | |
815 | MODULE_AUTHOR("Jonathan Cameron"); | |
816 | MODULE_LICENSE("GPL"); |