ASoC: twl6040: Replace w->codec snd_soc_dapm_to_codec(w->dapm)
[deliverable/linux.git] / sound / soc / codecs / wm8960.c
CommitLineData
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1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
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4 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
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6 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
5a0e3ad6 19#include <linux/slab.h>
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20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
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24#include <sound/initval.h>
25#include <sound/tlv.h>
b6877a47 26#include <sound/wm8960.h>
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27
28#include "wm8960.h"
29
f2644a2c 30/* R25 - Power 1 */
913d7b4c 31#define WM8960_VMID_MASK 0x180
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32#define WM8960_VREF 0x40
33
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34/* R26 - Power 2 */
35#define WM8960_PWR2_LOUT1 0x40
36#define WM8960_PWR2_ROUT1 0x20
37#define WM8960_PWR2_OUT3 0x02
38
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39/* R28 - Anti-pop 1 */
40#define WM8960_POBCTRL 0x80
41#define WM8960_BUFDCOPEN 0x10
42#define WM8960_BUFIOEN 0x08
43#define WM8960_SOFT_ST 0x04
44#define WM8960_HPSTBY 0x01
45
46/* R29 - Anti-pop 2 */
47#define WM8960_DISOP 0x40
913d7b4c 48#define WM8960_DRES_MASK 0x30
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49
50/*
51 * wm8960 register cache
52 * We can't read the WM8960 register space when we are
53 * using 2 wire for device control, so we cache them instead.
54 */
0ebe36c6 55static const struct reg_default wm8960_reg_defaults[] = {
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56 { 0x0, 0x00a7 },
57 { 0x1, 0x00a7 },
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58 { 0x2, 0x0000 },
59 { 0x3, 0x0000 },
60 { 0x4, 0x0000 },
61 { 0x5, 0x0008 },
62 { 0x6, 0x0000 },
63 { 0x7, 0x000a },
64 { 0x8, 0x01c0 },
65 { 0x9, 0x0000 },
66 { 0xa, 0x00ff },
67 { 0xb, 0x00ff },
68
69 { 0x10, 0x0000 },
70 { 0x11, 0x007b },
71 { 0x12, 0x0100 },
72 { 0x13, 0x0032 },
73 { 0x14, 0x0000 },
74 { 0x15, 0x00c3 },
75 { 0x16, 0x00c3 },
76 { 0x17, 0x01c0 },
77 { 0x18, 0x0000 },
78 { 0x19, 0x0000 },
79 { 0x1a, 0x0000 },
80 { 0x1b, 0x0000 },
81 { 0x1c, 0x0000 },
82 { 0x1d, 0x0000 },
83
84 { 0x20, 0x0100 },
85 { 0x21, 0x0100 },
86 { 0x22, 0x0050 },
87
88 { 0x25, 0x0050 },
89 { 0x26, 0x0000 },
90 { 0x27, 0x0000 },
91 { 0x28, 0x0000 },
92 { 0x29, 0x0000 },
93 { 0x2a, 0x0040 },
94 { 0x2b, 0x0000 },
95 { 0x2c, 0x0000 },
96 { 0x2d, 0x0050 },
97 { 0x2e, 0x0050 },
98 { 0x2f, 0x0000 },
99 { 0x30, 0x0002 },
100 { 0x31, 0x0037 },
101
102 { 0x33, 0x0080 },
103 { 0x34, 0x0008 },
104 { 0x35, 0x0031 },
105 { 0x36, 0x0026 },
106 { 0x37, 0x00e9 },
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107};
108
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109static bool wm8960_volatile(struct device *dev, unsigned int reg)
110{
111 switch (reg) {
112 case WM8960_RESET:
113 return true;
114 default:
115 return false;
116 }
117}
118
f2644a2c 119struct wm8960_priv {
0ebe36c6 120 struct regmap *regmap;
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121 int (*set_bias_level)(struct snd_soc_codec *,
122 enum snd_soc_bias_level level);
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123 struct snd_soc_dapm_widget *lout1;
124 struct snd_soc_dapm_widget *rout1;
125 struct snd_soc_dapm_widget *out3;
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126 bool deemph;
127 int playback_fs;
e2280c90 128 struct wm8960_data pdata;
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129};
130
3ad5e861 131#define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
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132
133/* enumerated controls */
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134static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
135 "Right Inverted", "Stereo Inversion"};
136static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
137static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
138static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
139static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
140
141static const struct soc_enum wm8960_enum[] = {
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142 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
143 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
144 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
145 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
146 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
147 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
148};
149
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150static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
151
152static int wm8960_set_deemph(struct snd_soc_codec *codec)
153{
154 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
155 int val, i, best;
156
157 /* If we're using deemphasis select the nearest available sample
158 * rate.
159 */
160 if (wm8960->deemph) {
161 best = 1;
162 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
163 if (abs(deemph_settings[i] - wm8960->playback_fs) <
164 abs(deemph_settings[best] - wm8960->playback_fs))
165 best = i;
166 }
167
168 val = best << 1;
169 } else {
170 val = 0;
171 }
172
173 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
174
175 return snd_soc_update_bits(codec, WM8960_DACCTL1,
176 0x6, val);
177}
178
179static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
180 struct snd_ctl_elem_value *ucontrol)
181{
ea53bf77 182 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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183 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
184
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185 ucontrol->value.enumerated.item[0] = wm8960->deemph;
186 return 0;
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187}
188
189static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
190 struct snd_ctl_elem_value *ucontrol)
191{
ea53bf77 192 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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193 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
194 int deemph = ucontrol->value.enumerated.item[0];
195
196 if (deemph > 1)
197 return -EINVAL;
198
199 wm8960->deemph = deemph;
200
201 return wm8960_set_deemph(codec);
202}
203
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204static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
205static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
206static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
207static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
21eb2693 208static const DECLARE_TLV_DB_SCALE(boost_tlv, -1200, 300, 1);
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209
210static const struct snd_kcontrol_new wm8960_snd_controls[] = {
211SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
212 0, 63, 0, adc_tlv),
213SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
214 6, 1, 0),
215SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
216 7, 1, 0),
217
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218SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
219 WM8960_INBMIX1, 4, 7, 0, boost_tlv),
220SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
221 WM8960_INBMIX1, 1, 7, 0, boost_tlv),
222SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
223 WM8960_INBMIX2, 4, 7, 0, boost_tlv),
224SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
225 WM8960_INBMIX2, 1, 7, 0, boost_tlv),
226
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227SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
228 0, 255, 0, dac_tlv),
229
230SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
231 0, 127, 0, out_tlv),
232SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
233 7, 1, 0),
234
235SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
236 0, 127, 0, out_tlv),
237SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
238 7, 1, 0),
239SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
240SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
241
242SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 243SOC_ENUM("ADC Polarity", wm8960_enum[0]),
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244SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
245
246SOC_ENUM("DAC Polarity", wm8960_enum[2]),
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247SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
248 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 249
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250SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
251SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
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252SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
253SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
254
4faaa8d9 255SOC_ENUM("ALC Function", wm8960_enum[4]),
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256SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
257SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
258SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
259SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 260SOC_ENUM("ALC Mode", wm8960_enum[5]),
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261SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
262SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
263
264SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
265SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
266
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267SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
268 0, 255, 0, adc_tlv),
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269
270SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
271 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
272SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
273 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
274SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
275 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
276SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
277 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
278};
279
280static const struct snd_kcontrol_new wm8960_lin_boost[] = {
281SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
282SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
283SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
284};
285
286static const struct snd_kcontrol_new wm8960_lin[] = {
287SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
288};
289
290static const struct snd_kcontrol_new wm8960_rin_boost[] = {
291SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
292SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
293SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
294};
295
296static const struct snd_kcontrol_new wm8960_rin[] = {
297SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
298};
299
300static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
301SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
302SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
303SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
304};
305
306static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
307SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
308SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
309SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
310};
311
312static const struct snd_kcontrol_new wm8960_mono_out[] = {
313SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
314SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
315};
316
317static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
318SND_SOC_DAPM_INPUT("LINPUT1"),
319SND_SOC_DAPM_INPUT("RINPUT1"),
320SND_SOC_DAPM_INPUT("LINPUT2"),
321SND_SOC_DAPM_INPUT("RINPUT2"),
322SND_SOC_DAPM_INPUT("LINPUT3"),
323SND_SOC_DAPM_INPUT("RINPUT3"),
324
187774cb 325SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
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326
327SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
328 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
329SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
330 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
331
332SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
333 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
334SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
335 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
336
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337SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
338SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
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339
340SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
341SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
342
343SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
344 &wm8960_loutput_mixer[0],
345 ARRAY_SIZE(wm8960_loutput_mixer)),
346SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
347 &wm8960_routput_mixer[0],
348 ARRAY_SIZE(wm8960_routput_mixer)),
349
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350SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
351SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
352
353SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
354SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
355
356SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
357SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
358
359SND_SOC_DAPM_OUTPUT("SPK_LP"),
360SND_SOC_DAPM_OUTPUT("SPK_LN"),
361SND_SOC_DAPM_OUTPUT("HP_L"),
362SND_SOC_DAPM_OUTPUT("HP_R"),
363SND_SOC_DAPM_OUTPUT("SPK_RP"),
364SND_SOC_DAPM_OUTPUT("SPK_RN"),
365SND_SOC_DAPM_OUTPUT("OUT3"),
366};
367
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368static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
369SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
370 &wm8960_mono_out[0],
371 ARRAY_SIZE(wm8960_mono_out)),
372};
373
374/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
375static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
376SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
377};
378
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379static const struct snd_soc_dapm_route audio_paths[] = {
380 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
381 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
382 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
383
384 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
385 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
386 { "Left Input Mixer", NULL, "LINPUT2" },
387 { "Left Input Mixer", NULL, "LINPUT3" },
388
389 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
390 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
391 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
392
393 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
394 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
395 { "Right Input Mixer", NULL, "RINPUT2" },
396 { "Right Input Mixer", NULL, "LINPUT3" },
397
398 { "Left ADC", NULL, "Left Input Mixer" },
399 { "Right ADC", NULL, "Right Input Mixer" },
400
401 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
402 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
403 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
404
405 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
406 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
407 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
408
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409 { "LOUT1 PGA", NULL, "Left Output Mixer" },
410 { "ROUT1 PGA", NULL, "Right Output Mixer" },
411
412 { "HP_L", NULL, "LOUT1 PGA" },
413 { "HP_R", NULL, "ROUT1 PGA" },
414
415 { "Left Speaker PGA", NULL, "Left Output Mixer" },
416 { "Right Speaker PGA", NULL, "Right Output Mixer" },
417
418 { "Left Speaker Output", NULL, "Left Speaker PGA" },
419 { "Right Speaker Output", NULL, "Right Speaker PGA" },
420
421 { "SPK_LN", NULL, "Left Speaker Output" },
422 { "SPK_LP", NULL, "Left Speaker Output" },
423 { "SPK_RN", NULL, "Right Speaker Output" },
424 { "SPK_RP", NULL, "Right Speaker Output" },
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425};
426
427static const struct snd_soc_dapm_route audio_paths_out3[] = {
428 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
429 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
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430
431 { "OUT3", NULL, "Mono Output Mixer", }
432};
433
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434static const struct snd_soc_dapm_route audio_paths_capless[] = {
435 { "HP_L", NULL, "OUT3 VMID" },
436 { "HP_R", NULL, "OUT3 VMID" },
437
438 { "OUT3 VMID", NULL, "Left Output Mixer" },
439 { "OUT3 VMID", NULL, "Right Output Mixer" },
440};
441
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442static int wm8960_add_widgets(struct snd_soc_codec *codec)
443{
b2c812e2 444 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
e2280c90 445 struct wm8960_data *pdata = &wm8960->pdata;
ce6120cc 446 struct snd_soc_dapm_context *dapm = &codec->dapm;
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447 struct snd_soc_dapm_widget *w;
448
ce6120cc 449 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
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450 ARRAY_SIZE(wm8960_dapm_widgets));
451
ce6120cc 452 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 453
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454 /* In capless mode OUT3 is used to provide VMID for the
455 * headphone outputs, otherwise it is used as a mono mixer.
456 */
457 if (pdata && pdata->capless) {
ce6120cc 458 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
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459 ARRAY_SIZE(wm8960_dapm_widgets_capless));
460
ce6120cc 461 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
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462 ARRAY_SIZE(audio_paths_capless));
463 } else {
ce6120cc 464 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
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465 ARRAY_SIZE(wm8960_dapm_widgets_out3));
466
ce6120cc 467 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
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468 ARRAY_SIZE(audio_paths_out3));
469 }
470
471 /* We need to power up the headphone output stage out of
472 * sequence for capless mode. To save scanning the widget
473 * list each time to find the desired power state do so now
474 * and save the result.
475 */
00200107 476 list_for_each_entry(w, &codec->component.card->widgets, list) {
97c866de
JN
477 if (w->dapm != &codec->dapm)
478 continue;
913d7b4c
MB
479 if (strcmp(w->name, "LOUT1 PGA") == 0)
480 wm8960->lout1 = w;
481 if (strcmp(w->name, "ROUT1 PGA") == 0)
482 wm8960->rout1 = w;
483 if (strcmp(w->name, "OUT3 VMID") == 0)
484 wm8960->out3 = w;
485 }
486
f2644a2c
MB
487 return 0;
488}
489
490static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
491 unsigned int fmt)
492{
493 struct snd_soc_codec *codec = codec_dai->codec;
494 u16 iface = 0;
495
496 /* set master/slave audio interface */
497 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
498 case SND_SOC_DAIFMT_CBM_CFM:
499 iface |= 0x0040;
500 break;
501 case SND_SOC_DAIFMT_CBS_CFS:
502 break;
503 default:
504 return -EINVAL;
505 }
506
507 /* interface format */
508 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
509 case SND_SOC_DAIFMT_I2S:
510 iface |= 0x0002;
511 break;
512 case SND_SOC_DAIFMT_RIGHT_J:
513 break;
514 case SND_SOC_DAIFMT_LEFT_J:
515 iface |= 0x0001;
516 break;
517 case SND_SOC_DAIFMT_DSP_A:
518 iface |= 0x0003;
519 break;
520 case SND_SOC_DAIFMT_DSP_B:
521 iface |= 0x0013;
522 break;
523 default:
524 return -EINVAL;
525 }
526
527 /* clock inversion */
528 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
529 case SND_SOC_DAIFMT_NB_NF:
530 break;
531 case SND_SOC_DAIFMT_IB_IF:
532 iface |= 0x0090;
533 break;
534 case SND_SOC_DAIFMT_IB_NF:
535 iface |= 0x0080;
536 break;
537 case SND_SOC_DAIFMT_NB_IF:
538 iface |= 0x0010;
539 break;
540 default:
541 return -EINVAL;
542 }
543
544 /* set iface */
17a52fd6 545 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB
546 return 0;
547}
548
db059c0f
MB
549static struct {
550 int rate;
551 unsigned int val;
552} alc_rates[] = {
553 { 48000, 0 },
554 { 44100, 0 },
555 { 32000, 1 },
556 { 22050, 2 },
557 { 24000, 2 },
558 { 16000, 3 },
559 { 11250, 4 },
560 { 12000, 4 },
561 { 8000, 5 },
562};
563
f2644a2c
MB
564static int wm8960_hw_params(struct snd_pcm_substream *substream,
565 struct snd_pcm_hw_params *params,
566 struct snd_soc_dai *dai)
567{
e6968a17 568 struct snd_soc_codec *codec = dai->codec;
afd6d36a 569 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 570 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
db059c0f 571 int i;
f2644a2c
MB
572
573 /* bit size */
39e9cc46
MB
574 switch (params_width(params)) {
575 case 16:
f2644a2c 576 break;
39e9cc46 577 case 20:
f2644a2c
MB
578 iface |= 0x0004;
579 break;
39e9cc46 580 case 24:
f2644a2c
MB
581 iface |= 0x0008;
582 break;
4c2474c0 583 default:
39e9cc46
MB
584 dev_err(codec->dev, "unsupported width %d\n",
585 params_width(params));
4c2474c0 586 return -EINVAL;
f2644a2c
MB
587 }
588
afd6d36a
MB
589 /* Update filters for the new rate */
590 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
591 wm8960->playback_fs = params_rate(params);
592 wm8960_set_deemph(codec);
db059c0f
MB
593 } else {
594 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
595 if (alc_rates[i].rate == params_rate(params))
596 snd_soc_update_bits(codec,
597 WM8960_ADDCTL3, 0x7,
598 alc_rates[i].val);
afd6d36a
MB
599 }
600
f2644a2c 601 /* set iface */
17a52fd6 602 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB
603 return 0;
604}
605
606static int wm8960_mute(struct snd_soc_dai *dai, int mute)
607{
608 struct snd_soc_codec *codec = dai->codec;
f2644a2c
MB
609
610 if (mute)
16b24881 611 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
f2644a2c 612 else
16b24881 613 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
f2644a2c
MB
614 return 0;
615}
616
913d7b4c
MB
617static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
618 enum snd_soc_bias_level level)
f2644a2c 619{
0ebe36c6
MB
620 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
621
f2644a2c
MB
622 switch (level) {
623 case SND_SOC_BIAS_ON:
624 break;
625
626 case SND_SOC_BIAS_PREPARE:
627 /* Set VMID to 2x50k */
16b24881 628 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
f2644a2c
MB
629 break;
630
631 case SND_SOC_BIAS_STANDBY:
ce6120cc 632 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
0ebe36c6 633 regcache_sync(wm8960->regmap);
bc45df2d 634
f2644a2c 635 /* Enable anti-pop features */
17a52fd6 636 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB
637 WM8960_POBCTRL | WM8960_SOFT_ST |
638 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB
639
640 /* Enable & ramp VMID at 2x50k */
16b24881 641 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
f2644a2c
MB
642 msleep(100);
643
644 /* Enable VREF */
16b24881
AL
645 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
646 WM8960_VREF);
f2644a2c
MB
647
648 /* Disable anti-pop features */
17a52fd6 649 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB
650 }
651
652 /* Set VMID to 2x250k */
16b24881 653 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
f2644a2c
MB
654 break;
655
656 case SND_SOC_BIAS_OFF:
657 /* Enable anti-pop features */
17a52fd6 658 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB
659 WM8960_POBCTRL | WM8960_SOFT_ST |
660 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
661
662 /* Disable VMID and VREF, let them discharge */
17a52fd6 663 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 664 msleep(600);
913d7b4c
MB
665 break;
666 }
667
ce6120cc 668 codec->dapm.bias_level = level;
913d7b4c
MB
669
670 return 0;
671}
672
673static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
674 enum snd_soc_bias_level level)
675{
b2c812e2 676 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB
677 int reg;
678
679 switch (level) {
680 case SND_SOC_BIAS_ON:
681 break;
682
683 case SND_SOC_BIAS_PREPARE:
ce6120cc 684 switch (codec->dapm.bias_level) {
913d7b4c
MB
685 case SND_SOC_BIAS_STANDBY:
686 /* Enable anti pop mode */
687 snd_soc_update_bits(codec, WM8960_APOP1,
688 WM8960_POBCTRL | WM8960_SOFT_ST |
689 WM8960_BUFDCOPEN,
690 WM8960_POBCTRL | WM8960_SOFT_ST |
691 WM8960_BUFDCOPEN);
692
693 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
694 reg = 0;
695 if (wm8960->lout1 && wm8960->lout1->power)
696 reg |= WM8960_PWR2_LOUT1;
697 if (wm8960->rout1 && wm8960->rout1->power)
698 reg |= WM8960_PWR2_ROUT1;
699 if (wm8960->out3 && wm8960->out3->power)
700 reg |= WM8960_PWR2_OUT3;
701 snd_soc_update_bits(codec, WM8960_POWER2,
702 WM8960_PWR2_LOUT1 |
703 WM8960_PWR2_ROUT1 |
704 WM8960_PWR2_OUT3, reg);
705
706 /* Enable VMID at 2*50k */
707 snd_soc_update_bits(codec, WM8960_POWER1,
708 WM8960_VMID_MASK, 0x80);
709
710 /* Ramp */
711 msleep(100);
712
713 /* Enable VREF */
714 snd_soc_update_bits(codec, WM8960_POWER1,
715 WM8960_VREF, WM8960_VREF);
716
717 msleep(100);
718 break;
719
720 case SND_SOC_BIAS_ON:
721 /* Enable anti-pop mode */
722 snd_soc_update_bits(codec, WM8960_APOP1,
723 WM8960_POBCTRL | WM8960_SOFT_ST |
724 WM8960_BUFDCOPEN,
725 WM8960_POBCTRL | WM8960_SOFT_ST |
726 WM8960_BUFDCOPEN);
727
728 /* Disable VMID and VREF */
729 snd_soc_update_bits(codec, WM8960_POWER1,
730 WM8960_VREF | WM8960_VMID_MASK, 0);
731 break;
732
bc45df2d 733 case SND_SOC_BIAS_OFF:
0ebe36c6 734 regcache_sync(wm8960->regmap);
bc45df2d 735 break;
913d7b4c
MB
736 default:
737 break;
738 }
739 break;
f2644a2c 740
913d7b4c 741 case SND_SOC_BIAS_STANDBY:
ce6120cc 742 switch (codec->dapm.bias_level) {
913d7b4c
MB
743 case SND_SOC_BIAS_PREPARE:
744 /* Disable HP discharge */
745 snd_soc_update_bits(codec, WM8960_APOP2,
746 WM8960_DISOP | WM8960_DRES_MASK,
747 0);
748
749 /* Disable anti-pop features */
750 snd_soc_update_bits(codec, WM8960_APOP1,
751 WM8960_POBCTRL | WM8960_SOFT_ST |
752 WM8960_BUFDCOPEN,
753 WM8960_POBCTRL | WM8960_SOFT_ST |
754 WM8960_BUFDCOPEN);
755 break;
756
757 default:
758 break;
759 }
760 break;
f2644a2c 761
913d7b4c 762 case SND_SOC_BIAS_OFF:
f2644a2c
MB
763 break;
764 }
765
ce6120cc 766 codec->dapm.bias_level = level;
f2644a2c
MB
767
768 return 0;
769}
770
771/* PLL divisors */
772struct _pll_div {
773 u32 pre_div:1;
774 u32 n:4;
775 u32 k:24;
776};
777
778/* The size in bits of the pll divide multiplied by 10
779 * to allow rounding later */
780#define FIXED_PLL_SIZE ((1 << 24) * 10)
781
782static int pll_factors(unsigned int source, unsigned int target,
783 struct _pll_div *pll_div)
784{
785 unsigned long long Kpart;
786 unsigned int K, Ndiv, Nmod;
787
788 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
789
790 /* Scale up target to PLL operating frequency */
791 target *= 4;
792
793 Ndiv = target / source;
794 if (Ndiv < 6) {
795 source >>= 1;
796 pll_div->pre_div = 1;
797 Ndiv = target / source;
798 } else
799 pll_div->pre_div = 0;
800
801 if ((Ndiv < 6) || (Ndiv > 12)) {
802 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
803 return -EINVAL;
804 }
805
806 pll_div->n = Ndiv;
807 Nmod = target % source;
808 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
809
810 do_div(Kpart, source);
811
812 K = Kpart & 0xFFFFFFFF;
813
814 /* Check if we need to round */
815 if ((K % 10) >= 5)
816 K += 5;
817
818 /* Move down to proper range now rounding is done */
819 K /= 10;
820
821 pll_div->k = K;
822
823 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
824 pll_div->n, pll_div->k, pll_div->pre_div);
825
826 return 0;
827}
828
85488037
MB
829static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
830 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB
831{
832 struct snd_soc_codec *codec = codec_dai->codec;
833 u16 reg;
834 static struct _pll_div pll_div;
835 int ret;
836
837 if (freq_in && freq_out) {
838 ret = pll_factors(freq_in, freq_out, &pll_div);
839 if (ret != 0)
840 return ret;
841 }
842
843 /* Disable the PLL: even if we are changing the frequency the
844 * PLL needs to be disabled while we do so. */
16b24881
AL
845 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
846 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
f2644a2c
MB
847
848 if (!freq_in || !freq_out)
849 return 0;
850
17a52fd6 851 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB
852 reg |= pll_div.pre_div << 4;
853 reg |= pll_div.n;
854
855 if (pll_div.k) {
856 reg |= 0x20;
857
85fa532b
MD
858 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
859 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
860 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
f2644a2c 861 }
17a52fd6 862 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB
863
864 /* Turn it on */
16b24881 865 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
f2644a2c 866 msleep(250);
16b24881 867 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
f2644a2c
MB
868
869 return 0;
870}
871
872static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
873 int div_id, int div)
874{
875 struct snd_soc_codec *codec = codec_dai->codec;
876 u16 reg;
877
878 switch (div_id) {
f2644a2c 879 case WM8960_SYSCLKDIV:
17a52fd6
MB
880 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
881 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB
882 break;
883 case WM8960_DACDIV:
17a52fd6
MB
884 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
885 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB
886 break;
887 case WM8960_OPCLKDIV:
17a52fd6
MB
888 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
889 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB
890 break;
891 case WM8960_DCLKDIV:
17a52fd6
MB
892 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
893 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB
894 break;
895 case WM8960_TOCLKSEL:
17a52fd6
MB
896 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
897 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB
898 break;
899 default:
900 return -EINVAL;
901 }
902
903 return 0;
904}
905
f0fba2ad
LG
906static int wm8960_set_bias_level(struct snd_soc_codec *codec,
907 enum snd_soc_bias_level level)
908{
909 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
910
911 return wm8960->set_bias_level(codec, level);
912}
913
f2644a2c
MB
914#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
915
916#define WM8960_FORMATS \
917 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
918 SNDRV_PCM_FMTBIT_S24_LE)
919
85e7652d 920static const struct snd_soc_dai_ops wm8960_dai_ops = {
f2644a2c
MB
921 .hw_params = wm8960_hw_params,
922 .digital_mute = wm8960_mute,
923 .set_fmt = wm8960_set_dai_fmt,
924 .set_clkdiv = wm8960_set_dai_clkdiv,
925 .set_pll = wm8960_set_dai_pll,
926};
927
f0fba2ad
LG
928static struct snd_soc_dai_driver wm8960_dai = {
929 .name = "wm8960-hifi",
f2644a2c
MB
930 .playback = {
931 .stream_name = "Playback",
932 .channels_min = 1,
933 .channels_max = 2,
934 .rates = WM8960_RATES,
935 .formats = WM8960_FORMATS,},
936 .capture = {
937 .stream_name = "Capture",
938 .channels_min = 1,
939 .channels_max = 2,
940 .rates = WM8960_RATES,
941 .formats = WM8960_FORMATS,},
942 .ops = &wm8960_dai_ops,
943 .symmetric_rates = 1,
944};
f2644a2c 945
f0fba2ad 946static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 947{
f0fba2ad 948 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
e2280c90 949 struct wm8960_data *pdata = &wm8960->pdata;
f2644a2c 950
e2280c90
ZW
951 if (pdata->capless)
952 wm8960->set_bias_level = wm8960_set_bias_level_capless;
953 else
954 wm8960->set_bias_level = wm8960_set_bias_level_out3;
f2644a2c 955
022658be 956 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
f0fba2ad
LG
957 ARRAY_SIZE(wm8960_snd_controls));
958 wm8960_add_widgets(codec);
f2644a2c
MB
959
960 return 0;
961}
962
f0fba2ad
LG
963static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
964 .probe = wm8960_probe,
f0fba2ad 965 .set_bias_level = wm8960_set_bias_level,
0a87a6e1 966 .suspend_bias_off = true,
0ebe36c6
MB
967};
968
969static const struct regmap_config wm8960_regmap = {
970 .reg_bits = 7,
971 .val_bits = 9,
972 .max_register = WM8960_PLL4,
973
974 .reg_defaults = wm8960_reg_defaults,
975 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
976 .cache_type = REGCACHE_RBTREE,
977
978 .volatile_reg = wm8960_volatile,
f0fba2ad
LG
979};
980
e2280c90
ZW
981static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
982 struct wm8960_data *pdata)
983{
984 const struct device_node *np = i2c->dev.of_node;
985
986 if (of_property_read_bool(np, "wlf,capless"))
987 pdata->capless = true;
988
989 if (of_property_read_bool(np, "wlf,shared-lrclk"))
990 pdata->shared_lrclk = true;
991}
992
7a79e94e
BP
993static int wm8960_i2c_probe(struct i2c_client *i2c,
994 const struct i2c_device_id *id)
f2644a2c 995{
37061631 996 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
f2644a2c 997 struct wm8960_priv *wm8960;
f0fba2ad 998 int ret;
f2644a2c 999
b9791c01
MB
1000 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1001 GFP_KERNEL);
f2644a2c
MB
1002 if (wm8960 == NULL)
1003 return -ENOMEM;
1004
c5e6f5fa 1005 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
0ebe36c6
MB
1006 if (IS_ERR(wm8960->regmap))
1007 return PTR_ERR(wm8960->regmap);
1008
e2280c90
ZW
1009 if (pdata)
1010 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1011 else if (i2c->dev.of_node)
1012 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1013
3ad5e861
ZW
1014 ret = wm8960_reset(wm8960->regmap);
1015 if (ret != 0) {
1016 dev_err(&i2c->dev, "Failed to issue reset\n");
1017 return ret;
1018 }
1019
1020 if (wm8960->pdata.shared_lrclk) {
37061631
MB
1021 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1022 0x4, 0x4);
1023 if (ret != 0) {
1024 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1025 ret);
1026 return ret;
1027 }
1028 }
1029
3ad5e861
ZW
1030 /* Latch the update bits */
1031 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1032 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1033 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1034 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1035 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1036 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1037 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1038 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1039 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1040 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1041
f2644a2c 1042 i2c_set_clientdata(i2c, wm8960);
f2644a2c 1043
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1044 ret = snd_soc_register_codec(&i2c->dev,
1045 &soc_codec_dev_wm8960, &wm8960_dai, 1);
b9791c01 1046
f0fba2ad 1047 return ret;
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1048}
1049
7a79e94e 1050static int wm8960_i2c_remove(struct i2c_client *client)
f2644a2c 1051{
f0fba2ad 1052 snd_soc_unregister_codec(&client->dev);
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1053 return 0;
1054}
1055
1056static const struct i2c_device_id wm8960_i2c_id[] = {
1057 { "wm8960", 0 },
1058 { }
1059};
1060MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1061
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1062static const struct of_device_id wm8960_of_match[] = {
1063 { .compatible = "wlf,wm8960", },
1064 { }
1065};
1066MODULE_DEVICE_TABLE(of, wm8960_of_match);
1067
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1068static struct i2c_driver wm8960_i2c_driver = {
1069 .driver = {
091edccf 1070 .name = "wm8960",
f2644a2c 1071 .owner = THIS_MODULE,
e2280c90 1072 .of_match_table = wm8960_of_match,
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1073 },
1074 .probe = wm8960_i2c_probe,
7a79e94e 1075 .remove = wm8960_i2c_remove,
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1076 .id_table = wm8960_i2c_id,
1077};
1078
3c010e60 1079module_i2c_driver(wm8960_i2c_driver);
f2644a2c 1080
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1081MODULE_DESCRIPTION("ASoC WM8960 driver");
1082MODULE_AUTHOR("Liam Girdwood");
1083MODULE_LICENSE("GPL");
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