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ASoC: Correct name of Speyside Main Speaker widget
[deliverable/linux.git] / sound / soc / codecs / wm8960.c
CommitLineData
f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Author: Liam Girdwood
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/i2c.h>
17#include <linux/platform_device.h>
5a0e3ad6 18#include <linux/slab.h>
f2644a2c
MB		 19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/soc.h>
f2644a2c
MB		 23#include <sound/initval.h>
24#include <sound/tlv.h>
b6877a47 25#include <sound/wm8960.h>
f2644a2c
MB		 26
27#include "wm8960.h"
28
29#define AUDIO_NAME "wm8960"
30
f2644a2c 31/* R25 - Power 1 */
913d7b4c 32#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 33#define WM8960_VREF 0x40
34
913d7b4c
MB		 35/* R26 - Power 2 */
36#define WM8960_PWR2_LOUT1 0x40
37#define WM8960_PWR2_ROUT1 0x20
38#define WM8960_PWR2_OUT3 0x02
39
f2644a2c
MB		 40/* R28 - Anti-pop 1 */
41#define WM8960_POBCTRL 0x80
42#define WM8960_BUFDCOPEN 0x10
43#define WM8960_BUFIOEN 0x08
44#define WM8960_SOFT_ST 0x04
45#define WM8960_HPSTBY 0x01
46
47/* R29 - Anti-pop 2 */
48#define WM8960_DISOP 0x40
913d7b4c 49#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 50
51/*
52 * wm8960 register cache
53 * We can't read the WM8960 register space when we are
54 * using 2 wire for device control, so we cache them instead.
55 */
56static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
57 0x0097, 0x0097, 0x0000, 0x0000,
58 0x0000, 0x0008, 0x0000, 0x000a,
59 0x01c0, 0x0000, 0x00ff, 0x00ff,
60 0x0000, 0x0000, 0x0000, 0x0000,
61 0x0000, 0x007b, 0x0100, 0x0032,
62 0x0000, 0x00c3, 0x00c3, 0x01c0,
63 0x0000, 0x0000, 0x0000, 0x0000,
64 0x0000, 0x0000, 0x0000, 0x0000,
65 0x0100, 0x0100, 0x0050, 0x0050,
66 0x0050, 0x0050, 0x0000, 0x0000,
67 0x0000, 0x0000, 0x0040, 0x0000,
68 0x0000, 0x0050, 0x0050, 0x0000,
69 0x0002, 0x0037, 0x004d, 0x0080,
70 0x0008, 0x0031, 0x0026, 0x00e9,
71};
72
73struct wm8960_priv {
f0fba2ad 74 enum snd_soc_control_type control_type;
f0fba2ad
LG		 75 int (*set_bias_level)(struct snd_soc_codec *,
76 enum snd_soc_bias_level level);
913d7b4c
MB		 77 struct snd_soc_dapm_widget *lout1;
78 struct snd_soc_dapm_widget *rout1;
79 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 80 bool deemph;
81 int playback_fs;
f2644a2c
MB		 82};
83
17a52fd6 84#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 85
86/* enumerated controls */
f2644a2c
MB		 87static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
88 "Right Inverted", "Stereo Inversion"};
89static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
90static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
91static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
92static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
93
94static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 95 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
96 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
97 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
98 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
99 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
100 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
101};
102
afd6d36a
MB		 103static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
104
105static int wm8960_set_deemph(struct snd_soc_codec *codec)
106{
107 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
108 int val, i, best;
109
110 /* If we're using deemphasis select the nearest available sample
111 * rate.
112 */
113 if (wm8960->deemph) {
114 best = 1;
115 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
116 if (abs(deemph_settings[i] - wm8960->playback_fs) <
117 abs(deemph_settings[best] - wm8960->playback_fs))
118 best = i;
119 }
120
121 val = best << 1;
122 } else {
123 val = 0;
124 }
125
126 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
127
128 return snd_soc_update_bits(codec, WM8960_DACCTL1,
129 0x6, val);
130}
131
132static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
133 struct snd_ctl_elem_value *ucontrol)
134{
135 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
136 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
137
3f343f85
DA		 138 ucontrol->value.enumerated.item[0] = wm8960->deemph;
139 return 0;
afd6d36a
MB		 140}
141
142static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
143 struct snd_ctl_elem_value *ucontrol)
144{
145 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
146 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
147 int deemph = ucontrol->value.enumerated.item[0];
148
149 if (deemph > 1)
150 return -EINVAL;
151
152 wm8960->deemph = deemph;
153
154 return wm8960_set_deemph(codec);
155}
156
f2644a2c
MB		 157static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
158static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
159static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
160static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
161
162static const struct snd_kcontrol_new wm8960_snd_controls[] = {
163SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
164 0, 63, 0, adc_tlv),
165SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
166 6, 1, 0),
167SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
168 7, 1, 0),
169
170SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
171 0, 255, 0, dac_tlv),
172
173SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
174 0, 127, 0, out_tlv),
175SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
176 7, 1, 0),
177
178SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
179 0, 127, 0, out_tlv),
180SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
181 7, 1, 0),
182SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
183SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
184
185SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 186SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 187SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
188
189SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 190SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
191 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 192
4faaa8d9
MB		 193SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
194SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 195SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
196SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
197
4faaa8d9 198SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 199SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
200SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
201SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
202SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 203SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 204SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
205SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
206
207SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
208SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
209
210SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
211 0, 127, 0),
212
213SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
214 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
215SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
216 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
217SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
218 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
219SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
220 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
221};
222
223static const struct snd_kcontrol_new wm8960_lin_boost[] = {
224SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
225SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
226SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
227};
228
229static const struct snd_kcontrol_new wm8960_lin[] = {
230SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
231};
232
233static const struct snd_kcontrol_new wm8960_rin_boost[] = {
234SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
235SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
236SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
237};
238
239static const struct snd_kcontrol_new wm8960_rin[] = {
240SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
241};
242
243static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
244SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
245SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
246SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
247};
248
249static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
250SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
251SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
252SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
253};
254
255static const struct snd_kcontrol_new wm8960_mono_out[] = {
256SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
257SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
258};
259
260static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
261SND_SOC_DAPM_INPUT("LINPUT1"),
262SND_SOC_DAPM_INPUT("RINPUT1"),
263SND_SOC_DAPM_INPUT("LINPUT2"),
264SND_SOC_DAPM_INPUT("RINPUT2"),
265SND_SOC_DAPM_INPUT("LINPUT3"),
266SND_SOC_DAPM_INPUT("RINPUT3"),
267
268SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0),
269
270SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
271 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
272SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
273 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
274
275SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
276 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
277SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
278 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
279
280SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
281SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
282
283SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
284SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
285
286SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
287 &wm8960_loutput_mixer[0],
288 ARRAY_SIZE(wm8960_loutput_mixer)),
289SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
290 &wm8960_routput_mixer[0],
291 ARRAY_SIZE(wm8960_routput_mixer)),
292
f2644a2c
MB		 293SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
294SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
295
296SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
297SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
298
299SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
300SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
301
302SND_SOC_DAPM_OUTPUT("SPK_LP"),
303SND_SOC_DAPM_OUTPUT("SPK_LN"),
304SND_SOC_DAPM_OUTPUT("HP_L"),
305SND_SOC_DAPM_OUTPUT("HP_R"),
306SND_SOC_DAPM_OUTPUT("SPK_RP"),
307SND_SOC_DAPM_OUTPUT("SPK_RN"),
308SND_SOC_DAPM_OUTPUT("OUT3"),
309};
310
913d7b4c
MB		 311static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
312SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
313 &wm8960_mono_out[0],
314 ARRAY_SIZE(wm8960_mono_out)),
315};
316
317/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
318static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
319SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
320};
321
f2644a2c
MB		 322static const struct snd_soc_dapm_route audio_paths[] = {
323 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
324 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
325 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
326
327 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
328 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
329 { "Left Input Mixer", NULL, "LINPUT2" },
330 { "Left Input Mixer", NULL, "LINPUT3" },
331
332 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
333 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
334 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
335
336 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
337 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
338 { "Right Input Mixer", NULL, "RINPUT2" },
339 { "Right Input Mixer", NULL, "LINPUT3" },
340
341 { "Left ADC", NULL, "Left Input Mixer" },
342 { "Right ADC", NULL, "Right Input Mixer" },
343
344 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
345 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
346 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
347
348 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
349 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
350 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
351
f2644a2c
MB		 352 { "LOUT1 PGA", NULL, "Left Output Mixer" },
353 { "ROUT1 PGA", NULL, "Right Output Mixer" },
354
355 { "HP_L", NULL, "LOUT1 PGA" },
356 { "HP_R", NULL, "ROUT1 PGA" },
357
358 { "Left Speaker PGA", NULL, "Left Output Mixer" },
359 { "Right Speaker PGA", NULL, "Right Output Mixer" },
360
361 { "Left Speaker Output", NULL, "Left Speaker PGA" },
362 { "Right Speaker Output", NULL, "Right Speaker PGA" },
363
364 { "SPK_LN", NULL, "Left Speaker Output" },
365 { "SPK_LP", NULL, "Left Speaker Output" },
366 { "SPK_RN", NULL, "Right Speaker Output" },
367 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 368};
369
370static const struct snd_soc_dapm_route audio_paths_out3[] = {
371 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
372 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 373
374 { "OUT3", NULL, "Mono Output Mixer", }
375};
376
913d7b4c
MB		 377static const struct snd_soc_dapm_route audio_paths_capless[] = {
378 { "HP_L", NULL, "OUT3 VMID" },
379 { "HP_R", NULL, "OUT3 VMID" },
380
381 { "OUT3 VMID", NULL, "Left Output Mixer" },
382 { "OUT3 VMID", NULL, "Right Output Mixer" },
383};
384
f2644a2c
MB		 385static int wm8960_add_widgets(struct snd_soc_codec *codec)
386{
913d7b4c 387 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 388 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
ce6120cc 389 struct snd_soc_dapm_context *dapm = &codec->dapm;
913d7b4c
MB		 390 struct snd_soc_dapm_widget *w;
391
ce6120cc 392 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
f2644a2c
MB		 393 ARRAY_SIZE(wm8960_dapm_widgets));
394
ce6120cc 395 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 396
913d7b4c
MB		 397 /* In capless mode OUT3 is used to provide VMID for the
398 * headphone outputs, otherwise it is used as a mono mixer.
399 */
400 if (pdata && pdata->capless) {
ce6120cc 401 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
913d7b4c
MB		 402 ARRAY_SIZE(wm8960_dapm_widgets_capless));
403
ce6120cc 404 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
913d7b4c
MB		 405 ARRAY_SIZE(audio_paths_capless));
406 } else {
ce6120cc 407 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
913d7b4c
MB		 408 ARRAY_SIZE(wm8960_dapm_widgets_out3));
409
ce6120cc 410 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
913d7b4c
MB		 411 ARRAY_SIZE(audio_paths_out3));
412 }
413
414 /* We need to power up the headphone output stage out of
415 * sequence for capless mode. To save scanning the widget
416 * list each time to find the desired power state do so now
417 * and save the result.
418 */
97c866de
JN		 419 list_for_each_entry(w, &codec->card->widgets, list) {
420 if (w->dapm != &codec->dapm)
421 continue;
913d7b4c
MB		 422 if (strcmp(w->name, "LOUT1 PGA") == 0)
423 wm8960->lout1 = w;
424 if (strcmp(w->name, "ROUT1 PGA") == 0)
425 wm8960->rout1 = w;
426 if (strcmp(w->name, "OUT3 VMID") == 0)
427 wm8960->out3 = w;
428 }
429
f2644a2c
MB		 430 return 0;
431}
432
433static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
434 unsigned int fmt)
435{
436 struct snd_soc_codec *codec = codec_dai->codec;
437 u16 iface = 0;
438
439 /* set master/slave audio interface */
440 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
441 case SND_SOC_DAIFMT_CBM_CFM:
442 iface |= 0x0040;
443 break;
444 case SND_SOC_DAIFMT_CBS_CFS:
445 break;
446 default:
447 return -EINVAL;
448 }
449
450 /* interface format */
451 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
452 case SND_SOC_DAIFMT_I2S:
453 iface |= 0x0002;
454 break;
455 case SND_SOC_DAIFMT_RIGHT_J:
456 break;
457 case SND_SOC_DAIFMT_LEFT_J:
458 iface |= 0x0001;
459 break;
460 case SND_SOC_DAIFMT_DSP_A:
461 iface |= 0x0003;
462 break;
463 case SND_SOC_DAIFMT_DSP_B:
464 iface |= 0x0013;
465 break;
466 default:
467 return -EINVAL;
468 }
469
470 /* clock inversion */
471 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
472 case SND_SOC_DAIFMT_NB_NF:
473 break;
474 case SND_SOC_DAIFMT_IB_IF:
475 iface |= 0x0090;
476 break;
477 case SND_SOC_DAIFMT_IB_NF:
478 iface |= 0x0080;
479 break;
480 case SND_SOC_DAIFMT_NB_IF:
481 iface |= 0x0010;
482 break;
483 default:
484 return -EINVAL;
485 }
486
487 /* set iface */
17a52fd6 488 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 489 return 0;
490}
491
db059c0f
MB		 492static struct {
493 int rate;
494 unsigned int val;
495} alc_rates[] = {
496 { 48000, 0 },
497 { 44100, 0 },
498 { 32000, 1 },
499 { 22050, 2 },
500 { 24000, 2 },
501 { 16000, 3 },
502 { 11250, 4 },
503 { 12000, 4 },
504 { 8000, 5 },
505};
506
f2644a2c
MB		 507static int wm8960_hw_params(struct snd_pcm_substream *substream,
508 struct snd_pcm_hw_params *params,
509 struct snd_soc_dai *dai)
510{
511 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 512 struct snd_soc_codec *codec = rtd->codec;
afd6d36a 513 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 514 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
db059c0f 515 int i;
f2644a2c
MB		 516
517 /* bit size */
518 switch (params_format(params)) {
519 case SNDRV_PCM_FORMAT_S16_LE:
520 break;
521 case SNDRV_PCM_FORMAT_S20_3LE:
522 iface |= 0x0004;
523 break;
524 case SNDRV_PCM_FORMAT_S24_LE:
525 iface |= 0x0008;
526 break;
527 }
528
afd6d36a
MB		 529 /* Update filters for the new rate */
530 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
531 wm8960->playback_fs = params_rate(params);
532 wm8960_set_deemph(codec);
db059c0f
MB		 533 } else {
534 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
535 if (alc_rates[i].rate == params_rate(params))
536 snd_soc_update_bits(codec,
537 WM8960_ADDCTL3, 0x7,
538 alc_rates[i].val);
afd6d36a
MB		 539 }
540
f2644a2c 541 /* set iface */
17a52fd6 542 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 543 return 0;
544}
545
546static int wm8960_mute(struct snd_soc_dai *dai, int mute)
547{
548 struct snd_soc_codec *codec = dai->codec;
17a52fd6 549 u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7;
f2644a2c
MB		 550
551 if (mute)
17a52fd6 552 snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8);
f2644a2c 553 else
17a52fd6 554 snd_soc_write(codec, WM8960_DACCTL1, mute_reg);
f2644a2c
MB		 555 return 0;
556}
557
913d7b4c
MB		 558static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
559 enum snd_soc_bias_level level)
f2644a2c 560{
f2644a2c
MB		 561 u16 reg;
562
563 switch (level) {
564 case SND_SOC_BIAS_ON:
565 break;
566
567 case SND_SOC_BIAS_PREPARE:
568 /* Set VMID to 2x50k */
17a52fd6 569 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c
MB		 570 reg &= ~0x180;
571 reg |= 0x80;
17a52fd6 572 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 573 break;
574
575 case SND_SOC_BIAS_STANDBY:
ce6120cc 576 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
bc45df2d
AL		 577 snd_soc_cache_sync(codec);
578
f2644a2c 579 /* Enable anti-pop features */
17a52fd6 580 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 581 WM8960_POBCTRL | WM8960_SOFT_ST |
582 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 583
584 /* Enable & ramp VMID at 2x50k */
17a52fd6 585 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c 586 reg |= 0x80;
17a52fd6 587 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 588 msleep(100);
589
590 /* Enable VREF */
17a52fd6 591 snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF);
f2644a2c
MB		 592
593 /* Disable anti-pop features */
17a52fd6 594 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 595 }
596
597 /* Set VMID to 2x250k */
17a52fd6 598 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c
MB		 599 reg &= ~0x180;
600 reg |= 0x100;
17a52fd6 601 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 602 break;
603
604 case SND_SOC_BIAS_OFF:
605 /* Enable anti-pop features */
17a52fd6 606 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 607 WM8960_POBCTRL | WM8960_SOFT_ST |
608 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
609
610 /* Disable VMID and VREF, let them discharge */
17a52fd6 611 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 612 msleep(600);
913d7b4c
MB		 613 break;
614 }
615
ce6120cc 616 codec->dapm.bias_level = level;
913d7b4c
MB		 617
618 return 0;
619}
620
621static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
622 enum snd_soc_bias_level level)
623{
b2c812e2 624 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 625 int reg;
626
627 switch (level) {
628 case SND_SOC_BIAS_ON:
629 break;
630
631 case SND_SOC_BIAS_PREPARE:
ce6120cc 632 switch (codec->dapm.bias_level) {
913d7b4c
MB		 633 case SND_SOC_BIAS_STANDBY:
634 /* Enable anti pop mode */
635 snd_soc_update_bits(codec, WM8960_APOP1,
636 WM8960_POBCTRL | WM8960_SOFT_ST |
637 WM8960_BUFDCOPEN,
638 WM8960_POBCTRL | WM8960_SOFT_ST |
639 WM8960_BUFDCOPEN);
640
641 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
642 reg = 0;
643 if (wm8960->lout1 && wm8960->lout1->power)
644 reg |= WM8960_PWR2_LOUT1;
645 if (wm8960->rout1 && wm8960->rout1->power)
646 reg |= WM8960_PWR2_ROUT1;
647 if (wm8960->out3 && wm8960->out3->power)
648 reg |= WM8960_PWR2_OUT3;
649 snd_soc_update_bits(codec, WM8960_POWER2,
650 WM8960_PWR2_LOUT1 |
651 WM8960_PWR2_ROUT1 |
652 WM8960_PWR2_OUT3, reg);
653
654 /* Enable VMID at 2*50k */
655 snd_soc_update_bits(codec, WM8960_POWER1,
656 WM8960_VMID_MASK, 0x80);
657
658 /* Ramp */
659 msleep(100);
660
661 /* Enable VREF */
662 snd_soc_update_bits(codec, WM8960_POWER1,
663 WM8960_VREF, WM8960_VREF);
664
665 msleep(100);
666 break;
667
668 case SND_SOC_BIAS_ON:
669 /* Enable anti-pop mode */
670 snd_soc_update_bits(codec, WM8960_APOP1,
671 WM8960_POBCTRL | WM8960_SOFT_ST |
672 WM8960_BUFDCOPEN,
673 WM8960_POBCTRL | WM8960_SOFT_ST |
674 WM8960_BUFDCOPEN);
675
676 /* Disable VMID and VREF */
677 snd_soc_update_bits(codec, WM8960_POWER1,
678 WM8960_VREF | WM8960_VMID_MASK, 0);
679 break;
680
bc45df2d
AL		 681 case SND_SOC_BIAS_OFF:
682 snd_soc_cache_sync(codec);
683 break;
913d7b4c
MB		 684 default:
685 break;
686 }
687 break;
f2644a2c 688
913d7b4c 689 case SND_SOC_BIAS_STANDBY:
ce6120cc 690 switch (codec->dapm.bias_level) {
913d7b4c
MB		 691 case SND_SOC_BIAS_PREPARE:
692 /* Disable HP discharge */
693 snd_soc_update_bits(codec, WM8960_APOP2,
694 WM8960_DISOP | WM8960_DRES_MASK,
695 0);
696
697 /* Disable anti-pop features */
698 snd_soc_update_bits(codec, WM8960_APOP1,
699 WM8960_POBCTRL | WM8960_SOFT_ST |
700 WM8960_BUFDCOPEN,
701 WM8960_POBCTRL | WM8960_SOFT_ST |
702 WM8960_BUFDCOPEN);
703 break;
704
705 default:
706 break;
707 }
708 break;
f2644a2c 709
913d7b4c 710 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 711 break;
712 }
713
ce6120cc 714 codec->dapm.bias_level = level;
f2644a2c
MB		 715
716 return 0;
717}
718
719/* PLL divisors */
720struct _pll_div {
721 u32 pre_div:1;
722 u32 n:4;
723 u32 k:24;
724};
725
726/* The size in bits of the pll divide multiplied by 10
727 * to allow rounding later */
728#define FIXED_PLL_SIZE ((1 << 24) * 10)
729
730static int pll_factors(unsigned int source, unsigned int target,
731 struct _pll_div *pll_div)
732{
733 unsigned long long Kpart;
734 unsigned int K, Ndiv, Nmod;
735
736 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
737
738 /* Scale up target to PLL operating frequency */
739 target *= 4;
740
741 Ndiv = target / source;
742 if (Ndiv < 6) {
743 source >>= 1;
744 pll_div->pre_div = 1;
745 Ndiv = target / source;
746 } else
747 pll_div->pre_div = 0;
748
749 if ((Ndiv < 6) || (Ndiv > 12)) {
750 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
751 return -EINVAL;
752 }
753
754 pll_div->n = Ndiv;
755 Nmod = target % source;
756 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
757
758 do_div(Kpart, source);
759
760 K = Kpart & 0xFFFFFFFF;
761
762 /* Check if we need to round */
763 if ((K % 10) >= 5)
764 K += 5;
765
766 /* Move down to proper range now rounding is done */
767 K /= 10;
768
769 pll_div->k = K;
770
771 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
772 pll_div->n, pll_div->k, pll_div->pre_div);
773
774 return 0;
775}
776
85488037
MB		 777static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
778 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 779{
780 struct snd_soc_codec *codec = codec_dai->codec;
781 u16 reg;
782 static struct _pll_div pll_div;
783 int ret;
784
785 if (freq_in && freq_out) {
786 ret = pll_factors(freq_in, freq_out, &pll_div);
787 if (ret != 0)
788 return ret;
789 }
790
791 /* Disable the PLL: even if we are changing the frequency the
792 * PLL needs to be disabled while we do so. */
17a52fd6
MB		 793 snd_soc_write(codec, WM8960_CLOCK1,
794 snd_soc_read(codec, WM8960_CLOCK1) & ~1);
795 snd_soc_write(codec, WM8960_POWER2,
796 snd_soc_read(codec, WM8960_POWER2) & ~1);
f2644a2c
MB		 797
798 if (!freq_in || !freq_out)
799 return 0;
800
17a52fd6 801 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 802 reg |= pll_div.pre_div << 4;
803 reg |= pll_div.n;
804
805 if (pll_div.k) {
806 reg |= 0x20;
807
17a52fd6
MB		 808 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
809 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
810 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
f2644a2c 811 }
17a52fd6 812 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 813
814 /* Turn it on */
17a52fd6
MB		 815 snd_soc_write(codec, WM8960_POWER2,
816 snd_soc_read(codec, WM8960_POWER2) | 1);
f2644a2c 817 msleep(250);
17a52fd6
MB		 818 snd_soc_write(codec, WM8960_CLOCK1,
819 snd_soc_read(codec, WM8960_CLOCK1) | 1);
f2644a2c
MB		 820
821 return 0;
822}
823
824static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
825 int div_id, int div)
826{
827 struct snd_soc_codec *codec = codec_dai->codec;
828 u16 reg;
829
830 switch (div_id) {
f2644a2c 831 case WM8960_SYSCLKDIV:
17a52fd6
MB		 832 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
833 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 834 break;
835 case WM8960_DACDIV:
17a52fd6
MB		 836 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
837 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 838 break;
839 case WM8960_OPCLKDIV:
17a52fd6
MB		 840 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
841 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 842 break;
843 case WM8960_DCLKDIV:
17a52fd6
MB		 844 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
845 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 846 break;
847 case WM8960_TOCLKSEL:
17a52fd6
MB		 848 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
849 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 850 break;
851 default:
852 return -EINVAL;
853 }
854
855 return 0;
856}
857
f0fba2ad
LG		 858static int wm8960_set_bias_level(struct snd_soc_codec *codec,
859 enum snd_soc_bias_level level)
860{
861 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
862
863 return wm8960->set_bias_level(codec, level);
864}
865
f2644a2c
MB		 866#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
867
868#define WM8960_FORMATS \
869 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
870 SNDRV_PCM_FMTBIT_S24_LE)
871
872static struct snd_soc_dai_ops wm8960_dai_ops = {
873 .hw_params = wm8960_hw_params,
874 .digital_mute = wm8960_mute,
875 .set_fmt = wm8960_set_dai_fmt,
876 .set_clkdiv = wm8960_set_dai_clkdiv,
877 .set_pll = wm8960_set_dai_pll,
878};
879
f0fba2ad
LG		 880static struct snd_soc_dai_driver wm8960_dai = {
881 .name = "wm8960-hifi",
f2644a2c
MB		 882 .playback = {
883 .stream_name = "Playback",
884 .channels_min = 1,
885 .channels_max = 2,
886 .rates = WM8960_RATES,
887 .formats = WM8960_FORMATS,},
888 .capture = {
889 .stream_name = "Capture",
890 .channels_min = 1,
891 .channels_max = 2,
892 .rates = WM8960_RATES,
893 .formats = WM8960_FORMATS,},
894 .ops = &wm8960_dai_ops,
895 .symmetric_rates = 1,
896};
f2644a2c 897
f0fba2ad 898static int wm8960_suspend(struct snd_soc_codec *codec, pm_message_t state)
f2644a2c 899{
f0fba2ad 900 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 901
f0fba2ad 902 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 903 return 0;
904}
905
f0fba2ad 906static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 907{
f0fba2ad 908 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 909
f0fba2ad 910 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 911 return 0;
912}
913
f0fba2ad 914static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 915{
f0fba2ad
LG		 916 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
917 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c
MB		 918 int ret;
919 u16 reg;
920
f0fba2ad 921 wm8960->set_bias_level = wm8960_set_bias_level_out3;
913d7b4c 922
f2644a2c
MB		 923 if (!pdata) {
924 dev_warn(codec->dev, "No platform data supplied\n");
925 } else {
926 if (pdata->dres > WM8960_DRES_MAX) {
927 dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
928 pdata->dres = 0;
929 }
913d7b4c
MB		 930
931 if (pdata->capless)
f0fba2ad 932 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 933 }
934
f0fba2ad 935 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
17a52fd6
MB		 936 if (ret < 0) {
937 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 938 return ret;
17a52fd6
MB		 939 }
940
f2644a2c
MB		 941 ret = wm8960_reset(codec);
942 if (ret < 0) {
943 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 944 return ret;
f2644a2c
MB		 945 }
946
f0fba2ad 947 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 948
949 /* Latch the update bits */
17a52fd6
MB		 950 reg = snd_soc_read(codec, WM8960_LINVOL);
951 snd_soc_write(codec, WM8960_LINVOL, reg | 0x100);
952 reg = snd_soc_read(codec, WM8960_RINVOL);
953 snd_soc_write(codec, WM8960_RINVOL, reg | 0x100);
954 reg = snd_soc_read(codec, WM8960_LADC);
955 snd_soc_write(codec, WM8960_LADC, reg | 0x100);
956 reg = snd_soc_read(codec, WM8960_RADC);
957 snd_soc_write(codec, WM8960_RADC, reg | 0x100);
958 reg = snd_soc_read(codec, WM8960_LDAC);
959 snd_soc_write(codec, WM8960_LDAC, reg | 0x100);
960 reg = snd_soc_read(codec, WM8960_RDAC);
961 snd_soc_write(codec, WM8960_RDAC, reg | 0x100);
962 reg = snd_soc_read(codec, WM8960_LOUT1);
963 snd_soc_write(codec, WM8960_LOUT1, reg | 0x100);
964 reg = snd_soc_read(codec, WM8960_ROUT1);
965 snd_soc_write(codec, WM8960_ROUT1, reg | 0x100);
966 reg = snd_soc_read(codec, WM8960_LOUT2);
967 snd_soc_write(codec, WM8960_LOUT2, reg | 0x100);
968 reg = snd_soc_read(codec, WM8960_ROUT2);
969 snd_soc_write(codec, WM8960_ROUT2, reg | 0x100);
f2644a2c 970
f0fba2ad
LG		 971 snd_soc_add_controls(codec, wm8960_snd_controls,
972 ARRAY_SIZE(wm8960_snd_controls));
973 wm8960_add_widgets(codec);
f2644a2c
MB		 974
975 return 0;
976}
977
f0fba2ad
LG		 978/* power down chip */
979static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 980{
f0fba2ad
LG		 981 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
982
983 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
984 return 0;
f2644a2c
MB		 985}
986
f0fba2ad
LG		 987static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
988 .probe = wm8960_probe,
989 .remove = wm8960_remove,
990 .suspend = wm8960_suspend,
991 .resume = wm8960_resume,
992 .set_bias_level = wm8960_set_bias_level,
993 .reg_cache_size = ARRAY_SIZE(wm8960_reg),
994 .reg_word_size = sizeof(u16),
995 .reg_cache_default = wm8960_reg,
996};
997
998#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c
MB		 999static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
1000 const struct i2c_device_id *id)
1001{
1002 struct wm8960_priv *wm8960;
f0fba2ad 1003 int ret;
f2644a2c
MB		 1004
1005 wm8960 = kzalloc(sizeof(struct wm8960_priv), GFP_KERNEL);
1006 if (wm8960 == NULL)
1007 return -ENOMEM;
1008
f2644a2c 1009 i2c_set_clientdata(i2c, wm8960);
7f984b55 1010 wm8960->control_type = SND_SOC_I2C;
f2644a2c 1011
f0fba2ad
LG		 1012 ret = snd_soc_register_codec(&i2c->dev,
1013 &soc_codec_dev_wm8960, &wm8960_dai, 1);
1014 if (ret < 0)
1015 kfree(wm8960);
1016 return ret;
f2644a2c
MB		 1017}
1018
1019static __devexit int wm8960_i2c_remove(struct i2c_client *client)
1020{
f0fba2ad
LG		 1021 snd_soc_unregister_codec(&client->dev);
1022 kfree(i2c_get_clientdata(client));
f2644a2c
MB		 1023 return 0;
1024}
1025
1026static const struct i2c_device_id wm8960_i2c_id[] = {
1027 { "wm8960", 0 },
1028 { }
1029};
1030MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1031
1032static struct i2c_driver wm8960_i2c_driver = {
1033 .driver = {
f0fba2ad 1034 .name = "wm8960-codec",
f2644a2c
MB		 1035 .owner = THIS_MODULE,
1036 },
1037 .probe = wm8960_i2c_probe,
1038 .remove = __devexit_p(wm8960_i2c_remove),
1039 .id_table = wm8960_i2c_id,
1040};
f0fba2ad 1041#endif
f2644a2c
MB		 1042
1043static int __init wm8960_modinit(void)
1044{
f0fba2ad
LG		 1045 int ret = 0;
1046#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c
MB		 1047 ret = i2c_add_driver(&wm8960_i2c_driver);
1048 if (ret != 0) {
1049 printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
1050 ret);
1051 }
f0fba2ad 1052#endif
f2644a2c
MB		 1053 return ret;
1054}
1055module_init(wm8960_modinit);
1056
1057static void __exit wm8960_exit(void)
1058{
f0fba2ad 1059#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c 1060 i2c_del_driver(&wm8960_i2c_driver);
f0fba2ad 1061#endif
f2644a2c
MB		 1062}
1063module_exit(wm8960_exit);
1064
f2644a2c
MB		 1065MODULE_DESCRIPTION("ASoC WM8960 driver");
1066MODULE_AUTHOR("Liam Girdwood");
1067MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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