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Merge branches 'fixes', 'pgt-next' and 'versatile' into devel
[deliverable/linux.git] / sound / soc / codecs / wm8960.c
CommitLineData
f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Author: Liam Girdwood
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/i2c.h>
17#include <linux/platform_device.h>
5a0e3ad6 18#include <linux/slab.h>
f2644a2c
MB		 19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/soc.h>
f2644a2c
MB		 23#include <sound/initval.h>
24#include <sound/tlv.h>
b6877a47 25#include <sound/wm8960.h>
f2644a2c
MB		 26
27#include "wm8960.h"
28
29#define AUDIO_NAME "wm8960"
30
f2644a2c 31/* R25 - Power 1 */
913d7b4c 32#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 33#define WM8960_VREF 0x40
34
913d7b4c
MB		 35/* R26 - Power 2 */
36#define WM8960_PWR2_LOUT1 0x40
37#define WM8960_PWR2_ROUT1 0x20
38#define WM8960_PWR2_OUT3 0x02
39
f2644a2c
MB		 40/* R28 - Anti-pop 1 */
41#define WM8960_POBCTRL 0x80
42#define WM8960_BUFDCOPEN 0x10
43#define WM8960_BUFIOEN 0x08
44#define WM8960_SOFT_ST 0x04
45#define WM8960_HPSTBY 0x01
46
47/* R29 - Anti-pop 2 */
48#define WM8960_DISOP 0x40
913d7b4c 49#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 50
51/*
52 * wm8960 register cache
53 * We can't read the WM8960 register space when we are
54 * using 2 wire for device control, so we cache them instead.
55 */
56static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
57 0x0097, 0x0097, 0x0000, 0x0000,
58 0x0000, 0x0008, 0x0000, 0x000a,
59 0x01c0, 0x0000, 0x00ff, 0x00ff,
60 0x0000, 0x0000, 0x0000, 0x0000,
61 0x0000, 0x007b, 0x0100, 0x0032,
62 0x0000, 0x00c3, 0x00c3, 0x01c0,
63 0x0000, 0x0000, 0x0000, 0x0000,
64 0x0000, 0x0000, 0x0000, 0x0000,
65 0x0100, 0x0100, 0x0050, 0x0050,
66 0x0050, 0x0050, 0x0000, 0x0000,
67 0x0000, 0x0000, 0x0040, 0x0000,
68 0x0000, 0x0050, 0x0050, 0x0000,
69 0x0002, 0x0037, 0x004d, 0x0080,
70 0x0008, 0x0031, 0x0026, 0x00e9,
71};
72
73struct wm8960_priv {
f0fba2ad
LG		 74 enum snd_soc_control_type control_type;
75 void *control_data;
76 int (*set_bias_level)(struct snd_soc_codec *,
77 enum snd_soc_bias_level level);
913d7b4c
MB		 78 struct snd_soc_dapm_widget *lout1;
79 struct snd_soc_dapm_widget *rout1;
80 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 81 bool deemph;
82 int playback_fs;
f2644a2c
MB		 83};
84
17a52fd6 85#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 86
87/* enumerated controls */
f2644a2c
MB		 88static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
89 "Right Inverted", "Stereo Inversion"};
90static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
91static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
92static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
93static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
94
95static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 96 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
97 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
98 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
99 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
100 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
101 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
102};
103
afd6d36a
MB		 104static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
105
106static int wm8960_set_deemph(struct snd_soc_codec *codec)
107{
108 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
109 int val, i, best;
110
111 /* If we're using deemphasis select the nearest available sample
112 * rate.
113 */
114 if (wm8960->deemph) {
115 best = 1;
116 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
117 if (abs(deemph_settings[i] - wm8960->playback_fs) <
118 abs(deemph_settings[best] - wm8960->playback_fs))
119 best = i;
120 }
121
122 val = best << 1;
123 } else {
124 val = 0;
125 }
126
127 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
128
129 return snd_soc_update_bits(codec, WM8960_DACCTL1,
130 0x6, val);
131}
132
133static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
134 struct snd_ctl_elem_value *ucontrol)
135{
136 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
137 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
138
3f343f85
DA		 139 ucontrol->value.enumerated.item[0] = wm8960->deemph;
140 return 0;
afd6d36a
MB		 141}
142
143static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
144 struct snd_ctl_elem_value *ucontrol)
145{
146 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
147 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
148 int deemph = ucontrol->value.enumerated.item[0];
149
150 if (deemph > 1)
151 return -EINVAL;
152
153 wm8960->deemph = deemph;
154
155 return wm8960_set_deemph(codec);
156}
157
f2644a2c
MB		 158static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
159static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
160static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
161static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
162
163static const struct snd_kcontrol_new wm8960_snd_controls[] = {
164SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
165 0, 63, 0, adc_tlv),
166SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
167 6, 1, 0),
168SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
169 7, 1, 0),
170
171SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
172 0, 255, 0, dac_tlv),
173
174SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
175 0, 127, 0, out_tlv),
176SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
177 7, 1, 0),
178
179SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
180 0, 127, 0, out_tlv),
181SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
182 7, 1, 0),
183SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
184SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
185
186SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 187SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 188SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
189
190SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 191SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
192 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 193
4faaa8d9
MB		 194SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
195SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 196SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
197SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
198
4faaa8d9 199SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 200SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
201SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
202SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
203SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 204SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 205SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
206SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
207
208SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
209SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
210
211SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
212 0, 127, 0),
213
214SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
215 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
216SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
217 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
218SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
219 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
220SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
221 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
222};
223
224static const struct snd_kcontrol_new wm8960_lin_boost[] = {
225SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
226SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
227SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
228};
229
230static const struct snd_kcontrol_new wm8960_lin[] = {
231SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
232};
233
234static const struct snd_kcontrol_new wm8960_rin_boost[] = {
235SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
236SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
237SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
238};
239
240static const struct snd_kcontrol_new wm8960_rin[] = {
241SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
242};
243
244static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
245SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
246SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
247SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
248};
249
250static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
251SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
252SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
253SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
254};
255
256static const struct snd_kcontrol_new wm8960_mono_out[] = {
257SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
258SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
259};
260
261static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
262SND_SOC_DAPM_INPUT("LINPUT1"),
263SND_SOC_DAPM_INPUT("RINPUT1"),
264SND_SOC_DAPM_INPUT("LINPUT2"),
265SND_SOC_DAPM_INPUT("RINPUT2"),
266SND_SOC_DAPM_INPUT("LINPUT3"),
267SND_SOC_DAPM_INPUT("RINPUT3"),
268
269SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0),
270
271SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
272 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
273SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
274 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
275
276SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
277 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
278SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
279 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
280
281SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
282SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
283
284SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
285SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
286
287SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
288 &wm8960_loutput_mixer[0],
289 ARRAY_SIZE(wm8960_loutput_mixer)),
290SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
291 &wm8960_routput_mixer[0],
292 ARRAY_SIZE(wm8960_routput_mixer)),
293
f2644a2c
MB		 294SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
295SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
296
297SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
298SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
299
300SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
301SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
302
303SND_SOC_DAPM_OUTPUT("SPK_LP"),
304SND_SOC_DAPM_OUTPUT("SPK_LN"),
305SND_SOC_DAPM_OUTPUT("HP_L"),
306SND_SOC_DAPM_OUTPUT("HP_R"),
307SND_SOC_DAPM_OUTPUT("SPK_RP"),
308SND_SOC_DAPM_OUTPUT("SPK_RN"),
309SND_SOC_DAPM_OUTPUT("OUT3"),
310};
311
913d7b4c
MB		 312static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
313SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
314 &wm8960_mono_out[0],
315 ARRAY_SIZE(wm8960_mono_out)),
316};
317
318/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
319static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
320SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
321};
322
f2644a2c
MB		 323static const struct snd_soc_dapm_route audio_paths[] = {
324 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
325 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
326 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
327
328 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
329 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
330 { "Left Input Mixer", NULL, "LINPUT2" },
331 { "Left Input Mixer", NULL, "LINPUT3" },
332
333 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
334 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
335 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
336
337 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
338 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
339 { "Right Input Mixer", NULL, "RINPUT2" },
340 { "Right Input Mixer", NULL, "LINPUT3" },
341
342 { "Left ADC", NULL, "Left Input Mixer" },
343 { "Right ADC", NULL, "Right Input Mixer" },
344
345 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
346 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
347 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
348
349 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
350 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
351 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
352
f2644a2c
MB		 353 { "LOUT1 PGA", NULL, "Left Output Mixer" },
354 { "ROUT1 PGA", NULL, "Right Output Mixer" },
355
356 { "HP_L", NULL, "LOUT1 PGA" },
357 { "HP_R", NULL, "ROUT1 PGA" },
358
359 { "Left Speaker PGA", NULL, "Left Output Mixer" },
360 { "Right Speaker PGA", NULL, "Right Output Mixer" },
361
362 { "Left Speaker Output", NULL, "Left Speaker PGA" },
363 { "Right Speaker Output", NULL, "Right Speaker PGA" },
364
365 { "SPK_LN", NULL, "Left Speaker Output" },
366 { "SPK_LP", NULL, "Left Speaker Output" },
367 { "SPK_RN", NULL, "Right Speaker Output" },
368 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 369};
370
371static const struct snd_soc_dapm_route audio_paths_out3[] = {
372 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
373 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 374
375 { "OUT3", NULL, "Mono Output Mixer", }
376};
377
913d7b4c
MB		 378static const struct snd_soc_dapm_route audio_paths_capless[] = {
379 { "HP_L", NULL, "OUT3 VMID" },
380 { "HP_R", NULL, "OUT3 VMID" },
381
382 { "OUT3 VMID", NULL, "Left Output Mixer" },
383 { "OUT3 VMID", NULL, "Right Output Mixer" },
384};
385
f2644a2c
MB		 386static int wm8960_add_widgets(struct snd_soc_codec *codec)
387{
913d7b4c 388 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 389 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
ce6120cc 390 struct snd_soc_dapm_context *dapm = &codec->dapm;
913d7b4c
MB		 391 struct snd_soc_dapm_widget *w;
392
ce6120cc 393 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
f2644a2c
MB		 394 ARRAY_SIZE(wm8960_dapm_widgets));
395
ce6120cc 396 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 397
913d7b4c
MB		 398 /* In capless mode OUT3 is used to provide VMID for the
399 * headphone outputs, otherwise it is used as a mono mixer.
400 */
401 if (pdata && pdata->capless) {
ce6120cc 402 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
913d7b4c
MB		 403 ARRAY_SIZE(wm8960_dapm_widgets_capless));
404
ce6120cc 405 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
913d7b4c
MB		 406 ARRAY_SIZE(audio_paths_capless));
407 } else {
ce6120cc 408 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
913d7b4c
MB		 409 ARRAY_SIZE(wm8960_dapm_widgets_out3));
410
ce6120cc 411 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
913d7b4c
MB		 412 ARRAY_SIZE(audio_paths_out3));
413 }
414
415 /* We need to power up the headphone output stage out of
416 * sequence for capless mode. To save scanning the widget
417 * list each time to find the desired power state do so now
418 * and save the result.
419 */
97c866de
JN		 420 list_for_each_entry(w, &codec->card->widgets, list) {
421 if (w->dapm != &codec->dapm)
422 continue;
913d7b4c
MB		 423 if (strcmp(w->name, "LOUT1 PGA") == 0)
424 wm8960->lout1 = w;
425 if (strcmp(w->name, "ROUT1 PGA") == 0)
426 wm8960->rout1 = w;
427 if (strcmp(w->name, "OUT3 VMID") == 0)
428 wm8960->out3 = w;
429 }
430
f2644a2c
MB		 431 return 0;
432}
433
434static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
435 unsigned int fmt)
436{
437 struct snd_soc_codec *codec = codec_dai->codec;
438 u16 iface = 0;
439
440 /* set master/slave audio interface */
441 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
442 case SND_SOC_DAIFMT_CBM_CFM:
443 iface |= 0x0040;
444 break;
445 case SND_SOC_DAIFMT_CBS_CFS:
446 break;
447 default:
448 return -EINVAL;
449 }
450
451 /* interface format */
452 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
453 case SND_SOC_DAIFMT_I2S:
454 iface |= 0x0002;
455 break;
456 case SND_SOC_DAIFMT_RIGHT_J:
457 break;
458 case SND_SOC_DAIFMT_LEFT_J:
459 iface |= 0x0001;
460 break;
461 case SND_SOC_DAIFMT_DSP_A:
462 iface |= 0x0003;
463 break;
464 case SND_SOC_DAIFMT_DSP_B:
465 iface |= 0x0013;
466 break;
467 default:
468 return -EINVAL;
469 }
470
471 /* clock inversion */
472 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
473 case SND_SOC_DAIFMT_NB_NF:
474 break;
475 case SND_SOC_DAIFMT_IB_IF:
476 iface |= 0x0090;
477 break;
478 case SND_SOC_DAIFMT_IB_NF:
479 iface |= 0x0080;
480 break;
481 case SND_SOC_DAIFMT_NB_IF:
482 iface |= 0x0010;
483 break;
484 default:
485 return -EINVAL;
486 }
487
488 /* set iface */
17a52fd6 489 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 490 return 0;
491}
492
db059c0f
MB		 493static struct {
494 int rate;
495 unsigned int val;
496} alc_rates[] = {
497 { 48000, 0 },
498 { 44100, 0 },
499 { 32000, 1 },
500 { 22050, 2 },
501 { 24000, 2 },
502 { 16000, 3 },
503 { 11250, 4 },
504 { 12000, 4 },
505 { 8000, 5 },
506};
507
f2644a2c
MB		 508static int wm8960_hw_params(struct snd_pcm_substream *substream,
509 struct snd_pcm_hw_params *params,
510 struct snd_soc_dai *dai)
511{
512 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 513 struct snd_soc_codec *codec = rtd->codec;
afd6d36a 514 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 515 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
db059c0f 516 int i;
f2644a2c
MB		 517
518 /* bit size */
519 switch (params_format(params)) {
520 case SNDRV_PCM_FORMAT_S16_LE:
521 break;
522 case SNDRV_PCM_FORMAT_S20_3LE:
523 iface |= 0x0004;
524 break;
525 case SNDRV_PCM_FORMAT_S24_LE:
526 iface |= 0x0008;
527 break;
528 }
529
afd6d36a
MB		 530 /* Update filters for the new rate */
531 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
532 wm8960->playback_fs = params_rate(params);
533 wm8960_set_deemph(codec);
db059c0f
MB		 534 } else {
535 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
536 if (alc_rates[i].rate == params_rate(params))
537 snd_soc_update_bits(codec,
538 WM8960_ADDCTL3, 0x7,
539 alc_rates[i].val);
afd6d36a
MB		 540 }
541
f2644a2c 542 /* set iface */
17a52fd6 543 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 544 return 0;
545}
546
547static int wm8960_mute(struct snd_soc_dai *dai, int mute)
548{
549 struct snd_soc_codec *codec = dai->codec;
17a52fd6 550 u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7;
f2644a2c
MB		 551
552 if (mute)
17a52fd6 553 snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8);
f2644a2c 554 else
17a52fd6 555 snd_soc_write(codec, WM8960_DACCTL1, mute_reg);
f2644a2c
MB		 556 return 0;
557}
558
913d7b4c
MB		 559static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
560 enum snd_soc_bias_level level)
f2644a2c 561{
f2644a2c
MB		 562 u16 reg;
563
564 switch (level) {
565 case SND_SOC_BIAS_ON:
566 break;
567
568 case SND_SOC_BIAS_PREPARE:
569 /* Set VMID to 2x50k */
17a52fd6 570 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c
MB		 571 reg &= ~0x180;
572 reg |= 0x80;
17a52fd6 573 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 574 break;
575
576 case SND_SOC_BIAS_STANDBY:
ce6120cc 577 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
f2644a2c 578 /* Enable anti-pop features */
17a52fd6 579 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 580 WM8960_POBCTRL | WM8960_SOFT_ST |
581 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 582
583 /* Enable & ramp VMID at 2x50k */
17a52fd6 584 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c 585 reg |= 0x80;
17a52fd6 586 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 587 msleep(100);
588
589 /* Enable VREF */
17a52fd6 590 snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF);
f2644a2c
MB		 591
592 /* Disable anti-pop features */
17a52fd6 593 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 594 }
595
596 /* Set VMID to 2x250k */
17a52fd6 597 reg = snd_soc_read(codec, WM8960_POWER1);
f2644a2c
MB		 598 reg &= ~0x180;
599 reg |= 0x100;
17a52fd6 600 snd_soc_write(codec, WM8960_POWER1, reg);
f2644a2c
MB		 601 break;
602
603 case SND_SOC_BIAS_OFF:
604 /* Enable anti-pop features */
17a52fd6 605 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 606 WM8960_POBCTRL | WM8960_SOFT_ST |
607 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
608
609 /* Disable VMID and VREF, let them discharge */
17a52fd6 610 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 611 msleep(600);
913d7b4c
MB		 612 break;
613 }
614
ce6120cc 615 codec->dapm.bias_level = level;
913d7b4c
MB		 616
617 return 0;
618}
619
620static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
621 enum snd_soc_bias_level level)
622{
b2c812e2 623 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 624 int reg;
625
626 switch (level) {
627 case SND_SOC_BIAS_ON:
628 break;
629
630 case SND_SOC_BIAS_PREPARE:
ce6120cc 631 switch (codec->dapm.bias_level) {
913d7b4c
MB		 632 case SND_SOC_BIAS_STANDBY:
633 /* Enable anti pop mode */
634 snd_soc_update_bits(codec, WM8960_APOP1,
635 WM8960_POBCTRL | WM8960_SOFT_ST |
636 WM8960_BUFDCOPEN,
637 WM8960_POBCTRL | WM8960_SOFT_ST |
638 WM8960_BUFDCOPEN);
639
640 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
641 reg = 0;
642 if (wm8960->lout1 && wm8960->lout1->power)
643 reg |= WM8960_PWR2_LOUT1;
644 if (wm8960->rout1 && wm8960->rout1->power)
645 reg |= WM8960_PWR2_ROUT1;
646 if (wm8960->out3 && wm8960->out3->power)
647 reg |= WM8960_PWR2_OUT3;
648 snd_soc_update_bits(codec, WM8960_POWER2,
649 WM8960_PWR2_LOUT1 |
650 WM8960_PWR2_ROUT1 |
651 WM8960_PWR2_OUT3, reg);
652
653 /* Enable VMID at 2*50k */
654 snd_soc_update_bits(codec, WM8960_POWER1,
655 WM8960_VMID_MASK, 0x80);
656
657 /* Ramp */
658 msleep(100);
659
660 /* Enable VREF */
661 snd_soc_update_bits(codec, WM8960_POWER1,
662 WM8960_VREF, WM8960_VREF);
663
664 msleep(100);
665 break;
666
667 case SND_SOC_BIAS_ON:
668 /* Enable anti-pop mode */
669 snd_soc_update_bits(codec, WM8960_APOP1,
670 WM8960_POBCTRL | WM8960_SOFT_ST |
671 WM8960_BUFDCOPEN,
672 WM8960_POBCTRL | WM8960_SOFT_ST |
673 WM8960_BUFDCOPEN);
674
675 /* Disable VMID and VREF */
676 snd_soc_update_bits(codec, WM8960_POWER1,
677 WM8960_VREF | WM8960_VMID_MASK, 0);
678 break;
679
680 default:
681 break;
682 }
683 break;
f2644a2c 684
913d7b4c 685 case SND_SOC_BIAS_STANDBY:
ce6120cc 686 switch (codec->dapm.bias_level) {
913d7b4c
MB		 687 case SND_SOC_BIAS_PREPARE:
688 /* Disable HP discharge */
689 snd_soc_update_bits(codec, WM8960_APOP2,
690 WM8960_DISOP | WM8960_DRES_MASK,
691 0);
692
693 /* Disable anti-pop features */
694 snd_soc_update_bits(codec, WM8960_APOP1,
695 WM8960_POBCTRL | WM8960_SOFT_ST |
696 WM8960_BUFDCOPEN,
697 WM8960_POBCTRL | WM8960_SOFT_ST |
698 WM8960_BUFDCOPEN);
699 break;
700
701 default:
702 break;
703 }
704 break;
f2644a2c 705
913d7b4c 706 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 707 break;
708 }
709
ce6120cc 710 codec->dapm.bias_level = level;
f2644a2c
MB		 711
712 return 0;
713}
714
715/* PLL divisors */
716struct _pll_div {
717 u32 pre_div:1;
718 u32 n:4;
719 u32 k:24;
720};
721
722/* The size in bits of the pll divide multiplied by 10
723 * to allow rounding later */
724#define FIXED_PLL_SIZE ((1 << 24) * 10)
725
726static int pll_factors(unsigned int source, unsigned int target,
727 struct _pll_div *pll_div)
728{
729 unsigned long long Kpart;
730 unsigned int K, Ndiv, Nmod;
731
732 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
733
734 /* Scale up target to PLL operating frequency */
735 target *= 4;
736
737 Ndiv = target / source;
738 if (Ndiv < 6) {
739 source >>= 1;
740 pll_div->pre_div = 1;
741 Ndiv = target / source;
742 } else
743 pll_div->pre_div = 0;
744
745 if ((Ndiv < 6) || (Ndiv > 12)) {
746 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
747 return -EINVAL;
748 }
749
750 pll_div->n = Ndiv;
751 Nmod = target % source;
752 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
753
754 do_div(Kpart, source);
755
756 K = Kpart & 0xFFFFFFFF;
757
758 /* Check if we need to round */
759 if ((K % 10) >= 5)
760 K += 5;
761
762 /* Move down to proper range now rounding is done */
763 K /= 10;
764
765 pll_div->k = K;
766
767 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
768 pll_div->n, pll_div->k, pll_div->pre_div);
769
770 return 0;
771}
772
85488037
MB		 773static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
774 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 775{
776 struct snd_soc_codec *codec = codec_dai->codec;
777 u16 reg;
778 static struct _pll_div pll_div;
779 int ret;
780
781 if (freq_in && freq_out) {
782 ret = pll_factors(freq_in, freq_out, &pll_div);
783 if (ret != 0)
784 return ret;
785 }
786
787 /* Disable the PLL: even if we are changing the frequency the
788 * PLL needs to be disabled while we do so. */
17a52fd6
MB		 789 snd_soc_write(codec, WM8960_CLOCK1,
790 snd_soc_read(codec, WM8960_CLOCK1) & ~1);
791 snd_soc_write(codec, WM8960_POWER2,
792 snd_soc_read(codec, WM8960_POWER2) & ~1);
f2644a2c
MB		 793
794 if (!freq_in || !freq_out)
795 return 0;
796
17a52fd6 797 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 798 reg |= pll_div.pre_div << 4;
799 reg |= pll_div.n;
800
801 if (pll_div.k) {
802 reg |= 0x20;
803
17a52fd6
MB		 804 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
805 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
806 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
f2644a2c 807 }
17a52fd6 808 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 809
810 /* Turn it on */
17a52fd6
MB		 811 snd_soc_write(codec, WM8960_POWER2,
812 snd_soc_read(codec, WM8960_POWER2) | 1);
f2644a2c 813 msleep(250);
17a52fd6
MB		 814 snd_soc_write(codec, WM8960_CLOCK1,
815 snd_soc_read(codec, WM8960_CLOCK1) | 1);
f2644a2c
MB		 816
817 return 0;
818}
819
820static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
821 int div_id, int div)
822{
823 struct snd_soc_codec *codec = codec_dai->codec;
824 u16 reg;
825
826 switch (div_id) {
f2644a2c 827 case WM8960_SYSCLKDIV:
17a52fd6
MB		 828 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
829 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 830 break;
831 case WM8960_DACDIV:
17a52fd6
MB		 832 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
833 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 834 break;
835 case WM8960_OPCLKDIV:
17a52fd6
MB		 836 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
837 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 838 break;
839 case WM8960_DCLKDIV:
17a52fd6
MB		 840 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
841 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 842 break;
843 case WM8960_TOCLKSEL:
17a52fd6
MB		 844 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
845 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 846 break;
847 default:
848 return -EINVAL;
849 }
850
851 return 0;
852}
853
f0fba2ad
LG		 854static int wm8960_set_bias_level(struct snd_soc_codec *codec,
855 enum snd_soc_bias_level level)
856{
857 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
858
859 return wm8960->set_bias_level(codec, level);
860}
861
f2644a2c
MB		 862#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
863
864#define WM8960_FORMATS \
865 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
866 SNDRV_PCM_FMTBIT_S24_LE)
867
868static struct snd_soc_dai_ops wm8960_dai_ops = {
869 .hw_params = wm8960_hw_params,
870 .digital_mute = wm8960_mute,
871 .set_fmt = wm8960_set_dai_fmt,
872 .set_clkdiv = wm8960_set_dai_clkdiv,
873 .set_pll = wm8960_set_dai_pll,
874};
875
f0fba2ad
LG		 876static struct snd_soc_dai_driver wm8960_dai = {
877 .name = "wm8960-hifi",
f2644a2c
MB		 878 .playback = {
879 .stream_name = "Playback",
880 .channels_min = 1,
881 .channels_max = 2,
882 .rates = WM8960_RATES,
883 .formats = WM8960_FORMATS,},
884 .capture = {
885 .stream_name = "Capture",
886 .channels_min = 1,
887 .channels_max = 2,
888 .rates = WM8960_RATES,
889 .formats = WM8960_FORMATS,},
890 .ops = &wm8960_dai_ops,
891 .symmetric_rates = 1,
892};
f2644a2c 893
f0fba2ad 894static int wm8960_suspend(struct snd_soc_codec *codec, pm_message_t state)
f2644a2c 895{
f0fba2ad 896 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 897
f0fba2ad 898 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 899 return 0;
900}
901
f0fba2ad 902static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 903{
f0fba2ad 904 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c
MB		 905 int i;
906 u8 data[2];
907 u16 *cache = codec->reg_cache;
908
909 /* Sync reg_cache with the hardware */
910 for (i = 0; i < ARRAY_SIZE(wm8960_reg); i++) {
911 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
912 data[1] = cache[i] & 0x00ff;
913 codec->hw_write(codec->control_data, data, 2);
914 }
915
f0fba2ad 916 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 917 return 0;
918}
919
f0fba2ad 920static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 921{
f0fba2ad
LG		 922 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
923 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c
MB		 924 int ret;
925 u16 reg;
926
f0fba2ad
LG		 927 wm8960->set_bias_level = wm8960_set_bias_level_out3;
928 codec->control_data = wm8960->control_data;
913d7b4c 929
f2644a2c
MB		 930 if (!pdata) {
931 dev_warn(codec->dev, "No platform data supplied\n");
932 } else {
933 if (pdata->dres > WM8960_DRES_MAX) {
934 dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
935 pdata->dres = 0;
936 }
913d7b4c
MB		 937
938 if (pdata->capless)
f0fba2ad 939 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 940 }
941
f0fba2ad 942 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
17a52fd6
MB		 943 if (ret < 0) {
944 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 945 return ret;
17a52fd6
MB		 946 }
947
f2644a2c
MB		 948 ret = wm8960_reset(codec);
949 if (ret < 0) {
950 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 951 return ret;
f2644a2c
MB		 952 }
953
f0fba2ad 954 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 955
956 /* Latch the update bits */
17a52fd6
MB		 957 reg = snd_soc_read(codec, WM8960_LINVOL);
958 snd_soc_write(codec, WM8960_LINVOL, reg | 0x100);
959 reg = snd_soc_read(codec, WM8960_RINVOL);
960 snd_soc_write(codec, WM8960_RINVOL, reg | 0x100);
961 reg = snd_soc_read(codec, WM8960_LADC);
962 snd_soc_write(codec, WM8960_LADC, reg | 0x100);
963 reg = snd_soc_read(codec, WM8960_RADC);
964 snd_soc_write(codec, WM8960_RADC, reg | 0x100);
965 reg = snd_soc_read(codec, WM8960_LDAC);
966 snd_soc_write(codec, WM8960_LDAC, reg | 0x100);
967 reg = snd_soc_read(codec, WM8960_RDAC);
968 snd_soc_write(codec, WM8960_RDAC, reg | 0x100);
969 reg = snd_soc_read(codec, WM8960_LOUT1);
970 snd_soc_write(codec, WM8960_LOUT1, reg | 0x100);
971 reg = snd_soc_read(codec, WM8960_ROUT1);
972 snd_soc_write(codec, WM8960_ROUT1, reg | 0x100);
973 reg = snd_soc_read(codec, WM8960_LOUT2);
974 snd_soc_write(codec, WM8960_LOUT2, reg | 0x100);
975 reg = snd_soc_read(codec, WM8960_ROUT2);
976 snd_soc_write(codec, WM8960_ROUT2, reg | 0x100);
f2644a2c 977
f0fba2ad
LG		 978 snd_soc_add_controls(codec, wm8960_snd_controls,
979 ARRAY_SIZE(wm8960_snd_controls));
980 wm8960_add_widgets(codec);
f2644a2c
MB		 981
982 return 0;
983}
984
f0fba2ad
LG		 985/* power down chip */
986static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 987{
f0fba2ad
LG		 988 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
989
990 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
991 return 0;
f2644a2c
MB		 992}
993
f0fba2ad
LG		 994static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
995 .probe = wm8960_probe,
996 .remove = wm8960_remove,
997 .suspend = wm8960_suspend,
998 .resume = wm8960_resume,
999 .set_bias_level = wm8960_set_bias_level,
1000 .reg_cache_size = ARRAY_SIZE(wm8960_reg),
1001 .reg_word_size = sizeof(u16),
1002 .reg_cache_default = wm8960_reg,
1003};
1004
1005#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c
MB		 1006static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
1007 const struct i2c_device_id *id)
1008{
1009 struct wm8960_priv *wm8960;
f0fba2ad 1010 int ret;
f2644a2c
MB		 1011
1012 wm8960 = kzalloc(sizeof(struct wm8960_priv), GFP_KERNEL);
1013 if (wm8960 == NULL)
1014 return -ENOMEM;
1015
f2644a2c 1016 i2c_set_clientdata(i2c, wm8960);
7f984b55 1017 wm8960->control_type = SND_SOC_I2C;
f0fba2ad 1018 wm8960->control_data = i2c;
f2644a2c 1019
f0fba2ad
LG		 1020 ret = snd_soc_register_codec(&i2c->dev,
1021 &soc_codec_dev_wm8960, &wm8960_dai, 1);
1022 if (ret < 0)
1023 kfree(wm8960);
1024 return ret;
f2644a2c
MB		 1025}
1026
1027static __devexit int wm8960_i2c_remove(struct i2c_client *client)
1028{
f0fba2ad
LG		 1029 snd_soc_unregister_codec(&client->dev);
1030 kfree(i2c_get_clientdata(client));
f2644a2c
MB		 1031 return 0;
1032}
1033
1034static const struct i2c_device_id wm8960_i2c_id[] = {
1035 { "wm8960", 0 },
1036 { }
1037};
1038MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1039
1040static struct i2c_driver wm8960_i2c_driver = {
1041 .driver = {
f0fba2ad 1042 .name = "wm8960-codec",
f2644a2c
MB		 1043 .owner = THIS_MODULE,
1044 },
1045 .probe = wm8960_i2c_probe,
1046 .remove = __devexit_p(wm8960_i2c_remove),
1047 .id_table = wm8960_i2c_id,
1048};
f0fba2ad 1049#endif
f2644a2c
MB		 1050
1051static int __init wm8960_modinit(void)
1052{
f0fba2ad
LG		 1053 int ret = 0;
1054#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c
MB		 1055 ret = i2c_add_driver(&wm8960_i2c_driver);
1056 if (ret != 0) {
1057 printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
1058 ret);
1059 }
f0fba2ad 1060#endif
f2644a2c
MB		 1061 return ret;
1062}
1063module_init(wm8960_modinit);
1064
1065static void __exit wm8960_exit(void)
1066{
f0fba2ad 1067#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
f2644a2c 1068 i2c_del_driver(&wm8960_i2c_driver);
f0fba2ad 1069#endif
f2644a2c
MB		 1070}
1071module_exit(wm8960_exit);
1072
f2644a2c
MB		 1073MODULE_DESCRIPTION("ASoC WM8960 driver");
1074MODULE_AUTHOR("Liam Girdwood");
1075MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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