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ASoC: tlv320aic3x: Remove unused, non-standard headset detection
[deliverable/linux.git] / sound / soc / codecs / wm8960.c
CommitLineData
f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Author: Liam Girdwood
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/i2c.h>
5a0e3ad6 17#include <linux/slab.h>
f2644a2c
MB		 18#include <sound/core.h>
19#include <sound/pcm.h>
20#include <sound/pcm_params.h>
21#include <sound/soc.h>
f2644a2c
MB		 22#include <sound/initval.h>
23#include <sound/tlv.h>
b6877a47 24#include <sound/wm8960.h>
f2644a2c
MB		 25
26#include "wm8960.h"
27
f2644a2c 28/* R25 - Power 1 */
913d7b4c 29#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 30#define WM8960_VREF 0x40
31
913d7b4c
MB		 32/* R26 - Power 2 */
33#define WM8960_PWR2_LOUT1 0x40
34#define WM8960_PWR2_ROUT1 0x20
35#define WM8960_PWR2_OUT3 0x02
36
f2644a2c
MB		 37/* R28 - Anti-pop 1 */
38#define WM8960_POBCTRL 0x80
39#define WM8960_BUFDCOPEN 0x10
40#define WM8960_BUFIOEN 0x08
41#define WM8960_SOFT_ST 0x04
42#define WM8960_HPSTBY 0x01
43
44/* R29 - Anti-pop 2 */
45#define WM8960_DISOP 0x40
913d7b4c 46#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 47
48/*
49 * wm8960 register cache
50 * We can't read the WM8960 register space when we are
51 * using 2 wire for device control, so we cache them instead.
52 */
53static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
54 0x0097, 0x0097, 0x0000, 0x0000,
55 0x0000, 0x0008, 0x0000, 0x000a,
56 0x01c0, 0x0000, 0x00ff, 0x00ff,
57 0x0000, 0x0000, 0x0000, 0x0000,
58 0x0000, 0x007b, 0x0100, 0x0032,
59 0x0000, 0x00c3, 0x00c3, 0x01c0,
60 0x0000, 0x0000, 0x0000, 0x0000,
61 0x0000, 0x0000, 0x0000, 0x0000,
62 0x0100, 0x0100, 0x0050, 0x0050,
63 0x0050, 0x0050, 0x0000, 0x0000,
64 0x0000, 0x0000, 0x0040, 0x0000,
65 0x0000, 0x0050, 0x0050, 0x0000,
66 0x0002, 0x0037, 0x004d, 0x0080,
67 0x0008, 0x0031, 0x0026, 0x00e9,
68};
69
70struct wm8960_priv {
f0fba2ad 71 enum snd_soc_control_type control_type;
f0fba2ad
LG		 72 int (*set_bias_level)(struct snd_soc_codec *,
73 enum snd_soc_bias_level level);
913d7b4c
MB		 74 struct snd_soc_dapm_widget *lout1;
75 struct snd_soc_dapm_widget *rout1;
76 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 77 bool deemph;
78 int playback_fs;
f2644a2c
MB		 79};
80
17a52fd6 81#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 82
83/* enumerated controls */
f2644a2c
MB		 84static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
85 "Right Inverted", "Stereo Inversion"};
86static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
87static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
88static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
89static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
90
91static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 92 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
93 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
94 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
95 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
96 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
97 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
98};
99
afd6d36a
MB		 100static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
101
102static int wm8960_set_deemph(struct snd_soc_codec *codec)
103{
104 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
105 int val, i, best;
106
107 /* If we're using deemphasis select the nearest available sample
108 * rate.
109 */
110 if (wm8960->deemph) {
111 best = 1;
112 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
113 if (abs(deemph_settings[i] - wm8960->playback_fs) <
114 abs(deemph_settings[best] - wm8960->playback_fs))
115 best = i;
116 }
117
118 val = best << 1;
119 } else {
120 val = 0;
121 }
122
123 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
124
125 return snd_soc_update_bits(codec, WM8960_DACCTL1,
126 0x6, val);
127}
128
129static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
130 struct snd_ctl_elem_value *ucontrol)
131{
132 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
133 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
134
3f343f85
DA		 135 ucontrol->value.enumerated.item[0] = wm8960->deemph;
136 return 0;
afd6d36a
MB		 137}
138
139static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
140 struct snd_ctl_elem_value *ucontrol)
141{
142 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
143 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
144 int deemph = ucontrol->value.enumerated.item[0];
145
146 if (deemph > 1)
147 return -EINVAL;
148
149 wm8960->deemph = deemph;
150
151 return wm8960_set_deemph(codec);
152}
153
f2644a2c
MB		 154static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
155static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
156static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
157static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
158
159static const struct snd_kcontrol_new wm8960_snd_controls[] = {
160SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
161 0, 63, 0, adc_tlv),
162SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
163 6, 1, 0),
164SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
165 7, 1, 0),
166
167SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
168 0, 255, 0, dac_tlv),
169
170SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
171 0, 127, 0, out_tlv),
172SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
173 7, 1, 0),
174
175SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
176 0, 127, 0, out_tlv),
177SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
178 7, 1, 0),
179SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
180SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
181
182SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 183SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 184SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
185
186SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 187SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
188 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 189
4faaa8d9
MB		 190SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
191SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 192SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
193SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
194
4faaa8d9 195SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 196SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
197SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
198SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
199SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 200SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 201SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
202SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
203
204SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
205SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
206
207SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
208 0, 127, 0),
209
210SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
211 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
212SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
213 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
214SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
215 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
216SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
217 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
218};
219
220static const struct snd_kcontrol_new wm8960_lin_boost[] = {
221SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
222SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
223SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
224};
225
226static const struct snd_kcontrol_new wm8960_lin[] = {
227SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
228};
229
230static const struct snd_kcontrol_new wm8960_rin_boost[] = {
231SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
232SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
233SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
234};
235
236static const struct snd_kcontrol_new wm8960_rin[] = {
237SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
238};
239
240static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
241SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
242SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
243SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
244};
245
246static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
247SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
248SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
249SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
250};
251
252static const struct snd_kcontrol_new wm8960_mono_out[] = {
253SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
254SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
255};
256
257static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
258SND_SOC_DAPM_INPUT("LINPUT1"),
259SND_SOC_DAPM_INPUT("RINPUT1"),
260SND_SOC_DAPM_INPUT("LINPUT2"),
261SND_SOC_DAPM_INPUT("RINPUT2"),
262SND_SOC_DAPM_INPUT("LINPUT3"),
263SND_SOC_DAPM_INPUT("RINPUT3"),
264
187774cb 265SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
f2644a2c
MB		 266
267SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
268 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
269SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
270 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
271
272SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
273 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
274SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
275 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
276
277SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
278SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
279
280SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
281SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
282
283SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
284 &wm8960_loutput_mixer[0],
285 ARRAY_SIZE(wm8960_loutput_mixer)),
286SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
287 &wm8960_routput_mixer[0],
288 ARRAY_SIZE(wm8960_routput_mixer)),
289
f2644a2c
MB		 290SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
291SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
292
293SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
294SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
295
296SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
297SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
298
299SND_SOC_DAPM_OUTPUT("SPK_LP"),
300SND_SOC_DAPM_OUTPUT("SPK_LN"),
301SND_SOC_DAPM_OUTPUT("HP_L"),
302SND_SOC_DAPM_OUTPUT("HP_R"),
303SND_SOC_DAPM_OUTPUT("SPK_RP"),
304SND_SOC_DAPM_OUTPUT("SPK_RN"),
305SND_SOC_DAPM_OUTPUT("OUT3"),
306};
307
913d7b4c
MB		 308static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
309SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
310 &wm8960_mono_out[0],
311 ARRAY_SIZE(wm8960_mono_out)),
312};
313
314/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
315static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
316SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
317};
318
f2644a2c
MB		 319static const struct snd_soc_dapm_route audio_paths[] = {
320 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
321 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
322 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
323
324 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
325 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
326 { "Left Input Mixer", NULL, "LINPUT2" },
327 { "Left Input Mixer", NULL, "LINPUT3" },
328
329 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
330 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
331 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
332
333 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
334 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
335 { "Right Input Mixer", NULL, "RINPUT2" },
336 { "Right Input Mixer", NULL, "LINPUT3" },
337
338 { "Left ADC", NULL, "Left Input Mixer" },
339 { "Right ADC", NULL, "Right Input Mixer" },
340
341 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
342 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
343 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
344
345 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
346 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
347 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
348
f2644a2c
MB		 349 { "LOUT1 PGA", NULL, "Left Output Mixer" },
350 { "ROUT1 PGA", NULL, "Right Output Mixer" },
351
352 { "HP_L", NULL, "LOUT1 PGA" },
353 { "HP_R", NULL, "ROUT1 PGA" },
354
355 { "Left Speaker PGA", NULL, "Left Output Mixer" },
356 { "Right Speaker PGA", NULL, "Right Output Mixer" },
357
358 { "Left Speaker Output", NULL, "Left Speaker PGA" },
359 { "Right Speaker Output", NULL, "Right Speaker PGA" },
360
361 { "SPK_LN", NULL, "Left Speaker Output" },
362 { "SPK_LP", NULL, "Left Speaker Output" },
363 { "SPK_RN", NULL, "Right Speaker Output" },
364 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 365};
366
367static const struct snd_soc_dapm_route audio_paths_out3[] = {
368 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
369 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 370
371 { "OUT3", NULL, "Mono Output Mixer", }
372};
373
913d7b4c
MB		 374static const struct snd_soc_dapm_route audio_paths_capless[] = {
375 { "HP_L", NULL, "OUT3 VMID" },
376 { "HP_R", NULL, "OUT3 VMID" },
377
378 { "OUT3 VMID", NULL, "Left Output Mixer" },
379 { "OUT3 VMID", NULL, "Right Output Mixer" },
380};
381
f2644a2c
MB		 382static int wm8960_add_widgets(struct snd_soc_codec *codec)
383{
913d7b4c 384 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 385 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
ce6120cc 386 struct snd_soc_dapm_context *dapm = &codec->dapm;
913d7b4c
MB		 387 struct snd_soc_dapm_widget *w;
388
ce6120cc 389 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
f2644a2c
MB		 390 ARRAY_SIZE(wm8960_dapm_widgets));
391
ce6120cc 392 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 393
913d7b4c
MB		 394 /* In capless mode OUT3 is used to provide VMID for the
395 * headphone outputs, otherwise it is used as a mono mixer.
396 */
397 if (pdata && pdata->capless) {
ce6120cc 398 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
913d7b4c
MB		 399 ARRAY_SIZE(wm8960_dapm_widgets_capless));
400
ce6120cc 401 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
913d7b4c
MB		 402 ARRAY_SIZE(audio_paths_capless));
403 } else {
ce6120cc 404 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
913d7b4c
MB		 405 ARRAY_SIZE(wm8960_dapm_widgets_out3));
406
ce6120cc 407 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
913d7b4c
MB		 408 ARRAY_SIZE(audio_paths_out3));
409 }
410
411 /* We need to power up the headphone output stage out of
412 * sequence for capless mode. To save scanning the widget
413 * list each time to find the desired power state do so now
414 * and save the result.
415 */
97c866de
JN		 416 list_for_each_entry(w, &codec->card->widgets, list) {
417 if (w->dapm != &codec->dapm)
418 continue;
913d7b4c
MB		 419 if (strcmp(w->name, "LOUT1 PGA") == 0)
420 wm8960->lout1 = w;
421 if (strcmp(w->name, "ROUT1 PGA") == 0)
422 wm8960->rout1 = w;
423 if (strcmp(w->name, "OUT3 VMID") == 0)
424 wm8960->out3 = w;
425 }
426
f2644a2c
MB		 427 return 0;
428}
429
430static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
431 unsigned int fmt)
432{
433 struct snd_soc_codec *codec = codec_dai->codec;
434 u16 iface = 0;
435
436 /* set master/slave audio interface */
437 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
438 case SND_SOC_DAIFMT_CBM_CFM:
439 iface |= 0x0040;
440 break;
441 case SND_SOC_DAIFMT_CBS_CFS:
442 break;
443 default:
444 return -EINVAL;
445 }
446
447 /* interface format */
448 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
449 case SND_SOC_DAIFMT_I2S:
450 iface |= 0x0002;
451 break;
452 case SND_SOC_DAIFMT_RIGHT_J:
453 break;
454 case SND_SOC_DAIFMT_LEFT_J:
455 iface |= 0x0001;
456 break;
457 case SND_SOC_DAIFMT_DSP_A:
458 iface |= 0x0003;
459 break;
460 case SND_SOC_DAIFMT_DSP_B:
461 iface |= 0x0013;
462 break;
463 default:
464 return -EINVAL;
465 }
466
467 /* clock inversion */
468 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
469 case SND_SOC_DAIFMT_NB_NF:
470 break;
471 case SND_SOC_DAIFMT_IB_IF:
472 iface |= 0x0090;
473 break;
474 case SND_SOC_DAIFMT_IB_NF:
475 iface |= 0x0080;
476 break;
477 case SND_SOC_DAIFMT_NB_IF:
478 iface |= 0x0010;
479 break;
480 default:
481 return -EINVAL;
482 }
483
484 /* set iface */
17a52fd6 485 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 486 return 0;
487}
488
db059c0f
MB		 489static struct {
490 int rate;
491 unsigned int val;
492} alc_rates[] = {
493 { 48000, 0 },
494 { 44100, 0 },
495 { 32000, 1 },
496 { 22050, 2 },
497 { 24000, 2 },
498 { 16000, 3 },
499 { 11250, 4 },
500 { 12000, 4 },
501 { 8000, 5 },
502};
503
f2644a2c
MB		 504static int wm8960_hw_params(struct snd_pcm_substream *substream,
505 struct snd_pcm_hw_params *params,
506 struct snd_soc_dai *dai)
507{
e6968a17 508 struct snd_soc_codec *codec = dai->codec;
afd6d36a 509 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 510 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
db059c0f 511 int i;
f2644a2c
MB		 512
513 /* bit size */
514 switch (params_format(params)) {
515 case SNDRV_PCM_FORMAT_S16_LE:
516 break;
517 case SNDRV_PCM_FORMAT_S20_3LE:
518 iface |= 0x0004;
519 break;
520 case SNDRV_PCM_FORMAT_S24_LE:
521 iface |= 0x0008;
522 break;
523 }
524
afd6d36a
MB		 525 /* Update filters for the new rate */
526 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
527 wm8960->playback_fs = params_rate(params);
528 wm8960_set_deemph(codec);
db059c0f
MB		 529 } else {
530 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
531 if (alc_rates[i].rate == params_rate(params))
532 snd_soc_update_bits(codec,
533 WM8960_ADDCTL3, 0x7,
534 alc_rates[i].val);
afd6d36a
MB		 535 }
536
f2644a2c 537 /* set iface */
17a52fd6 538 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 539 return 0;
540}
541
542static int wm8960_mute(struct snd_soc_dai *dai, int mute)
543{
544 struct snd_soc_codec *codec = dai->codec;
f2644a2c
MB		 545
546 if (mute)
16b24881 547 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
f2644a2c 548 else
16b24881 549 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
f2644a2c
MB		 550 return 0;
551}
552
913d7b4c
MB		 553static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
554 enum snd_soc_bias_level level)
f2644a2c 555{
f2644a2c
MB		 556 switch (level) {
557 case SND_SOC_BIAS_ON:
558 break;
559
560 case SND_SOC_BIAS_PREPARE:
561 /* Set VMID to 2x50k */
16b24881 562 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
f2644a2c
MB		 563 break;
564
565 case SND_SOC_BIAS_STANDBY:
ce6120cc 566 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
bc45df2d
AL		 567 snd_soc_cache_sync(codec);
568
f2644a2c 569 /* Enable anti-pop features */
17a52fd6 570 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 571 WM8960_POBCTRL | WM8960_SOFT_ST |
572 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 573
574 /* Enable & ramp VMID at 2x50k */
16b24881 575 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
f2644a2c
MB		 576 msleep(100);
577
578 /* Enable VREF */
16b24881
AL		 579 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
580 WM8960_VREF);
f2644a2c
MB		 581
582 /* Disable anti-pop features */
17a52fd6 583 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 584 }
585
586 /* Set VMID to 2x250k */
16b24881 587 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
f2644a2c
MB		 588 break;
589
590 case SND_SOC_BIAS_OFF:
591 /* Enable anti-pop features */
17a52fd6 592 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 593 WM8960_POBCTRL | WM8960_SOFT_ST |
594 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
595
596 /* Disable VMID and VREF, let them discharge */
17a52fd6 597 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 598 msleep(600);
913d7b4c
MB		 599 break;
600 }
601
ce6120cc 602 codec->dapm.bias_level = level;
913d7b4c
MB		 603
604 return 0;
605}
606
607static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
608 enum snd_soc_bias_level level)
609{
b2c812e2 610 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 611 int reg;
612
613 switch (level) {
614 case SND_SOC_BIAS_ON:
615 break;
616
617 case SND_SOC_BIAS_PREPARE:
ce6120cc 618 switch (codec->dapm.bias_level) {
913d7b4c
MB		 619 case SND_SOC_BIAS_STANDBY:
620 /* Enable anti pop mode */
621 snd_soc_update_bits(codec, WM8960_APOP1,
622 WM8960_POBCTRL | WM8960_SOFT_ST |
623 WM8960_BUFDCOPEN,
624 WM8960_POBCTRL | WM8960_SOFT_ST |
625 WM8960_BUFDCOPEN);
626
627 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
628 reg = 0;
629 if (wm8960->lout1 && wm8960->lout1->power)
630 reg |= WM8960_PWR2_LOUT1;
631 if (wm8960->rout1 && wm8960->rout1->power)
632 reg |= WM8960_PWR2_ROUT1;
633 if (wm8960->out3 && wm8960->out3->power)
634 reg |= WM8960_PWR2_OUT3;
635 snd_soc_update_bits(codec, WM8960_POWER2,
636 WM8960_PWR2_LOUT1 |
637 WM8960_PWR2_ROUT1 |
638 WM8960_PWR2_OUT3, reg);
639
640 /* Enable VMID at 2*50k */
641 snd_soc_update_bits(codec, WM8960_POWER1,
642 WM8960_VMID_MASK, 0x80);
643
644 /* Ramp */
645 msleep(100);
646
647 /* Enable VREF */
648 snd_soc_update_bits(codec, WM8960_POWER1,
649 WM8960_VREF, WM8960_VREF);
650
651 msleep(100);
652 break;
653
654 case SND_SOC_BIAS_ON:
655 /* Enable anti-pop mode */
656 snd_soc_update_bits(codec, WM8960_APOP1,
657 WM8960_POBCTRL | WM8960_SOFT_ST |
658 WM8960_BUFDCOPEN,
659 WM8960_POBCTRL | WM8960_SOFT_ST |
660 WM8960_BUFDCOPEN);
661
662 /* Disable VMID and VREF */
663 snd_soc_update_bits(codec, WM8960_POWER1,
664 WM8960_VREF | WM8960_VMID_MASK, 0);
665 break;
666
bc45df2d
AL		 667 case SND_SOC_BIAS_OFF:
668 snd_soc_cache_sync(codec);
669 break;
913d7b4c
MB		 670 default:
671 break;
672 }
673 break;
f2644a2c 674
913d7b4c 675 case SND_SOC_BIAS_STANDBY:
ce6120cc 676 switch (codec->dapm.bias_level) {
913d7b4c
MB		 677 case SND_SOC_BIAS_PREPARE:
678 /* Disable HP discharge */
679 snd_soc_update_bits(codec, WM8960_APOP2,
680 WM8960_DISOP | WM8960_DRES_MASK,
681 0);
682
683 /* Disable anti-pop features */
684 snd_soc_update_bits(codec, WM8960_APOP1,
685 WM8960_POBCTRL | WM8960_SOFT_ST |
686 WM8960_BUFDCOPEN,
687 WM8960_POBCTRL | WM8960_SOFT_ST |
688 WM8960_BUFDCOPEN);
689 break;
690
691 default:
692 break;
693 }
694 break;
f2644a2c 695
913d7b4c 696 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 697 break;
698 }
699
ce6120cc 700 codec->dapm.bias_level = level;
f2644a2c
MB		 701
702 return 0;
703}
704
705/* PLL divisors */
706struct _pll_div {
707 u32 pre_div:1;
708 u32 n:4;
709 u32 k:24;
710};
711
712/* The size in bits of the pll divide multiplied by 10
713 * to allow rounding later */
714#define FIXED_PLL_SIZE ((1 << 24) * 10)
715
716static int pll_factors(unsigned int source, unsigned int target,
717 struct _pll_div *pll_div)
718{
719 unsigned long long Kpart;
720 unsigned int K, Ndiv, Nmod;
721
722 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
723
724 /* Scale up target to PLL operating frequency */
725 target *= 4;
726
727 Ndiv = target / source;
728 if (Ndiv < 6) {
729 source >>= 1;
730 pll_div->pre_div = 1;
731 Ndiv = target / source;
732 } else
733 pll_div->pre_div = 0;
734
735 if ((Ndiv < 6) || (Ndiv > 12)) {
736 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
737 return -EINVAL;
738 }
739
740 pll_div->n = Ndiv;
741 Nmod = target % source;
742 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
743
744 do_div(Kpart, source);
745
746 K = Kpart & 0xFFFFFFFF;
747
748 /* Check if we need to round */
749 if ((K % 10) >= 5)
750 K += 5;
751
752 /* Move down to proper range now rounding is done */
753 K /= 10;
754
755 pll_div->k = K;
756
757 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
758 pll_div->n, pll_div->k, pll_div->pre_div);
759
760 return 0;
761}
762
85488037
MB		 763static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
764 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 765{
766 struct snd_soc_codec *codec = codec_dai->codec;
767 u16 reg;
768 static struct _pll_div pll_div;
769 int ret;
770
771 if (freq_in && freq_out) {
772 ret = pll_factors(freq_in, freq_out, &pll_div);
773 if (ret != 0)
774 return ret;
775 }
776
777 /* Disable the PLL: even if we are changing the frequency the
778 * PLL needs to be disabled while we do so. */
16b24881
AL		 779 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
780 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
f2644a2c
MB		 781
782 if (!freq_in || !freq_out)
783 return 0;
784
17a52fd6 785 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 786 reg |= pll_div.pre_div << 4;
787 reg |= pll_div.n;
788
789 if (pll_div.k) {
790 reg |= 0x20;
791
17a52fd6
MB		 792 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
793 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
794 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
f2644a2c 795 }
17a52fd6 796 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 797
798 /* Turn it on */
16b24881 799 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
f2644a2c 800 msleep(250);
16b24881 801 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
f2644a2c
MB		 802
803 return 0;
804}
805
806static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
807 int div_id, int div)
808{
809 struct snd_soc_codec *codec = codec_dai->codec;
810 u16 reg;
811
812 switch (div_id) {
f2644a2c 813 case WM8960_SYSCLKDIV:
17a52fd6
MB		 814 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
815 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 816 break;
817 case WM8960_DACDIV:
17a52fd6
MB		 818 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
819 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 820 break;
821 case WM8960_OPCLKDIV:
17a52fd6
MB		 822 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
823 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 824 break;
825 case WM8960_DCLKDIV:
17a52fd6
MB		 826 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
827 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 828 break;
829 case WM8960_TOCLKSEL:
17a52fd6
MB		 830 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
831 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 832 break;
833 default:
834 return -EINVAL;
835 }
836
837 return 0;
838}
839
f0fba2ad
LG		 840static int wm8960_set_bias_level(struct snd_soc_codec *codec,
841 enum snd_soc_bias_level level)
842{
843 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
844
845 return wm8960->set_bias_level(codec, level);
846}
847
f2644a2c
MB		 848#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
849
850#define WM8960_FORMATS \
851 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
852 SNDRV_PCM_FMTBIT_S24_LE)
853
85e7652d 854static const struct snd_soc_dai_ops wm8960_dai_ops = {
f2644a2c
MB		 855 .hw_params = wm8960_hw_params,
856 .digital_mute = wm8960_mute,
857 .set_fmt = wm8960_set_dai_fmt,
858 .set_clkdiv = wm8960_set_dai_clkdiv,
859 .set_pll = wm8960_set_dai_pll,
860};
861
f0fba2ad
LG		 862static struct snd_soc_dai_driver wm8960_dai = {
863 .name = "wm8960-hifi",
f2644a2c
MB		 864 .playback = {
865 .stream_name = "Playback",
866 .channels_min = 1,
867 .channels_max = 2,
868 .rates = WM8960_RATES,
869 .formats = WM8960_FORMATS,},
870 .capture = {
871 .stream_name = "Capture",
872 .channels_min = 1,
873 .channels_max = 2,
874 .rates = WM8960_RATES,
875 .formats = WM8960_FORMATS,},
876 .ops = &wm8960_dai_ops,
877 .symmetric_rates = 1,
878};
f2644a2c 879
84b315ee 880static int wm8960_suspend(struct snd_soc_codec *codec)
f2644a2c 881{
f0fba2ad 882 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 883
f0fba2ad 884 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 885 return 0;
886}
887
f0fba2ad 888static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 889{
f0fba2ad 890 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 891
f0fba2ad 892 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 893 return 0;
894}
895
f0fba2ad 896static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 897{
f0fba2ad
LG		 898 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
899 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c 900 int ret;
f2644a2c 901
f0fba2ad 902 wm8960->set_bias_level = wm8960_set_bias_level_out3;
913d7b4c 903
f2644a2c
MB		 904 if (!pdata) {
905 dev_warn(codec->dev, "No platform data supplied\n");
906 } else {
907 if (pdata->dres > WM8960_DRES_MAX) {
908 dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
909 pdata->dres = 0;
910 }
913d7b4c
MB		 911
912 if (pdata->capless)
f0fba2ad 913 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 914 }
915
f0fba2ad 916 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
17a52fd6
MB		 917 if (ret < 0) {
918 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 919 return ret;
17a52fd6
MB		 920 }
921
f2644a2c
MB		 922 ret = wm8960_reset(codec);
923 if (ret < 0) {
924 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 925 return ret;
f2644a2c
MB		 926 }
927
f0fba2ad 928 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 929
930 /* Latch the update bits */
16b24881
AL		 931 snd_soc_update_bits(codec, WM8960_LINVOL, 0x100, 0x100);
932 snd_soc_update_bits(codec, WM8960_RINVOL, 0x100, 0x100);
933 snd_soc_update_bits(codec, WM8960_LADC, 0x100, 0x100);
934 snd_soc_update_bits(codec, WM8960_RADC, 0x100, 0x100);
935 snd_soc_update_bits(codec, WM8960_LDAC, 0x100, 0x100);
936 snd_soc_update_bits(codec, WM8960_RDAC, 0x100, 0x100);
937 snd_soc_update_bits(codec, WM8960_LOUT1, 0x100, 0x100);
938 snd_soc_update_bits(codec, WM8960_ROUT1, 0x100, 0x100);
939 snd_soc_update_bits(codec, WM8960_LOUT2, 0x100, 0x100);
940 snd_soc_update_bits(codec, WM8960_ROUT2, 0x100, 0x100);
f2644a2c 941
022658be 942 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
f0fba2ad
LG		 943 ARRAY_SIZE(wm8960_snd_controls));
944 wm8960_add_widgets(codec);
f2644a2c
MB		 945
946 return 0;
947}
948
f0fba2ad
LG		 949/* power down chip */
950static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 951{
f0fba2ad
LG		 952 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
953
954 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
955 return 0;
f2644a2c
MB		 956}
957
f0fba2ad
LG		 958static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
959 .probe = wm8960_probe,
960 .remove = wm8960_remove,
961 .suspend = wm8960_suspend,
962 .resume = wm8960_resume,
963 .set_bias_level = wm8960_set_bias_level,
964 .reg_cache_size = ARRAY_SIZE(wm8960_reg),
965 .reg_word_size = sizeof(u16),
966 .reg_cache_default = wm8960_reg,
967};
968
f2644a2c
MB		 969static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
970 const struct i2c_device_id *id)
971{
972 struct wm8960_priv *wm8960;
f0fba2ad 973 int ret;
f2644a2c 974
b9791c01
MB		 975 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
976 GFP_KERNEL);
f2644a2c
MB		 977 if (wm8960 == NULL)
978 return -ENOMEM;
979
f2644a2c 980 i2c_set_clientdata(i2c, wm8960);
7f984b55 981 wm8960->control_type = SND_SOC_I2C;
f2644a2c 982
f0fba2ad
LG		 983 ret = snd_soc_register_codec(&i2c->dev,
984 &soc_codec_dev_wm8960, &wm8960_dai, 1);
b9791c01 985
f0fba2ad 986 return ret;
f2644a2c
MB		 987}
988
989static __devexit int wm8960_i2c_remove(struct i2c_client *client)
990{
f0fba2ad 991 snd_soc_unregister_codec(&client->dev);
f2644a2c
MB		 992 return 0;
993}
994
995static const struct i2c_device_id wm8960_i2c_id[] = {
996 { "wm8960", 0 },
997 { }
998};
999MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1000
1001static struct i2c_driver wm8960_i2c_driver = {
1002 .driver = {
091edccf 1003 .name = "wm8960",
f2644a2c
MB		 1004 .owner = THIS_MODULE,
1005 },
1006 .probe = wm8960_i2c_probe,
1007 .remove = __devexit_p(wm8960_i2c_remove),
1008 .id_table = wm8960_i2c_id,
1009};
1010
1011static int __init wm8960_modinit(void)
1012{
f0fba2ad 1013 int ret = 0;
f2644a2c
MB		 1014 ret = i2c_add_driver(&wm8960_i2c_driver);
1015 if (ret != 0) {
1016 printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
1017 ret);
1018 }
f2644a2c
MB		 1019 return ret;
1020}
1021module_init(wm8960_modinit);
1022
1023static void __exit wm8960_exit(void)
1024{
1025 i2c_del_driver(&wm8960_i2c_driver);
1026}
1027module_exit(wm8960_exit);
1028
f2644a2c
MB		 1029MODULE_DESCRIPTION("ASoC WM8960 driver");
1030MODULE_AUTHOR("Liam Girdwood");
1031MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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