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Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / sound / soc / codecs / wm8960.c
CommitLineData
f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
656baaeb
MB		 4 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
f2644a2c
MB		 6 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
5a0e3ad6 19#include <linux/slab.h>
f2644a2c
MB		 20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
f2644a2c
MB		 24#include <sound/initval.h>
25#include <sound/tlv.h>
b6877a47 26#include <sound/wm8960.h>
f2644a2c
MB		 27
28#include "wm8960.h"
29
f2644a2c 30/* R25 - Power 1 */
913d7b4c 31#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 32#define WM8960_VREF 0x40
33
913d7b4c
MB		 34/* R26 - Power 2 */
35#define WM8960_PWR2_LOUT1 0x40
36#define WM8960_PWR2_ROUT1 0x20
37#define WM8960_PWR2_OUT3 0x02
38
f2644a2c
MB		 39/* R28 - Anti-pop 1 */
40#define WM8960_POBCTRL 0x80
41#define WM8960_BUFDCOPEN 0x10
42#define WM8960_BUFIOEN 0x08
43#define WM8960_SOFT_ST 0x04
44#define WM8960_HPSTBY 0x01
45
46/* R29 - Anti-pop 2 */
47#define WM8960_DISOP 0x40
913d7b4c 48#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 49
50/*
51 * wm8960 register cache
52 * We can't read the WM8960 register space when we are
53 * using 2 wire for device control, so we cache them instead.
54 */
55static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
56 0x0097, 0x0097, 0x0000, 0x0000,
57 0x0000, 0x0008, 0x0000, 0x000a,
58 0x01c0, 0x0000, 0x00ff, 0x00ff,
59 0x0000, 0x0000, 0x0000, 0x0000,
60 0x0000, 0x007b, 0x0100, 0x0032,
61 0x0000, 0x00c3, 0x00c3, 0x01c0,
62 0x0000, 0x0000, 0x0000, 0x0000,
63 0x0000, 0x0000, 0x0000, 0x0000,
64 0x0100, 0x0100, 0x0050, 0x0050,
65 0x0050, 0x0050, 0x0000, 0x0000,
66 0x0000, 0x0000, 0x0040, 0x0000,
67 0x0000, 0x0050, 0x0050, 0x0000,
68 0x0002, 0x0037, 0x004d, 0x0080,
69 0x0008, 0x0031, 0x0026, 0x00e9,
70};
71
72struct wm8960_priv {
f0fba2ad 73 enum snd_soc_control_type control_type;
f0fba2ad
LG		 74 int (*set_bias_level)(struct snd_soc_codec *,
75 enum snd_soc_bias_level level);
913d7b4c
MB		 76 struct snd_soc_dapm_widget *lout1;
77 struct snd_soc_dapm_widget *rout1;
78 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 79 bool deemph;
80 int playback_fs;
f2644a2c
MB		 81};
82
17a52fd6 83#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 84
85/* enumerated controls */
f2644a2c
MB		 86static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
87 "Right Inverted", "Stereo Inversion"};
88static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
89static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
90static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
91static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
92
93static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 94 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
95 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
96 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
97 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
98 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
99 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
100};
101
afd6d36a
MB		 102static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
103
104static int wm8960_set_deemph(struct snd_soc_codec *codec)
105{
106 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
107 int val, i, best;
108
109 /* If we're using deemphasis select the nearest available sample
110 * rate.
111 */
112 if (wm8960->deemph) {
113 best = 1;
114 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
115 if (abs(deemph_settings[i] - wm8960->playback_fs) <
116 abs(deemph_settings[best] - wm8960->playback_fs))
117 best = i;
118 }
119
120 val = best << 1;
121 } else {
122 val = 0;
123 }
124
125 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
126
127 return snd_soc_update_bits(codec, WM8960_DACCTL1,
128 0x6, val);
129}
130
131static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
132 struct snd_ctl_elem_value *ucontrol)
133{
134 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
135 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
136
3f343f85
DA		 137 ucontrol->value.enumerated.item[0] = wm8960->deemph;
138 return 0;
afd6d36a
MB		 139}
140
141static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
142 struct snd_ctl_elem_value *ucontrol)
143{
144 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
145 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
146 int deemph = ucontrol->value.enumerated.item[0];
147
148 if (deemph > 1)
149 return -EINVAL;
150
151 wm8960->deemph = deemph;
152
153 return wm8960_set_deemph(codec);
154}
155
f2644a2c
MB		 156static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
157static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
158static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
159static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
160
161static const struct snd_kcontrol_new wm8960_snd_controls[] = {
162SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
163 0, 63, 0, adc_tlv),
164SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
165 6, 1, 0),
166SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
167 7, 1, 0),
168
169SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
170 0, 255, 0, dac_tlv),
171
172SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
173 0, 127, 0, out_tlv),
174SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
175 7, 1, 0),
176
177SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
178 0, 127, 0, out_tlv),
179SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
180 7, 1, 0),
181SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
182SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
183
184SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 185SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 186SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
187
188SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 189SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
190 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 191
4faaa8d9
MB		 192SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
193SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 194SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
195SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
196
4faaa8d9 197SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 198SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
199SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
200SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
201SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 202SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 203SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
204SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
205
206SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
207SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
208
209SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
210 0, 127, 0),
211
212SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
213 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
214SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
215 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
216SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
217 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
218SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
219 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
220};
221
222static const struct snd_kcontrol_new wm8960_lin_boost[] = {
223SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
224SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
225SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
226};
227
228static const struct snd_kcontrol_new wm8960_lin[] = {
229SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
230};
231
232static const struct snd_kcontrol_new wm8960_rin_boost[] = {
233SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
234SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
235SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
236};
237
238static const struct snd_kcontrol_new wm8960_rin[] = {
239SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
240};
241
242static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
243SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
244SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
245SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
246};
247
248static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
249SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
250SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
251SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
252};
253
254static const struct snd_kcontrol_new wm8960_mono_out[] = {
255SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
256SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
257};
258
259static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
260SND_SOC_DAPM_INPUT("LINPUT1"),
261SND_SOC_DAPM_INPUT("RINPUT1"),
262SND_SOC_DAPM_INPUT("LINPUT2"),
263SND_SOC_DAPM_INPUT("RINPUT2"),
264SND_SOC_DAPM_INPUT("LINPUT3"),
265SND_SOC_DAPM_INPUT("RINPUT3"),
266
187774cb 267SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
f2644a2c
MB		 268
269SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
270 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
271SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
272 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
273
274SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
275 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
276SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
277 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
278
279SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
280SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
281
282SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
283SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
284
285SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
286 &wm8960_loutput_mixer[0],
287 ARRAY_SIZE(wm8960_loutput_mixer)),
288SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
289 &wm8960_routput_mixer[0],
290 ARRAY_SIZE(wm8960_routput_mixer)),
291
f2644a2c
MB		 292SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
293SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
294
295SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
296SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
297
298SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
299SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
300
301SND_SOC_DAPM_OUTPUT("SPK_LP"),
302SND_SOC_DAPM_OUTPUT("SPK_LN"),
303SND_SOC_DAPM_OUTPUT("HP_L"),
304SND_SOC_DAPM_OUTPUT("HP_R"),
305SND_SOC_DAPM_OUTPUT("SPK_RP"),
306SND_SOC_DAPM_OUTPUT("SPK_RN"),
307SND_SOC_DAPM_OUTPUT("OUT3"),
308};
309
913d7b4c
MB		 310static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
311SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
312 &wm8960_mono_out[0],
313 ARRAY_SIZE(wm8960_mono_out)),
314};
315
316/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
317static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
318SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
319};
320
f2644a2c
MB		 321static const struct snd_soc_dapm_route audio_paths[] = {
322 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
323 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
324 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
325
326 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
327 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
328 { "Left Input Mixer", NULL, "LINPUT2" },
329 { "Left Input Mixer", NULL, "LINPUT3" },
330
331 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
332 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
333 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
334
335 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
336 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
337 { "Right Input Mixer", NULL, "RINPUT2" },
338 { "Right Input Mixer", NULL, "LINPUT3" },
339
340 { "Left ADC", NULL, "Left Input Mixer" },
341 { "Right ADC", NULL, "Right Input Mixer" },
342
343 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
344 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
345 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
346
347 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
348 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
349 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
350
f2644a2c
MB		 351 { "LOUT1 PGA", NULL, "Left Output Mixer" },
352 { "ROUT1 PGA", NULL, "Right Output Mixer" },
353
354 { "HP_L", NULL, "LOUT1 PGA" },
355 { "HP_R", NULL, "ROUT1 PGA" },
356
357 { "Left Speaker PGA", NULL, "Left Output Mixer" },
358 { "Right Speaker PGA", NULL, "Right Output Mixer" },
359
360 { "Left Speaker Output", NULL, "Left Speaker PGA" },
361 { "Right Speaker Output", NULL, "Right Speaker PGA" },
362
363 { "SPK_LN", NULL, "Left Speaker Output" },
364 { "SPK_LP", NULL, "Left Speaker Output" },
365 { "SPK_RN", NULL, "Right Speaker Output" },
366 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 367};
368
369static const struct snd_soc_dapm_route audio_paths_out3[] = {
370 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
371 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 372
373 { "OUT3", NULL, "Mono Output Mixer", }
374};
375
913d7b4c
MB		 376static const struct snd_soc_dapm_route audio_paths_capless[] = {
377 { "HP_L", NULL, "OUT3 VMID" },
378 { "HP_R", NULL, "OUT3 VMID" },
379
380 { "OUT3 VMID", NULL, "Left Output Mixer" },
381 { "OUT3 VMID", NULL, "Right Output Mixer" },
382};
383
f2644a2c
MB		 384static int wm8960_add_widgets(struct snd_soc_codec *codec)
385{
913d7b4c 386 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 387 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
ce6120cc 388 struct snd_soc_dapm_context *dapm = &codec->dapm;
913d7b4c
MB		 389 struct snd_soc_dapm_widget *w;
390
ce6120cc 391 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
f2644a2c
MB		 392 ARRAY_SIZE(wm8960_dapm_widgets));
393
ce6120cc 394 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 395
913d7b4c
MB		 396 /* In capless mode OUT3 is used to provide VMID for the
397 * headphone outputs, otherwise it is used as a mono mixer.
398 */
399 if (pdata && pdata->capless) {
ce6120cc 400 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
913d7b4c
MB		 401 ARRAY_SIZE(wm8960_dapm_widgets_capless));
402
ce6120cc 403 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
913d7b4c
MB		 404 ARRAY_SIZE(audio_paths_capless));
405 } else {
ce6120cc 406 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
913d7b4c
MB		 407 ARRAY_SIZE(wm8960_dapm_widgets_out3));
408
ce6120cc 409 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
913d7b4c
MB		 410 ARRAY_SIZE(audio_paths_out3));
411 }
412
413 /* We need to power up the headphone output stage out of
414 * sequence for capless mode. To save scanning the widget
415 * list each time to find the desired power state do so now
416 * and save the result.
417 */
97c866de
JN		 418 list_for_each_entry(w, &codec->card->widgets, list) {
419 if (w->dapm != &codec->dapm)
420 continue;
913d7b4c
MB		 421 if (strcmp(w->name, "LOUT1 PGA") == 0)
422 wm8960->lout1 = w;
423 if (strcmp(w->name, "ROUT1 PGA") == 0)
424 wm8960->rout1 = w;
425 if (strcmp(w->name, "OUT3 VMID") == 0)
426 wm8960->out3 = w;
427 }
428
f2644a2c
MB		 429 return 0;
430}
431
432static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
433 unsigned int fmt)
434{
435 struct snd_soc_codec *codec = codec_dai->codec;
436 u16 iface = 0;
437
438 /* set master/slave audio interface */
439 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
440 case SND_SOC_DAIFMT_CBM_CFM:
441 iface |= 0x0040;
442 break;
443 case SND_SOC_DAIFMT_CBS_CFS:
444 break;
445 default:
446 return -EINVAL;
447 }
448
449 /* interface format */
450 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
451 case SND_SOC_DAIFMT_I2S:
452 iface |= 0x0002;
453 break;
454 case SND_SOC_DAIFMT_RIGHT_J:
455 break;
456 case SND_SOC_DAIFMT_LEFT_J:
457 iface |= 0x0001;
458 break;
459 case SND_SOC_DAIFMT_DSP_A:
460 iface |= 0x0003;
461 break;
462 case SND_SOC_DAIFMT_DSP_B:
463 iface |= 0x0013;
464 break;
465 default:
466 return -EINVAL;
467 }
468
469 /* clock inversion */
470 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
471 case SND_SOC_DAIFMT_NB_NF:
472 break;
473 case SND_SOC_DAIFMT_IB_IF:
474 iface |= 0x0090;
475 break;
476 case SND_SOC_DAIFMT_IB_NF:
477 iface |= 0x0080;
478 break;
479 case SND_SOC_DAIFMT_NB_IF:
480 iface |= 0x0010;
481 break;
482 default:
483 return -EINVAL;
484 }
485
486 /* set iface */
17a52fd6 487 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 488 return 0;
489}
490
db059c0f
MB		 491static struct {
492 int rate;
493 unsigned int val;
494} alc_rates[] = {
495 { 48000, 0 },
496 { 44100, 0 },
497 { 32000, 1 },
498 { 22050, 2 },
499 { 24000, 2 },
500 { 16000, 3 },
501 { 11250, 4 },
502 { 12000, 4 },
503 { 8000, 5 },
504};
505
f2644a2c
MB		 506static int wm8960_hw_params(struct snd_pcm_substream *substream,
507 struct snd_pcm_hw_params *params,
508 struct snd_soc_dai *dai)
509{
e6968a17 510 struct snd_soc_codec *codec = dai->codec;
afd6d36a 511 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 512 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
db059c0f 513 int i;
f2644a2c
MB		 514
515 /* bit size */
516 switch (params_format(params)) {
517 case SNDRV_PCM_FORMAT_S16_LE:
518 break;
519 case SNDRV_PCM_FORMAT_S20_3LE:
520 iface |= 0x0004;
521 break;
522 case SNDRV_PCM_FORMAT_S24_LE:
523 iface |= 0x0008;
524 break;
525 }
526
afd6d36a
MB		 527 /* Update filters for the new rate */
528 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
529 wm8960->playback_fs = params_rate(params);
530 wm8960_set_deemph(codec);
db059c0f
MB		 531 } else {
532 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
533 if (alc_rates[i].rate == params_rate(params))
534 snd_soc_update_bits(codec,
535 WM8960_ADDCTL3, 0x7,
536 alc_rates[i].val);
afd6d36a
MB		 537 }
538
f2644a2c 539 /* set iface */
17a52fd6 540 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 541 return 0;
542}
543
544static int wm8960_mute(struct snd_soc_dai *dai, int mute)
545{
546 struct snd_soc_codec *codec = dai->codec;
f2644a2c
MB		 547
548 if (mute)
16b24881 549 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
f2644a2c 550 else
16b24881 551 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
f2644a2c
MB		 552 return 0;
553}
554
913d7b4c
MB		 555static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
556 enum snd_soc_bias_level level)
f2644a2c 557{
f2644a2c
MB		 558 switch (level) {
559 case SND_SOC_BIAS_ON:
560 break;
561
562 case SND_SOC_BIAS_PREPARE:
563 /* Set VMID to 2x50k */
16b24881 564 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
f2644a2c
MB		 565 break;
566
567 case SND_SOC_BIAS_STANDBY:
ce6120cc 568 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
bc45df2d
AL		 569 snd_soc_cache_sync(codec);
570
f2644a2c 571 /* Enable anti-pop features */
17a52fd6 572 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 573 WM8960_POBCTRL | WM8960_SOFT_ST |
574 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 575
576 /* Enable & ramp VMID at 2x50k */
16b24881 577 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
f2644a2c
MB		 578 msleep(100);
579
580 /* Enable VREF */
16b24881
AL		 581 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
582 WM8960_VREF);
f2644a2c
MB		 583
584 /* Disable anti-pop features */
17a52fd6 585 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 586 }
587
588 /* Set VMID to 2x250k */
16b24881 589 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
f2644a2c
MB		 590 break;
591
592 case SND_SOC_BIAS_OFF:
593 /* Enable anti-pop features */
17a52fd6 594 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 595 WM8960_POBCTRL | WM8960_SOFT_ST |
596 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
597
598 /* Disable VMID and VREF, let them discharge */
17a52fd6 599 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 600 msleep(600);
913d7b4c
MB		 601 break;
602 }
603
ce6120cc 604 codec->dapm.bias_level = level;
913d7b4c
MB		 605
606 return 0;
607}
608
609static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
610 enum snd_soc_bias_level level)
611{
b2c812e2 612 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 613 int reg;
614
615 switch (level) {
616 case SND_SOC_BIAS_ON:
617 break;
618
619 case SND_SOC_BIAS_PREPARE:
ce6120cc 620 switch (codec->dapm.bias_level) {
913d7b4c
MB		 621 case SND_SOC_BIAS_STANDBY:
622 /* Enable anti pop mode */
623 snd_soc_update_bits(codec, WM8960_APOP1,
624 WM8960_POBCTRL | WM8960_SOFT_ST |
625 WM8960_BUFDCOPEN,
626 WM8960_POBCTRL | WM8960_SOFT_ST |
627 WM8960_BUFDCOPEN);
628
629 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
630 reg = 0;
631 if (wm8960->lout1 && wm8960->lout1->power)
632 reg |= WM8960_PWR2_LOUT1;
633 if (wm8960->rout1 && wm8960->rout1->power)
634 reg |= WM8960_PWR2_ROUT1;
635 if (wm8960->out3 && wm8960->out3->power)
636 reg |= WM8960_PWR2_OUT3;
637 snd_soc_update_bits(codec, WM8960_POWER2,
638 WM8960_PWR2_LOUT1 |
639 WM8960_PWR2_ROUT1 |
640 WM8960_PWR2_OUT3, reg);
641
642 /* Enable VMID at 2*50k */
643 snd_soc_update_bits(codec, WM8960_POWER1,
644 WM8960_VMID_MASK, 0x80);
645
646 /* Ramp */
647 msleep(100);
648
649 /* Enable VREF */
650 snd_soc_update_bits(codec, WM8960_POWER1,
651 WM8960_VREF, WM8960_VREF);
652
653 msleep(100);
654 break;
655
656 case SND_SOC_BIAS_ON:
657 /* Enable anti-pop mode */
658 snd_soc_update_bits(codec, WM8960_APOP1,
659 WM8960_POBCTRL | WM8960_SOFT_ST |
660 WM8960_BUFDCOPEN,
661 WM8960_POBCTRL | WM8960_SOFT_ST |
662 WM8960_BUFDCOPEN);
663
664 /* Disable VMID and VREF */
665 snd_soc_update_bits(codec, WM8960_POWER1,
666 WM8960_VREF | WM8960_VMID_MASK, 0);
667 break;
668
bc45df2d
AL		 669 case SND_SOC_BIAS_OFF:
670 snd_soc_cache_sync(codec);
671 break;
913d7b4c
MB		 672 default:
673 break;
674 }
675 break;
f2644a2c 676
913d7b4c 677 case SND_SOC_BIAS_STANDBY:
ce6120cc 678 switch (codec->dapm.bias_level) {
913d7b4c
MB		 679 case SND_SOC_BIAS_PREPARE:
680 /* Disable HP discharge */
681 snd_soc_update_bits(codec, WM8960_APOP2,
682 WM8960_DISOP | WM8960_DRES_MASK,
683 0);
684
685 /* Disable anti-pop features */
686 snd_soc_update_bits(codec, WM8960_APOP1,
687 WM8960_POBCTRL | WM8960_SOFT_ST |
688 WM8960_BUFDCOPEN,
689 WM8960_POBCTRL | WM8960_SOFT_ST |
690 WM8960_BUFDCOPEN);
691 break;
692
693 default:
694 break;
695 }
696 break;
f2644a2c 697
913d7b4c 698 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 699 break;
700 }
701
ce6120cc 702 codec->dapm.bias_level = level;
f2644a2c
MB		 703
704 return 0;
705}
706
707/* PLL divisors */
708struct _pll_div {
709 u32 pre_div:1;
710 u32 n:4;
711 u32 k:24;
712};
713
714/* The size in bits of the pll divide multiplied by 10
715 * to allow rounding later */
716#define FIXED_PLL_SIZE ((1 << 24) * 10)
717
718static int pll_factors(unsigned int source, unsigned int target,
719 struct _pll_div *pll_div)
720{
721 unsigned long long Kpart;
722 unsigned int K, Ndiv, Nmod;
723
724 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
725
726 /* Scale up target to PLL operating frequency */
727 target *= 4;
728
729 Ndiv = target / source;
730 if (Ndiv < 6) {
731 source >>= 1;
732 pll_div->pre_div = 1;
733 Ndiv = target / source;
734 } else
735 pll_div->pre_div = 0;
736
737 if ((Ndiv < 6) || (Ndiv > 12)) {
738 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
739 return -EINVAL;
740 }
741
742 pll_div->n = Ndiv;
743 Nmod = target % source;
744 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
745
746 do_div(Kpart, source);
747
748 K = Kpart & 0xFFFFFFFF;
749
750 /* Check if we need to round */
751 if ((K % 10) >= 5)
752 K += 5;
753
754 /* Move down to proper range now rounding is done */
755 K /= 10;
756
757 pll_div->k = K;
758
759 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
760 pll_div->n, pll_div->k, pll_div->pre_div);
761
762 return 0;
763}
764
85488037
MB		 765static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
766 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 767{
768 struct snd_soc_codec *codec = codec_dai->codec;
769 u16 reg;
770 static struct _pll_div pll_div;
771 int ret;
772
773 if (freq_in && freq_out) {
774 ret = pll_factors(freq_in, freq_out, &pll_div);
775 if (ret != 0)
776 return ret;
777 }
778
779 /* Disable the PLL: even if we are changing the frequency the
780 * PLL needs to be disabled while we do so. */
16b24881
AL		 781 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
782 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
f2644a2c
MB		 783
784 if (!freq_in || !freq_out)
785 return 0;
786
17a52fd6 787 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 788 reg |= pll_div.pre_div << 4;
789 reg |= pll_div.n;
790
791 if (pll_div.k) {
792 reg |= 0x20;
793
17a52fd6
MB		 794 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
795 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
796 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
f2644a2c 797 }
17a52fd6 798 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 799
800 /* Turn it on */
16b24881 801 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
f2644a2c 802 msleep(250);
16b24881 803 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
f2644a2c
MB		 804
805 return 0;
806}
807
808static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
809 int div_id, int div)
810{
811 struct snd_soc_codec *codec = codec_dai->codec;
812 u16 reg;
813
814 switch (div_id) {
f2644a2c 815 case WM8960_SYSCLKDIV:
17a52fd6
MB		 816 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
817 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 818 break;
819 case WM8960_DACDIV:
17a52fd6
MB		 820 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
821 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 822 break;
823 case WM8960_OPCLKDIV:
17a52fd6
MB		 824 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
825 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 826 break;
827 case WM8960_DCLKDIV:
17a52fd6
MB		 828 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
829 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 830 break;
831 case WM8960_TOCLKSEL:
17a52fd6
MB		 832 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
833 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 834 break;
835 default:
836 return -EINVAL;
837 }
838
839 return 0;
840}
841
f0fba2ad
LG		 842static int wm8960_set_bias_level(struct snd_soc_codec *codec,
843 enum snd_soc_bias_level level)
844{
845 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
846
847 return wm8960->set_bias_level(codec, level);
848}
849
f2644a2c
MB		 850#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
851
852#define WM8960_FORMATS \
853 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
854 SNDRV_PCM_FMTBIT_S24_LE)
855
85e7652d 856static const struct snd_soc_dai_ops wm8960_dai_ops = {
f2644a2c
MB		 857 .hw_params = wm8960_hw_params,
858 .digital_mute = wm8960_mute,
859 .set_fmt = wm8960_set_dai_fmt,
860 .set_clkdiv = wm8960_set_dai_clkdiv,
861 .set_pll = wm8960_set_dai_pll,
862};
863
f0fba2ad
LG		 864static struct snd_soc_dai_driver wm8960_dai = {
865 .name = "wm8960-hifi",
f2644a2c
MB		 866 .playback = {
867 .stream_name = "Playback",
868 .channels_min = 1,
869 .channels_max = 2,
870 .rates = WM8960_RATES,
871 .formats = WM8960_FORMATS,},
872 .capture = {
873 .stream_name = "Capture",
874 .channels_min = 1,
875 .channels_max = 2,
876 .rates = WM8960_RATES,
877 .formats = WM8960_FORMATS,},
878 .ops = &wm8960_dai_ops,
879 .symmetric_rates = 1,
880};
f2644a2c 881
84b315ee 882static int wm8960_suspend(struct snd_soc_codec *codec)
f2644a2c 883{
f0fba2ad 884 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 885
f0fba2ad 886 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 887 return 0;
888}
889
f0fba2ad 890static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 891{
f0fba2ad 892 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 893
f0fba2ad 894 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 895 return 0;
896}
897
f0fba2ad 898static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 899{
f0fba2ad
LG		 900 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
901 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c 902 int ret;
f2644a2c 903
f0fba2ad 904 wm8960->set_bias_level = wm8960_set_bias_level_out3;
913d7b4c 905
f2644a2c
MB		 906 if (!pdata) {
907 dev_warn(codec->dev, "No platform data supplied\n");
908 } else {
909 if (pdata->dres > WM8960_DRES_MAX) {
910 dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
911 pdata->dres = 0;
912 }
913d7b4c
MB		 913
914 if (pdata->capless)
f0fba2ad 915 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 916 }
917
f0fba2ad 918 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
17a52fd6
MB		 919 if (ret < 0) {
920 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
f0fba2ad 921 return ret;
17a52fd6
MB		 922 }
923
f2644a2c
MB		 924 ret = wm8960_reset(codec);
925 if (ret < 0) {
926 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 927 return ret;
f2644a2c
MB		 928 }
929
f0fba2ad 930 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 931
932 /* Latch the update bits */
16b24881
AL		 933 snd_soc_update_bits(codec, WM8960_LINVOL, 0x100, 0x100);
934 snd_soc_update_bits(codec, WM8960_RINVOL, 0x100, 0x100);
935 snd_soc_update_bits(codec, WM8960_LADC, 0x100, 0x100);
936 snd_soc_update_bits(codec, WM8960_RADC, 0x100, 0x100);
937 snd_soc_update_bits(codec, WM8960_LDAC, 0x100, 0x100);
938 snd_soc_update_bits(codec, WM8960_RDAC, 0x100, 0x100);
939 snd_soc_update_bits(codec, WM8960_LOUT1, 0x100, 0x100);
940 snd_soc_update_bits(codec, WM8960_ROUT1, 0x100, 0x100);
941 snd_soc_update_bits(codec, WM8960_LOUT2, 0x100, 0x100);
942 snd_soc_update_bits(codec, WM8960_ROUT2, 0x100, 0x100);
f2644a2c 943
022658be 944 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
f0fba2ad
LG		 945 ARRAY_SIZE(wm8960_snd_controls));
946 wm8960_add_widgets(codec);
f2644a2c
MB		 947
948 return 0;
949}
950
f0fba2ad
LG		 951/* power down chip */
952static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 953{
f0fba2ad
LG		 954 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
955
956 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
957 return 0;
f2644a2c
MB		 958}
959
f0fba2ad
LG		 960static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
961 .probe = wm8960_probe,
962 .remove = wm8960_remove,
963 .suspend = wm8960_suspend,
964 .resume = wm8960_resume,
965 .set_bias_level = wm8960_set_bias_level,
966 .reg_cache_size = ARRAY_SIZE(wm8960_reg),
967 .reg_word_size = sizeof(u16),
968 .reg_cache_default = wm8960_reg,
969};
970
f2644a2c
MB		 971static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
972 const struct i2c_device_id *id)
973{
974 struct wm8960_priv *wm8960;
f0fba2ad 975 int ret;
f2644a2c 976
b9791c01
MB		 977 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
978 GFP_KERNEL);
f2644a2c
MB		 979 if (wm8960 == NULL)
980 return -ENOMEM;
981
f2644a2c 982 i2c_set_clientdata(i2c, wm8960);
7f984b55 983 wm8960->control_type = SND_SOC_I2C;
f2644a2c 984
f0fba2ad
LG		 985 ret = snd_soc_register_codec(&i2c->dev,
986 &soc_codec_dev_wm8960, &wm8960_dai, 1);
b9791c01 987
f0fba2ad 988 return ret;
f2644a2c
MB		 989}
990
991static __devexit int wm8960_i2c_remove(struct i2c_client *client)
992{
f0fba2ad 993 snd_soc_unregister_codec(&client->dev);
f2644a2c
MB		 994 return 0;
995}
996
997static const struct i2c_device_id wm8960_i2c_id[] = {
998 { "wm8960", 0 },
999 { }
1000};
1001MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1002
1003static struct i2c_driver wm8960_i2c_driver = {
1004 .driver = {
091edccf 1005 .name = "wm8960",
f2644a2c
MB		 1006 .owner = THIS_MODULE,
1007 },
1008 .probe = wm8960_i2c_probe,
1009 .remove = __devexit_p(wm8960_i2c_remove),
1010 .id_table = wm8960_i2c_id,
1011};
1012
1013static int __init wm8960_modinit(void)
1014{
f0fba2ad 1015 int ret = 0;
f2644a2c
MB		 1016 ret = i2c_add_driver(&wm8960_i2c_driver);
1017 if (ret != 0) {
1018 printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
1019 ret);
1020 }
f2644a2c
MB		 1021 return ret;
1022}
1023module_init(wm8960_modinit);
1024
1025static void __exit wm8960_exit(void)
1026{
1027 i2c_del_driver(&wm8960_i2c_driver);
1028}
1029module_exit(wm8960_exit);
1030
f2644a2c
MB		 1031MODULE_DESCRIPTION("ASoC WM8960 driver");
1032MODULE_AUTHOR("Liam Girdwood");
1033MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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