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f2644a2c MB |
1 | /* |
2 | * wm8960.c -- WM8960 ALSA SoC Audio driver | |
3 | * | |
656baaeb MB |
4 | * Copyright 2007-11 Wolfson Microelectronics, plc |
5 | * | |
f2644a2c MB |
6 | * Author: Liam Girdwood |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/moduleparam.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/pm.h> | |
75aa8868 | 18 | #include <linux/clk.h> |
f2644a2c | 19 | #include <linux/i2c.h> |
5a0e3ad6 | 20 | #include <linux/slab.h> |
f2644a2c MB |
21 | #include <sound/core.h> |
22 | #include <sound/pcm.h> | |
23 | #include <sound/pcm_params.h> | |
24 | #include <sound/soc.h> | |
f2644a2c MB |
25 | #include <sound/initval.h> |
26 | #include <sound/tlv.h> | |
b6877a47 | 27 | #include <sound/wm8960.h> |
f2644a2c MB |
28 | |
29 | #include "wm8960.h" | |
30 | ||
f2644a2c | 31 | /* R25 - Power 1 */ |
913d7b4c | 32 | #define WM8960_VMID_MASK 0x180 |
f2644a2c MB |
33 | #define WM8960_VREF 0x40 |
34 | ||
913d7b4c MB |
35 | /* R26 - Power 2 */ |
36 | #define WM8960_PWR2_LOUT1 0x40 | |
37 | #define WM8960_PWR2_ROUT1 0x20 | |
38 | #define WM8960_PWR2_OUT3 0x02 | |
39 | ||
f2644a2c MB |
40 | /* R28 - Anti-pop 1 */ |
41 | #define WM8960_POBCTRL 0x80 | |
42 | #define WM8960_BUFDCOPEN 0x10 | |
43 | #define WM8960_BUFIOEN 0x08 | |
44 | #define WM8960_SOFT_ST 0x04 | |
45 | #define WM8960_HPSTBY 0x01 | |
46 | ||
47 | /* R29 - Anti-pop 2 */ | |
48 | #define WM8960_DISOP 0x40 | |
913d7b4c | 49 | #define WM8960_DRES_MASK 0x30 |
f2644a2c MB |
50 | |
51 | /* | |
52 | * wm8960 register cache | |
53 | * We can't read the WM8960 register space when we are | |
54 | * using 2 wire for device control, so we cache them instead. | |
55 | */ | |
0ebe36c6 | 56 | static const struct reg_default wm8960_reg_defaults[] = { |
b3df026e MB |
57 | { 0x0, 0x00a7 }, |
58 | { 0x1, 0x00a7 }, | |
0ebe36c6 MB |
59 | { 0x2, 0x0000 }, |
60 | { 0x3, 0x0000 }, | |
61 | { 0x4, 0x0000 }, | |
62 | { 0x5, 0x0008 }, | |
63 | { 0x6, 0x0000 }, | |
64 | { 0x7, 0x000a }, | |
65 | { 0x8, 0x01c0 }, | |
66 | { 0x9, 0x0000 }, | |
67 | { 0xa, 0x00ff }, | |
68 | { 0xb, 0x00ff }, | |
69 | ||
70 | { 0x10, 0x0000 }, | |
71 | { 0x11, 0x007b }, | |
72 | { 0x12, 0x0100 }, | |
73 | { 0x13, 0x0032 }, | |
74 | { 0x14, 0x0000 }, | |
75 | { 0x15, 0x00c3 }, | |
76 | { 0x16, 0x00c3 }, | |
77 | { 0x17, 0x01c0 }, | |
78 | { 0x18, 0x0000 }, | |
79 | { 0x19, 0x0000 }, | |
80 | { 0x1a, 0x0000 }, | |
81 | { 0x1b, 0x0000 }, | |
82 | { 0x1c, 0x0000 }, | |
83 | { 0x1d, 0x0000 }, | |
84 | ||
85 | { 0x20, 0x0100 }, | |
86 | { 0x21, 0x0100 }, | |
87 | { 0x22, 0x0050 }, | |
88 | ||
89 | { 0x25, 0x0050 }, | |
90 | { 0x26, 0x0000 }, | |
91 | { 0x27, 0x0000 }, | |
92 | { 0x28, 0x0000 }, | |
93 | { 0x29, 0x0000 }, | |
94 | { 0x2a, 0x0040 }, | |
95 | { 0x2b, 0x0000 }, | |
96 | { 0x2c, 0x0000 }, | |
97 | { 0x2d, 0x0050 }, | |
98 | { 0x2e, 0x0050 }, | |
99 | { 0x2f, 0x0000 }, | |
100 | { 0x30, 0x0002 }, | |
101 | { 0x31, 0x0037 }, | |
102 | ||
103 | { 0x33, 0x0080 }, | |
104 | { 0x34, 0x0008 }, | |
105 | { 0x35, 0x0031 }, | |
106 | { 0x36, 0x0026 }, | |
107 | { 0x37, 0x00e9 }, | |
f2644a2c MB |
108 | }; |
109 | ||
0ebe36c6 MB |
110 | static bool wm8960_volatile(struct device *dev, unsigned int reg) |
111 | { | |
112 | switch (reg) { | |
113 | case WM8960_RESET: | |
114 | return true; | |
115 | default: | |
116 | return false; | |
117 | } | |
118 | } | |
119 | ||
f2644a2c | 120 | struct wm8960_priv { |
75aa8868 | 121 | struct clk *mclk; |
0ebe36c6 | 122 | struct regmap *regmap; |
f0fba2ad LG |
123 | int (*set_bias_level)(struct snd_soc_codec *, |
124 | enum snd_soc_bias_level level); | |
913d7b4c MB |
125 | struct snd_soc_dapm_widget *lout1; |
126 | struct snd_soc_dapm_widget *rout1; | |
127 | struct snd_soc_dapm_widget *out3; | |
afd6d36a MB |
128 | bool deemph; |
129 | int playback_fs; | |
e2280c90 | 130 | struct wm8960_data pdata; |
f2644a2c MB |
131 | }; |
132 | ||
3ad5e861 | 133 | #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0) |
f2644a2c MB |
134 | |
135 | /* enumerated controls */ | |
f2644a2c MB |
136 | static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted", |
137 | "Right Inverted", "Stereo Inversion"}; | |
138 | static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"}; | |
139 | static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"}; | |
140 | static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"}; | |
141 | static const char *wm8960_alcmode[] = {"ALC", "Limiter"}; | |
142 | ||
143 | static const struct soc_enum wm8960_enum[] = { | |
f2644a2c MB |
144 | SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity), |
145 | SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity), | |
146 | SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff), | |
147 | SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff), | |
148 | SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc), | |
149 | SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode), | |
150 | }; | |
151 | ||
afd6d36a MB |
152 | static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; |
153 | ||
154 | static int wm8960_set_deemph(struct snd_soc_codec *codec) | |
155 | { | |
156 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); | |
157 | int val, i, best; | |
158 | ||
159 | /* If we're using deemphasis select the nearest available sample | |
160 | * rate. | |
161 | */ | |
162 | if (wm8960->deemph) { | |
163 | best = 1; | |
164 | for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { | |
165 | if (abs(deemph_settings[i] - wm8960->playback_fs) < | |
166 | abs(deemph_settings[best] - wm8960->playback_fs)) | |
167 | best = i; | |
168 | } | |
169 | ||
170 | val = best << 1; | |
171 | } else { | |
172 | val = 0; | |
173 | } | |
174 | ||
175 | dev_dbg(codec->dev, "Set deemphasis %d\n", val); | |
176 | ||
177 | return snd_soc_update_bits(codec, WM8960_DACCTL1, | |
178 | 0x6, val); | |
179 | } | |
180 | ||
181 | static int wm8960_get_deemph(struct snd_kcontrol *kcontrol, | |
182 | struct snd_ctl_elem_value *ucontrol) | |
183 | { | |
ea53bf77 | 184 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
afd6d36a MB |
185 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
186 | ||
3f343f85 DA |
187 | ucontrol->value.enumerated.item[0] = wm8960->deemph; |
188 | return 0; | |
afd6d36a MB |
189 | } |
190 | ||
191 | static int wm8960_put_deemph(struct snd_kcontrol *kcontrol, | |
192 | struct snd_ctl_elem_value *ucontrol) | |
193 | { | |
ea53bf77 | 194 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
afd6d36a MB |
195 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
196 | int deemph = ucontrol->value.enumerated.item[0]; | |
197 | ||
198 | if (deemph > 1) | |
199 | return -EINVAL; | |
200 | ||
201 | wm8960->deemph = deemph; | |
202 | ||
203 | return wm8960_set_deemph(codec); | |
204 | } | |
205 | ||
f2644a2c MB |
206 | static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0); |
207 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1); | |
208 | static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0); | |
209 | static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); | |
21eb2693 | 210 | static const DECLARE_TLV_DB_SCALE(boost_tlv, -1200, 300, 1); |
f2644a2c MB |
211 | |
212 | static const struct snd_kcontrol_new wm8960_snd_controls[] = { | |
213 | SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL, | |
214 | 0, 63, 0, adc_tlv), | |
215 | SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL, | |
216 | 6, 1, 0), | |
217 | SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL, | |
218 | 7, 1, 0), | |
219 | ||
21eb2693 MB |
220 | SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume", |
221 | WM8960_INBMIX1, 4, 7, 0, boost_tlv), | |
222 | SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume", | |
223 | WM8960_INBMIX1, 1, 7, 0, boost_tlv), | |
224 | SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume", | |
225 | WM8960_INBMIX2, 4, 7, 0, boost_tlv), | |
226 | SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume", | |
227 | WM8960_INBMIX2, 1, 7, 0, boost_tlv), | |
228 | ||
f2644a2c MB |
229 | SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC, |
230 | 0, 255, 0, dac_tlv), | |
231 | ||
232 | SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1, | |
233 | 0, 127, 0, out_tlv), | |
234 | SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1, | |
235 | 7, 1, 0), | |
236 | ||
237 | SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2, | |
238 | 0, 127, 0, out_tlv), | |
239 | SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2, | |
240 | 7, 1, 0), | |
241 | SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0), | |
242 | SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0), | |
243 | ||
244 | SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0), | |
4faaa8d9 | 245 | SOC_ENUM("ADC Polarity", wm8960_enum[0]), |
f2644a2c MB |
246 | SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0), |
247 | ||
248 | SOC_ENUM("DAC Polarity", wm8960_enum[2]), | |
afd6d36a MB |
249 | SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, |
250 | wm8960_get_deemph, wm8960_put_deemph), | |
f2644a2c | 251 | |
4faaa8d9 MB |
252 | SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]), |
253 | SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]), | |
f2644a2c MB |
254 | SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0), |
255 | SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0), | |
256 | ||
4faaa8d9 | 257 | SOC_ENUM("ALC Function", wm8960_enum[4]), |
f2644a2c MB |
258 | SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0), |
259 | SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1), | |
260 | SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0), | |
261 | SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0), | |
4faaa8d9 | 262 | SOC_ENUM("ALC Mode", wm8960_enum[5]), |
f2644a2c MB |
263 | SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0), |
264 | SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0), | |
265 | ||
266 | SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0), | |
267 | SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0), | |
268 | ||
c324aac0 MH |
269 | SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC, |
270 | 0, 255, 0, adc_tlv), | |
f2644a2c MB |
271 | |
272 | SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume", | |
273 | WM8960_BYPASS1, 4, 7, 1, bypass_tlv), | |
274 | SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume", | |
275 | WM8960_LOUTMIX, 4, 7, 1, bypass_tlv), | |
276 | SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume", | |
277 | WM8960_BYPASS2, 4, 7, 1, bypass_tlv), | |
278 | SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume", | |
279 | WM8960_ROUTMIX, 4, 7, 1, bypass_tlv), | |
280 | }; | |
281 | ||
282 | static const struct snd_kcontrol_new wm8960_lin_boost[] = { | |
283 | SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0), | |
284 | SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0), | |
285 | SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0), | |
286 | }; | |
287 | ||
288 | static const struct snd_kcontrol_new wm8960_lin[] = { | |
289 | SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0), | |
290 | }; | |
291 | ||
292 | static const struct snd_kcontrol_new wm8960_rin_boost[] = { | |
293 | SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0), | |
294 | SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0), | |
295 | SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0), | |
296 | }; | |
297 | ||
298 | static const struct snd_kcontrol_new wm8960_rin[] = { | |
299 | SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0), | |
300 | }; | |
301 | ||
302 | static const struct snd_kcontrol_new wm8960_loutput_mixer[] = { | |
303 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0), | |
304 | SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0), | |
305 | SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0), | |
306 | }; | |
307 | ||
308 | static const struct snd_kcontrol_new wm8960_routput_mixer[] = { | |
309 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0), | |
310 | SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0), | |
311 | SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0), | |
312 | }; | |
313 | ||
314 | static const struct snd_kcontrol_new wm8960_mono_out[] = { | |
315 | SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0), | |
316 | SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0), | |
317 | }; | |
318 | ||
319 | static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = { | |
320 | SND_SOC_DAPM_INPUT("LINPUT1"), | |
321 | SND_SOC_DAPM_INPUT("RINPUT1"), | |
322 | SND_SOC_DAPM_INPUT("LINPUT2"), | |
323 | SND_SOC_DAPM_INPUT("RINPUT2"), | |
324 | SND_SOC_DAPM_INPUT("LINPUT3"), | |
325 | SND_SOC_DAPM_INPUT("RINPUT3"), | |
326 | ||
187774cb | 327 | SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0), |
f2644a2c MB |
328 | |
329 | SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0, | |
330 | wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)), | |
331 | SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0, | |
332 | wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)), | |
333 | ||
334 | SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0, | |
335 | wm8960_lin, ARRAY_SIZE(wm8960_lin)), | |
336 | SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0, | |
337 | wm8960_rin, ARRAY_SIZE(wm8960_rin)), | |
338 | ||
44426de4 MB |
339 | SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0), |
340 | SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0), | |
f2644a2c MB |
341 | |
342 | SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0), | |
343 | SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0), | |
344 | ||
345 | SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0, | |
346 | &wm8960_loutput_mixer[0], | |
347 | ARRAY_SIZE(wm8960_loutput_mixer)), | |
348 | SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0, | |
349 | &wm8960_routput_mixer[0], | |
350 | ARRAY_SIZE(wm8960_routput_mixer)), | |
351 | ||
f2644a2c MB |
352 | SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0), |
353 | SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0), | |
354 | ||
355 | SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0), | |
356 | SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0), | |
357 | ||
358 | SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0), | |
359 | SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0), | |
360 | ||
361 | SND_SOC_DAPM_OUTPUT("SPK_LP"), | |
362 | SND_SOC_DAPM_OUTPUT("SPK_LN"), | |
363 | SND_SOC_DAPM_OUTPUT("HP_L"), | |
364 | SND_SOC_DAPM_OUTPUT("HP_R"), | |
365 | SND_SOC_DAPM_OUTPUT("SPK_RP"), | |
366 | SND_SOC_DAPM_OUTPUT("SPK_RN"), | |
367 | SND_SOC_DAPM_OUTPUT("OUT3"), | |
368 | }; | |
369 | ||
913d7b4c MB |
370 | static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = { |
371 | SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0, | |
372 | &wm8960_mono_out[0], | |
373 | ARRAY_SIZE(wm8960_mono_out)), | |
374 | }; | |
375 | ||
376 | /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */ | |
377 | static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = { | |
378 | SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0), | |
379 | }; | |
380 | ||
f2644a2c MB |
381 | static const struct snd_soc_dapm_route audio_paths[] = { |
382 | { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" }, | |
383 | { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" }, | |
384 | { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" }, | |
385 | ||
386 | { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", }, | |
387 | { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */ | |
388 | { "Left Input Mixer", NULL, "LINPUT2" }, | |
389 | { "Left Input Mixer", NULL, "LINPUT3" }, | |
390 | ||
391 | { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" }, | |
392 | { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" }, | |
393 | { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" }, | |
394 | ||
395 | { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", }, | |
396 | { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */ | |
397 | { "Right Input Mixer", NULL, "RINPUT2" }, | |
398 | { "Right Input Mixer", NULL, "LINPUT3" }, | |
399 | ||
400 | { "Left ADC", NULL, "Left Input Mixer" }, | |
401 | { "Right ADC", NULL, "Right Input Mixer" }, | |
402 | ||
403 | { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" }, | |
404 | { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} , | |
405 | { "Left Output Mixer", "PCM Playback Switch", "Left DAC" }, | |
406 | ||
407 | { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" }, | |
408 | { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } , | |
409 | { "Right Output Mixer", "PCM Playback Switch", "Right DAC" }, | |
410 | ||
f2644a2c MB |
411 | { "LOUT1 PGA", NULL, "Left Output Mixer" }, |
412 | { "ROUT1 PGA", NULL, "Right Output Mixer" }, | |
413 | ||
414 | { "HP_L", NULL, "LOUT1 PGA" }, | |
415 | { "HP_R", NULL, "ROUT1 PGA" }, | |
416 | ||
417 | { "Left Speaker PGA", NULL, "Left Output Mixer" }, | |
418 | { "Right Speaker PGA", NULL, "Right Output Mixer" }, | |
419 | ||
420 | { "Left Speaker Output", NULL, "Left Speaker PGA" }, | |
421 | { "Right Speaker Output", NULL, "Right Speaker PGA" }, | |
422 | ||
423 | { "SPK_LN", NULL, "Left Speaker Output" }, | |
424 | { "SPK_LP", NULL, "Left Speaker Output" }, | |
425 | { "SPK_RN", NULL, "Right Speaker Output" }, | |
426 | { "SPK_RP", NULL, "Right Speaker Output" }, | |
913d7b4c MB |
427 | }; |
428 | ||
429 | static const struct snd_soc_dapm_route audio_paths_out3[] = { | |
430 | { "Mono Output Mixer", "Left Switch", "Left Output Mixer" }, | |
431 | { "Mono Output Mixer", "Right Switch", "Right Output Mixer" }, | |
f2644a2c MB |
432 | |
433 | { "OUT3", NULL, "Mono Output Mixer", } | |
434 | }; | |
435 | ||
913d7b4c MB |
436 | static const struct snd_soc_dapm_route audio_paths_capless[] = { |
437 | { "HP_L", NULL, "OUT3 VMID" }, | |
438 | { "HP_R", NULL, "OUT3 VMID" }, | |
439 | ||
440 | { "OUT3 VMID", NULL, "Left Output Mixer" }, | |
441 | { "OUT3 VMID", NULL, "Right Output Mixer" }, | |
442 | }; | |
443 | ||
f2644a2c MB |
444 | static int wm8960_add_widgets(struct snd_soc_codec *codec) |
445 | { | |
b2c812e2 | 446 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
e2280c90 | 447 | struct wm8960_data *pdata = &wm8960->pdata; |
ce6120cc | 448 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
913d7b4c MB |
449 | struct snd_soc_dapm_widget *w; |
450 | ||
ce6120cc | 451 | snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets, |
f2644a2c MB |
452 | ARRAY_SIZE(wm8960_dapm_widgets)); |
453 | ||
ce6120cc | 454 | snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths)); |
f2644a2c | 455 | |
913d7b4c MB |
456 | /* In capless mode OUT3 is used to provide VMID for the |
457 | * headphone outputs, otherwise it is used as a mono mixer. | |
458 | */ | |
459 | if (pdata && pdata->capless) { | |
ce6120cc | 460 | snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless, |
913d7b4c MB |
461 | ARRAY_SIZE(wm8960_dapm_widgets_capless)); |
462 | ||
ce6120cc | 463 | snd_soc_dapm_add_routes(dapm, audio_paths_capless, |
913d7b4c MB |
464 | ARRAY_SIZE(audio_paths_capless)); |
465 | } else { | |
ce6120cc | 466 | snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3, |
913d7b4c MB |
467 | ARRAY_SIZE(wm8960_dapm_widgets_out3)); |
468 | ||
ce6120cc | 469 | snd_soc_dapm_add_routes(dapm, audio_paths_out3, |
913d7b4c MB |
470 | ARRAY_SIZE(audio_paths_out3)); |
471 | } | |
472 | ||
473 | /* We need to power up the headphone output stage out of | |
474 | * sequence for capless mode. To save scanning the widget | |
475 | * list each time to find the desired power state do so now | |
476 | * and save the result. | |
477 | */ | |
00200107 | 478 | list_for_each_entry(w, &codec->component.card->widgets, list) { |
97c866de JN |
479 | if (w->dapm != &codec->dapm) |
480 | continue; | |
913d7b4c MB |
481 | if (strcmp(w->name, "LOUT1 PGA") == 0) |
482 | wm8960->lout1 = w; | |
483 | if (strcmp(w->name, "ROUT1 PGA") == 0) | |
484 | wm8960->rout1 = w; | |
485 | if (strcmp(w->name, "OUT3 VMID") == 0) | |
486 | wm8960->out3 = w; | |
487 | } | |
488 | ||
f2644a2c MB |
489 | return 0; |
490 | } | |
491 | ||
492 | static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
493 | unsigned int fmt) | |
494 | { | |
495 | struct snd_soc_codec *codec = codec_dai->codec; | |
496 | u16 iface = 0; | |
497 | ||
498 | /* set master/slave audio interface */ | |
499 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
500 | case SND_SOC_DAIFMT_CBM_CFM: | |
501 | iface |= 0x0040; | |
502 | break; | |
503 | case SND_SOC_DAIFMT_CBS_CFS: | |
504 | break; | |
505 | default: | |
506 | return -EINVAL; | |
507 | } | |
508 | ||
509 | /* interface format */ | |
510 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
511 | case SND_SOC_DAIFMT_I2S: | |
512 | iface |= 0x0002; | |
513 | break; | |
514 | case SND_SOC_DAIFMT_RIGHT_J: | |
515 | break; | |
516 | case SND_SOC_DAIFMT_LEFT_J: | |
517 | iface |= 0x0001; | |
518 | break; | |
519 | case SND_SOC_DAIFMT_DSP_A: | |
520 | iface |= 0x0003; | |
521 | break; | |
522 | case SND_SOC_DAIFMT_DSP_B: | |
523 | iface |= 0x0013; | |
524 | break; | |
525 | default: | |
526 | return -EINVAL; | |
527 | } | |
528 | ||
529 | /* clock inversion */ | |
530 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
531 | case SND_SOC_DAIFMT_NB_NF: | |
532 | break; | |
533 | case SND_SOC_DAIFMT_IB_IF: | |
534 | iface |= 0x0090; | |
535 | break; | |
536 | case SND_SOC_DAIFMT_IB_NF: | |
537 | iface |= 0x0080; | |
538 | break; | |
539 | case SND_SOC_DAIFMT_NB_IF: | |
540 | iface |= 0x0010; | |
541 | break; | |
542 | default: | |
543 | return -EINVAL; | |
544 | } | |
545 | ||
546 | /* set iface */ | |
17a52fd6 | 547 | snd_soc_write(codec, WM8960_IFACE1, iface); |
f2644a2c MB |
548 | return 0; |
549 | } | |
550 | ||
db059c0f MB |
551 | static struct { |
552 | int rate; | |
553 | unsigned int val; | |
554 | } alc_rates[] = { | |
555 | { 48000, 0 }, | |
556 | { 44100, 0 }, | |
557 | { 32000, 1 }, | |
558 | { 22050, 2 }, | |
559 | { 24000, 2 }, | |
560 | { 16000, 3 }, | |
22ee76da | 561 | { 11025, 4 }, |
db059c0f MB |
562 | { 12000, 4 }, |
563 | { 8000, 5 }, | |
564 | }; | |
565 | ||
f2644a2c MB |
566 | static int wm8960_hw_params(struct snd_pcm_substream *substream, |
567 | struct snd_pcm_hw_params *params, | |
568 | struct snd_soc_dai *dai) | |
569 | { | |
e6968a17 | 570 | struct snd_soc_codec *codec = dai->codec; |
afd6d36a | 571 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
17a52fd6 | 572 | u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3; |
db059c0f | 573 | int i; |
f2644a2c MB |
574 | |
575 | /* bit size */ | |
39e9cc46 MB |
576 | switch (params_width(params)) { |
577 | case 16: | |
f2644a2c | 578 | break; |
39e9cc46 | 579 | case 20: |
f2644a2c MB |
580 | iface |= 0x0004; |
581 | break; | |
39e9cc46 | 582 | case 24: |
f2644a2c MB |
583 | iface |= 0x0008; |
584 | break; | |
4c2474c0 | 585 | default: |
39e9cc46 MB |
586 | dev_err(codec->dev, "unsupported width %d\n", |
587 | params_width(params)); | |
4c2474c0 | 588 | return -EINVAL; |
f2644a2c MB |
589 | } |
590 | ||
afd6d36a MB |
591 | /* Update filters for the new rate */ |
592 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
593 | wm8960->playback_fs = params_rate(params); | |
594 | wm8960_set_deemph(codec); | |
db059c0f MB |
595 | } else { |
596 | for (i = 0; i < ARRAY_SIZE(alc_rates); i++) | |
597 | if (alc_rates[i].rate == params_rate(params)) | |
598 | snd_soc_update_bits(codec, | |
599 | WM8960_ADDCTL3, 0x7, | |
600 | alc_rates[i].val); | |
afd6d36a MB |
601 | } |
602 | ||
f2644a2c | 603 | /* set iface */ |
17a52fd6 | 604 | snd_soc_write(codec, WM8960_IFACE1, iface); |
f2644a2c MB |
605 | return 0; |
606 | } | |
607 | ||
608 | static int wm8960_mute(struct snd_soc_dai *dai, int mute) | |
609 | { | |
610 | struct snd_soc_codec *codec = dai->codec; | |
f2644a2c MB |
611 | |
612 | if (mute) | |
16b24881 | 613 | snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8); |
f2644a2c | 614 | else |
16b24881 | 615 | snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0); |
f2644a2c MB |
616 | return 0; |
617 | } | |
618 | ||
913d7b4c MB |
619 | static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec, |
620 | enum snd_soc_bias_level level) | |
f2644a2c | 621 | { |
0ebe36c6 | 622 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
75aa8868 | 623 | int ret; |
0ebe36c6 | 624 | |
f2644a2c MB |
625 | switch (level) { |
626 | case SND_SOC_BIAS_ON: | |
627 | break; | |
628 | ||
629 | case SND_SOC_BIAS_PREPARE: | |
75aa8868 ZW |
630 | switch (codec->dapm.bias_level) { |
631 | case SND_SOC_BIAS_STANDBY: | |
632 | if (!IS_ERR(wm8960->mclk)) { | |
633 | ret = clk_prepare_enable(wm8960->mclk); | |
634 | if (ret) { | |
635 | dev_err(codec->dev, | |
636 | "Failed to enable MCLK: %d\n", | |
637 | ret); | |
638 | return ret; | |
639 | } | |
640 | } | |
641 | ||
642 | /* Set VMID to 2x50k */ | |
643 | snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80); | |
644 | break; | |
645 | ||
646 | case SND_SOC_BIAS_ON: | |
647 | if (!IS_ERR(wm8960->mclk)) | |
648 | clk_disable_unprepare(wm8960->mclk); | |
649 | break; | |
650 | ||
651 | default: | |
652 | break; | |
653 | } | |
654 | ||
f2644a2c MB |
655 | break; |
656 | ||
657 | case SND_SOC_BIAS_STANDBY: | |
ce6120cc | 658 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
0ebe36c6 | 659 | regcache_sync(wm8960->regmap); |
bc45df2d | 660 | |
f2644a2c | 661 | /* Enable anti-pop features */ |
17a52fd6 | 662 | snd_soc_write(codec, WM8960_APOP1, |
913d7b4c MB |
663 | WM8960_POBCTRL | WM8960_SOFT_ST | |
664 | WM8960_BUFDCOPEN | WM8960_BUFIOEN); | |
f2644a2c MB |
665 | |
666 | /* Enable & ramp VMID at 2x50k */ | |
16b24881 | 667 | snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80); |
f2644a2c MB |
668 | msleep(100); |
669 | ||
670 | /* Enable VREF */ | |
16b24881 AL |
671 | snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF, |
672 | WM8960_VREF); | |
f2644a2c MB |
673 | |
674 | /* Disable anti-pop features */ | |
17a52fd6 | 675 | snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN); |
f2644a2c MB |
676 | } |
677 | ||
678 | /* Set VMID to 2x250k */ | |
16b24881 | 679 | snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100); |
f2644a2c MB |
680 | break; |
681 | ||
682 | case SND_SOC_BIAS_OFF: | |
683 | /* Enable anti-pop features */ | |
17a52fd6 | 684 | snd_soc_write(codec, WM8960_APOP1, |
f2644a2c MB |
685 | WM8960_POBCTRL | WM8960_SOFT_ST | |
686 | WM8960_BUFDCOPEN | WM8960_BUFIOEN); | |
687 | ||
688 | /* Disable VMID and VREF, let them discharge */ | |
17a52fd6 | 689 | snd_soc_write(codec, WM8960_POWER1, 0); |
f2644a2c | 690 | msleep(600); |
913d7b4c MB |
691 | break; |
692 | } | |
693 | ||
ce6120cc | 694 | codec->dapm.bias_level = level; |
913d7b4c MB |
695 | |
696 | return 0; | |
697 | } | |
698 | ||
699 | static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec, | |
700 | enum snd_soc_bias_level level) | |
701 | { | |
b2c812e2 | 702 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
75aa8868 | 703 | int reg, ret; |
913d7b4c MB |
704 | |
705 | switch (level) { | |
706 | case SND_SOC_BIAS_ON: | |
707 | break; | |
708 | ||
709 | case SND_SOC_BIAS_PREPARE: | |
ce6120cc | 710 | switch (codec->dapm.bias_level) { |
913d7b4c MB |
711 | case SND_SOC_BIAS_STANDBY: |
712 | /* Enable anti pop mode */ | |
713 | snd_soc_update_bits(codec, WM8960_APOP1, | |
714 | WM8960_POBCTRL | WM8960_SOFT_ST | | |
715 | WM8960_BUFDCOPEN, | |
716 | WM8960_POBCTRL | WM8960_SOFT_ST | | |
717 | WM8960_BUFDCOPEN); | |
718 | ||
719 | /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */ | |
720 | reg = 0; | |
721 | if (wm8960->lout1 && wm8960->lout1->power) | |
722 | reg |= WM8960_PWR2_LOUT1; | |
723 | if (wm8960->rout1 && wm8960->rout1->power) | |
724 | reg |= WM8960_PWR2_ROUT1; | |
725 | if (wm8960->out3 && wm8960->out3->power) | |
726 | reg |= WM8960_PWR2_OUT3; | |
727 | snd_soc_update_bits(codec, WM8960_POWER2, | |
728 | WM8960_PWR2_LOUT1 | | |
729 | WM8960_PWR2_ROUT1 | | |
730 | WM8960_PWR2_OUT3, reg); | |
731 | ||
732 | /* Enable VMID at 2*50k */ | |
733 | snd_soc_update_bits(codec, WM8960_POWER1, | |
734 | WM8960_VMID_MASK, 0x80); | |
735 | ||
736 | /* Ramp */ | |
737 | msleep(100); | |
738 | ||
739 | /* Enable VREF */ | |
740 | snd_soc_update_bits(codec, WM8960_POWER1, | |
741 | WM8960_VREF, WM8960_VREF); | |
742 | ||
743 | msleep(100); | |
75aa8868 ZW |
744 | |
745 | if (!IS_ERR(wm8960->mclk)) { | |
746 | ret = clk_prepare_enable(wm8960->mclk); | |
747 | if (ret) { | |
748 | dev_err(codec->dev, | |
749 | "Failed to enable MCLK: %d\n", | |
750 | ret); | |
751 | return ret; | |
752 | } | |
753 | } | |
913d7b4c MB |
754 | break; |
755 | ||
756 | case SND_SOC_BIAS_ON: | |
75aa8868 ZW |
757 | if (!IS_ERR(wm8960->mclk)) |
758 | clk_disable_unprepare(wm8960->mclk); | |
759 | ||
913d7b4c MB |
760 | /* Enable anti-pop mode */ |
761 | snd_soc_update_bits(codec, WM8960_APOP1, | |
762 | WM8960_POBCTRL | WM8960_SOFT_ST | | |
763 | WM8960_BUFDCOPEN, | |
764 | WM8960_POBCTRL | WM8960_SOFT_ST | | |
765 | WM8960_BUFDCOPEN); | |
766 | ||
767 | /* Disable VMID and VREF */ | |
768 | snd_soc_update_bits(codec, WM8960_POWER1, | |
769 | WM8960_VREF | WM8960_VMID_MASK, 0); | |
770 | break; | |
771 | ||
bc45df2d | 772 | case SND_SOC_BIAS_OFF: |
0ebe36c6 | 773 | regcache_sync(wm8960->regmap); |
bc45df2d | 774 | break; |
913d7b4c MB |
775 | default: |
776 | break; | |
777 | } | |
778 | break; | |
f2644a2c | 779 | |
913d7b4c | 780 | case SND_SOC_BIAS_STANDBY: |
ce6120cc | 781 | switch (codec->dapm.bias_level) { |
913d7b4c MB |
782 | case SND_SOC_BIAS_PREPARE: |
783 | /* Disable HP discharge */ | |
784 | snd_soc_update_bits(codec, WM8960_APOP2, | |
785 | WM8960_DISOP | WM8960_DRES_MASK, | |
786 | 0); | |
787 | ||
788 | /* Disable anti-pop features */ | |
789 | snd_soc_update_bits(codec, WM8960_APOP1, | |
790 | WM8960_POBCTRL | WM8960_SOFT_ST | | |
791 | WM8960_BUFDCOPEN, | |
792 | WM8960_POBCTRL | WM8960_SOFT_ST | | |
793 | WM8960_BUFDCOPEN); | |
794 | break; | |
795 | ||
796 | default: | |
797 | break; | |
798 | } | |
799 | break; | |
f2644a2c | 800 | |
913d7b4c | 801 | case SND_SOC_BIAS_OFF: |
f2644a2c MB |
802 | break; |
803 | } | |
804 | ||
ce6120cc | 805 | codec->dapm.bias_level = level; |
f2644a2c MB |
806 | |
807 | return 0; | |
808 | } | |
809 | ||
810 | /* PLL divisors */ | |
811 | struct _pll_div { | |
812 | u32 pre_div:1; | |
813 | u32 n:4; | |
814 | u32 k:24; | |
815 | }; | |
816 | ||
817 | /* The size in bits of the pll divide multiplied by 10 | |
818 | * to allow rounding later */ | |
819 | #define FIXED_PLL_SIZE ((1 << 24) * 10) | |
820 | ||
821 | static int pll_factors(unsigned int source, unsigned int target, | |
822 | struct _pll_div *pll_div) | |
823 | { | |
824 | unsigned long long Kpart; | |
825 | unsigned int K, Ndiv, Nmod; | |
826 | ||
827 | pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target); | |
828 | ||
829 | /* Scale up target to PLL operating frequency */ | |
830 | target *= 4; | |
831 | ||
832 | Ndiv = target / source; | |
833 | if (Ndiv < 6) { | |
834 | source >>= 1; | |
835 | pll_div->pre_div = 1; | |
836 | Ndiv = target / source; | |
837 | } else | |
838 | pll_div->pre_div = 0; | |
839 | ||
840 | if ((Ndiv < 6) || (Ndiv > 12)) { | |
841 | pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv); | |
842 | return -EINVAL; | |
843 | } | |
844 | ||
845 | pll_div->n = Ndiv; | |
846 | Nmod = target % source; | |
847 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; | |
848 | ||
849 | do_div(Kpart, source); | |
850 | ||
851 | K = Kpart & 0xFFFFFFFF; | |
852 | ||
853 | /* Check if we need to round */ | |
854 | if ((K % 10) >= 5) | |
855 | K += 5; | |
856 | ||
857 | /* Move down to proper range now rounding is done */ | |
858 | K /= 10; | |
859 | ||
860 | pll_div->k = K; | |
861 | ||
862 | pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n", | |
863 | pll_div->n, pll_div->k, pll_div->pre_div); | |
864 | ||
865 | return 0; | |
866 | } | |
867 | ||
85488037 MB |
868 | static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
869 | int source, unsigned int freq_in, unsigned int freq_out) | |
f2644a2c MB |
870 | { |
871 | struct snd_soc_codec *codec = codec_dai->codec; | |
872 | u16 reg; | |
873 | static struct _pll_div pll_div; | |
874 | int ret; | |
875 | ||
876 | if (freq_in && freq_out) { | |
877 | ret = pll_factors(freq_in, freq_out, &pll_div); | |
878 | if (ret != 0) | |
879 | return ret; | |
880 | } | |
881 | ||
882 | /* Disable the PLL: even if we are changing the frequency the | |
883 | * PLL needs to be disabled while we do so. */ | |
16b24881 AL |
884 | snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0); |
885 | snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0); | |
f2644a2c MB |
886 | |
887 | if (!freq_in || !freq_out) | |
888 | return 0; | |
889 | ||
17a52fd6 | 890 | reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f; |
f2644a2c MB |
891 | reg |= pll_div.pre_div << 4; |
892 | reg |= pll_div.n; | |
893 | ||
894 | if (pll_div.k) { | |
895 | reg |= 0x20; | |
896 | ||
85fa532b MD |
897 | snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff); |
898 | snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff); | |
899 | snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff); | |
f2644a2c | 900 | } |
17a52fd6 | 901 | snd_soc_write(codec, WM8960_PLL1, reg); |
f2644a2c MB |
902 | |
903 | /* Turn it on */ | |
16b24881 | 904 | snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1); |
f2644a2c | 905 | msleep(250); |
16b24881 | 906 | snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1); |
f2644a2c MB |
907 | |
908 | return 0; | |
909 | } | |
910 | ||
911 | static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai, | |
912 | int div_id, int div) | |
913 | { | |
914 | struct snd_soc_codec *codec = codec_dai->codec; | |
915 | u16 reg; | |
916 | ||
917 | switch (div_id) { | |
f2644a2c | 918 | case WM8960_SYSCLKDIV: |
17a52fd6 MB |
919 | reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9; |
920 | snd_soc_write(codec, WM8960_CLOCK1, reg | div); | |
f2644a2c MB |
921 | break; |
922 | case WM8960_DACDIV: | |
17a52fd6 MB |
923 | reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7; |
924 | snd_soc_write(codec, WM8960_CLOCK1, reg | div); | |
f2644a2c MB |
925 | break; |
926 | case WM8960_OPCLKDIV: | |
17a52fd6 MB |
927 | reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f; |
928 | snd_soc_write(codec, WM8960_PLL1, reg | div); | |
f2644a2c MB |
929 | break; |
930 | case WM8960_DCLKDIV: | |
17a52fd6 MB |
931 | reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f; |
932 | snd_soc_write(codec, WM8960_CLOCK2, reg | div); | |
f2644a2c MB |
933 | break; |
934 | case WM8960_TOCLKSEL: | |
17a52fd6 MB |
935 | reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd; |
936 | snd_soc_write(codec, WM8960_ADDCTL1, reg | div); | |
f2644a2c MB |
937 | break; |
938 | default: | |
939 | return -EINVAL; | |
940 | } | |
941 | ||
942 | return 0; | |
943 | } | |
944 | ||
f0fba2ad LG |
945 | static int wm8960_set_bias_level(struct snd_soc_codec *codec, |
946 | enum snd_soc_bias_level level) | |
947 | { | |
948 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); | |
949 | ||
950 | return wm8960->set_bias_level(codec, level); | |
951 | } | |
952 | ||
f2644a2c MB |
953 | #define WM8960_RATES SNDRV_PCM_RATE_8000_48000 |
954 | ||
955 | #define WM8960_FORMATS \ | |
956 | (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ | |
957 | SNDRV_PCM_FMTBIT_S24_LE) | |
958 | ||
85e7652d | 959 | static const struct snd_soc_dai_ops wm8960_dai_ops = { |
f2644a2c MB |
960 | .hw_params = wm8960_hw_params, |
961 | .digital_mute = wm8960_mute, | |
962 | .set_fmt = wm8960_set_dai_fmt, | |
963 | .set_clkdiv = wm8960_set_dai_clkdiv, | |
964 | .set_pll = wm8960_set_dai_pll, | |
965 | }; | |
966 | ||
f0fba2ad LG |
967 | static struct snd_soc_dai_driver wm8960_dai = { |
968 | .name = "wm8960-hifi", | |
f2644a2c MB |
969 | .playback = { |
970 | .stream_name = "Playback", | |
971 | .channels_min = 1, | |
972 | .channels_max = 2, | |
973 | .rates = WM8960_RATES, | |
974 | .formats = WM8960_FORMATS,}, | |
975 | .capture = { | |
976 | .stream_name = "Capture", | |
977 | .channels_min = 1, | |
978 | .channels_max = 2, | |
979 | .rates = WM8960_RATES, | |
980 | .formats = WM8960_FORMATS,}, | |
981 | .ops = &wm8960_dai_ops, | |
982 | .symmetric_rates = 1, | |
983 | }; | |
f2644a2c | 984 | |
f0fba2ad | 985 | static int wm8960_probe(struct snd_soc_codec *codec) |
f2644a2c | 986 | { |
f0fba2ad | 987 | struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); |
e2280c90 | 988 | struct wm8960_data *pdata = &wm8960->pdata; |
f2644a2c | 989 | |
e2280c90 ZW |
990 | if (pdata->capless) |
991 | wm8960->set_bias_level = wm8960_set_bias_level_capless; | |
992 | else | |
993 | wm8960->set_bias_level = wm8960_set_bias_level_out3; | |
f2644a2c | 994 | |
022658be | 995 | snd_soc_add_codec_controls(codec, wm8960_snd_controls, |
f0fba2ad LG |
996 | ARRAY_SIZE(wm8960_snd_controls)); |
997 | wm8960_add_widgets(codec); | |
f2644a2c MB |
998 | |
999 | return 0; | |
1000 | } | |
1001 | ||
f0fba2ad LG |
1002 | static struct snd_soc_codec_driver soc_codec_dev_wm8960 = { |
1003 | .probe = wm8960_probe, | |
f0fba2ad | 1004 | .set_bias_level = wm8960_set_bias_level, |
0a87a6e1 | 1005 | .suspend_bias_off = true, |
0ebe36c6 MB |
1006 | }; |
1007 | ||
1008 | static const struct regmap_config wm8960_regmap = { | |
1009 | .reg_bits = 7, | |
1010 | .val_bits = 9, | |
1011 | .max_register = WM8960_PLL4, | |
1012 | ||
1013 | .reg_defaults = wm8960_reg_defaults, | |
1014 | .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults), | |
1015 | .cache_type = REGCACHE_RBTREE, | |
1016 | ||
1017 | .volatile_reg = wm8960_volatile, | |
f0fba2ad LG |
1018 | }; |
1019 | ||
e2280c90 ZW |
1020 | static void wm8960_set_pdata_from_of(struct i2c_client *i2c, |
1021 | struct wm8960_data *pdata) | |
1022 | { | |
1023 | const struct device_node *np = i2c->dev.of_node; | |
1024 | ||
1025 | if (of_property_read_bool(np, "wlf,capless")) | |
1026 | pdata->capless = true; | |
1027 | ||
1028 | if (of_property_read_bool(np, "wlf,shared-lrclk")) | |
1029 | pdata->shared_lrclk = true; | |
1030 | } | |
1031 | ||
7a79e94e BP |
1032 | static int wm8960_i2c_probe(struct i2c_client *i2c, |
1033 | const struct i2c_device_id *id) | |
f2644a2c | 1034 | { |
37061631 | 1035 | struct wm8960_data *pdata = dev_get_platdata(&i2c->dev); |
f2644a2c | 1036 | struct wm8960_priv *wm8960; |
f0fba2ad | 1037 | int ret; |
f2644a2c | 1038 | |
b9791c01 MB |
1039 | wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv), |
1040 | GFP_KERNEL); | |
f2644a2c MB |
1041 | if (wm8960 == NULL) |
1042 | return -ENOMEM; | |
1043 | ||
75aa8868 ZW |
1044 | wm8960->mclk = devm_clk_get(&i2c->dev, "mclk"); |
1045 | if (IS_ERR(wm8960->mclk)) { | |
1046 | if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER) | |
1047 | return -EPROBE_DEFER; | |
1048 | } | |
1049 | ||
c5e6f5fa | 1050 | wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap); |
0ebe36c6 MB |
1051 | if (IS_ERR(wm8960->regmap)) |
1052 | return PTR_ERR(wm8960->regmap); | |
1053 | ||
e2280c90 ZW |
1054 | if (pdata) |
1055 | memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data)); | |
1056 | else if (i2c->dev.of_node) | |
1057 | wm8960_set_pdata_from_of(i2c, &wm8960->pdata); | |
1058 | ||
3ad5e861 ZW |
1059 | ret = wm8960_reset(wm8960->regmap); |
1060 | if (ret != 0) { | |
1061 | dev_err(&i2c->dev, "Failed to issue reset\n"); | |
1062 | return ret; | |
1063 | } | |
1064 | ||
1065 | if (wm8960->pdata.shared_lrclk) { | |
37061631 MB |
1066 | ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, |
1067 | 0x4, 0x4); | |
1068 | if (ret != 0) { | |
1069 | dev_err(&i2c->dev, "Failed to enable LRCM: %d\n", | |
1070 | ret); | |
1071 | return ret; | |
1072 | } | |
1073 | } | |
1074 | ||
3ad5e861 ZW |
1075 | /* Latch the update bits */ |
1076 | regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100); | |
1077 | regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100); | |
1078 | regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100); | |
1079 | regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100); | |
1080 | regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100); | |
1081 | regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100); | |
1082 | regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100); | |
1083 | regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100); | |
1084 | regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100); | |
1085 | regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100); | |
1086 | ||
f2644a2c | 1087 | i2c_set_clientdata(i2c, wm8960); |
f2644a2c | 1088 | |
f0fba2ad LG |
1089 | ret = snd_soc_register_codec(&i2c->dev, |
1090 | &soc_codec_dev_wm8960, &wm8960_dai, 1); | |
b9791c01 | 1091 | |
f0fba2ad | 1092 | return ret; |
f2644a2c MB |
1093 | } |
1094 | ||
7a79e94e | 1095 | static int wm8960_i2c_remove(struct i2c_client *client) |
f2644a2c | 1096 | { |
f0fba2ad | 1097 | snd_soc_unregister_codec(&client->dev); |
f2644a2c MB |
1098 | return 0; |
1099 | } | |
1100 | ||
1101 | static const struct i2c_device_id wm8960_i2c_id[] = { | |
1102 | { "wm8960", 0 }, | |
1103 | { } | |
1104 | }; | |
1105 | MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id); | |
1106 | ||
e2280c90 ZW |
1107 | static const struct of_device_id wm8960_of_match[] = { |
1108 | { .compatible = "wlf,wm8960", }, | |
1109 | { } | |
1110 | }; | |
1111 | MODULE_DEVICE_TABLE(of, wm8960_of_match); | |
1112 | ||
f2644a2c MB |
1113 | static struct i2c_driver wm8960_i2c_driver = { |
1114 | .driver = { | |
091edccf | 1115 | .name = "wm8960", |
f2644a2c | 1116 | .owner = THIS_MODULE, |
e2280c90 | 1117 | .of_match_table = wm8960_of_match, |
f2644a2c MB |
1118 | }, |
1119 | .probe = wm8960_i2c_probe, | |
7a79e94e | 1120 | .remove = wm8960_i2c_remove, |
f2644a2c MB |
1121 | .id_table = wm8960_i2c_id, |
1122 | }; | |
1123 | ||
3c010e60 | 1124 | module_i2c_driver(wm8960_i2c_driver); |
f2644a2c | 1125 | |
f2644a2c MB |
1126 | MODULE_DESCRIPTION("ASoC WM8960 driver"); |
1127 | MODULE_AUTHOR("Liam Girdwood"); | |
1128 | MODULE_LICENSE("GPL"); |