Commit | Line | Data |
---|---|---|
f10485e7 MB |
1 | /* |
2 | * wm8990.h -- audio driver for WM8990 | |
3 | * | |
4 | * Copyright 2007 Wolfson Microelectronics PLC. | |
5 | * Author: Graeme Gregory | |
6 | * graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #ifndef __WM8990REGISTERDEFS_H__ | |
16 | #define __WM8990REGISTERDEFS_H__ | |
17 | ||
18 | /* | |
19 | * Register values. | |
20 | */ | |
21 | #define WM8990_RESET 0x00 | |
22 | #define WM8990_POWER_MANAGEMENT_1 0x01 | |
23 | #define WM8990_POWER_MANAGEMENT_2 0x02 | |
24 | #define WM8990_POWER_MANAGEMENT_3 0x03 | |
25 | #define WM8990_AUDIO_INTERFACE_1 0x04 | |
26 | #define WM8990_AUDIO_INTERFACE_2 0x05 | |
27 | #define WM8990_CLOCKING_1 0x06 | |
28 | #define WM8990_CLOCKING_2 0x07 | |
29 | #define WM8990_AUDIO_INTERFACE_3 0x08 | |
30 | #define WM8990_AUDIO_INTERFACE_4 0x09 | |
31 | #define WM8990_DAC_CTRL 0x0A | |
32 | #define WM8990_LEFT_DAC_DIGITAL_VOLUME 0x0B | |
33 | #define WM8990_RIGHT_DAC_DIGITAL_VOLUME 0x0C | |
34 | #define WM8990_DIGITAL_SIDE_TONE 0x0D | |
35 | #define WM8990_ADC_CTRL 0x0E | |
36 | #define WM8990_LEFT_ADC_DIGITAL_VOLUME 0x0F | |
37 | #define WM8990_RIGHT_ADC_DIGITAL_VOLUME 0x10 | |
38 | #define WM8990_GPIO_CTRL_1 0x12 | |
39 | #define WM8990_GPIO1_GPIO2 0x13 | |
40 | #define WM8990_GPIO3_GPIO4 0x14 | |
41 | #define WM8990_GPIO5_GPIO6 0x15 | |
42 | #define WM8990_GPIOCTRL_2 0x16 | |
43 | #define WM8990_GPIO_POL 0x17 | |
44 | #define WM8990_LEFT_LINE_INPUT_1_2_VOLUME 0x18 | |
45 | #define WM8990_LEFT_LINE_INPUT_3_4_VOLUME 0x19 | |
46 | #define WM8990_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A | |
47 | #define WM8990_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B | |
48 | #define WM8990_LEFT_OUTPUT_VOLUME 0x1C | |
49 | #define WM8990_RIGHT_OUTPUT_VOLUME 0x1D | |
50 | #define WM8990_LINE_OUTPUTS_VOLUME 0x1E | |
51 | #define WM8990_OUT3_4_VOLUME 0x1F | |
52 | #define WM8990_LEFT_OPGA_VOLUME 0x20 | |
53 | #define WM8990_RIGHT_OPGA_VOLUME 0x21 | |
54 | #define WM8990_SPEAKER_VOLUME 0x22 | |
55 | #define WM8990_CLASSD1 0x23 | |
56 | #define WM8990_CLASSD3 0x25 | |
97bb8129 | 57 | #define WM8990_CLASSD4 0x26 |
f10485e7 MB |
58 | #define WM8990_INPUT_MIXER1 0x27 |
59 | #define WM8990_INPUT_MIXER2 0x28 | |
60 | #define WM8990_INPUT_MIXER3 0x29 | |
61 | #define WM8990_INPUT_MIXER4 0x2A | |
62 | #define WM8990_INPUT_MIXER5 0x2B | |
63 | #define WM8990_INPUT_MIXER6 0x2C | |
64 | #define WM8990_OUTPUT_MIXER1 0x2D | |
65 | #define WM8990_OUTPUT_MIXER2 0x2E | |
66 | #define WM8990_OUTPUT_MIXER3 0x2F | |
67 | #define WM8990_OUTPUT_MIXER4 0x30 | |
68 | #define WM8990_OUTPUT_MIXER5 0x31 | |
69 | #define WM8990_OUTPUT_MIXER6 0x32 | |
70 | #define WM8990_OUT3_4_MIXER 0x33 | |
71 | #define WM8990_LINE_MIXER1 0x34 | |
72 | #define WM8990_LINE_MIXER2 0x35 | |
73 | #define WM8990_SPEAKER_MIXER 0x36 | |
74 | #define WM8990_ADDITIONAL_CONTROL 0x37 | |
75 | #define WM8990_ANTIPOP1 0x38 | |
76 | #define WM8990_ANTIPOP2 0x39 | |
77 | #define WM8990_MICBIAS 0x3A | |
78 | #define WM8990_PLL1 0x3C | |
79 | #define WM8990_PLL2 0x3D | |
80 | #define WM8990_PLL3 0x3E | |
f10485e7 | 81 | |
be1b87c7 MB |
82 | #define WM8990_EXT_ACCESS_ENA 0x75 |
83 | #define WM8990_EXT_CTL1 0x7a | |
f10485e7 MB |
84 | |
85 | /* | |
86 | * Field Definitions. | |
87 | */ | |
88 | ||
89 | /* | |
90 | * R0 (0x00) - Reset | |
91 | */ | |
92 | #define WM8990_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET_CHIP_ID */ | |
93 | ||
94 | /* | |
95 | * R1 (0x01) - Power Management (1) | |
96 | */ | |
97 | #define WM8990_SPK_ENA 0x1000 /* SPK_ENA */ | |
98 | #define WM8990_SPK_ENA_BIT 12 | |
99 | #define WM8990_OUT3_ENA 0x0800 /* OUT3_ENA */ | |
100 | #define WM8990_OUT3_ENA_BIT 11 | |
101 | #define WM8990_OUT4_ENA 0x0400 /* OUT4_ENA */ | |
102 | #define WM8990_OUT4_ENA_BIT 10 | |
103 | #define WM8990_LOUT_ENA 0x0200 /* LOUT_ENA */ | |
104 | #define WM8990_LOUT_ENA_BIT 9 | |
105 | #define WM8990_ROUT_ENA 0x0100 /* ROUT_ENA */ | |
106 | #define WM8990_ROUT_ENA_BIT 8 | |
107 | #define WM8990_MICBIAS_ENA 0x0010 /* MICBIAS_ENA */ | |
108 | #define WM8990_MICBIAS_ENA_BIT 4 | |
109 | #define WM8990_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */ | |
110 | #define WM8990_VREF_ENA 0x0001 /* VREF_ENA */ | |
111 | #define WM8990_VREF_ENA_BIT 0 | |
112 | ||
113 | /* | |
114 | * R2 (0x02) - Power Management (2) | |
115 | */ | |
116 | #define WM8990_PLL_ENA 0x8000 /* PLL_ENA */ | |
117 | #define WM8990_PLL_ENA_BIT 15 | |
118 | #define WM8990_TSHUT_ENA 0x4000 /* TSHUT_ENA */ | |
119 | #define WM8990_TSHUT_ENA_BIT 14 | |
120 | #define WM8990_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */ | |
121 | #define WM8990_TSHUT_OPDIS_BIT 13 | |
122 | #define WM8990_OPCLK_ENA 0x0800 /* OPCLK_ENA */ | |
123 | #define WM8990_OPCLK_ENA_BIT 11 | |
124 | #define WM8990_AINL_ENA 0x0200 /* AINL_ENA */ | |
125 | #define WM8990_AINL_ENA_BIT 9 | |
126 | #define WM8990_AINR_ENA 0x0100 /* AINR_ENA */ | |
127 | #define WM8990_AINR_ENA_BIT 8 | |
128 | #define WM8990_LIN34_ENA 0x0080 /* LIN34_ENA */ | |
129 | #define WM8990_LIN34_ENA_BIT 7 | |
130 | #define WM8990_LIN12_ENA 0x0040 /* LIN12_ENA */ | |
131 | #define WM8990_LIN12_ENA_BIT 6 | |
132 | #define WM8990_RIN34_ENA 0x0020 /* RIN34_ENA */ | |
133 | #define WM8990_RIN34_ENA_BIT 5 | |
134 | #define WM8990_RIN12_ENA 0x0010 /* RIN12_ENA */ | |
135 | #define WM8990_RIN12_ENA_BIT 4 | |
136 | #define WM8990_ADCL_ENA 0x0002 /* ADCL_ENA */ | |
137 | #define WM8990_ADCL_ENA_BIT 1 | |
138 | #define WM8990_ADCR_ENA 0x0001 /* ADCR_ENA */ | |
139 | #define WM8990_ADCR_ENA_BIT 0 | |
140 | ||
141 | /* | |
142 | * R3 (0x03) - Power Management (3) | |
143 | */ | |
144 | #define WM8990_LON_ENA 0x2000 /* LON_ENA */ | |
145 | #define WM8990_LON_ENA_BIT 13 | |
146 | #define WM8990_LOP_ENA 0x1000 /* LOP_ENA */ | |
147 | #define WM8990_LOP_ENA_BIT 12 | |
148 | #define WM8990_RON_ENA 0x0800 /* RON_ENA */ | |
149 | #define WM8990_RON_ENA_BIT 11 | |
150 | #define WM8990_ROP_ENA 0x0400 /* ROP_ENA */ | |
151 | #define WM8990_ROP_ENA_BIT 10 | |
152 | #define WM8990_LOPGA_ENA 0x0080 /* LOPGA_ENA */ | |
153 | #define WM8990_LOPGA_ENA_BIT 7 | |
154 | #define WM8990_ROPGA_ENA 0x0040 /* ROPGA_ENA */ | |
155 | #define WM8990_ROPGA_ENA_BIT 6 | |
156 | #define WM8990_LOMIX_ENA 0x0020 /* LOMIX_ENA */ | |
157 | #define WM8990_LOMIX_ENA_BIT 5 | |
158 | #define WM8990_ROMIX_ENA 0x0010 /* ROMIX_ENA */ | |
159 | #define WM8990_ROMIX_ENA_BIT 4 | |
160 | #define WM8990_DACL_ENA 0x0002 /* DACL_ENA */ | |
161 | #define WM8990_DACL_ENA_BIT 1 | |
162 | #define WM8990_DACR_ENA 0x0001 /* DACR_ENA */ | |
163 | #define WM8990_DACR_ENA_BIT 0 | |
164 | ||
165 | /* | |
166 | * R4 (0x04) - Audio Interface (1) | |
167 | */ | |
168 | #define WM8990_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */ | |
169 | #define WM8990_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */ | |
170 | #define WM8990_AIFADC_TDM 0x2000 /* AIFADC_TDM */ | |
171 | #define WM8990_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */ | |
172 | #define WM8990_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */ | |
173 | #define WM8990_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */ | |
174 | #define WM8990_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */ | |
175 | #define WM8990_AIF_WL_16BITS (0 << 5) | |
176 | #define WM8990_AIF_WL_20BITS (1 << 5) | |
177 | #define WM8990_AIF_WL_24BITS (2 << 5) | |
178 | #define WM8990_AIF_WL_32BITS (3 << 5) | |
179 | #define WM8990_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */ | |
180 | #define WM8990_AIF_TMF_RIGHTJ (0 << 3) | |
181 | #define WM8990_AIF_TMF_LEFTJ (1 << 3) | |
182 | #define WM8990_AIF_TMF_I2S (2 << 3) | |
183 | #define WM8990_AIF_TMF_DSP (3 << 3) | |
184 | ||
185 | /* | |
186 | * R5 (0x05) - Audio Interface (2) | |
187 | */ | |
188 | #define WM8990_DACL_SRC 0x8000 /* DACL_SRC */ | |
189 | #define WM8990_DACR_SRC 0x4000 /* DACR_SRC */ | |
190 | #define WM8990_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */ | |
191 | #define WM8990_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */ | |
192 | #define WM8990_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST */ | |
193 | #define WM8990_DAC_COMP 0x0010 /* DAC_COMP */ | |
194 | #define WM8990_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */ | |
195 | #define WM8990_ADC_COMP 0x0004 /* ADC_COMP */ | |
196 | #define WM8990_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */ | |
197 | #define WM8990_LOOPBACK 0x0001 /* LOOPBACK */ | |
198 | ||
199 | /* | |
200 | * R6 (0x06) - Clocking (1) | |
201 | */ | |
202 | #define WM8990_TOCLK_RATE 0x8000 /* TOCLK_RATE */ | |
203 | #define WM8990_TOCLK_ENA 0x4000 /* TOCLK_ENA */ | |
204 | #define WM8990_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */ | |
205 | #define WM8990_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */ | |
206 | #define WM8990_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */ | |
207 | #define WM8990_BCLK_DIV_1 (0x0 << 1) | |
208 | #define WM8990_BCLK_DIV_1_5 (0x1 << 1) | |
209 | #define WM8990_BCLK_DIV_2 (0x2 << 1) | |
210 | #define WM8990_BCLK_DIV_3 (0x3 << 1) | |
211 | #define WM8990_BCLK_DIV_4 (0x4 << 1) | |
212 | #define WM8990_BCLK_DIV_5_5 (0x5 << 1) | |
213 | #define WM8990_BCLK_DIV_6 (0x6 << 1) | |
214 | #define WM8990_BCLK_DIV_8 (0x7 << 1) | |
215 | #define WM8990_BCLK_DIV_11 (0x8 << 1) | |
216 | #define WM8990_BCLK_DIV_12 (0x9 << 1) | |
217 | #define WM8990_BCLK_DIV_16 (0xA << 1) | |
218 | #define WM8990_BCLK_DIV_22 (0xB << 1) | |
219 | #define WM8990_BCLK_DIV_24 (0xC << 1) | |
220 | #define WM8990_BCLK_DIV_32 (0xD << 1) | |
221 | #define WM8990_BCLK_DIV_44 (0xE << 1) | |
222 | #define WM8990_BCLK_DIV_48 (0xF << 1) | |
223 | ||
224 | /* | |
225 | * R7 (0x07) - Clocking (2) | |
226 | */ | |
227 | #define WM8990_MCLK_SRC 0x8000 /* MCLK_SRC */ | |
228 | #define WM8990_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */ | |
229 | #define WM8990_CLK_FORCE 0x2000 /* CLK_FORCE */ | |
230 | #define WM8990_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */ | |
231 | #define WM8990_MCLK_DIV_1 (0 << 11) | |
232 | #define WM8990_MCLK_DIV_2 (2 << 11) | |
233 | #define WM8990_MCLK_INV 0x0400 /* MCLK_INV */ | |
234 | #define WM8990_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV */ | |
235 | #define WM8990_ADC_CLKDIV_1 (0 << 5) | |
236 | #define WM8990_ADC_CLKDIV_1_5 (1 << 5) | |
237 | #define WM8990_ADC_CLKDIV_2 (2 << 5) | |
238 | #define WM8990_ADC_CLKDIV_3 (3 << 5) | |
239 | #define WM8990_ADC_CLKDIV_4 (4 << 5) | |
240 | #define WM8990_ADC_CLKDIV_5_5 (5 << 5) | |
241 | #define WM8990_ADC_CLKDIV_6 (6 << 5) | |
242 | #define WM8990_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */ | |
243 | #define WM8990_DAC_CLKDIV_1 (0 << 2) | |
244 | #define WM8990_DAC_CLKDIV_1_5 (1 << 2) | |
245 | #define WM8990_DAC_CLKDIV_2 (2 << 2) | |
246 | #define WM8990_DAC_CLKDIV_3 (3 << 2) | |
247 | #define WM8990_DAC_CLKDIV_4 (4 << 2) | |
248 | #define WM8990_DAC_CLKDIV_5_5 (5 << 2) | |
249 | #define WM8990_DAC_CLKDIV_6 (6 << 2) | |
250 | ||
251 | /* | |
252 | * R8 (0x08) - Audio Interface (3) | |
253 | */ | |
254 | #define WM8990_AIF_MSTR1 0x8000 /* AIF_MSTR1 */ | |
255 | #define WM8990_AIF_MSTR2 0x4000 /* AIF_MSTR2 */ | |
256 | #define WM8990_AIF_SEL 0x2000 /* AIF_SEL */ | |
257 | #define WM8990_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */ | |
258 | #define WM8990_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE */ | |
259 | ||
260 | /* | |
261 | * R9 (0x09) - Audio Interface (4) | |
262 | */ | |
263 | #define WM8990_ALRCGPIO1 0x8000 /* ALRCGPIO1 */ | |
264 | #define WM8990_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */ | |
265 | #define WM8990_AIF_TRIS 0x2000 /* AIF_TRIS */ | |
266 | #define WM8990_DACLRC_DIR 0x0800 /* DACLRC_DIR */ | |
267 | #define WM8990_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE */ | |
268 | ||
269 | /* | |
270 | * R10 (0x0A) - DAC CTRL | |
271 | */ | |
272 | #define WM8990_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */ | |
273 | #define WM8990_DAC_MONO 0x0200 /* DAC_MONO */ | |
274 | #define WM8990_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */ | |
275 | #define WM8990_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */ | |
276 | #define WM8990_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */ | |
277 | #define WM8990_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */ | |
278 | #define WM8990_DAC_MUTE 0x0004 /* DAC_MUTE */ | |
279 | #define WM8990_DACL_DATINV 0x0002 /* DACL_DATINV */ | |
280 | #define WM8990_DACR_DATINV 0x0001 /* DACR_DATINV */ | |
281 | ||
282 | /* | |
283 | * R11 (0x0B) - Left DAC Digital Volume | |
284 | */ | |
285 | #define WM8990_DAC_VU 0x0100 /* DAC_VU */ | |
286 | #define WM8990_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */ | |
287 | #define WM8990_DACL_VOL_SHIFT 0 | |
288 | /* | |
289 | * R12 (0x0C) - Right DAC Digital Volume | |
290 | */ | |
291 | #define WM8990_DAC_VU 0x0100 /* DAC_VU */ | |
292 | #define WM8990_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */ | |
293 | #define WM8990_DACR_VOL_SHIFT 0 | |
294 | /* | |
295 | * R13 (0x0D) - Digital Side Tone | |
296 | */ | |
297 | #define WM8990_ADCL_DAC_SVOL_MASK 0x0F /* ADCL_DAC_SVOL */ | |
298 | #define WM8990_ADCL_DAC_SVOL_SHIFT 9 | |
299 | #define WM8990_ADCR_DAC_SVOL_MASK 0x0F /* ADCR_DAC_SVOL */ | |
300 | #define WM8990_ADCR_DAC_SVOL_SHIFT 5 | |
301 | #define WM8990_ADC_TO_DACL_MASK 0x03 /* ADC_TO_DACL - [3:2] */ | |
302 | #define WM8990_ADC_TO_DACL_SHIFT 2 | |
303 | #define WM8990_ADC_TO_DACR_MASK 0x03 /* ADC_TO_DACR - [1:0] */ | |
304 | #define WM8990_ADC_TO_DACR_SHIFT 0 | |
305 | ||
306 | /* | |
307 | * R14 (0x0E) - ADC CTRL | |
308 | */ | |
309 | #define WM8990_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */ | |
310 | #define WM8990_ADC_HPF_ENA_BIT 8 | |
311 | #define WM8990_ADC_HPF_CUT_MASK 0x03 /* ADC_HPF_CUT - [6:5] */ | |
312 | #define WM8990_ADC_HPF_CUT_SHIFT 5 | |
313 | #define WM8990_ADCL_DATINV 0x0002 /* ADCL_DATINV */ | |
314 | #define WM8990_ADCL_DATINV_BIT 1 | |
315 | #define WM8990_ADCR_DATINV 0x0001 /* ADCR_DATINV */ | |
316 | #define WM8990_ADCR_DATINV_BIT 0 | |
317 | ||
318 | /* | |
319 | * R15 (0x0F) - Left ADC Digital Volume | |
320 | */ | |
321 | #define WM8990_ADC_VU 0x0100 /* ADC_VU */ | |
322 | #define WM8990_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */ | |
323 | #define WM8990_ADCL_VOL_SHIFT 0 | |
324 | ||
325 | /* | |
326 | * R16 (0x10) - Right ADC Digital Volume | |
327 | */ | |
328 | #define WM8990_ADC_VU 0x0100 /* ADC_VU */ | |
329 | #define WM8990_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */ | |
330 | #define WM8990_ADCR_VOL_SHIFT 0 | |
331 | ||
332 | /* | |
333 | * R18 (0x12) - GPIO CTRL 1 | |
334 | */ | |
335 | #define WM8990_IRQ 0x1000 /* IRQ */ | |
336 | #define WM8990_TEMPOK 0x0800 /* TEMPOK */ | |
337 | #define WM8990_MICSHRT 0x0400 /* MICSHRT */ | |
338 | #define WM8990_MICDET 0x0200 /* MICDET */ | |
339 | #define WM8990_PLL_LCK 0x0100 /* PLL_LCK */ | |
340 | #define WM8990_GPI8_STATUS 0x0080 /* GPI8_STATUS */ | |
341 | #define WM8990_GPI7_STATUS 0x0040 /* GPI7_STATUS */ | |
342 | #define WM8990_GPIO6_STATUS 0x0020 /* GPIO6_STATUS */ | |
343 | #define WM8990_GPIO5_STATUS 0x0010 /* GPIO5_STATUS */ | |
344 | #define WM8990_GPIO4_STATUS 0x0008 /* GPIO4_STATUS */ | |
345 | #define WM8990_GPIO3_STATUS 0x0004 /* GPIO3_STATUS */ | |
346 | #define WM8990_GPIO2_STATUS 0x0002 /* GPIO2_STATUS */ | |
347 | #define WM8990_GPIO1_STATUS 0x0001 /* GPIO1_STATUS */ | |
348 | ||
349 | /* | |
350 | * R19 (0x13) - GPIO1 & GPIO2 | |
351 | */ | |
352 | #define WM8990_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */ | |
353 | #define WM8990_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */ | |
354 | #define WM8990_GPIO2_PU 0x2000 /* GPIO2_PU */ | |
355 | #define WM8990_GPIO2_PD 0x1000 /* GPIO2_PD */ | |
356 | #define WM8990_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */ | |
357 | #define WM8990_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */ | |
358 | #define WM8990_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */ | |
359 | #define WM8990_GPIO1_PU 0x0020 /* GPIO1_PU */ | |
360 | #define WM8990_GPIO1_PD 0x0010 /* GPIO1_PD */ | |
361 | #define WM8990_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ | |
362 | ||
363 | /* | |
364 | * R20 (0x14) - GPIO3 & GPIO4 | |
365 | */ | |
366 | #define WM8990_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */ | |
367 | #define WM8990_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */ | |
368 | #define WM8990_GPIO4_PU 0x2000 /* GPIO4_PU */ | |
369 | #define WM8990_GPIO4_PD 0x1000 /* GPIO4_PD */ | |
370 | #define WM8990_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */ | |
371 | #define WM8990_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */ | |
372 | #define WM8990_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */ | |
373 | #define WM8990_GPIO3_PU 0x0020 /* GPIO3_PU */ | |
374 | #define WM8990_GPIO3_PD 0x0010 /* GPIO3_PD */ | |
375 | #define WM8990_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ | |
376 | ||
377 | /* | |
378 | * R21 (0x15) - GPIO5 & GPIO6 | |
379 | */ | |
380 | #define WM8990_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */ | |
381 | #define WM8990_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */ | |
382 | #define WM8990_GPIO6_PU 0x2000 /* GPIO6_PU */ | |
383 | #define WM8990_GPIO6_PD 0x1000 /* GPIO6_PD */ | |
384 | #define WM8990_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */ | |
385 | #define WM8990_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */ | |
386 | #define WM8990_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */ | |
387 | #define WM8990_GPIO5_PU 0x0020 /* GPIO5_PU */ | |
388 | #define WM8990_GPIO5_PD 0x0010 /* GPIO5_PD */ | |
389 | #define WM8990_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */ | |
390 | ||
391 | /* | |
392 | * R22 (0x16) - GPIOCTRL 2 | |
393 | */ | |
394 | #define WM8990_RD_3W_ENA 0x8000 /* RD_3W_ENA */ | |
395 | #define WM8990_MODE_3W4W 0x4000 /* MODE_3W4W */ | |
396 | #define WM8990_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */ | |
397 | #define WM8990_MICSHRT_IRQ_ENA 0x0400 /* MICSHRT_IRQ_ENA */ | |
398 | #define WM8990_MICDET_IRQ_ENA 0x0200 /* MICDET_IRQ_ENA */ | |
399 | #define WM8990_PLL_LCK_IRQ_ENA 0x0100 /* PLL_LCK_IRQ_ENA */ | |
400 | #define WM8990_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */ | |
401 | #define WM8990_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */ | |
402 | #define WM8990_GPI8_ENA 0x0010 /* GPI8_ENA */ | |
403 | #define WM8990_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */ | |
404 | #define WM8990_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */ | |
405 | #define WM8990_GPI7_ENA 0x0001 /* GPI7_ENA */ | |
406 | ||
407 | /* | |
408 | * R23 (0x17) - GPIO_POL | |
409 | */ | |
410 | #define WM8990_IRQ_INV 0x1000 /* IRQ_INV */ | |
411 | #define WM8990_TEMPOK_POL 0x0800 /* TEMPOK_POL */ | |
412 | #define WM8990_MICSHRT_POL 0x0400 /* MICSHRT_POL */ | |
413 | #define WM8990_MICDET_POL 0x0200 /* MICDET_POL */ | |
414 | #define WM8990_PLL_LCK_POL 0x0100 /* PLL_LCK_POL */ | |
415 | #define WM8990_GPI8_POL 0x0080 /* GPI8_POL */ | |
416 | #define WM8990_GPI7_POL 0x0040 /* GPI7_POL */ | |
417 | #define WM8990_GPIO6_POL 0x0020 /* GPIO6_POL */ | |
418 | #define WM8990_GPIO5_POL 0x0010 /* GPIO5_POL */ | |
419 | #define WM8990_GPIO4_POL 0x0008 /* GPIO4_POL */ | |
420 | #define WM8990_GPIO3_POL 0x0004 /* GPIO3_POL */ | |
421 | #define WM8990_GPIO2_POL 0x0002 /* GPIO2_POL */ | |
422 | #define WM8990_GPIO1_POL 0x0001 /* GPIO1_POL */ | |
423 | ||
424 | /* | |
425 | * R24 (0x18) - Left Line Input 1&2 Volume | |
426 | */ | |
427 | #define WM8990_IPVU 0x0100 /* IPVU */ | |
428 | #define WM8990_LI12MUTE 0x0080 /* LI12MUTE */ | |
429 | #define WM8990_LI12MUTE_BIT 7 | |
430 | #define WM8990_LI12ZC 0x0040 /* LI12ZC */ | |
431 | #define WM8990_LI12ZC_BIT 6 | |
432 | #define WM8990_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */ | |
433 | #define WM8990_LIN12VOL_SHIFT 0 | |
434 | /* | |
435 | * R25 (0x19) - Left Line Input 3&4 Volume | |
436 | */ | |
437 | #define WM8990_IPVU 0x0100 /* IPVU */ | |
438 | #define WM8990_LI34MUTE 0x0080 /* LI34MUTE */ | |
439 | #define WM8990_LI34MUTE_BIT 7 | |
440 | #define WM8990_LI34ZC 0x0040 /* LI34ZC */ | |
441 | #define WM8990_LI34ZC_BIT 6 | |
442 | #define WM8990_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */ | |
443 | #define WM8990_LIN34VOL_SHIFT 0 | |
444 | ||
445 | /* | |
446 | * R26 (0x1A) - Right Line Input 1&2 Volume | |
447 | */ | |
448 | #define WM8990_IPVU 0x0100 /* IPVU */ | |
449 | #define WM8990_RI12MUTE 0x0080 /* RI12MUTE */ | |
450 | #define WM8990_RI12MUTE_BIT 7 | |
451 | #define WM8990_RI12ZC 0x0040 /* RI12ZC */ | |
452 | #define WM8990_RI12ZC_BIT 6 | |
453 | #define WM8990_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */ | |
454 | #define WM8990_RIN12VOL_SHIFT 0 | |
455 | ||
456 | /* | |
457 | * R27 (0x1B) - Right Line Input 3&4 Volume | |
458 | */ | |
459 | #define WM8990_IPVU 0x0100 /* IPVU */ | |
460 | #define WM8990_RI34MUTE 0x0080 /* RI34MUTE */ | |
461 | #define WM8990_RI34MUTE_BIT 7 | |
462 | #define WM8990_RI34ZC 0x0040 /* RI34ZC */ | |
463 | #define WM8990_RI34ZC_BIT 6 | |
464 | #define WM8990_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */ | |
465 | #define WM8990_RIN34VOL_SHIFT 0 | |
466 | ||
467 | /* | |
468 | * R28 (0x1C) - Left Output Volume | |
469 | */ | |
470 | #define WM8990_OPVU 0x0100 /* OPVU */ | |
471 | #define WM8990_LOZC 0x0080 /* LOZC */ | |
472 | #define WM8990_LOZC_BIT 7 | |
473 | #define WM8990_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */ | |
474 | #define WM8990_LOUTVOL_SHIFT 0 | |
475 | /* | |
476 | * R29 (0x1D) - Right Output Volume | |
477 | */ | |
478 | #define WM8990_OPVU 0x0100 /* OPVU */ | |
479 | #define WM8990_ROZC 0x0080 /* ROZC */ | |
480 | #define WM8990_ROZC_BIT 7 | |
481 | #define WM8990_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */ | |
482 | #define WM8990_ROUTVOL_SHIFT 0 | |
483 | /* | |
484 | * R30 (0x1E) - Line Outputs Volume | |
485 | */ | |
486 | #define WM8990_LONMUTE 0x0040 /* LONMUTE */ | |
487 | #define WM8990_LONMUTE_BIT 6 | |
488 | #define WM8990_LOPMUTE 0x0020 /* LOPMUTE */ | |
489 | #define WM8990_LOPMUTE_BIT 5 | |
490 | #define WM8990_LOATTN 0x0010 /* LOATTN */ | |
491 | #define WM8990_LOATTN_BIT 4 | |
492 | #define WM8990_RONMUTE 0x0004 /* RONMUTE */ | |
493 | #define WM8990_RONMUTE_BIT 2 | |
494 | #define WM8990_ROPMUTE 0x0002 /* ROPMUTE */ | |
495 | #define WM8990_ROPMUTE_BIT 1 | |
496 | #define WM8990_ROATTN 0x0001 /* ROATTN */ | |
497 | #define WM8990_ROATTN_BIT 0 | |
498 | ||
499 | /* | |
500 | * R31 (0x1F) - Out3/4 Volume | |
501 | */ | |
502 | #define WM8990_OUT3MUTE 0x0020 /* OUT3MUTE */ | |
503 | #define WM8990_OUT3MUTE_BIT 5 | |
504 | #define WM8990_OUT3ATTN 0x0010 /* OUT3ATTN */ | |
505 | #define WM8990_OUT3ATTN_BIT 4 | |
506 | #define WM8990_OUT4MUTE 0x0002 /* OUT4MUTE */ | |
507 | #define WM8990_OUT4MUTE_BIT 1 | |
508 | #define WM8990_OUT4ATTN 0x0001 /* OUT4ATTN */ | |
509 | #define WM8990_OUT4ATTN_BIT 0 | |
510 | ||
511 | /* | |
512 | * R32 (0x20) - Left OPGA Volume | |
513 | */ | |
514 | #define WM8990_OPVU 0x0100 /* OPVU */ | |
515 | #define WM8990_LOPGAZC 0x0080 /* LOPGAZC */ | |
516 | #define WM8990_LOPGAZC_BIT 7 | |
517 | #define WM8990_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */ | |
518 | #define WM8990_LOPGAVOL_SHIFT 0 | |
519 | ||
520 | /* | |
521 | * R33 (0x21) - Right OPGA Volume | |
522 | */ | |
523 | #define WM8990_OPVU 0x0100 /* OPVU */ | |
524 | #define WM8990_ROPGAZC 0x0080 /* ROPGAZC */ | |
525 | #define WM8990_ROPGAZC_BIT 7 | |
526 | #define WM8990_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */ | |
527 | #define WM8990_ROPGAVOL_SHIFT 0 | |
528 | /* | |
529 | * R34 (0x22) - Speaker Volume | |
530 | */ | |
97bb8129 MB |
531 | #define WM8990_SPKATTN_MASK 0x0003 /* SPKATTN - [1:0] */ |
532 | #define WM8990_SPKATTN_SHIFT 0 | |
f10485e7 MB |
533 | |
534 | /* | |
535 | * R35 (0x23) - ClassD1 | |
536 | */ | |
537 | #define WM8990_CDMODE 0x0100 /* CDMODE */ | |
538 | #define WM8990_CDMODE_BIT 8 | |
539 | ||
540 | /* | |
541 | * R37 (0x25) - ClassD3 | |
542 | */ | |
543 | #define WM8990_DCGAIN_MASK 0x0007 /* DCGAIN - [5:3] */ | |
544 | #define WM8990_DCGAIN_SHIFT 3 | |
545 | #define WM8990_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */ | |
546 | #define WM8990_ACGAIN_SHIFT 0 | |
97bb8129 MB |
547 | |
548 | /* | |
549 | * R38 (0x26) - ClassD4 | |
550 | */ | |
551 | #define WM8990_SPKZC_MASK 0x0001 /* SPKZC */ | |
552 | #define WM8990_SPKZC_SHIFT 7 /* SPKZC */ | |
553 | #define WM8990_SPKVOL_MASK 0x007F /* SPKVOL - [6:0] */ | |
554 | #define WM8990_SPKVOL_SHIFT 0 /* SPKVOL - [6:0] */ | |
555 | ||
f10485e7 MB |
556 | /* |
557 | * R39 (0x27) - Input Mixer1 | |
558 | */ | |
559 | #define WM8990_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */ | |
560 | #define WM8990_AINLMODE_SHIFT 2 | |
561 | #define WM8990_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */ | |
562 | #define WM8990_AINRMODE_SHIFT 0 | |
563 | ||
564 | /* | |
565 | * R40 (0x28) - Input Mixer2 | |
566 | */ | |
567 | #define WM8990_LMP4 0x0080 /* LMP4 */ | |
568 | #define WM8990_LMP4_BIT 7 /* LMP4 */ | |
569 | #define WM8990_LMN3 0x0040 /* LMN3 */ | |
570 | #define WM8990_LMN3_BIT 6 /* LMN3 */ | |
571 | #define WM8990_LMP2 0x0020 /* LMP2 */ | |
572 | #define WM8990_LMP2_BIT 5 /* LMP2 */ | |
573 | #define WM8990_LMN1 0x0010 /* LMN1 */ | |
574 | #define WM8990_LMN1_BIT 4 /* LMN1 */ | |
575 | #define WM8990_RMP4 0x0008 /* RMP4 */ | |
576 | #define WM8990_RMP4_BIT 3 /* RMP4 */ | |
577 | #define WM8990_RMN3 0x0004 /* RMN3 */ | |
578 | #define WM8990_RMN3_BIT 2 /* RMN3 */ | |
579 | #define WM8990_RMP2 0x0002 /* RMP2 */ | |
580 | #define WM8990_RMP2_BIT 1 /* RMP2 */ | |
581 | #define WM8990_RMN1 0x0001 /* RMN1 */ | |
582 | #define WM8990_RMN1_BIT 0 /* RMN1 */ | |
583 | ||
584 | /* | |
585 | * R41 (0x29) - Input Mixer3 | |
586 | */ | |
587 | #define WM8990_L34MNB 0x0100 /* L34MNB */ | |
588 | #define WM8990_L34MNB_BIT 8 | |
589 | #define WM8990_L34MNBST 0x0080 /* L34MNBST */ | |
590 | #define WM8990_L34MNBST_BIT 7 | |
591 | #define WM8990_L12MNB 0x0020 /* L12MNB */ | |
592 | #define WM8990_L12MNB_BIT 5 | |
593 | #define WM8990_L12MNBST 0x0010 /* L12MNBST */ | |
594 | #define WM8990_L12MNBST_BIT 4 | |
595 | #define WM8990_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */ | |
596 | #define WM8990_LDBVOL_SHIFT 0 | |
597 | ||
598 | /* | |
599 | * R42 (0x2A) - Input Mixer4 | |
600 | */ | |
601 | #define WM8990_R34MNB 0x0100 /* R34MNB */ | |
602 | #define WM8990_R34MNB_BIT 8 | |
603 | #define WM8990_R34MNBST 0x0080 /* R34MNBST */ | |
604 | #define WM8990_R34MNBST_BIT 7 | |
605 | #define WM8990_R12MNB 0x0020 /* R12MNB */ | |
606 | #define WM8990_R12MNB_BIT 5 | |
607 | #define WM8990_R12MNBST 0x0010 /* R12MNBST */ | |
608 | #define WM8990_R12MNBST_BIT 4 | |
609 | #define WM8990_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */ | |
610 | #define WM8990_RDBVOL_SHIFT 0 | |
611 | ||
612 | /* | |
613 | * R43 (0x2B) - Input Mixer5 | |
614 | */ | |
615 | #define WM8990_LI2BVOL_MASK 0x07 /* LI2BVOL - [8:6] */ | |
616 | #define WM8990_LI2BVOL_SHIFT 6 | |
617 | #define WM8990_LR4BVOL_MASK 0x07 /* LR4BVOL - [5:3] */ | |
618 | #define WM8990_LR4BVOL_SHIFT 3 | |
619 | #define WM8990_LL4BVOL_MASK 0x07 /* LL4BVOL - [2:0] */ | |
620 | #define WM8990_LL4BVOL_SHIFT 0 | |
621 | ||
622 | /* | |
623 | * R44 (0x2C) - Input Mixer6 | |
624 | */ | |
625 | #define WM8990_RI2BVOL_MASK 0x07 /* RI2BVOL - [8:6] */ | |
626 | #define WM8990_RI2BVOL_SHIFT 6 | |
627 | #define WM8990_RL4BVOL_MASK 0x07 /* RL4BVOL - [5:3] */ | |
628 | #define WM8990_RL4BVOL_SHIFT 3 | |
629 | #define WM8990_RR4BVOL_MASK 0x07 /* RR4BVOL - [2:0] */ | |
630 | #define WM8990_RR4BVOL_SHIFT 0 | |
631 | ||
632 | /* | |
633 | * R45 (0x2D) - Output Mixer1 | |
634 | */ | |
635 | #define WM8990_LRBLO 0x0080 /* LRBLO */ | |
636 | #define WM8990_LRBLO_BIT 7 | |
637 | #define WM8990_LLBLO 0x0040 /* LLBLO */ | |
638 | #define WM8990_LLBLO_BIT 6 | |
639 | #define WM8990_LRI3LO 0x0020 /* LRI3LO */ | |
640 | #define WM8990_LRI3LO_BIT 5 | |
641 | #define WM8990_LLI3LO 0x0010 /* LLI3LO */ | |
642 | #define WM8990_LLI3LO_BIT 4 | |
643 | #define WM8990_LR12LO 0x0008 /* LR12LO */ | |
644 | #define WM8990_LR12LO_BIT 3 | |
645 | #define WM8990_LL12LO 0x0004 /* LL12LO */ | |
646 | #define WM8990_LL12LO_BIT 2 | |
647 | #define WM8990_LDLO 0x0001 /* LDLO */ | |
648 | #define WM8990_LDLO_BIT 0 | |
649 | ||
650 | /* | |
651 | * R46 (0x2E) - Output Mixer2 | |
652 | */ | |
653 | #define WM8990_RLBRO 0x0080 /* RLBRO */ | |
654 | #define WM8990_RLBRO_BIT 7 | |
655 | #define WM8990_RRBRO 0x0040 /* RRBRO */ | |
656 | #define WM8990_RRBRO_BIT 6 | |
657 | #define WM8990_RLI3RO 0x0020 /* RLI3RO */ | |
658 | #define WM8990_RLI3RO_BIT 5 | |
659 | #define WM8990_RRI3RO 0x0010 /* RRI3RO */ | |
660 | #define WM8990_RRI3RO_BIT 4 | |
661 | #define WM8990_RL12RO 0x0008 /* RL12RO */ | |
662 | #define WM8990_RL12RO_BIT 3 | |
663 | #define WM8990_RR12RO 0x0004 /* RR12RO */ | |
664 | #define WM8990_RR12RO_BIT 2 | |
665 | #define WM8990_RDRO 0x0001 /* RDRO */ | |
666 | #define WM8990_RDRO_BIT 0 | |
667 | ||
668 | /* | |
669 | * R47 (0x2F) - Output Mixer3 | |
670 | */ | |
671 | #define WM8990_LLI3LOVOL_MASK 0x07 /* LLI3LOVOL - [8:6] */ | |
672 | #define WM8990_LLI3LOVOL_SHIFT 6 | |
673 | #define WM8990_LR12LOVOL_MASK 0x07 /* LR12LOVOL - [5:3] */ | |
674 | #define WM8990_LR12LOVOL_SHIFT 3 | |
675 | #define WM8990_LL12LOVOL_MASK 0x07 /* LL12LOVOL - [2:0] */ | |
676 | #define WM8990_LL12LOVOL_SHIFT 0 | |
677 | ||
678 | /* | |
679 | * R48 (0x30) - Output Mixer4 | |
680 | */ | |
681 | #define WM8990_RRI3ROVOL_MASK 0x07 /* RRI3ROVOL - [8:6] */ | |
682 | #define WM8990_RRI3ROVOL_SHIFT 6 | |
683 | #define WM8990_RL12ROVOL_MASK 0x07 /* RL12ROVOL - [5:3] */ | |
684 | #define WM8990_RL12ROVOL_SHIFT 3 | |
685 | #define WM8990_RR12ROVOL_MASK 0x07 /* RR12ROVOL - [2:0] */ | |
686 | #define WM8990_RR12ROVOL_SHIFT 0 | |
687 | ||
688 | /* | |
689 | * R49 (0x31) - Output Mixer5 | |
690 | */ | |
691 | #define WM8990_LRI3LOVOL_MASK 0x07 /* LRI3LOVOL - [8:6] */ | |
692 | #define WM8990_LRI3LOVOL_SHIFT 6 | |
693 | #define WM8990_LRBLOVOL_MASK 0x07 /* LRBLOVOL - [5:3] */ | |
694 | #define WM8990_LRBLOVOL_SHIFT 3 | |
695 | #define WM8990_LLBLOVOL_MASK 0x07 /* LLBLOVOL - [2:0] */ | |
696 | #define WM8990_LLBLOVOL_SHIFT 0 | |
697 | ||
698 | /* | |
699 | * R50 (0x32) - Output Mixer6 | |
700 | */ | |
701 | #define WM8990_RLI3ROVOL_MASK 0x07 /* RLI3ROVOL - [8:6] */ | |
702 | #define WM8990_RLI3ROVOL_SHIFT 6 | |
703 | #define WM8990_RLBROVOL_MASK 0x07 /* RLBROVOL - [5:3] */ | |
704 | #define WM8990_RLBROVOL_SHIFT 3 | |
705 | #define WM8990_RRBROVOL_MASK 0x07 /* RRBROVOL - [2:0] */ | |
706 | #define WM8990_RRBROVOL_SHIFT 0 | |
707 | ||
708 | /* | |
709 | * R51 (0x33) - Out3/4 Mixer | |
710 | */ | |
711 | #define WM8990_VSEL_MASK 0x0180 /* VSEL - [8:7] */ | |
712 | #define WM8990_LI4O3 0x0020 /* LI4O3 */ | |
713 | #define WM8990_LI4O3_BIT 5 | |
714 | #define WM8990_LPGAO3 0x0010 /* LPGAO3 */ | |
715 | #define WM8990_LPGAO3_BIT 4 | |
716 | #define WM8990_RI4O4 0x0002 /* RI4O4 */ | |
717 | #define WM8990_RI4O4_BIT 1 | |
718 | #define WM8990_RPGAO4 0x0001 /* RPGAO4 */ | |
719 | #define WM8990_RPGAO4_BIT 0 | |
720 | /* | |
721 | * R52 (0x34) - Line Mixer1 | |
722 | */ | |
723 | #define WM8990_LLOPGALON 0x0040 /* LLOPGALON */ | |
724 | #define WM8990_LLOPGALON_BIT 6 | |
725 | #define WM8990_LROPGALON 0x0020 /* LROPGALON */ | |
726 | #define WM8990_LROPGALON_BIT 5 | |
727 | #define WM8990_LOPLON 0x0010 /* LOPLON */ | |
728 | #define WM8990_LOPLON_BIT 4 | |
729 | #define WM8990_LR12LOP 0x0004 /* LR12LOP */ | |
730 | #define WM8990_LR12LOP_BIT 2 | |
731 | #define WM8990_LL12LOP 0x0002 /* LL12LOP */ | |
732 | #define WM8990_LL12LOP_BIT 1 | |
733 | #define WM8990_LLOPGALOP 0x0001 /* LLOPGALOP */ | |
734 | #define WM8990_LLOPGALOP_BIT 0 | |
735 | /* | |
736 | * R53 (0x35) - Line Mixer2 | |
737 | */ | |
738 | #define WM8990_RROPGARON 0x0040 /* RROPGARON */ | |
739 | #define WM8990_RROPGARON_BIT 6 | |
740 | #define WM8990_RLOPGARON 0x0020 /* RLOPGARON */ | |
741 | #define WM8990_RLOPGARON_BIT 5 | |
742 | #define WM8990_ROPRON 0x0010 /* ROPRON */ | |
743 | #define WM8990_ROPRON_BIT 4 | |
744 | #define WM8990_RL12ROP 0x0004 /* RL12ROP */ | |
745 | #define WM8990_RL12ROP_BIT 2 | |
746 | #define WM8990_RR12ROP 0x0002 /* RR12ROP */ | |
747 | #define WM8990_RR12ROP_BIT 1 | |
748 | #define WM8990_RROPGAROP 0x0001 /* RROPGAROP */ | |
749 | #define WM8990_RROPGAROP_BIT 0 | |
750 | ||
751 | /* | |
752 | * R54 (0x36) - Speaker Mixer | |
753 | */ | |
754 | #define WM8990_LB2SPK 0x0080 /* LB2SPK */ | |
755 | #define WM8990_LB2SPK_BIT 7 | |
756 | #define WM8990_RB2SPK 0x0040 /* RB2SPK */ | |
757 | #define WM8990_RB2SPK_BIT 6 | |
758 | #define WM8990_LI2SPK 0x0020 /* LI2SPK */ | |
759 | #define WM8990_LI2SPK_BIT 5 | |
760 | #define WM8990_RI2SPK 0x0010 /* RI2SPK */ | |
761 | #define WM8990_RI2SPK_BIT 4 | |
762 | #define WM8990_LOPGASPK 0x0008 /* LOPGASPK */ | |
763 | #define WM8990_LOPGASPK_BIT 3 | |
764 | #define WM8990_ROPGASPK 0x0004 /* ROPGASPK */ | |
765 | #define WM8990_ROPGASPK_BIT 2 | |
766 | #define WM8990_LDSPK 0x0002 /* LDSPK */ | |
767 | #define WM8990_LDSPK_BIT 1 | |
768 | #define WM8990_RDSPK 0x0001 /* RDSPK */ | |
769 | #define WM8990_RDSPK_BIT 0 | |
770 | ||
771 | /* | |
772 | * R55 (0x37) - Additional Control | |
773 | */ | |
774 | #define WM8990_VROI 0x0001 /* VROI */ | |
775 | ||
776 | /* | |
777 | * R56 (0x38) - AntiPOP1 | |
778 | */ | |
779 | #define WM8990_DIS_LLINE 0x0020 /* DIS_LLINE */ | |
780 | #define WM8990_DIS_RLINE 0x0010 /* DIS_RLINE */ | |
781 | #define WM8990_DIS_OUT3 0x0008 /* DIS_OUT3 */ | |
782 | #define WM8990_DIS_OUT4 0x0004 /* DIS_OUT4 */ | |
783 | #define WM8990_DIS_LOUT 0x0002 /* DIS_LOUT */ | |
784 | #define WM8990_DIS_ROUT 0x0001 /* DIS_ROUT */ | |
785 | ||
786 | /* | |
787 | * R57 (0x39) - AntiPOP2 | |
788 | */ | |
789 | #define WM8990_SOFTST 0x0040 /* SOFTST */ | |
790 | #define WM8990_BUFIOEN 0x0008 /* BUFIOEN */ | |
791 | #define WM8990_BUFDCOPEN 0x0004 /* BUFDCOPEN */ | |
792 | #define WM8990_POBCTRL 0x0002 /* POBCTRL */ | |
793 | #define WM8990_VMIDTOG 0x0001 /* VMIDTOG */ | |
794 | ||
795 | /* | |
796 | * R58 (0x3A) - MICBIAS | |
797 | */ | |
798 | #define WM8990_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */ | |
799 | #define WM8990_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */ | |
800 | #define WM8990_MCD 0x0004 /* MCD */ | |
801 | #define WM8990_MBSEL 0x0001 /* MBSEL */ | |
802 | ||
803 | /* | |
804 | * R60 (0x3C) - PLL1 | |
805 | */ | |
806 | #define WM8990_SDM 0x0080 /* SDM */ | |
807 | #define WM8990_PRESCALE 0x0040 /* PRESCALE */ | |
808 | #define WM8990_PLLN_MASK 0x000F /* PLLN - [3:0] */ | |
809 | ||
810 | /* | |
811 | * R61 (0x3D) - PLL2 | |
812 | */ | |
813 | #define WM8990_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */ | |
814 | ||
815 | /* | |
816 | * R62 (0x3E) - PLL3 | |
817 | */ | |
818 | #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ | |
819 | ||
f10485e7 MB |
820 | #define WM8990_MCLK_DIV 0 |
821 | #define WM8990_DACCLK_DIV 1 | |
822 | #define WM8990_ADCCLK_DIV 2 | |
823 | #define WM8990_BCLK_DIV 3 | |
824 | ||
f10485e7 MB |
825 | #endif /* __WM8990REGISTERDEFS_H__ */ |
826 | /*------------------------------ END OF FILE ---------------------------------*/ |