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ASoC: wm8991: Use a supply to manage input power
[deliverable/linux.git] / sound / soc / codecs / wm8991.c
CommitLineData
203db220
DP		 1/*
2 * wm8991.c -- WM8991 ALSA Soc Audio driver
3 *
4 * Copyright 2007-2010 Wolfson Microelectronics PLC.
5 * Author: Graeme Gregory
9a185b9a 6 * Graeme.Gregory@wolfsonmicro.com
203db220
DP		 7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
203db220
DP		 16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
203db220
DP		 21#include <linux/slab.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29#include <asm/div64.h>
30
31#include "wm8991.h"
32
33struct wm8991_priv {
34 enum snd_soc_control_type control_type;
35 unsigned int pcmclk;
36};
37
38static const u16 wm8991_reg_defs[] = {
39 0x8991, /* R0 - Reset */
40 0x0000, /* R1 - Power Management (1) */
41 0x6000, /* R2 - Power Management (2) */
42 0x0000, /* R3 - Power Management (3) */
43 0x4050, /* R4 - Audio Interface (1) */
44 0x4000, /* R5 - Audio Interface (2) */
45 0x01C8, /* R6 - Clocking (1) */
46 0x0000, /* R7 - Clocking (2) */
47 0x0040, /* R8 - Audio Interface (3) */
48 0x0040, /* R9 - Audio Interface (4) */
49 0x0004, /* R10 - DAC CTRL */
50 0x00C0, /* R11 - Left DAC Digital Volume */
51 0x00C0, /* R12 - Right DAC Digital Volume */
52 0x0000, /* R13 - Digital Side Tone */
53 0x0100, /* R14 - ADC CTRL */
54 0x00C0, /* R15 - Left ADC Digital Volume */
55 0x00C0, /* R16 - Right ADC Digital Volume */
56 0x0000, /* R17 */
57 0x0000, /* R18 - GPIO CTRL 1 */
58 0x1000, /* R19 - GPIO1 & GPIO2 */
59 0x1010, /* R20 - GPIO3 & GPIO4 */
60 0x1010, /* R21 - GPIO5 & GPIO6 */
61 0x8000, /* R22 - GPIOCTRL 2 */
62 0x0800, /* R23 - GPIO_POL */
63 0x008B, /* R24 - Left Line Input 1&2 Volume */
64 0x008B, /* R25 - Left Line Input 3&4 Volume */
65 0x008B, /* R26 - Right Line Input 1&2 Volume */
66 0x008B, /* R27 - Right Line Input 3&4 Volume */
67 0x0000, /* R28 - Left Output Volume */
68 0x0000, /* R29 - Right Output Volume */
69 0x0066, /* R30 - Line Outputs Volume */
70 0x0022, /* R31 - Out3/4 Volume */
71 0x0079, /* R32 - Left OPGA Volume */
72 0x0079, /* R33 - Right OPGA Volume */
73 0x0003, /* R34 - Speaker Volume */
74 0x0003, /* R35 - ClassD1 */
75 0x0000, /* R36 */
76 0x0100, /* R37 - ClassD3 */
77 0x0000, /* R38 */
78 0x0000, /* R39 - Input Mixer1 */
79 0x0000, /* R40 - Input Mixer2 */
80 0x0000, /* R41 - Input Mixer3 */
81 0x0000, /* R42 - Input Mixer4 */
82 0x0000, /* R43 - Input Mixer5 */
83 0x0000, /* R44 - Input Mixer6 */
84 0x0000, /* R45 - Output Mixer1 */
85 0x0000, /* R46 - Output Mixer2 */
86 0x0000, /* R47 - Output Mixer3 */
87 0x0000, /* R48 - Output Mixer4 */
88 0x0000, /* R49 - Output Mixer5 */
89 0x0000, /* R50 - Output Mixer6 */
90 0x0180, /* R51 - Out3/4 Mixer */
91 0x0000, /* R52 - Line Mixer1 */
92 0x0000, /* R53 - Line Mixer2 */
93 0x0000, /* R54 - Speaker Mixer */
94 0x0000, /* R55 - Additional Control */
95 0x0000, /* R56 - AntiPOP1 */
96 0x0000, /* R57 - AntiPOP2 */
97 0x0000, /* R58 - MICBIAS */
98 0x0000, /* R59 */
99 0x0008, /* R60 - PLL1 */
100 0x0031, /* R61 - PLL2 */
101 0x0026, /* R62 - PLL3 */
102};
103
104#define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
105
106static const unsigned int rec_mix_tlv[] = {
107 TLV_DB_RANGE_HEAD(1),
108 0, 7, TLV_DB_LINEAR_ITEM(-1500, 600),
109};
110
111static const unsigned int in_pga_tlv[] = {
112 TLV_DB_RANGE_HEAD(1),
113 0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000),
114};
115
116static const unsigned int out_mix_tlv[] = {
117 TLV_DB_RANGE_HEAD(1),
118 0, 7, TLV_DB_LINEAR_ITEM(0, -2100),
119};
120
121static const unsigned int out_pga_tlv[] = {
122 TLV_DB_RANGE_HEAD(1),
123 0, 127, TLV_DB_LINEAR_ITEM(-7300, 600),
124};
125
126static const unsigned int out_omix_tlv[] = {
127 TLV_DB_RANGE_HEAD(1),
128 0, 7, TLV_DB_LINEAR_ITEM(-600, 0),
129};
130
131static const unsigned int out_dac_tlv[] = {
132 TLV_DB_RANGE_HEAD(1),
133 0, 255, TLV_DB_LINEAR_ITEM(-7163, 0),
134};
135
136static const unsigned int in_adc_tlv[] = {
137 TLV_DB_RANGE_HEAD(1),
138 0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763),
139};
140
141static const unsigned int out_sidetone_tlv[] = {
142 TLV_DB_RANGE_HEAD(1),
143 0, 31, TLV_DB_LINEAR_ITEM(-3600, 0),
144};
145
146static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
147 struct snd_ctl_elem_value *ucontrol)
148{
149 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
150 int reg = kcontrol->private_value & 0xff;
151 int ret;
152 u16 val;
153
154 ret = snd_soc_put_volsw(kcontrol, ucontrol);
155 if (ret < 0)
156 return ret;
157
158 /* now hit the volume update bits (always bit 8) */
159 val = snd_soc_read(codec, reg);
160 return snd_soc_write(codec, reg, val | 0x0100);
161}
162
163static const char *wm8991_digital_sidetone[] =
164{"None", "Left ADC", "Right ADC", "Reserved"};
165
166static const struct soc_enum wm8991_left_digital_sidetone_enum =
167 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
168 WM8991_ADC_TO_DACL_SHIFT,
169 WM8991_ADC_TO_DACL_MASK,
170 wm8991_digital_sidetone);
171
172static const struct soc_enum wm8991_right_digital_sidetone_enum =
173 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
174 WM8991_ADC_TO_DACR_SHIFT,
175 WM8991_ADC_TO_DACR_MASK,
176 wm8991_digital_sidetone);
177
178static const char *wm8991_adcmode[] =
179{"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
180
181static const struct soc_enum wm8991_right_adcmode_enum =
182 SOC_ENUM_SINGLE(WM8991_ADC_CTRL,
183 WM8991_ADC_HPF_CUT_SHIFT,
184 WM8991_ADC_HPF_CUT_MASK,
185 wm8991_adcmode);
186
187static const struct snd_kcontrol_new wm8991_snd_controls[] = {
188 /* INMIXL */
189 SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
190 SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
191 /* INMIXR */
192 SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
193 SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
194
195 /* LOMIX */
196 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
197 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
198 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
199 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
200 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
201 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
202 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
203 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
204 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
205 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
206 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
207 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
208
209 /* ROMIX */
210 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
211 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
212 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
213 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
214 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
215 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
216 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
217 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
218 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
219 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
220 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
221 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
222
223 /* LOUT */
224 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
225 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
226 SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
227
228 /* ROUT */
229 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
230 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
231 SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
232
233 /* LOPGA */
234 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
235 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
236 SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
237 WM8991_LOPGAZC_BIT, 1, 0),
238
239 /* ROPGA */
240 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
241 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
242 SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
243 WM8991_ROPGAZC_BIT, 1, 0),
244
245 SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
246 WM8991_LONMUTE_BIT, 1, 0),
247 SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
248 WM8991_LOPMUTE_BIT, 1, 0),
249 SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
250 WM8991_LOATTN_BIT, 1, 0),
251 SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
252 WM8991_RONMUTE_BIT, 1, 0),
253 SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
254 WM8991_ROPMUTE_BIT, 1, 0),
255 SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
256 WM8991_ROATTN_BIT, 1, 0),
257
258 SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
259 WM8991_OUT3MUTE_BIT, 1, 0),
260 SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
261 WM8991_OUT3ATTN_BIT, 1, 0),
262
263 SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
264 WM8991_OUT4MUTE_BIT, 1, 0),
265 SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
266 WM8991_OUT4ATTN_BIT, 1, 0),
267
268 SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
269 WM8991_CDMODE_BIT, 1, 0),
270
271 SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
272 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
273 SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
274 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
275 SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
276 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
277
278 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
279 WM8991_LEFT_DAC_DIGITAL_VOLUME,
280 WM8991_DACL_VOL_SHIFT,
281 WM8991_DACL_VOL_MASK,
282 0,
283 out_dac_tlv),
284
285 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
286 WM8991_RIGHT_DAC_DIGITAL_VOLUME,
287 WM8991_DACR_VOL_SHIFT,
288 WM8991_DACR_VOL_MASK,
289 0,
290 out_dac_tlv),
291
292 SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
293 SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
294
295 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
296 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
297 out_sidetone_tlv),
298 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
299 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
300 out_sidetone_tlv),
301
302 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
303 WM8991_ADC_HPF_ENA_BIT, 1, 0),
304
305 SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
306
307 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
308 WM8991_LEFT_ADC_DIGITAL_VOLUME,
309 WM8991_ADCL_VOL_SHIFT,
310 WM8991_ADCL_VOL_MASK,
311 0,
312 in_adc_tlv),
313
314 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
315 WM8991_RIGHT_ADC_DIGITAL_VOLUME,
316 WM8991_ADCR_VOL_SHIFT,
317 WM8991_ADCR_VOL_MASK,
318 0,
319 in_adc_tlv),
320
321 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
322 WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
323 WM8991_LIN12VOL_SHIFT,
324 WM8991_LIN12VOL_MASK,
325 0,
326 in_pga_tlv),
327
328 SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
329 WM8991_LI12ZC_BIT, 1, 0),
330
331 SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
332 WM8991_LI12MUTE_BIT, 1, 0),
333
334 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
335 WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
336 WM8991_LIN34VOL_SHIFT,
337 WM8991_LIN34VOL_MASK,
338 0,
339 in_pga_tlv),
340
341 SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
342 WM8991_LI34ZC_BIT, 1, 0),
343
344 SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
345 WM8991_LI34MUTE_BIT, 1, 0),
346
347 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
348 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
349 WM8991_RIN12VOL_SHIFT,
350 WM8991_RIN12VOL_MASK,
351 0,
352 in_pga_tlv),
353
354 SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
355 WM8991_RI12ZC_BIT, 1, 0),
356
357 SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
358 WM8991_RI12MUTE_BIT, 1, 0),
359
360 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
361 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
362 WM8991_RIN34VOL_SHIFT,
363 WM8991_RIN34VOL_MASK,
364 0,
365 in_pga_tlv),
366
367 SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
368 WM8991_RI34ZC_BIT, 1, 0),
369
370 SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
371 WM8991_RI34MUTE_BIT, 1, 0),
372};
373
374/*
375 * _DAPM_ Controls
376 */
203db220
DP		 377static int outmixer_event(struct snd_soc_dapm_widget *w,
378 struct snd_kcontrol *kcontrol, int event)
379{
380 u32 reg_shift = kcontrol->private_value & 0xfff;
381 int ret = 0;
382 u16 reg;
383
384 switch (reg_shift) {
385 case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
386 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1);
387 if (reg & WM8991_LDLO) {
388 printk(KERN_WARNING
389 "Cannot set as Output Mixer 1 LDLO Set\n");
390 ret = -1;
391 }
392 break;
393
394 case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
395 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2);
396 if (reg & WM8991_RDRO) {
397 printk(KERN_WARNING
398 "Cannot set as Output Mixer 2 RDRO Set\n");
399 ret = -1;
400 }
401 break;
402
403 case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
404 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
405 if (reg & WM8991_LDSPK) {
406 printk(KERN_WARNING
407 "Cannot set as Speaker Mixer LDSPK Set\n");
408 ret = -1;
409 }
410 break;
411
412 case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
413 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
414 if (reg & WM8991_RDSPK) {
415 printk(KERN_WARNING
416 "Cannot set as Speaker Mixer RDSPK Set\n");
417 ret = -1;
418 }
419 break;
420 }
421
422 return ret;
423}
424
425/* INMIX dB values */
426static const unsigned int in_mix_tlv[] = {
427 TLV_DB_RANGE_HEAD(1),
428 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
429};
430
431/* Left In PGA Connections */
432static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
433 SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
434 SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
435};
436
437static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
438 SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
439 SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
440};
441
442/* Right In PGA Connections */
443static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
444 SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
445 SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
446};
447
448static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
449 SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
450 SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
451};
452
453/* INMIXL */
454static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
455 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
456 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
457 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
458 7, 0, in_mix_tlv),
459 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
460 1, 0),
461 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
462 1, 0),
463};
464
465/* INMIXR */
466static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
467 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
468 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
469 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
470 7, 0, in_mix_tlv),
471 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
472 1, 0),
473 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
474 1, 0),
475};
476
477/* AINLMUX */
478static const char *wm8991_ainlmux[] =
479{"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
480
481static const struct soc_enum wm8991_ainlmux_enum =
482 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
483 ARRAY_SIZE(wm8991_ainlmux), wm8991_ainlmux);
484
485static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
486 SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
487
488/* DIFFINL */
489
490/* AINRMUX */
491static const char *wm8991_ainrmux[] =
492{"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
493
494static const struct soc_enum wm8991_ainrmux_enum =
495 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
496 ARRAY_SIZE(wm8991_ainrmux), wm8991_ainrmux);
497
498static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
499 SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
500
501/* RXVOICE */
502static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
503 SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
504 WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
505 SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
506 WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
507};
508
509/* LOMIX */
510static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
511 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
512 WM8991_LRBLO_BIT, 1, 0),
513 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
514 WM8991_LLBLO_BIT, 1, 0),
515 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
516 WM8991_LRI3LO_BIT, 1, 0),
517 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
518 WM8991_LLI3LO_BIT, 1, 0),
519 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
520 WM8991_LR12LO_BIT, 1, 0),
521 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
522 WM8991_LL12LO_BIT, 1, 0),
523 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
524 WM8991_LDLO_BIT, 1, 0),
525};
526
527/* ROMIX */
528static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
529 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
530 WM8991_RLBRO_BIT, 1, 0),
531 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
532 WM8991_RRBRO_BIT, 1, 0),
533 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
534 WM8991_RLI3RO_BIT, 1, 0),
535 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
536 WM8991_RRI3RO_BIT, 1, 0),
537 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
538 WM8991_RL12RO_BIT, 1, 0),
539 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
540 WM8991_RR12RO_BIT, 1, 0),
541 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
542 WM8991_RDRO_BIT, 1, 0),
543};
544
545/* LONMIX */
546static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
547 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
548 WM8991_LLOPGALON_BIT, 1, 0),
549 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
550 WM8991_LROPGALON_BIT, 1, 0),
551 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
552 WM8991_LOPLON_BIT, 1, 0),
553};
554
555/* LOPMIX */
556static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
557 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
558 WM8991_LR12LOP_BIT, 1, 0),
559 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
560 WM8991_LL12LOP_BIT, 1, 0),
561 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
562 WM8991_LLOPGALOP_BIT, 1, 0),
563};
564
565/* RONMIX */
566static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
567 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
568 WM8991_RROPGARON_BIT, 1, 0),
569 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
570 WM8991_RLOPGARON_BIT, 1, 0),
571 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
572 WM8991_ROPRON_BIT, 1, 0),
573};
574
575/* ROPMIX */
576static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
577 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
578 WM8991_RL12ROP_BIT, 1, 0),
579 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
580 WM8991_RR12ROP_BIT, 1, 0),
581 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
582 WM8991_RROPGAROP_BIT, 1, 0),
583};
584
585/* OUT3MIX */
586static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
587 SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
588 WM8991_LI4O3_BIT, 1, 0),
589 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
590 WM8991_LPGAO3_BIT, 1, 0),
591};
592
593/* OUT4MIX */
594static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
595 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
596 WM8991_RPGAO4_BIT, 1, 0),
597 SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
598 WM8991_RI4O4_BIT, 1, 0),
599};
600
601/* SPKMIX */
602static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
603 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
604 WM8991_LI2SPK_BIT, 1, 0),
605 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
606 WM8991_LB2SPK_BIT, 1, 0),
607 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
608 WM8991_LOPGASPK_BIT, 1, 0),
609 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
610 WM8991_LDSPK_BIT, 1, 0),
611 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
612 WM8991_RDSPK_BIT, 1, 0),
613 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
614 WM8991_ROPGASPK_BIT, 1, 0),
615 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
616 WM8991_RL12ROP_BIT, 1, 0),
617 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
618 WM8991_RI2SPK_BIT, 1, 0),
619};
620
621static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
622 /* Input Side */
623 /* Input Lines */
624 SND_SOC_DAPM_INPUT("LIN1"),
625 SND_SOC_DAPM_INPUT("LIN2"),
626 SND_SOC_DAPM_INPUT("LIN3"),
627 SND_SOC_DAPM_INPUT("LIN4RXN"),
628 SND_SOC_DAPM_INPUT("RIN3"),
629 SND_SOC_DAPM_INPUT("RIN4RXP"),
630 SND_SOC_DAPM_INPUT("RIN1"),
631 SND_SOC_DAPM_INPUT("RIN2"),
632 SND_SOC_DAPM_INPUT("Internal ADC Source"),
633
6a077336
MB		 634 SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2,
635 WM8991_AINL_ENA_BIT, 0, NULL, 0),
636 SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2,
637 WM8991_AINR_ENA_BIT, 0, NULL, 0),
638
203db220
DP		 639 /* DACs */
640 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
641 WM8991_ADCL_ENA_BIT, 0),
642 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
643 WM8991_ADCR_ENA_BIT, 0),
644
645 /* Input PGAs */
646 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
647 0, &wm8991_dapm_lin12_pga_controls[0],
648 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
649 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
650 0, &wm8991_dapm_lin34_pga_controls[0],
651 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
652 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
653 0, &wm8991_dapm_rin12_pga_controls[0],
654 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
655 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
656 0, &wm8991_dapm_rin34_pga_controls[0],
657 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
658
659 /* INMIXL */
6a077336 660 SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0,
203db220 661 &wm8991_dapm_inmixl_controls[0],
6a077336 662 ARRAY_SIZE(wm8991_dapm_inmixl_controls)),
203db220
DP		 663
664 /* AINLMUX */
6a077336
MB		 665 SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0,
666 &wm8991_dapm_ainlmux_controls),
203db220
DP		 667
668 /* INMIXR */
6a077336 669 SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0,
203db220 670 &wm8991_dapm_inmixr_controls[0],
6a077336 671 ARRAY_SIZE(wm8991_dapm_inmixr_controls)),
203db220
DP		 672
673 /* AINRMUX */
6a077336
MB		 674 SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0,
675 &wm8991_dapm_ainrmux_controls),
203db220
DP		 676
677 /* Output Side */
678 /* DACs */
679 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
680 WM8991_DACL_ENA_BIT, 0),
681 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
682 WM8991_DACR_ENA_BIT, 0),
683
684 /* LOMIX */
685 SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
686 0, &wm8991_dapm_lomix_controls[0],
687 ARRAY_SIZE(wm8991_dapm_lomix_controls),
688 outmixer_event, SND_SOC_DAPM_PRE_REG),
689
690 /* LONMIX */
691 SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
692 &wm8991_dapm_lonmix_controls[0],
693 ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
694
695 /* LOPMIX */
696 SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
697 &wm8991_dapm_lopmix_controls[0],
698 ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
699
700 /* OUT3MIX */
701 SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
702 &wm8991_dapm_out3mix_controls[0],
703 ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
704
705 /* SPKMIX */
706 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
707 &wm8991_dapm_spkmix_controls[0],
708 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
709 SND_SOC_DAPM_PRE_REG),
710
711 /* OUT4MIX */
712 SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
713 &wm8991_dapm_out4mix_controls[0],
714 ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
715
716 /* ROPMIX */
717 SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
718 &wm8991_dapm_ropmix_controls[0],
719 ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
720
721 /* RONMIX */
722 SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
723 &wm8991_dapm_ronmix_controls[0],
724 ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
725
726 /* ROMIX */
727 SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
728 0, &wm8991_dapm_romix_controls[0],
729 ARRAY_SIZE(wm8991_dapm_romix_controls),
730 outmixer_event, SND_SOC_DAPM_PRE_REG),
731
732 /* LOUT PGA */
733 SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
734 NULL, 0),
735
736 /* ROUT PGA */
737 SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
738 NULL, 0),
739
740 /* LOPGA */
741 SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
742 NULL, 0),
743
744 /* ROPGA */
745 SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
746 NULL, 0),
747
748 /* MICBIAS */
b6406a80
MB		 749 SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1,
750 WM8991_MICBIAS_ENA_BIT, 0, NULL, 0),
203db220
DP		 751
752 SND_SOC_DAPM_OUTPUT("LON"),
753 SND_SOC_DAPM_OUTPUT("LOP"),
754 SND_SOC_DAPM_OUTPUT("OUT3"),
755 SND_SOC_DAPM_OUTPUT("LOUT"),
756 SND_SOC_DAPM_OUTPUT("SPKN"),
757 SND_SOC_DAPM_OUTPUT("SPKP"),
758 SND_SOC_DAPM_OUTPUT("ROUT"),
759 SND_SOC_DAPM_OUTPUT("OUT4"),
760 SND_SOC_DAPM_OUTPUT("ROP"),
761 SND_SOC_DAPM_OUTPUT("RON"),
762 SND_SOC_DAPM_OUTPUT("OUT"),
763
764 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
765};
766
767static const struct snd_soc_dapm_route audio_map[] = {
768 /* Make DACs turn on when playing even if not mixed into any outputs */
769 {"Internal DAC Sink", NULL, "Left DAC"},
770 {"Internal DAC Sink", NULL, "Right DAC"},
771
772 /* Make ADCs turn on when recording even if not mixed from any inputs */
773 {"Left ADC", NULL, "Internal ADC Source"},
774 {"Right ADC", NULL, "Internal ADC Source"},
775
776 /* Input Side */
6a077336
MB		 777 {"INMIXL", NULL, "INL"},
778 {"AINLMUX", NULL, "INL"},
779 {"INMIXR", NULL, "INR"},
780 {"AINRMUX", NULL, "INR"},
203db220
DP		 781 /* LIN12 PGA */
782 {"LIN12 PGA", "LIN1 Switch", "LIN1"},
783 {"LIN12 PGA", "LIN2 Switch", "LIN2"},
784 /* LIN34 PGA */
785 {"LIN34 PGA", "LIN3 Switch", "LIN3"},
786 {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
787 /* INMIXL */
788 {"INMIXL", "Record Left Volume", "LOMIX"},
789 {"INMIXL", "LIN2 Volume", "LIN2"},
790 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
791 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
792 /* AINLMUX */
793 {"AINLMUX", "INMIXL Mix", "INMIXL"},
794 {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
795 {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
796 {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
797 {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
798 /* ADC */
799 {"Left ADC", NULL, "AINLMUX"},
800
801 /* RIN12 PGA */
802 {"RIN12 PGA", "RIN1 Switch", "RIN1"},
803 {"RIN12 PGA", "RIN2 Switch", "RIN2"},
804 /* RIN34 PGA */
805 {"RIN34 PGA", "RIN3 Switch", "RIN3"},
806 {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
807 /* INMIXL */
808 {"INMIXR", "Record Right Volume", "ROMIX"},
809 {"INMIXR", "RIN2 Volume", "RIN2"},
810 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
811 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
812 /* AINRMUX */
813 {"AINRMUX", "INMIXR Mix", "INMIXR"},
814 {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
815 {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
816 {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
817 {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
818 /* ADC */
819 {"Right ADC", NULL, "AINRMUX"},
820
821 /* LOMIX */
822 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
823 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
824 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
825 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
826 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
827 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
828 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
829
830 /* ROMIX */
831 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
832 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
833 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
834 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
835 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
836 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
837 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
838
839 /* SPKMIX */
840 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
841 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
842 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
843 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
844 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
845 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
846 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
847 {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
848
849 /* LONMIX */
850 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
851 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
852 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
853
854 /* LOPMIX */
855 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
856 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
857 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
858
859 /* OUT3MIX */
860 {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
861 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
862
863 /* OUT4MIX */
864 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
865 {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
866
867 /* RONMIX */
868 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
869 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
870 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
871
872 /* ROPMIX */
873 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
874 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
875 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
876
877 /* Out Mixer PGAs */
878 {"LOPGA", NULL, "LOMIX"},
879 {"ROPGA", NULL, "ROMIX"},
880
881 {"LOUT PGA", NULL, "LOMIX"},
882 {"ROUT PGA", NULL, "ROMIX"},
883
884 /* Output Pins */
885 {"LON", NULL, "LONMIX"},
886 {"LOP", NULL, "LOPMIX"},
887 {"OUT", NULL, "OUT3MIX"},
888 {"LOUT", NULL, "LOUT PGA"},
889 {"SPKN", NULL, "SPKMIX"},
890 {"ROUT", NULL, "ROUT PGA"},
891 {"OUT4", NULL, "OUT4MIX"},
892 {"ROP", NULL, "ROPMIX"},
893 {"RON", NULL, "RONMIX"},
894};
895
896/* PLL divisors */
897struct _pll_div {
898 u32 div2;
899 u32 n;
900 u32 k;
901};
902
903/* The size in bits of the pll divide multiplied by 10
904 * to allow rounding later */
905#define FIXED_PLL_SIZE ((1 << 16) * 10)
906
907static void pll_factors(struct _pll_div *pll_div, unsigned int target,
908 unsigned int source)
909{
910 u64 Kpart;
911 unsigned int K, Ndiv, Nmod;
912
913
914 Ndiv = target / source;
915 if (Ndiv < 6) {
916 source >>= 1;
917 pll_div->div2 = 1;
918 Ndiv = target / source;
919 } else
920 pll_div->div2 = 0;
921
922 if ((Ndiv < 6) || (Ndiv > 12))
923 printk(KERN_WARNING
924 "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
925
926 pll_div->n = Ndiv;
927 Nmod = target % source;
928 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
929
930 do_div(Kpart, source);
931
932 K = Kpart & 0xFFFFFFFF;
933
934 /* Check if we need to round */
935 if ((K % 10) >= 5)
936 K += 5;
937
938 /* Move down to proper range now rounding is done */
939 K /= 10;
940
941 pll_div->k = K;
942}
943
944static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
945 int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
946{
947 u16 reg;
948 struct snd_soc_codec *codec = codec_dai->codec;
949 struct _pll_div pll_div;
950
951 if (freq_in && freq_out) {
952 pll_factors(&pll_div, freq_out * 4, freq_in);
953
954 /* Turn on PLL */
955 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
956 reg |= WM8991_PLL_ENA;
957 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
958
959 /* sysclk comes from PLL */
960 reg = snd_soc_read(codec, WM8991_CLOCKING_2);
961 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
962
25985edc 963 /* set up N , fractional mode and pre-divisor if necessary */
203db220
DP		 964 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
965 (pll_div.div2 ? WM8991_PRESCALE : 0));
966 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
967 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
968 } else {
969 /* Turn on PLL */
970 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
971 reg &= ~WM8991_PLL_ENA;
972 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
973 }
974 return 0;
975}
976
977/*
978 * Set's ADC and Voice DAC format.
979 */
980static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
981 unsigned int fmt)
982{
983 struct snd_soc_codec *codec = codec_dai->codec;
984 u16 audio1, audio3;
985
986 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
987 audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
988
989 /* set master/slave audio interface */
990 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
991 case SND_SOC_DAIFMT_CBS_CFS:
992 audio3 &= ~WM8991_AIF_MSTR1;
993 break;
994 case SND_SOC_DAIFMT_CBM_CFM:
995 audio3 |= WM8991_AIF_MSTR1;
996 break;
997 default:
998 return -EINVAL;
999 }
1000
1001 audio1 &= ~WM8991_AIF_FMT_MASK;
1002
1003 /* interface format */
1004 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1005 case SND_SOC_DAIFMT_I2S:
1006 audio1 |= WM8991_AIF_TMF_I2S;
1007 audio1 &= ~WM8991_AIF_LRCLK_INV;
1008 break;
1009 case SND_SOC_DAIFMT_RIGHT_J:
1010 audio1 |= WM8991_AIF_TMF_RIGHTJ;
1011 audio1 &= ~WM8991_AIF_LRCLK_INV;
1012 break;
1013 case SND_SOC_DAIFMT_LEFT_J:
1014 audio1 |= WM8991_AIF_TMF_LEFTJ;
1015 audio1 &= ~WM8991_AIF_LRCLK_INV;
1016 break;
1017 case SND_SOC_DAIFMT_DSP_A:
1018 audio1 |= WM8991_AIF_TMF_DSP;
1019 audio1 &= ~WM8991_AIF_LRCLK_INV;
1020 break;
1021 case SND_SOC_DAIFMT_DSP_B:
1022 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1023 break;
1024 default:
1025 return -EINVAL;
1026 }
1027
1028 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1029 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1030 return 0;
1031}
1032
1033static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1034 int div_id, int div)
1035{
1036 struct snd_soc_codec *codec = codec_dai->codec;
1037 u16 reg;
1038
1039 switch (div_id) {
1040 case WM8991_MCLK_DIV:
1041 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1042 ~WM8991_MCLK_DIV_MASK;
1043 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1044 break;
1045 case WM8991_DACCLK_DIV:
1046 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1047 ~WM8991_DAC_CLKDIV_MASK;
1048 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1049 break;
1050 case WM8991_ADCCLK_DIV:
1051 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1052 ~WM8991_ADC_CLKDIV_MASK;
1053 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1054 break;
1055 case WM8991_BCLK_DIV:
1056 reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1057 ~WM8991_BCLK_DIV_MASK;
1058 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1059 break;
1060 default:
1061 return -EINVAL;
1062 }
1063
1064 return 0;
1065}
1066
1067/*
1068 * Set PCM DAI bit size and sample rate.
1069 */
1070static int wm8991_hw_params(struct snd_pcm_substream *substream,
1071 struct snd_pcm_hw_params *params,
1072 struct snd_soc_dai *dai)
1073{
1074 struct snd_soc_codec *codec = dai->codec;
1075 u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1076
1077 audio1 &= ~WM8991_AIF_WL_MASK;
1078 /* bit size */
1079 switch (params_format(params)) {
1080 case SNDRV_PCM_FORMAT_S16_LE:
1081 break;
1082 case SNDRV_PCM_FORMAT_S20_3LE:
1083 audio1 |= WM8991_AIF_WL_20BITS;
1084 break;
1085 case SNDRV_PCM_FORMAT_S24_LE:
1086 audio1 |= WM8991_AIF_WL_24BITS;
1087 break;
1088 case SNDRV_PCM_FORMAT_S32_LE:
1089 audio1 |= WM8991_AIF_WL_32BITS;
1090 break;
1091 }
1092
1093 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1094 return 0;
1095}
1096
1097static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1098{
1099 struct snd_soc_codec *codec = dai->codec;
1100 u16 val;
1101
1102 val = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1103 if (mute)
1104 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1105 else
1106 snd_soc_write(codec, WM8991_DAC_CTRL, val);
1107 return 0;
1108}
1109
1110static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1111 enum snd_soc_bias_level level)
1112{
1113 u16 val;
1114
1115 switch (level) {
1116 case SND_SOC_BIAS_ON:
1117 break;
1118
1119 case SND_SOC_BIAS_PREPARE:
1120 /* VMID=2*50k */
1121 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1122 ~WM8991_VMID_MODE_MASK;
1123 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1124 break;
1125
1126 case SND_SOC_BIAS_STANDBY:
1127 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1128 snd_soc_cache_sync(codec);
1129 /* Enable all output discharge bits */
1130 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1131 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1132 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1133 WM8991_DIS_ROUT);
1134
1135 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1136 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1137 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1138 WM8991_VMIDTOG);
1139
1140 /* Delay to allow output caps to discharge */
1141 msleep(300);
1142
1143 /* Disable VMIDTOG */
1144 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1145 WM8991_BUFDCOPEN | WM8991_POBCTRL);
1146
1147 /* disable all output discharge bits */
1148 snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1149
1150 /* Enable outputs */
1151 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1152
1153 msleep(50);
1154
1155 /* Enable VMID at 2x50k */
1156 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1157
1158 msleep(100);
1159
1160 /* Enable VREF */
1161 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1162
1163 msleep(600);
1164
1165 /* Enable BUFIOEN */
1166 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1167 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1168 WM8991_BUFIOEN);
1169
1170 /* Disable outputs */
1171 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1172
1173 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1174 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1175 }
1176
1177 /* VMID=2*250k */
1178 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1179 ~WM8991_VMID_MODE_MASK;
1180 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1181 break;
1182
1183 case SND_SOC_BIAS_OFF:
1184 /* Enable POBCTRL and SOFT_ST */
1185 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1186 WM8991_POBCTRL | WM8991_BUFIOEN);
1187
1188 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1189 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1190 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1191 WM8991_BUFIOEN);
1192
1193 /* mute DAC */
1194 val = snd_soc_read(codec, WM8991_DAC_CTRL);
1195 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1196
1197 /* Enable any disabled outputs */
1198 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1199
1200 /* Disable VMID */
1201 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1202
1203 msleep(300);
1204
1205 /* Enable all output discharge bits */
1206 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1207 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1208 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1209 WM8991_DIS_ROUT);
1210
1211 /* Disable VREF */
1212 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1213
1214 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1215 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
1216 codec->cache_sync = 1;
1217 break;
1218 }
1219
1220 codec->dapm.bias_level = level;
1221 return 0;
1222}
1223
84b315ee 1224static int wm8991_suspend(struct snd_soc_codec *codec)
203db220
DP		 1225{
1226 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1227 return 0;
1228}
1229
1230static int wm8991_resume(struct snd_soc_codec *codec)
1231{
1232 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1233 return 0;
1234}
1235
1236/* power down chip */
1237static int wm8991_remove(struct snd_soc_codec *codec)
1238{
1239 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1240 return 0;
1241}
1242
1243static int wm8991_probe(struct snd_soc_codec *codec)
1244{
1245 struct wm8991_priv *wm8991;
1246 int ret;
203db220
DP		 1247
1248 wm8991 = snd_soc_codec_get_drvdata(codec);
1249
1250 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type);
1251 if (ret < 0) {
1252 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1253 return ret;
1254 }
1255
1256 ret = wm8991_reset(codec);
1257 if (ret < 0) {
1258 dev_err(codec->dev, "Failed to issue reset\n");
1259 return ret;
1260 }
1261
1262 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1263
c639adc6
AL		 1264 snd_soc_update_bits(codec, WM8991_AUDIO_INTERFACE_4,
1265 WM8991_ALRCGPIO1, WM8991_ALRCGPIO1);
203db220 1266
c639adc6
AL		 1267 snd_soc_update_bits(codec, WM8991_GPIO1_GPIO2,
1268 WM8991_GPIO1_SEL_MASK, 1);
203db220 1269
c639adc6
AL		 1270 snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_1,
1271 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK,
1272 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK);
203db220 1273
c639adc6
AL		 1274 snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_2,
1275 WM8991_OPCLK_ENA, WM8991_OPCLK_ENA);
203db220
DP		 1276
1277 snd_soc_write(codec, WM8991_DAC_CTRL, 0);
1278 snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
1279 snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
1280
022658be 1281 snd_soc_add_codec_controls(codec, wm8991_snd_controls,
203db220
DP		 1282 ARRAY_SIZE(wm8991_snd_controls));
1283
1284 snd_soc_dapm_new_controls(&codec->dapm, wm8991_dapm_widgets,
1285 ARRAY_SIZE(wm8991_dapm_widgets));
1286 snd_soc_dapm_add_routes(&codec->dapm, audio_map,
1287 ARRAY_SIZE(audio_map));
1288 return 0;
1289}
1290
1291#define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1292 SNDRV_PCM_FMTBIT_S24_LE)
1293
85e7652d 1294static const struct snd_soc_dai_ops wm8991_ops = {
203db220
DP		 1295 .hw_params = wm8991_hw_params,
1296 .digital_mute = wm8991_mute,
1297 .set_fmt = wm8991_set_dai_fmt,
1298 .set_clkdiv = wm8991_set_dai_clkdiv,
1299 .set_pll = wm8991_set_dai_pll
1300};
1301
1302/*
1303 * The WM8991 supports 2 different and mutually exclusive DAI
1304 * configurations.
1305 *
1306 * 1. ADC/DAC on Primary Interface
1307 * 2. ADC on Primary Interface/DAC on secondary
1308 */
1309static struct snd_soc_dai_driver wm8991_dai = {
1310 /* ADC/DAC on primary */
1311 .name = "wm8991",
1312 .id = 1,
1313 .playback = {
1314 .stream_name = "Playback",
1315 .channels_min = 1,
1316 .channels_max = 2,
1317 .rates = SNDRV_PCM_RATE_8000_96000,
1318 .formats = WM8991_FORMATS
1319 },
1320 .capture = {
1321 .stream_name = "Capture",
1322 .channels_min = 1,
1323 .channels_max = 2,
1324 .rates = SNDRV_PCM_RATE_8000_96000,
1325 .formats = WM8991_FORMATS
1326 },
1327 .ops = &wm8991_ops
1328};
1329
1330static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1331 .probe = wm8991_probe,
1332 .remove = wm8991_remove,
1333 .suspend = wm8991_suspend,
1334 .resume = wm8991_resume,
1335 .set_bias_level = wm8991_set_bias_level,
1336 .reg_cache_size = WM8991_MAX_REGISTER + 1,
1337 .reg_word_size = sizeof(u16),
1338 .reg_cache_default = wm8991_reg_defs
1339};
1340
7a79e94e
BP		 1341static int wm8991_i2c_probe(struct i2c_client *i2c,
1342 const struct i2c_device_id *id)
203db220
DP		 1343{
1344 struct wm8991_priv *wm8991;
1345 int ret;
1346
046d4f02 1347 wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL);
203db220
DP		 1348 if (!wm8991)
1349 return -ENOMEM;
1350
1351 wm8991->control_type = SND_SOC_I2C;
1352 i2c_set_clientdata(i2c, wm8991);
1353
1354 ret = snd_soc_register_codec(&i2c->dev,
1355 &soc_codec_dev_wm8991, &wm8991_dai, 1);
046d4f02 1356
203db220
DP		 1357 return ret;
1358}
1359
7a79e94e 1360static int wm8991_i2c_remove(struct i2c_client *client)
203db220
DP		 1361{
1362 snd_soc_unregister_codec(&client->dev);
046d4f02 1363
203db220
DP		 1364 return 0;
1365}
1366
1367static const struct i2c_device_id wm8991_i2c_id[] = {
1368 { "wm8991", 0 },
1369 { }
1370};
1371MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1372
1373static struct i2c_driver wm8991_i2c_driver = {
1374 .driver = {
1375 .name = "wm8991",
1376 .owner = THIS_MODULE,
1377 },
1378 .probe = wm8991_i2c_probe,
7a79e94e 1379 .remove = wm8991_i2c_remove,
203db220
DP		 1380 .id_table = wm8991_i2c_id,
1381};
1382
38ece8db 1383module_i2c_driver(wm8991_i2c_driver);
203db220
DP		 1384
1385MODULE_DESCRIPTION("ASoC WM8991 driver");
1386MODULE_AUTHOR("Graeme Gregory");
1387MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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