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ASoC: wm8991: Convert to direct regmap API usage
[deliverable/linux.git] / sound / soc / codecs / wm8991.c
CommitLineData
203db220
DP		 1/*
2 * wm8991.c -- WM8991 ALSA Soc Audio driver
3 *
4 * Copyright 2007-2010 Wolfson Microelectronics PLC.
5 * Author: Graeme Gregory
9a185b9a 6 * Graeme.Gregory@wolfsonmicro.com
203db220
DP		 7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
203db220
DP		 16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
a86652e5 21#include <linux/regmap.h>
203db220
DP		 22#include <linux/slab.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29#include <sound/tlv.h>
30#include <asm/div64.h>
31
32#include "wm8991.h"
33
34struct wm8991_priv {
a86652e5 35 struct regmap *regmap;
203db220
DP		 36 unsigned int pcmclk;
37};
38
a86652e5
MB		 39static const struct reg_default wm8991_reg_defaults[] = {
40 { 1, 0x0000 }, /* R1 - Power Management (1) */
41 { 2, 0x6000 }, /* R2 - Power Management (2) */
42 { 3, 0x0000 }, /* R3 - Power Management (3) */
43 { 4, 0x4050 }, /* R4 - Audio Interface (1) */
44 { 5, 0x4000 }, /* R5 - Audio Interface (2) */
45 { 6, 0x01C8 }, /* R6 - Clocking (1) */
46 { 7, 0x0000 }, /* R7 - Clocking (2) */
47 { 8, 0x0040 }, /* R8 - Audio Interface (3) */
48 { 9, 0x0040 }, /* R9 - Audio Interface (4) */
49 { 10, 0x0004 }, /* R10 - DAC CTRL */
50 { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */
51 { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */
52 { 13, 0x0000 }, /* R13 - Digital Side Tone */
53 { 14, 0x0100 }, /* R14 - ADC CTRL */
54 { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */
55 { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */
56
57 { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */
58 { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */
59 { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */
60 { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */
61 { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */
62 { 23, 0x0800 }, /* R23 - GPIO_POL */
63 { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */
64 { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */
65 { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */
66 { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */
67 { 28, 0x0000 }, /* R28 - Left Output Volume */
68 { 29, 0x0000 }, /* R29 - Right Output Volume */
69 { 30, 0x0066 }, /* R30 - Line Outputs Volume */
70 { 31, 0x0022 }, /* R31 - Out3/4 Volume */
71 { 32, 0x0079 }, /* R32 - Left OPGA Volume */
72 { 33, 0x0079 }, /* R33 - Right OPGA Volume */
73 { 34, 0x0003 }, /* R34 - Speaker Volume */
74 { 35, 0x0003 }, /* R35 - ClassD1 */
75
76 { 37, 0x0100 }, /* R37 - ClassD3 */
77
78 { 39, 0x0000 }, /* R39 - Input Mixer1 */
79 { 40, 0x0000 }, /* R40 - Input Mixer2 */
80 { 41, 0x0000 }, /* R41 - Input Mixer3 */
81 { 42, 0x0000 }, /* R42 - Input Mixer4 */
82 { 43, 0x0000 }, /* R43 - Input Mixer5 */
83 { 44, 0x0000 }, /* R44 - Input Mixer6 */
84 { 45, 0x0000 }, /* R45 - Output Mixer1 */
85 { 46, 0x0000 }, /* R46 - Output Mixer2 */
86 { 47, 0x0000 }, /* R47 - Output Mixer3 */
87 { 48, 0x0000 }, /* R48 - Output Mixer4 */
88 { 49, 0x0000 }, /* R49 - Output Mixer5 */
89 { 50, 0x0000 }, /* R50 - Output Mixer6 */
90 { 51, 0x0180 }, /* R51 - Out3/4 Mixer */
91 { 52, 0x0000 }, /* R52 - Line Mixer1 */
92 { 53, 0x0000 }, /* R53 - Line Mixer2 */
93 { 54, 0x0000 }, /* R54 - Speaker Mixer */
94 { 55, 0x0000 }, /* R55 - Additional Control */
95 { 56, 0x0000 }, /* R56 - AntiPOP1 */
96 { 57, 0x0000 }, /* R57 - AntiPOP2 */
97 { 58, 0x0000 }, /* R58 - MICBIAS */
98
99 { 60, 0x0008 }, /* R60 - PLL1 */
100 { 61, 0x0031 }, /* R61 - PLL2 */
101 { 62, 0x0026 }, /* R62 - PLL3 */
203db220
DP		 102};
103
a86652e5
MB		 104static bool wm8991_volatile(struct device *dev, unsigned int reg)
105{
106 switch (reg) {
107 case WM8991_RESET:
108 return true;
109 default:
110 return false;
111 }
112}
113
203db220
DP		 114#define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
115
116static const unsigned int rec_mix_tlv[] = {
117 TLV_DB_RANGE_HEAD(1),
118 0, 7, TLV_DB_LINEAR_ITEM(-1500, 600),
119};
120
121static const unsigned int in_pga_tlv[] = {
122 TLV_DB_RANGE_HEAD(1),
123 0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000),
124};
125
126static const unsigned int out_mix_tlv[] = {
127 TLV_DB_RANGE_HEAD(1),
128 0, 7, TLV_DB_LINEAR_ITEM(0, -2100),
129};
130
131static const unsigned int out_pga_tlv[] = {
132 TLV_DB_RANGE_HEAD(1),
133 0, 127, TLV_DB_LINEAR_ITEM(-7300, 600),
134};
135
136static const unsigned int out_omix_tlv[] = {
137 TLV_DB_RANGE_HEAD(1),
138 0, 7, TLV_DB_LINEAR_ITEM(-600, 0),
139};
140
141static const unsigned int out_dac_tlv[] = {
142 TLV_DB_RANGE_HEAD(1),
143 0, 255, TLV_DB_LINEAR_ITEM(-7163, 0),
144};
145
146static const unsigned int in_adc_tlv[] = {
147 TLV_DB_RANGE_HEAD(1),
148 0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763),
149};
150
151static const unsigned int out_sidetone_tlv[] = {
152 TLV_DB_RANGE_HEAD(1),
153 0, 31, TLV_DB_LINEAR_ITEM(-3600, 0),
154};
155
156static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
157 struct snd_ctl_elem_value *ucontrol)
158{
159 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
160 int reg = kcontrol->private_value & 0xff;
161 int ret;
162 u16 val;
163
164 ret = snd_soc_put_volsw(kcontrol, ucontrol);
165 if (ret < 0)
166 return ret;
167
168 /* now hit the volume update bits (always bit 8) */
169 val = snd_soc_read(codec, reg);
170 return snd_soc_write(codec, reg, val | 0x0100);
171}
172
173static const char *wm8991_digital_sidetone[] =
174{"None", "Left ADC", "Right ADC", "Reserved"};
175
176static const struct soc_enum wm8991_left_digital_sidetone_enum =
177 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
178 WM8991_ADC_TO_DACL_SHIFT,
179 WM8991_ADC_TO_DACL_MASK,
180 wm8991_digital_sidetone);
181
182static const struct soc_enum wm8991_right_digital_sidetone_enum =
183 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
184 WM8991_ADC_TO_DACR_SHIFT,
185 WM8991_ADC_TO_DACR_MASK,
186 wm8991_digital_sidetone);
187
188static const char *wm8991_adcmode[] =
189{"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
190
191static const struct soc_enum wm8991_right_adcmode_enum =
192 SOC_ENUM_SINGLE(WM8991_ADC_CTRL,
193 WM8991_ADC_HPF_CUT_SHIFT,
194 WM8991_ADC_HPF_CUT_MASK,
195 wm8991_adcmode);
196
197static const struct snd_kcontrol_new wm8991_snd_controls[] = {
198 /* INMIXL */
199 SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
200 SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
201 /* INMIXR */
202 SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
203 SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
204
205 /* LOMIX */
206 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
207 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
208 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
209 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
210 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
211 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
212 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
213 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
214 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
215 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
216 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
217 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
218
219 /* ROMIX */
220 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
221 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
222 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
223 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
224 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
225 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
226 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
227 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
228 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
229 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
230 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
231 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
232
233 /* LOUT */
234 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
235 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
236 SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
237
238 /* ROUT */
239 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
240 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
241 SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
242
243 /* LOPGA */
244 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
245 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
246 SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
247 WM8991_LOPGAZC_BIT, 1, 0),
248
249 /* ROPGA */
250 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
251 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
252 SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
253 WM8991_ROPGAZC_BIT, 1, 0),
254
255 SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
256 WM8991_LONMUTE_BIT, 1, 0),
257 SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
258 WM8991_LOPMUTE_BIT, 1, 0),
259 SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
260 WM8991_LOATTN_BIT, 1, 0),
261 SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
262 WM8991_RONMUTE_BIT, 1, 0),
263 SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
264 WM8991_ROPMUTE_BIT, 1, 0),
265 SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
266 WM8991_ROATTN_BIT, 1, 0),
267
268 SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
269 WM8991_OUT3MUTE_BIT, 1, 0),
270 SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
271 WM8991_OUT3ATTN_BIT, 1, 0),
272
273 SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
274 WM8991_OUT4MUTE_BIT, 1, 0),
275 SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
276 WM8991_OUT4ATTN_BIT, 1, 0),
277
278 SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
279 WM8991_CDMODE_BIT, 1, 0),
280
281 SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
282 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
283 SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
284 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
285 SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
286 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
287
288 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
289 WM8991_LEFT_DAC_DIGITAL_VOLUME,
290 WM8991_DACL_VOL_SHIFT,
291 WM8991_DACL_VOL_MASK,
292 0,
293 out_dac_tlv),
294
295 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
296 WM8991_RIGHT_DAC_DIGITAL_VOLUME,
297 WM8991_DACR_VOL_SHIFT,
298 WM8991_DACR_VOL_MASK,
299 0,
300 out_dac_tlv),
301
302 SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
303 SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
304
305 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
306 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
307 out_sidetone_tlv),
308 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
309 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
310 out_sidetone_tlv),
311
312 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
313 WM8991_ADC_HPF_ENA_BIT, 1, 0),
314
315 SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
316
317 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
318 WM8991_LEFT_ADC_DIGITAL_VOLUME,
319 WM8991_ADCL_VOL_SHIFT,
320 WM8991_ADCL_VOL_MASK,
321 0,
322 in_adc_tlv),
323
324 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
325 WM8991_RIGHT_ADC_DIGITAL_VOLUME,
326 WM8991_ADCR_VOL_SHIFT,
327 WM8991_ADCR_VOL_MASK,
328 0,
329 in_adc_tlv),
330
331 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
332 WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
333 WM8991_LIN12VOL_SHIFT,
334 WM8991_LIN12VOL_MASK,
335 0,
336 in_pga_tlv),
337
338 SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
339 WM8991_LI12ZC_BIT, 1, 0),
340
341 SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
342 WM8991_LI12MUTE_BIT, 1, 0),
343
344 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
345 WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
346 WM8991_LIN34VOL_SHIFT,
347 WM8991_LIN34VOL_MASK,
348 0,
349 in_pga_tlv),
350
351 SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
352 WM8991_LI34ZC_BIT, 1, 0),
353
354 SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
355 WM8991_LI34MUTE_BIT, 1, 0),
356
357 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
358 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
359 WM8991_RIN12VOL_SHIFT,
360 WM8991_RIN12VOL_MASK,
361 0,
362 in_pga_tlv),
363
364 SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
365 WM8991_RI12ZC_BIT, 1, 0),
366
367 SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
368 WM8991_RI12MUTE_BIT, 1, 0),
369
370 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
371 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
372 WM8991_RIN34VOL_SHIFT,
373 WM8991_RIN34VOL_MASK,
374 0,
375 in_pga_tlv),
376
377 SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
378 WM8991_RI34ZC_BIT, 1, 0),
379
380 SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
381 WM8991_RI34MUTE_BIT, 1, 0),
382};
383
384/*
385 * _DAPM_ Controls
386 */
203db220
DP		 387static int outmixer_event(struct snd_soc_dapm_widget *w,
388 struct snd_kcontrol *kcontrol, int event)
389{
390 u32 reg_shift = kcontrol->private_value & 0xfff;
391 int ret = 0;
392 u16 reg;
393
394 switch (reg_shift) {
395 case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
396 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1);
397 if (reg & WM8991_LDLO) {
398 printk(KERN_WARNING
399 "Cannot set as Output Mixer 1 LDLO Set\n");
400 ret = -1;
401 }
402 break;
403
404 case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
405 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2);
406 if (reg & WM8991_RDRO) {
407 printk(KERN_WARNING
408 "Cannot set as Output Mixer 2 RDRO Set\n");
409 ret = -1;
410 }
411 break;
412
413 case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
414 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
415 if (reg & WM8991_LDSPK) {
416 printk(KERN_WARNING
417 "Cannot set as Speaker Mixer LDSPK Set\n");
418 ret = -1;
419 }
420 break;
421
422 case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
423 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
424 if (reg & WM8991_RDSPK) {
425 printk(KERN_WARNING
426 "Cannot set as Speaker Mixer RDSPK Set\n");
427 ret = -1;
428 }
429 break;
430 }
431
432 return ret;
433}
434
435/* INMIX dB values */
436static const unsigned int in_mix_tlv[] = {
437 TLV_DB_RANGE_HEAD(1),
438 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
439};
440
441/* Left In PGA Connections */
442static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
443 SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
444 SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
445};
446
447static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
448 SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
449 SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
450};
451
452/* Right In PGA Connections */
453static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
454 SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
455 SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
456};
457
458static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
459 SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
460 SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
461};
462
463/* INMIXL */
464static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
465 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
466 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
467 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
468 7, 0, in_mix_tlv),
469 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
470 1, 0),
471 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
472 1, 0),
473};
474
475/* INMIXR */
476static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
477 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
478 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
479 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
480 7, 0, in_mix_tlv),
481 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
482 1, 0),
483 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
484 1, 0),
485};
486
487/* AINLMUX */
488static const char *wm8991_ainlmux[] =
489{"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
490
491static const struct soc_enum wm8991_ainlmux_enum =
492 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
493 ARRAY_SIZE(wm8991_ainlmux), wm8991_ainlmux);
494
495static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
496 SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
497
498/* DIFFINL */
499
500/* AINRMUX */
501static const char *wm8991_ainrmux[] =
502{"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
503
504static const struct soc_enum wm8991_ainrmux_enum =
505 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
506 ARRAY_SIZE(wm8991_ainrmux), wm8991_ainrmux);
507
508static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
509 SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
510
511/* RXVOICE */
512static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
513 SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
514 WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
515 SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
516 WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
517};
518
519/* LOMIX */
520static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
521 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
522 WM8991_LRBLO_BIT, 1, 0),
523 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
524 WM8991_LLBLO_BIT, 1, 0),
525 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
526 WM8991_LRI3LO_BIT, 1, 0),
527 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
528 WM8991_LLI3LO_BIT, 1, 0),
529 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
530 WM8991_LR12LO_BIT, 1, 0),
531 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
532 WM8991_LL12LO_BIT, 1, 0),
533 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
534 WM8991_LDLO_BIT, 1, 0),
535};
536
537/* ROMIX */
538static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
539 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
540 WM8991_RLBRO_BIT, 1, 0),
541 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
542 WM8991_RRBRO_BIT, 1, 0),
543 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
544 WM8991_RLI3RO_BIT, 1, 0),
545 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
546 WM8991_RRI3RO_BIT, 1, 0),
547 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
548 WM8991_RL12RO_BIT, 1, 0),
549 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
550 WM8991_RR12RO_BIT, 1, 0),
551 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
552 WM8991_RDRO_BIT, 1, 0),
553};
554
555/* LONMIX */
556static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
557 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
558 WM8991_LLOPGALON_BIT, 1, 0),
559 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
560 WM8991_LROPGALON_BIT, 1, 0),
561 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
562 WM8991_LOPLON_BIT, 1, 0),
563};
564
565/* LOPMIX */
566static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
567 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
568 WM8991_LR12LOP_BIT, 1, 0),
569 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
570 WM8991_LL12LOP_BIT, 1, 0),
571 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
572 WM8991_LLOPGALOP_BIT, 1, 0),
573};
574
575/* RONMIX */
576static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
577 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
578 WM8991_RROPGARON_BIT, 1, 0),
579 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
580 WM8991_RLOPGARON_BIT, 1, 0),
581 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
582 WM8991_ROPRON_BIT, 1, 0),
583};
584
585/* ROPMIX */
586static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
587 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
588 WM8991_RL12ROP_BIT, 1, 0),
589 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
590 WM8991_RR12ROP_BIT, 1, 0),
591 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
592 WM8991_RROPGAROP_BIT, 1, 0),
593};
594
595/* OUT3MIX */
596static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
597 SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
598 WM8991_LI4O3_BIT, 1, 0),
599 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
600 WM8991_LPGAO3_BIT, 1, 0),
601};
602
603/* OUT4MIX */
604static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
605 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
606 WM8991_RPGAO4_BIT, 1, 0),
607 SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
608 WM8991_RI4O4_BIT, 1, 0),
609};
610
611/* SPKMIX */
612static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
613 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
614 WM8991_LI2SPK_BIT, 1, 0),
615 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
616 WM8991_LB2SPK_BIT, 1, 0),
617 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
618 WM8991_LOPGASPK_BIT, 1, 0),
619 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
620 WM8991_LDSPK_BIT, 1, 0),
621 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
622 WM8991_RDSPK_BIT, 1, 0),
623 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
624 WM8991_ROPGASPK_BIT, 1, 0),
625 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
626 WM8991_RL12ROP_BIT, 1, 0),
627 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
628 WM8991_RI2SPK_BIT, 1, 0),
629};
630
631static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
632 /* Input Side */
633 /* Input Lines */
634 SND_SOC_DAPM_INPUT("LIN1"),
635 SND_SOC_DAPM_INPUT("LIN2"),
636 SND_SOC_DAPM_INPUT("LIN3"),
637 SND_SOC_DAPM_INPUT("LIN4RXN"),
638 SND_SOC_DAPM_INPUT("RIN3"),
639 SND_SOC_DAPM_INPUT("RIN4RXP"),
640 SND_SOC_DAPM_INPUT("RIN1"),
641 SND_SOC_DAPM_INPUT("RIN2"),
642 SND_SOC_DAPM_INPUT("Internal ADC Source"),
643
6a077336
MB		 644 SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2,
645 WM8991_AINL_ENA_BIT, 0, NULL, 0),
646 SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2,
647 WM8991_AINR_ENA_BIT, 0, NULL, 0),
648
203db220
DP		 649 /* DACs */
650 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
651 WM8991_ADCL_ENA_BIT, 0),
652 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
653 WM8991_ADCR_ENA_BIT, 0),
654
655 /* Input PGAs */
656 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
657 0, &wm8991_dapm_lin12_pga_controls[0],
658 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
659 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
660 0, &wm8991_dapm_lin34_pga_controls[0],
661 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
662 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
663 0, &wm8991_dapm_rin12_pga_controls[0],
664 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
665 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
666 0, &wm8991_dapm_rin34_pga_controls[0],
667 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
668
669 /* INMIXL */
6a077336 670 SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0,
203db220 671 &wm8991_dapm_inmixl_controls[0],
6a077336 672 ARRAY_SIZE(wm8991_dapm_inmixl_controls)),
203db220
DP		 673
674 /* AINLMUX */
6a077336
MB		 675 SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0,
676 &wm8991_dapm_ainlmux_controls),
203db220
DP		 677
678 /* INMIXR */
6a077336 679 SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0,
203db220 680 &wm8991_dapm_inmixr_controls[0],
6a077336 681 ARRAY_SIZE(wm8991_dapm_inmixr_controls)),
203db220
DP		 682
683 /* AINRMUX */
6a077336
MB		 684 SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0,
685 &wm8991_dapm_ainrmux_controls),
203db220
DP		 686
687 /* Output Side */
688 /* DACs */
689 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
690 WM8991_DACL_ENA_BIT, 0),
691 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
692 WM8991_DACR_ENA_BIT, 0),
693
694 /* LOMIX */
695 SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
696 0, &wm8991_dapm_lomix_controls[0],
697 ARRAY_SIZE(wm8991_dapm_lomix_controls),
698 outmixer_event, SND_SOC_DAPM_PRE_REG),
699
700 /* LONMIX */
701 SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
702 &wm8991_dapm_lonmix_controls[0],
703 ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
704
705 /* LOPMIX */
706 SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
707 &wm8991_dapm_lopmix_controls[0],
708 ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
709
710 /* OUT3MIX */
711 SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
712 &wm8991_dapm_out3mix_controls[0],
713 ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
714
715 /* SPKMIX */
716 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
717 &wm8991_dapm_spkmix_controls[0],
718 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
719 SND_SOC_DAPM_PRE_REG),
720
721 /* OUT4MIX */
722 SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
723 &wm8991_dapm_out4mix_controls[0],
724 ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
725
726 /* ROPMIX */
727 SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
728 &wm8991_dapm_ropmix_controls[0],
729 ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
730
731 /* RONMIX */
732 SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
733 &wm8991_dapm_ronmix_controls[0],
734 ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
735
736 /* ROMIX */
737 SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
738 0, &wm8991_dapm_romix_controls[0],
739 ARRAY_SIZE(wm8991_dapm_romix_controls),
740 outmixer_event, SND_SOC_DAPM_PRE_REG),
741
742 /* LOUT PGA */
743 SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
744 NULL, 0),
745
746 /* ROUT PGA */
747 SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
748 NULL, 0),
749
750 /* LOPGA */
751 SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
752 NULL, 0),
753
754 /* ROPGA */
755 SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
756 NULL, 0),
757
758 /* MICBIAS */
b6406a80
MB		 759 SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1,
760 WM8991_MICBIAS_ENA_BIT, 0, NULL, 0),
203db220
DP		 761
762 SND_SOC_DAPM_OUTPUT("LON"),
763 SND_SOC_DAPM_OUTPUT("LOP"),
764 SND_SOC_DAPM_OUTPUT("OUT3"),
765 SND_SOC_DAPM_OUTPUT("LOUT"),
766 SND_SOC_DAPM_OUTPUT("SPKN"),
767 SND_SOC_DAPM_OUTPUT("SPKP"),
768 SND_SOC_DAPM_OUTPUT("ROUT"),
769 SND_SOC_DAPM_OUTPUT("OUT4"),
770 SND_SOC_DAPM_OUTPUT("ROP"),
771 SND_SOC_DAPM_OUTPUT("RON"),
772 SND_SOC_DAPM_OUTPUT("OUT"),
773
774 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
775};
776
89824995 777static const struct snd_soc_dapm_route wm8991_dapm_routes[] = {
203db220
DP		 778 /* Make DACs turn on when playing even if not mixed into any outputs */
779 {"Internal DAC Sink", NULL, "Left DAC"},
780 {"Internal DAC Sink", NULL, "Right DAC"},
781
782 /* Make ADCs turn on when recording even if not mixed from any inputs */
783 {"Left ADC", NULL, "Internal ADC Source"},
784 {"Right ADC", NULL, "Internal ADC Source"},
785
786 /* Input Side */
6a077336
MB		 787 {"INMIXL", NULL, "INL"},
788 {"AINLMUX", NULL, "INL"},
789 {"INMIXR", NULL, "INR"},
790 {"AINRMUX", NULL, "INR"},
203db220
DP		 791 /* LIN12 PGA */
792 {"LIN12 PGA", "LIN1 Switch", "LIN1"},
793 {"LIN12 PGA", "LIN2 Switch", "LIN2"},
794 /* LIN34 PGA */
795 {"LIN34 PGA", "LIN3 Switch", "LIN3"},
796 {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
797 /* INMIXL */
798 {"INMIXL", "Record Left Volume", "LOMIX"},
799 {"INMIXL", "LIN2 Volume", "LIN2"},
800 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
801 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
802 /* AINLMUX */
803 {"AINLMUX", "INMIXL Mix", "INMIXL"},
804 {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
805 {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
806 {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
807 {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
808 /* ADC */
809 {"Left ADC", NULL, "AINLMUX"},
810
811 /* RIN12 PGA */
812 {"RIN12 PGA", "RIN1 Switch", "RIN1"},
813 {"RIN12 PGA", "RIN2 Switch", "RIN2"},
814 /* RIN34 PGA */
815 {"RIN34 PGA", "RIN3 Switch", "RIN3"},
816 {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
817 /* INMIXL */
818 {"INMIXR", "Record Right Volume", "ROMIX"},
819 {"INMIXR", "RIN2 Volume", "RIN2"},
820 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
821 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
822 /* AINRMUX */
823 {"AINRMUX", "INMIXR Mix", "INMIXR"},
824 {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
825 {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
826 {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
827 {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
828 /* ADC */
829 {"Right ADC", NULL, "AINRMUX"},
830
831 /* LOMIX */
832 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
833 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
834 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
835 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
836 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
837 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
838 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
839
840 /* ROMIX */
841 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
842 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
843 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
844 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
845 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
846 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
847 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
848
849 /* SPKMIX */
850 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
851 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
852 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
853 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
854 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
855 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
856 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
857 {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
858
859 /* LONMIX */
860 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
861 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
862 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
863
864 /* LOPMIX */
865 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
866 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
867 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
868
869 /* OUT3MIX */
870 {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
871 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
872
873 /* OUT4MIX */
874 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
875 {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
876
877 /* RONMIX */
878 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
879 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
880 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
881
882 /* ROPMIX */
883 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
884 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
885 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
886
887 /* Out Mixer PGAs */
888 {"LOPGA", NULL, "LOMIX"},
889 {"ROPGA", NULL, "ROMIX"},
890
891 {"LOUT PGA", NULL, "LOMIX"},
892 {"ROUT PGA", NULL, "ROMIX"},
893
894 /* Output Pins */
895 {"LON", NULL, "LONMIX"},
896 {"LOP", NULL, "LOPMIX"},
897 {"OUT", NULL, "OUT3MIX"},
898 {"LOUT", NULL, "LOUT PGA"},
899 {"SPKN", NULL, "SPKMIX"},
900 {"ROUT", NULL, "ROUT PGA"},
901 {"OUT4", NULL, "OUT4MIX"},
902 {"ROP", NULL, "ROPMIX"},
903 {"RON", NULL, "RONMIX"},
904};
905
906/* PLL divisors */
907struct _pll_div {
908 u32 div2;
909 u32 n;
910 u32 k;
911};
912
913/* The size in bits of the pll divide multiplied by 10
914 * to allow rounding later */
915#define FIXED_PLL_SIZE ((1 << 16) * 10)
916
917static void pll_factors(struct _pll_div *pll_div, unsigned int target,
918 unsigned int source)
919{
920 u64 Kpart;
921 unsigned int K, Ndiv, Nmod;
922
923
924 Ndiv = target / source;
925 if (Ndiv < 6) {
926 source >>= 1;
927 pll_div->div2 = 1;
928 Ndiv = target / source;
929 } else
930 pll_div->div2 = 0;
931
932 if ((Ndiv < 6) || (Ndiv > 12))
933 printk(KERN_WARNING
934 "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
935
936 pll_div->n = Ndiv;
937 Nmod = target % source;
938 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
939
940 do_div(Kpart, source);
941
942 K = Kpart & 0xFFFFFFFF;
943
944 /* Check if we need to round */
945 if ((K % 10) >= 5)
946 K += 5;
947
948 /* Move down to proper range now rounding is done */
949 K /= 10;
950
951 pll_div->k = K;
952}
953
954static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
955 int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
956{
957 u16 reg;
958 struct snd_soc_codec *codec = codec_dai->codec;
959 struct _pll_div pll_div;
960
961 if (freq_in && freq_out) {
962 pll_factors(&pll_div, freq_out * 4, freq_in);
963
964 /* Turn on PLL */
965 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
966 reg |= WM8991_PLL_ENA;
967 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
968
969 /* sysclk comes from PLL */
970 reg = snd_soc_read(codec, WM8991_CLOCKING_2);
971 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
972
25985edc 973 /* set up N , fractional mode and pre-divisor if necessary */
203db220
DP		 974 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
975 (pll_div.div2 ? WM8991_PRESCALE : 0));
976 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
977 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
978 } else {
979 /* Turn on PLL */
980 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
981 reg &= ~WM8991_PLL_ENA;
982 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
983 }
984 return 0;
985}
986
987/*
988 * Set's ADC and Voice DAC format.
989 */
990static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
991 unsigned int fmt)
992{
993 struct snd_soc_codec *codec = codec_dai->codec;
994 u16 audio1, audio3;
995
996 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
997 audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
998
999 /* set master/slave audio interface */
1000 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1001 case SND_SOC_DAIFMT_CBS_CFS:
1002 audio3 &= ~WM8991_AIF_MSTR1;
1003 break;
1004 case SND_SOC_DAIFMT_CBM_CFM:
1005 audio3 |= WM8991_AIF_MSTR1;
1006 break;
1007 default:
1008 return -EINVAL;
1009 }
1010
1011 audio1 &= ~WM8991_AIF_FMT_MASK;
1012
1013 /* interface format */
1014 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1015 case SND_SOC_DAIFMT_I2S:
1016 audio1 |= WM8991_AIF_TMF_I2S;
1017 audio1 &= ~WM8991_AIF_LRCLK_INV;
1018 break;
1019 case SND_SOC_DAIFMT_RIGHT_J:
1020 audio1 |= WM8991_AIF_TMF_RIGHTJ;
1021 audio1 &= ~WM8991_AIF_LRCLK_INV;
1022 break;
1023 case SND_SOC_DAIFMT_LEFT_J:
1024 audio1 |= WM8991_AIF_TMF_LEFTJ;
1025 audio1 &= ~WM8991_AIF_LRCLK_INV;
1026 break;
1027 case SND_SOC_DAIFMT_DSP_A:
1028 audio1 |= WM8991_AIF_TMF_DSP;
1029 audio1 &= ~WM8991_AIF_LRCLK_INV;
1030 break;
1031 case SND_SOC_DAIFMT_DSP_B:
1032 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1033 break;
1034 default:
1035 return -EINVAL;
1036 }
1037
1038 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1039 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1040 return 0;
1041}
1042
1043static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1044 int div_id, int div)
1045{
1046 struct snd_soc_codec *codec = codec_dai->codec;
1047 u16 reg;
1048
1049 switch (div_id) {
1050 case WM8991_MCLK_DIV:
1051 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1052 ~WM8991_MCLK_DIV_MASK;
1053 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1054 break;
1055 case WM8991_DACCLK_DIV:
1056 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1057 ~WM8991_DAC_CLKDIV_MASK;
1058 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1059 break;
1060 case WM8991_ADCCLK_DIV:
1061 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1062 ~WM8991_ADC_CLKDIV_MASK;
1063 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1064 break;
1065 case WM8991_BCLK_DIV:
1066 reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1067 ~WM8991_BCLK_DIV_MASK;
1068 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1069 break;
1070 default:
1071 return -EINVAL;
1072 }
1073
1074 return 0;
1075}
1076
1077/*
1078 * Set PCM DAI bit size and sample rate.
1079 */
1080static int wm8991_hw_params(struct snd_pcm_substream *substream,
1081 struct snd_pcm_hw_params *params,
1082 struct snd_soc_dai *dai)
1083{
1084 struct snd_soc_codec *codec = dai->codec;
1085 u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1086
1087 audio1 &= ~WM8991_AIF_WL_MASK;
1088 /* bit size */
1089 switch (params_format(params)) {
1090 case SNDRV_PCM_FORMAT_S16_LE:
1091 break;
1092 case SNDRV_PCM_FORMAT_S20_3LE:
1093 audio1 |= WM8991_AIF_WL_20BITS;
1094 break;
1095 case SNDRV_PCM_FORMAT_S24_LE:
1096 audio1 |= WM8991_AIF_WL_24BITS;
1097 break;
1098 case SNDRV_PCM_FORMAT_S32_LE:
1099 audio1 |= WM8991_AIF_WL_32BITS;
1100 break;
1101 }
1102
1103 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1104 return 0;
1105}
1106
1107static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1108{
1109 struct snd_soc_codec *codec = dai->codec;
1110 u16 val;
1111
1112 val = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1113 if (mute)
1114 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1115 else
1116 snd_soc_write(codec, WM8991_DAC_CTRL, val);
1117 return 0;
1118}
1119
1120static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1121 enum snd_soc_bias_level level)
1122{
a86652e5 1123 struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec);
203db220
DP		 1124 u16 val;
1125
1126 switch (level) {
1127 case SND_SOC_BIAS_ON:
1128 break;
1129
1130 case SND_SOC_BIAS_PREPARE:
1131 /* VMID=2*50k */
1132 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1133 ~WM8991_VMID_MODE_MASK;
1134 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1135 break;
1136
1137 case SND_SOC_BIAS_STANDBY:
1138 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
a86652e5 1139 regcache_sync(wm8991->regmap);
203db220
DP		 1140 /* Enable all output discharge bits */
1141 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1142 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1143 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1144 WM8991_DIS_ROUT);
1145
1146 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1147 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1148 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1149 WM8991_VMIDTOG);
1150
1151 /* Delay to allow output caps to discharge */
1152 msleep(300);
1153
1154 /* Disable VMIDTOG */
1155 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1156 WM8991_BUFDCOPEN | WM8991_POBCTRL);
1157
1158 /* disable all output discharge bits */
1159 snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1160
1161 /* Enable outputs */
1162 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1163
1164 msleep(50);
1165
1166 /* Enable VMID at 2x50k */
1167 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1168
1169 msleep(100);
1170
1171 /* Enable VREF */
1172 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1173
1174 msleep(600);
1175
1176 /* Enable BUFIOEN */
1177 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1178 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1179 WM8991_BUFIOEN);
1180
1181 /* Disable outputs */
1182 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1183
1184 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1185 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1186 }
1187
1188 /* VMID=2*250k */
1189 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1190 ~WM8991_VMID_MODE_MASK;
1191 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1192 break;
1193
1194 case SND_SOC_BIAS_OFF:
1195 /* Enable POBCTRL and SOFT_ST */
1196 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1197 WM8991_POBCTRL | WM8991_BUFIOEN);
1198
1199 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1200 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1201 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1202 WM8991_BUFIOEN);
1203
1204 /* mute DAC */
1205 val = snd_soc_read(codec, WM8991_DAC_CTRL);
1206 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1207
1208 /* Enable any disabled outputs */
1209 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1210
1211 /* Disable VMID */
1212 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1213
1214 msleep(300);
1215
1216 /* Enable all output discharge bits */
1217 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1218 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1219 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1220 WM8991_DIS_ROUT);
1221
1222 /* Disable VREF */
1223 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1224
1225 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1226 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
a86652e5 1227 regcache_mark_dirty(wm8991->regmap);
203db220
DP		 1228 break;
1229 }
1230
1231 codec->dapm.bias_level = level;
1232 return 0;
1233}
1234
84b315ee 1235static int wm8991_suspend(struct snd_soc_codec *codec)
203db220
DP		 1236{
1237 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1238 return 0;
1239}
1240
1241static int wm8991_resume(struct snd_soc_codec *codec)
1242{
1243 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1244 return 0;
1245}
1246
1247/* power down chip */
1248static int wm8991_remove(struct snd_soc_codec *codec)
1249{
1250 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1251 return 0;
1252}
1253
1254static int wm8991_probe(struct snd_soc_codec *codec)
1255{
1256 struct wm8991_priv *wm8991;
1257 int ret;
203db220
DP		 1258
1259 wm8991 = snd_soc_codec_get_drvdata(codec);
1260
a86652e5 1261 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
203db220
DP		 1262 if (ret < 0) {
1263 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1264 return ret;
1265 }
1266
1267 ret = wm8991_reset(codec);
1268 if (ret < 0) {
1269 dev_err(codec->dev, "Failed to issue reset\n");
1270 return ret;
1271 }
1272
1273 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1274
c639adc6
AL		 1275 snd_soc_update_bits(codec, WM8991_AUDIO_INTERFACE_4,
1276 WM8991_ALRCGPIO1, WM8991_ALRCGPIO1);
203db220 1277
c639adc6
AL		 1278 snd_soc_update_bits(codec, WM8991_GPIO1_GPIO2,
1279 WM8991_GPIO1_SEL_MASK, 1);
203db220 1280
c639adc6
AL		 1281 snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_1,
1282 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK,
1283 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK);
203db220 1284
c639adc6
AL		 1285 snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_2,
1286 WM8991_OPCLK_ENA, WM8991_OPCLK_ENA);
203db220
DP		 1287
1288 snd_soc_write(codec, WM8991_DAC_CTRL, 0);
1289 snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
1290 snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
1291
203db220
DP		 1292 return 0;
1293}
1294
1295#define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1296 SNDRV_PCM_FMTBIT_S24_LE)
1297
85e7652d 1298static const struct snd_soc_dai_ops wm8991_ops = {
203db220
DP		 1299 .hw_params = wm8991_hw_params,
1300 .digital_mute = wm8991_mute,
1301 .set_fmt = wm8991_set_dai_fmt,
1302 .set_clkdiv = wm8991_set_dai_clkdiv,
1303 .set_pll = wm8991_set_dai_pll
1304};
1305
1306/*
1307 * The WM8991 supports 2 different and mutually exclusive DAI
1308 * configurations.
1309 *
1310 * 1. ADC/DAC on Primary Interface
1311 * 2. ADC on Primary Interface/DAC on secondary
1312 */
1313static struct snd_soc_dai_driver wm8991_dai = {
1314 /* ADC/DAC on primary */
1315 .name = "wm8991",
1316 .id = 1,
1317 .playback = {
1318 .stream_name = "Playback",
1319 .channels_min = 1,
1320 .channels_max = 2,
1321 .rates = SNDRV_PCM_RATE_8000_96000,
1322 .formats = WM8991_FORMATS
1323 },
1324 .capture = {
1325 .stream_name = "Capture",
1326 .channels_min = 1,
1327 .channels_max = 2,
1328 .rates = SNDRV_PCM_RATE_8000_96000,
1329 .formats = WM8991_FORMATS
1330 },
1331 .ops = &wm8991_ops
1332};
1333
1334static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1335 .probe = wm8991_probe,
1336 .remove = wm8991_remove,
1337 .suspend = wm8991_suspend,
1338 .resume = wm8991_resume,
1339 .set_bias_level = wm8991_set_bias_level,
89824995
MB		 1340 .controls = wm8991_snd_controls,
1341 .num_controls = ARRAY_SIZE(wm8991_snd_controls),
1342 .dapm_widgets = wm8991_dapm_widgets,
1343 .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets),
1344 .dapm_routes = wm8991_dapm_routes,
1345 .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes),
a86652e5
MB		 1346};
1347
1348static const struct regmap_config wm8991_regmap = {
1349 .reg_bits = 8,
1350 .val_bits = 16,
1351
1352 .max_register = WM8991_PLL3,
1353 .volatile_reg = wm8991_volatile,
1354 .reg_defaults = wm8991_reg_defaults,
1355 .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults),
1356 .cache_type = REGCACHE_RBTREE,
203db220
DP		 1357};
1358
7a79e94e
BP		 1359static int wm8991_i2c_probe(struct i2c_client *i2c,
1360 const struct i2c_device_id *id)
203db220
DP		 1361{
1362 struct wm8991_priv *wm8991;
1363 int ret;
1364
046d4f02 1365 wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL);
203db220
DP		 1366 if (!wm8991)
1367 return -ENOMEM;
1368
a86652e5
MB		 1369 wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap);
1370 if (IS_ERR(wm8991->regmap))
1371 return PTR_ERR(wm8991->regmap);
1372
203db220
DP		 1373 i2c_set_clientdata(i2c, wm8991);
1374
1375 ret = snd_soc_register_codec(&i2c->dev,
1376 &soc_codec_dev_wm8991, &wm8991_dai, 1);
046d4f02 1377
203db220
DP		 1378 return ret;
1379}
1380
7a79e94e 1381static int wm8991_i2c_remove(struct i2c_client *client)
203db220
DP		 1382{
1383 snd_soc_unregister_codec(&client->dev);
046d4f02 1384
203db220
DP		 1385 return 0;
1386}
1387
1388static const struct i2c_device_id wm8991_i2c_id[] = {
1389 { "wm8991", 0 },
1390 { }
1391};
1392MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1393
1394static struct i2c_driver wm8991_i2c_driver = {
1395 .driver = {
1396 .name = "wm8991",
1397 .owner = THIS_MODULE,
1398 },
1399 .probe = wm8991_i2c_probe,
7a79e94e 1400 .remove = wm8991_i2c_remove,
203db220
DP		 1401 .id_table = wm8991_i2c_id,
1402};
1403
38ece8db 1404module_i2c_driver(wm8991_i2c_driver);
203db220
DP		 1405
1406MODULE_DESCRIPTION("ASoC WM8991 driver");
1407MODULE_AUTHOR("Graeme Gregory");
1408MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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