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ASoC: wm8991: Remove unused pointer in wm8991_probe()
[deliverable/linux.git] / sound / soc / codecs / wm8991.c
CommitLineData
203db220
DP		 1/*
2 * wm8991.c -- WM8991 ALSA Soc Audio driver
3 *
4 * Copyright 2007-2010 Wolfson Microelectronics PLC.
5 * Author: Graeme Gregory
9a185b9a 6 * Graeme.Gregory@wolfsonmicro.com
203db220
DP		 7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
203db220
DP		 16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
a86652e5 21#include <linux/regmap.h>
203db220
DP		 22#include <linux/slab.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29#include <sound/tlv.h>
30#include <asm/div64.h>
31
32#include "wm8991.h"
33
34struct wm8991_priv {
a86652e5 35 struct regmap *regmap;
203db220
DP		 36 unsigned int pcmclk;
37};
38
a86652e5
MB		 39static const struct reg_default wm8991_reg_defaults[] = {
40 { 1, 0x0000 }, /* R1 - Power Management (1) */
41 { 2, 0x6000 }, /* R2 - Power Management (2) */
42 { 3, 0x0000 }, /* R3 - Power Management (3) */
43 { 4, 0x4050 }, /* R4 - Audio Interface (1) */
44 { 5, 0x4000 }, /* R5 - Audio Interface (2) */
45 { 6, 0x01C8 }, /* R6 - Clocking (1) */
46 { 7, 0x0000 }, /* R7 - Clocking (2) */
47 { 8, 0x0040 }, /* R8 - Audio Interface (3) */
48 { 9, 0x0040 }, /* R9 - Audio Interface (4) */
49 { 10, 0x0004 }, /* R10 - DAC CTRL */
50 { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */
51 { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */
52 { 13, 0x0000 }, /* R13 - Digital Side Tone */
53 { 14, 0x0100 }, /* R14 - ADC CTRL */
54 { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */
55 { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */
56
57 { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */
58 { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */
59 { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */
60 { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */
61 { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */
62 { 23, 0x0800 }, /* R23 - GPIO_POL */
63 { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */
64 { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */
65 { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */
66 { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */
67 { 28, 0x0000 }, /* R28 - Left Output Volume */
68 { 29, 0x0000 }, /* R29 - Right Output Volume */
69 { 30, 0x0066 }, /* R30 - Line Outputs Volume */
70 { 31, 0x0022 }, /* R31 - Out3/4 Volume */
71 { 32, 0x0079 }, /* R32 - Left OPGA Volume */
72 { 33, 0x0079 }, /* R33 - Right OPGA Volume */
73 { 34, 0x0003 }, /* R34 - Speaker Volume */
74 { 35, 0x0003 }, /* R35 - ClassD1 */
75
76 { 37, 0x0100 }, /* R37 - ClassD3 */
77
78 { 39, 0x0000 }, /* R39 - Input Mixer1 */
79 { 40, 0x0000 }, /* R40 - Input Mixer2 */
80 { 41, 0x0000 }, /* R41 - Input Mixer3 */
81 { 42, 0x0000 }, /* R42 - Input Mixer4 */
82 { 43, 0x0000 }, /* R43 - Input Mixer5 */
83 { 44, 0x0000 }, /* R44 - Input Mixer6 */
84 { 45, 0x0000 }, /* R45 - Output Mixer1 */
85 { 46, 0x0000 }, /* R46 - Output Mixer2 */
86 { 47, 0x0000 }, /* R47 - Output Mixer3 */
87 { 48, 0x0000 }, /* R48 - Output Mixer4 */
88 { 49, 0x0000 }, /* R49 - Output Mixer5 */
89 { 50, 0x0000 }, /* R50 - Output Mixer6 */
90 { 51, 0x0180 }, /* R51 - Out3/4 Mixer */
91 { 52, 0x0000 }, /* R52 - Line Mixer1 */
92 { 53, 0x0000 }, /* R53 - Line Mixer2 */
93 { 54, 0x0000 }, /* R54 - Speaker Mixer */
94 { 55, 0x0000 }, /* R55 - Additional Control */
95 { 56, 0x0000 }, /* R56 - AntiPOP1 */
96 { 57, 0x0000 }, /* R57 - AntiPOP2 */
97 { 58, 0x0000 }, /* R58 - MICBIAS */
98
99 { 60, 0x0008 }, /* R60 - PLL1 */
100 { 61, 0x0031 }, /* R61 - PLL2 */
101 { 62, 0x0026 }, /* R62 - PLL3 */
203db220
DP		 102};
103
a86652e5
MB		 104static bool wm8991_volatile(struct device *dev, unsigned int reg)
105{
106 switch (reg) {
107 case WM8991_RESET:
108 return true;
109 default:
110 return false;
111 }
112}
113
203db220
DP		 114static const unsigned int rec_mix_tlv[] = {
115 TLV_DB_RANGE_HEAD(1),
116 0, 7, TLV_DB_LINEAR_ITEM(-1500, 600),
117};
118
119static const unsigned int in_pga_tlv[] = {
120 TLV_DB_RANGE_HEAD(1),
121 0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000),
122};
123
124static const unsigned int out_mix_tlv[] = {
125 TLV_DB_RANGE_HEAD(1),
126 0, 7, TLV_DB_LINEAR_ITEM(0, -2100),
127};
128
129static const unsigned int out_pga_tlv[] = {
130 TLV_DB_RANGE_HEAD(1),
131 0, 127, TLV_DB_LINEAR_ITEM(-7300, 600),
132};
133
134static const unsigned int out_omix_tlv[] = {
135 TLV_DB_RANGE_HEAD(1),
136 0, 7, TLV_DB_LINEAR_ITEM(-600, 0),
137};
138
139static const unsigned int out_dac_tlv[] = {
140 TLV_DB_RANGE_HEAD(1),
141 0, 255, TLV_DB_LINEAR_ITEM(-7163, 0),
142};
143
144static const unsigned int in_adc_tlv[] = {
145 TLV_DB_RANGE_HEAD(1),
146 0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763),
147};
148
149static const unsigned int out_sidetone_tlv[] = {
150 TLV_DB_RANGE_HEAD(1),
151 0, 31, TLV_DB_LINEAR_ITEM(-3600, 0),
152};
153
154static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
155 struct snd_ctl_elem_value *ucontrol)
156{
157 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
158 int reg = kcontrol->private_value & 0xff;
159 int ret;
160 u16 val;
161
162 ret = snd_soc_put_volsw(kcontrol, ucontrol);
163 if (ret < 0)
164 return ret;
165
166 /* now hit the volume update bits (always bit 8) */
167 val = snd_soc_read(codec, reg);
168 return snd_soc_write(codec, reg, val | 0x0100);
169}
170
171static const char *wm8991_digital_sidetone[] =
172{"None", "Left ADC", "Right ADC", "Reserved"};
173
174static const struct soc_enum wm8991_left_digital_sidetone_enum =
175 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
176 WM8991_ADC_TO_DACL_SHIFT,
177 WM8991_ADC_TO_DACL_MASK,
178 wm8991_digital_sidetone);
179
180static const struct soc_enum wm8991_right_digital_sidetone_enum =
181 SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
182 WM8991_ADC_TO_DACR_SHIFT,
183 WM8991_ADC_TO_DACR_MASK,
184 wm8991_digital_sidetone);
185
186static const char *wm8991_adcmode[] =
187{"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
188
189static const struct soc_enum wm8991_right_adcmode_enum =
190 SOC_ENUM_SINGLE(WM8991_ADC_CTRL,
191 WM8991_ADC_HPF_CUT_SHIFT,
192 WM8991_ADC_HPF_CUT_MASK,
193 wm8991_adcmode);
194
195static const struct snd_kcontrol_new wm8991_snd_controls[] = {
196 /* INMIXL */
197 SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
198 SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
199 /* INMIXR */
200 SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
201 SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
202
203 /* LOMIX */
204 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
205 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
206 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
207 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
208 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
209 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
210 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
211 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
212 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
213 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
214 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
215 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
216
217 /* ROMIX */
218 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
219 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
220 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
221 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
222 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
223 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
224 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
225 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
226 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
227 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
228 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
229 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
230
231 /* LOUT */
232 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
233 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
234 SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
235
236 /* ROUT */
237 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
238 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
239 SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
240
241 /* LOPGA */
242 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
243 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
244 SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
245 WM8991_LOPGAZC_BIT, 1, 0),
246
247 /* ROPGA */
248 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
249 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
250 SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
251 WM8991_ROPGAZC_BIT, 1, 0),
252
253 SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
254 WM8991_LONMUTE_BIT, 1, 0),
255 SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
256 WM8991_LOPMUTE_BIT, 1, 0),
257 SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
258 WM8991_LOATTN_BIT, 1, 0),
259 SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
260 WM8991_RONMUTE_BIT, 1, 0),
261 SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
262 WM8991_ROPMUTE_BIT, 1, 0),
263 SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
264 WM8991_ROATTN_BIT, 1, 0),
265
266 SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
267 WM8991_OUT3MUTE_BIT, 1, 0),
268 SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
269 WM8991_OUT3ATTN_BIT, 1, 0),
270
271 SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
272 WM8991_OUT4MUTE_BIT, 1, 0),
273 SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
274 WM8991_OUT4ATTN_BIT, 1, 0),
275
276 SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
277 WM8991_CDMODE_BIT, 1, 0),
278
279 SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
280 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
281 SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
282 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
283 SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
284 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
285
286 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
287 WM8991_LEFT_DAC_DIGITAL_VOLUME,
288 WM8991_DACL_VOL_SHIFT,
289 WM8991_DACL_VOL_MASK,
290 0,
291 out_dac_tlv),
292
293 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
294 WM8991_RIGHT_DAC_DIGITAL_VOLUME,
295 WM8991_DACR_VOL_SHIFT,
296 WM8991_DACR_VOL_MASK,
297 0,
298 out_dac_tlv),
299
300 SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
301 SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
302
303 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
304 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
305 out_sidetone_tlv),
306 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
307 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
308 out_sidetone_tlv),
309
310 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
311 WM8991_ADC_HPF_ENA_BIT, 1, 0),
312
313 SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
314
315 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
316 WM8991_LEFT_ADC_DIGITAL_VOLUME,
317 WM8991_ADCL_VOL_SHIFT,
318 WM8991_ADCL_VOL_MASK,
319 0,
320 in_adc_tlv),
321
322 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
323 WM8991_RIGHT_ADC_DIGITAL_VOLUME,
324 WM8991_ADCR_VOL_SHIFT,
325 WM8991_ADCR_VOL_MASK,
326 0,
327 in_adc_tlv),
328
329 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
330 WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
331 WM8991_LIN12VOL_SHIFT,
332 WM8991_LIN12VOL_MASK,
333 0,
334 in_pga_tlv),
335
336 SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
337 WM8991_LI12ZC_BIT, 1, 0),
338
339 SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
340 WM8991_LI12MUTE_BIT, 1, 0),
341
342 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
343 WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
344 WM8991_LIN34VOL_SHIFT,
345 WM8991_LIN34VOL_MASK,
346 0,
347 in_pga_tlv),
348
349 SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
350 WM8991_LI34ZC_BIT, 1, 0),
351
352 SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
353 WM8991_LI34MUTE_BIT, 1, 0),
354
355 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
356 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
357 WM8991_RIN12VOL_SHIFT,
358 WM8991_RIN12VOL_MASK,
359 0,
360 in_pga_tlv),
361
362 SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
363 WM8991_RI12ZC_BIT, 1, 0),
364
365 SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
366 WM8991_RI12MUTE_BIT, 1, 0),
367
368 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
369 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
370 WM8991_RIN34VOL_SHIFT,
371 WM8991_RIN34VOL_MASK,
372 0,
373 in_pga_tlv),
374
375 SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
376 WM8991_RI34ZC_BIT, 1, 0),
377
378 SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
379 WM8991_RI34MUTE_BIT, 1, 0),
380};
381
382/*
383 * _DAPM_ Controls
384 */
203db220
DP		 385static int outmixer_event(struct snd_soc_dapm_widget *w,
386 struct snd_kcontrol *kcontrol, int event)
387{
388 u32 reg_shift = kcontrol->private_value & 0xfff;
389 int ret = 0;
390 u16 reg;
391
392 switch (reg_shift) {
393 case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
394 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1);
395 if (reg & WM8991_LDLO) {
396 printk(KERN_WARNING
397 "Cannot set as Output Mixer 1 LDLO Set\n");
398 ret = -1;
399 }
400 break;
401
402 case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
403 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2);
404 if (reg & WM8991_RDRO) {
405 printk(KERN_WARNING
406 "Cannot set as Output Mixer 2 RDRO Set\n");
407 ret = -1;
408 }
409 break;
410
411 case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
412 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
413 if (reg & WM8991_LDSPK) {
414 printk(KERN_WARNING
415 "Cannot set as Speaker Mixer LDSPK Set\n");
416 ret = -1;
417 }
418 break;
419
420 case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
421 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
422 if (reg & WM8991_RDSPK) {
423 printk(KERN_WARNING
424 "Cannot set as Speaker Mixer RDSPK Set\n");
425 ret = -1;
426 }
427 break;
428 }
429
430 return ret;
431}
432
433/* INMIX dB values */
434static const unsigned int in_mix_tlv[] = {
435 TLV_DB_RANGE_HEAD(1),
436 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
437};
438
439/* Left In PGA Connections */
440static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
441 SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
442 SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
443};
444
445static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
446 SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
447 SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
448};
449
450/* Right In PGA Connections */
451static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
452 SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
453 SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
454};
455
456static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
457 SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
458 SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
459};
460
461/* INMIXL */
462static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
463 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
464 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
465 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
466 7, 0, in_mix_tlv),
467 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
468 1, 0),
469 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
470 1, 0),
471};
472
473/* INMIXR */
474static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
475 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
476 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
477 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
478 7, 0, in_mix_tlv),
479 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
480 1, 0),
481 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
482 1, 0),
483};
484
485/* AINLMUX */
486static const char *wm8991_ainlmux[] =
487{"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
488
489static const struct soc_enum wm8991_ainlmux_enum =
490 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
491 ARRAY_SIZE(wm8991_ainlmux), wm8991_ainlmux);
492
493static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
494 SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
495
496/* DIFFINL */
497
498/* AINRMUX */
499static const char *wm8991_ainrmux[] =
500{"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
501
502static const struct soc_enum wm8991_ainrmux_enum =
503 SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
504 ARRAY_SIZE(wm8991_ainrmux), wm8991_ainrmux);
505
506static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
507 SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
508
509/* RXVOICE */
510static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
511 SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
512 WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
513 SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
514 WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
515};
516
517/* LOMIX */
518static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
519 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
520 WM8991_LRBLO_BIT, 1, 0),
521 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
522 WM8991_LLBLO_BIT, 1, 0),
523 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
524 WM8991_LRI3LO_BIT, 1, 0),
525 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
526 WM8991_LLI3LO_BIT, 1, 0),
527 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
528 WM8991_LR12LO_BIT, 1, 0),
529 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
530 WM8991_LL12LO_BIT, 1, 0),
531 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
532 WM8991_LDLO_BIT, 1, 0),
533};
534
535/* ROMIX */
536static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
537 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
538 WM8991_RLBRO_BIT, 1, 0),
539 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
540 WM8991_RRBRO_BIT, 1, 0),
541 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
542 WM8991_RLI3RO_BIT, 1, 0),
543 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
544 WM8991_RRI3RO_BIT, 1, 0),
545 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
546 WM8991_RL12RO_BIT, 1, 0),
547 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
548 WM8991_RR12RO_BIT, 1, 0),
549 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
550 WM8991_RDRO_BIT, 1, 0),
551};
552
553/* LONMIX */
554static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
555 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
556 WM8991_LLOPGALON_BIT, 1, 0),
557 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
558 WM8991_LROPGALON_BIT, 1, 0),
559 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
560 WM8991_LOPLON_BIT, 1, 0),
561};
562
563/* LOPMIX */
564static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
565 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
566 WM8991_LR12LOP_BIT, 1, 0),
567 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
568 WM8991_LL12LOP_BIT, 1, 0),
569 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
570 WM8991_LLOPGALOP_BIT, 1, 0),
571};
572
573/* RONMIX */
574static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
575 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
576 WM8991_RROPGARON_BIT, 1, 0),
577 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
578 WM8991_RLOPGARON_BIT, 1, 0),
579 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
580 WM8991_ROPRON_BIT, 1, 0),
581};
582
583/* ROPMIX */
584static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
585 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
586 WM8991_RL12ROP_BIT, 1, 0),
587 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
588 WM8991_RR12ROP_BIT, 1, 0),
589 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
590 WM8991_RROPGAROP_BIT, 1, 0),
591};
592
593/* OUT3MIX */
594static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
595 SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
596 WM8991_LI4O3_BIT, 1, 0),
597 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
598 WM8991_LPGAO3_BIT, 1, 0),
599};
600
601/* OUT4MIX */
602static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
603 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
604 WM8991_RPGAO4_BIT, 1, 0),
605 SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
606 WM8991_RI4O4_BIT, 1, 0),
607};
608
609/* SPKMIX */
610static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
611 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
612 WM8991_LI2SPK_BIT, 1, 0),
613 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
614 WM8991_LB2SPK_BIT, 1, 0),
615 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
616 WM8991_LOPGASPK_BIT, 1, 0),
617 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
618 WM8991_LDSPK_BIT, 1, 0),
619 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
620 WM8991_RDSPK_BIT, 1, 0),
621 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
622 WM8991_ROPGASPK_BIT, 1, 0),
623 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
624 WM8991_RL12ROP_BIT, 1, 0),
625 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
626 WM8991_RI2SPK_BIT, 1, 0),
627};
628
629static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
630 /* Input Side */
631 /* Input Lines */
632 SND_SOC_DAPM_INPUT("LIN1"),
633 SND_SOC_DAPM_INPUT("LIN2"),
634 SND_SOC_DAPM_INPUT("LIN3"),
635 SND_SOC_DAPM_INPUT("LIN4RXN"),
636 SND_SOC_DAPM_INPUT("RIN3"),
637 SND_SOC_DAPM_INPUT("RIN4RXP"),
638 SND_SOC_DAPM_INPUT("RIN1"),
639 SND_SOC_DAPM_INPUT("RIN2"),
640 SND_SOC_DAPM_INPUT("Internal ADC Source"),
641
6a077336
MB		 642 SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2,
643 WM8991_AINL_ENA_BIT, 0, NULL, 0),
644 SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2,
645 WM8991_AINR_ENA_BIT, 0, NULL, 0),
646
203db220
DP		 647 /* DACs */
648 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
649 WM8991_ADCL_ENA_BIT, 0),
650 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
651 WM8991_ADCR_ENA_BIT, 0),
652
653 /* Input PGAs */
654 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
655 0, &wm8991_dapm_lin12_pga_controls[0],
656 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
657 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
658 0, &wm8991_dapm_lin34_pga_controls[0],
659 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
660 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
661 0, &wm8991_dapm_rin12_pga_controls[0],
662 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
663 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
664 0, &wm8991_dapm_rin34_pga_controls[0],
665 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
666
667 /* INMIXL */
6a077336 668 SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0,
203db220 669 &wm8991_dapm_inmixl_controls[0],
6a077336 670 ARRAY_SIZE(wm8991_dapm_inmixl_controls)),
203db220
DP		 671
672 /* AINLMUX */
6a077336
MB		 673 SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0,
674 &wm8991_dapm_ainlmux_controls),
203db220
DP		 675
676 /* INMIXR */
6a077336 677 SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0,
203db220 678 &wm8991_dapm_inmixr_controls[0],
6a077336 679 ARRAY_SIZE(wm8991_dapm_inmixr_controls)),
203db220
DP		 680
681 /* AINRMUX */
6a077336
MB		 682 SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0,
683 &wm8991_dapm_ainrmux_controls),
203db220
DP		 684
685 /* Output Side */
686 /* DACs */
687 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
688 WM8991_DACL_ENA_BIT, 0),
689 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
690 WM8991_DACR_ENA_BIT, 0),
691
692 /* LOMIX */
693 SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
694 0, &wm8991_dapm_lomix_controls[0],
695 ARRAY_SIZE(wm8991_dapm_lomix_controls),
696 outmixer_event, SND_SOC_DAPM_PRE_REG),
697
698 /* LONMIX */
699 SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
700 &wm8991_dapm_lonmix_controls[0],
701 ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
702
703 /* LOPMIX */
704 SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
705 &wm8991_dapm_lopmix_controls[0],
706 ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
707
708 /* OUT3MIX */
709 SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
710 &wm8991_dapm_out3mix_controls[0],
711 ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
712
713 /* SPKMIX */
714 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
715 &wm8991_dapm_spkmix_controls[0],
716 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
717 SND_SOC_DAPM_PRE_REG),
718
719 /* OUT4MIX */
720 SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
721 &wm8991_dapm_out4mix_controls[0],
722 ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
723
724 /* ROPMIX */
725 SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
726 &wm8991_dapm_ropmix_controls[0],
727 ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
728
729 /* RONMIX */
730 SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
731 &wm8991_dapm_ronmix_controls[0],
732 ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
733
734 /* ROMIX */
735 SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
736 0, &wm8991_dapm_romix_controls[0],
737 ARRAY_SIZE(wm8991_dapm_romix_controls),
738 outmixer_event, SND_SOC_DAPM_PRE_REG),
739
740 /* LOUT PGA */
741 SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
742 NULL, 0),
743
744 /* ROUT PGA */
745 SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
746 NULL, 0),
747
748 /* LOPGA */
749 SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
750 NULL, 0),
751
752 /* ROPGA */
753 SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
754 NULL, 0),
755
756 /* MICBIAS */
b6406a80
MB		 757 SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1,
758 WM8991_MICBIAS_ENA_BIT, 0, NULL, 0),
203db220
DP		 759
760 SND_SOC_DAPM_OUTPUT("LON"),
761 SND_SOC_DAPM_OUTPUT("LOP"),
762 SND_SOC_DAPM_OUTPUT("OUT3"),
763 SND_SOC_DAPM_OUTPUT("LOUT"),
764 SND_SOC_DAPM_OUTPUT("SPKN"),
765 SND_SOC_DAPM_OUTPUT("SPKP"),
766 SND_SOC_DAPM_OUTPUT("ROUT"),
767 SND_SOC_DAPM_OUTPUT("OUT4"),
768 SND_SOC_DAPM_OUTPUT("ROP"),
769 SND_SOC_DAPM_OUTPUT("RON"),
770 SND_SOC_DAPM_OUTPUT("OUT"),
771
772 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
773};
774
89824995 775static const struct snd_soc_dapm_route wm8991_dapm_routes[] = {
203db220
DP		 776 /* Make DACs turn on when playing even if not mixed into any outputs */
777 {"Internal DAC Sink", NULL, "Left DAC"},
778 {"Internal DAC Sink", NULL, "Right DAC"},
779
780 /* Make ADCs turn on when recording even if not mixed from any inputs */
781 {"Left ADC", NULL, "Internal ADC Source"},
782 {"Right ADC", NULL, "Internal ADC Source"},
783
784 /* Input Side */
6a077336
MB		 785 {"INMIXL", NULL, "INL"},
786 {"AINLMUX", NULL, "INL"},
787 {"INMIXR", NULL, "INR"},
788 {"AINRMUX", NULL, "INR"},
203db220
DP		 789 /* LIN12 PGA */
790 {"LIN12 PGA", "LIN1 Switch", "LIN1"},
791 {"LIN12 PGA", "LIN2 Switch", "LIN2"},
792 /* LIN34 PGA */
793 {"LIN34 PGA", "LIN3 Switch", "LIN3"},
794 {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
795 /* INMIXL */
796 {"INMIXL", "Record Left Volume", "LOMIX"},
797 {"INMIXL", "LIN2 Volume", "LIN2"},
798 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
799 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
800 /* AINLMUX */
801 {"AINLMUX", "INMIXL Mix", "INMIXL"},
802 {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
803 {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
804 {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
805 {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
806 /* ADC */
807 {"Left ADC", NULL, "AINLMUX"},
808
809 /* RIN12 PGA */
810 {"RIN12 PGA", "RIN1 Switch", "RIN1"},
811 {"RIN12 PGA", "RIN2 Switch", "RIN2"},
812 /* RIN34 PGA */
813 {"RIN34 PGA", "RIN3 Switch", "RIN3"},
814 {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
815 /* INMIXL */
816 {"INMIXR", "Record Right Volume", "ROMIX"},
817 {"INMIXR", "RIN2 Volume", "RIN2"},
818 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
819 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
820 /* AINRMUX */
821 {"AINRMUX", "INMIXR Mix", "INMIXR"},
822 {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
823 {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
824 {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
825 {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
826 /* ADC */
827 {"Right ADC", NULL, "AINRMUX"},
828
829 /* LOMIX */
830 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
831 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
832 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
833 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
834 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
835 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
836 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
837
838 /* ROMIX */
839 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
840 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
841 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
842 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
843 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
844 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
845 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
846
847 /* SPKMIX */
848 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
849 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
850 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
851 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
852 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
853 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
854 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
855 {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
856
857 /* LONMIX */
858 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
859 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
860 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
861
862 /* LOPMIX */
863 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
864 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
865 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
866
867 /* OUT3MIX */
868 {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
869 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
870
871 /* OUT4MIX */
872 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
873 {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
874
875 /* RONMIX */
876 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
877 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
878 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
879
880 /* ROPMIX */
881 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
882 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
883 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
884
885 /* Out Mixer PGAs */
886 {"LOPGA", NULL, "LOMIX"},
887 {"ROPGA", NULL, "ROMIX"},
888
889 {"LOUT PGA", NULL, "LOMIX"},
890 {"ROUT PGA", NULL, "ROMIX"},
891
892 /* Output Pins */
893 {"LON", NULL, "LONMIX"},
894 {"LOP", NULL, "LOPMIX"},
895 {"OUT", NULL, "OUT3MIX"},
896 {"LOUT", NULL, "LOUT PGA"},
897 {"SPKN", NULL, "SPKMIX"},
898 {"ROUT", NULL, "ROUT PGA"},
899 {"OUT4", NULL, "OUT4MIX"},
900 {"ROP", NULL, "ROPMIX"},
901 {"RON", NULL, "RONMIX"},
902};
903
904/* PLL divisors */
905struct _pll_div {
906 u32 div2;
907 u32 n;
908 u32 k;
909};
910
911/* The size in bits of the pll divide multiplied by 10
912 * to allow rounding later */
913#define FIXED_PLL_SIZE ((1 << 16) * 10)
914
915static void pll_factors(struct _pll_div *pll_div, unsigned int target,
916 unsigned int source)
917{
918 u64 Kpart;
919 unsigned int K, Ndiv, Nmod;
920
921
922 Ndiv = target / source;
923 if (Ndiv < 6) {
924 source >>= 1;
925 pll_div->div2 = 1;
926 Ndiv = target / source;
927 } else
928 pll_div->div2 = 0;
929
930 if ((Ndiv < 6) || (Ndiv > 12))
931 printk(KERN_WARNING
932 "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
933
934 pll_div->n = Ndiv;
935 Nmod = target % source;
936 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
937
938 do_div(Kpart, source);
939
940 K = Kpart & 0xFFFFFFFF;
941
942 /* Check if we need to round */
943 if ((K % 10) >= 5)
944 K += 5;
945
946 /* Move down to proper range now rounding is done */
947 K /= 10;
948
949 pll_div->k = K;
950}
951
952static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
953 int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
954{
955 u16 reg;
956 struct snd_soc_codec *codec = codec_dai->codec;
957 struct _pll_div pll_div;
958
959 if (freq_in && freq_out) {
960 pll_factors(&pll_div, freq_out * 4, freq_in);
961
962 /* Turn on PLL */
963 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
964 reg |= WM8991_PLL_ENA;
965 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
966
967 /* sysclk comes from PLL */
968 reg = snd_soc_read(codec, WM8991_CLOCKING_2);
969 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
970
25985edc 971 /* set up N , fractional mode and pre-divisor if necessary */
203db220
DP		 972 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
973 (pll_div.div2 ? WM8991_PRESCALE : 0));
974 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
975 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
976 } else {
977 /* Turn on PLL */
978 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
979 reg &= ~WM8991_PLL_ENA;
980 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
981 }
982 return 0;
983}
984
985/*
986 * Set's ADC and Voice DAC format.
987 */
988static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
989 unsigned int fmt)
990{
991 struct snd_soc_codec *codec = codec_dai->codec;
992 u16 audio1, audio3;
993
994 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
995 audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
996
997 /* set master/slave audio interface */
998 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
999 case SND_SOC_DAIFMT_CBS_CFS:
1000 audio3 &= ~WM8991_AIF_MSTR1;
1001 break;
1002 case SND_SOC_DAIFMT_CBM_CFM:
1003 audio3 |= WM8991_AIF_MSTR1;
1004 break;
1005 default:
1006 return -EINVAL;
1007 }
1008
1009 audio1 &= ~WM8991_AIF_FMT_MASK;
1010
1011 /* interface format */
1012 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1013 case SND_SOC_DAIFMT_I2S:
1014 audio1 |= WM8991_AIF_TMF_I2S;
1015 audio1 &= ~WM8991_AIF_LRCLK_INV;
1016 break;
1017 case SND_SOC_DAIFMT_RIGHT_J:
1018 audio1 |= WM8991_AIF_TMF_RIGHTJ;
1019 audio1 &= ~WM8991_AIF_LRCLK_INV;
1020 break;
1021 case SND_SOC_DAIFMT_LEFT_J:
1022 audio1 |= WM8991_AIF_TMF_LEFTJ;
1023 audio1 &= ~WM8991_AIF_LRCLK_INV;
1024 break;
1025 case SND_SOC_DAIFMT_DSP_A:
1026 audio1 |= WM8991_AIF_TMF_DSP;
1027 audio1 &= ~WM8991_AIF_LRCLK_INV;
1028 break;
1029 case SND_SOC_DAIFMT_DSP_B:
1030 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1031 break;
1032 default:
1033 return -EINVAL;
1034 }
1035
1036 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1037 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1038 return 0;
1039}
1040
1041static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1042 int div_id, int div)
1043{
1044 struct snd_soc_codec *codec = codec_dai->codec;
1045 u16 reg;
1046
1047 switch (div_id) {
1048 case WM8991_MCLK_DIV:
1049 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1050 ~WM8991_MCLK_DIV_MASK;
1051 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1052 break;
1053 case WM8991_DACCLK_DIV:
1054 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1055 ~WM8991_DAC_CLKDIV_MASK;
1056 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1057 break;
1058 case WM8991_ADCCLK_DIV:
1059 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1060 ~WM8991_ADC_CLKDIV_MASK;
1061 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1062 break;
1063 case WM8991_BCLK_DIV:
1064 reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1065 ~WM8991_BCLK_DIV_MASK;
1066 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1067 break;
1068 default:
1069 return -EINVAL;
1070 }
1071
1072 return 0;
1073}
1074
1075/*
1076 * Set PCM DAI bit size and sample rate.
1077 */
1078static int wm8991_hw_params(struct snd_pcm_substream *substream,
1079 struct snd_pcm_hw_params *params,
1080 struct snd_soc_dai *dai)
1081{
1082 struct snd_soc_codec *codec = dai->codec;
1083 u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1084
1085 audio1 &= ~WM8991_AIF_WL_MASK;
1086 /* bit size */
1087 switch (params_format(params)) {
1088 case SNDRV_PCM_FORMAT_S16_LE:
1089 break;
1090 case SNDRV_PCM_FORMAT_S20_3LE:
1091 audio1 |= WM8991_AIF_WL_20BITS;
1092 break;
1093 case SNDRV_PCM_FORMAT_S24_LE:
1094 audio1 |= WM8991_AIF_WL_24BITS;
1095 break;
1096 case SNDRV_PCM_FORMAT_S32_LE:
1097 audio1 |= WM8991_AIF_WL_32BITS;
1098 break;
1099 }
1100
1101 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1102 return 0;
1103}
1104
1105static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1106{
1107 struct snd_soc_codec *codec = dai->codec;
1108 u16 val;
1109
1110 val = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1111 if (mute)
1112 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1113 else
1114 snd_soc_write(codec, WM8991_DAC_CTRL, val);
1115 return 0;
1116}
1117
1118static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1119 enum snd_soc_bias_level level)
1120{
a86652e5 1121 struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec);
203db220
DP		 1122 u16 val;
1123
1124 switch (level) {
1125 case SND_SOC_BIAS_ON:
1126 break;
1127
1128 case SND_SOC_BIAS_PREPARE:
1129 /* VMID=2*50k */
1130 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1131 ~WM8991_VMID_MODE_MASK;
1132 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1133 break;
1134
1135 case SND_SOC_BIAS_STANDBY:
1136 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
a86652e5 1137 regcache_sync(wm8991->regmap);
203db220
DP		 1138 /* Enable all output discharge bits */
1139 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1140 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1141 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1142 WM8991_DIS_ROUT);
1143
1144 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1145 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1146 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1147 WM8991_VMIDTOG);
1148
1149 /* Delay to allow output caps to discharge */
1150 msleep(300);
1151
1152 /* Disable VMIDTOG */
1153 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1154 WM8991_BUFDCOPEN | WM8991_POBCTRL);
1155
1156 /* disable all output discharge bits */
1157 snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1158
1159 /* Enable outputs */
1160 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1161
1162 msleep(50);
1163
1164 /* Enable VMID at 2x50k */
1165 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1166
1167 msleep(100);
1168
1169 /* Enable VREF */
1170 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1171
1172 msleep(600);
1173
1174 /* Enable BUFIOEN */
1175 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1176 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1177 WM8991_BUFIOEN);
1178
1179 /* Disable outputs */
1180 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1181
1182 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1183 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1184 }
1185
1186 /* VMID=2*250k */
1187 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1188 ~WM8991_VMID_MODE_MASK;
1189 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1190 break;
1191
1192 case SND_SOC_BIAS_OFF:
1193 /* Enable POBCTRL and SOFT_ST */
1194 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1195 WM8991_POBCTRL | WM8991_BUFIOEN);
1196
1197 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1198 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1199 WM8991_BUFDCOPEN | WM8991_POBCTRL |
1200 WM8991_BUFIOEN);
1201
1202 /* mute DAC */
1203 val = snd_soc_read(codec, WM8991_DAC_CTRL);
1204 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1205
1206 /* Enable any disabled outputs */
1207 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1208
1209 /* Disable VMID */
1210 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1211
1212 msleep(300);
1213
1214 /* Enable all output discharge bits */
1215 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1216 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1217 WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1218 WM8991_DIS_ROUT);
1219
1220 /* Disable VREF */
1221 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1222
1223 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1224 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
a86652e5 1225 regcache_mark_dirty(wm8991->regmap);
203db220
DP		 1226 break;
1227 }
1228
1229 codec->dapm.bias_level = level;
1230 return 0;
1231}
1232
84b315ee 1233static int wm8991_suspend(struct snd_soc_codec *codec)
203db220
DP		 1234{
1235 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1236 return 0;
1237}
1238
1239static int wm8991_resume(struct snd_soc_codec *codec)
1240{
1241 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1242 return 0;
1243}
1244
1245/* power down chip */
1246static int wm8991_remove(struct snd_soc_codec *codec)
1247{
1248 wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1249 return 0;
1250}
1251
1252static int wm8991_probe(struct snd_soc_codec *codec)
1253{
203db220 1254 int ret;
203db220 1255
a86652e5 1256 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
203db220
DP		 1257 if (ret < 0) {
1258 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1259 return ret;
1260 }
1261
203db220
DP		 1262 wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1263
203db220
DP		 1264 return 0;
1265}
1266
1267#define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1268 SNDRV_PCM_FMTBIT_S24_LE)
1269
85e7652d 1270static const struct snd_soc_dai_ops wm8991_ops = {
203db220
DP		 1271 .hw_params = wm8991_hw_params,
1272 .digital_mute = wm8991_mute,
1273 .set_fmt = wm8991_set_dai_fmt,
1274 .set_clkdiv = wm8991_set_dai_clkdiv,
1275 .set_pll = wm8991_set_dai_pll
1276};
1277
1278/*
1279 * The WM8991 supports 2 different and mutually exclusive DAI
1280 * configurations.
1281 *
1282 * 1. ADC/DAC on Primary Interface
1283 * 2. ADC on Primary Interface/DAC on secondary
1284 */
1285static struct snd_soc_dai_driver wm8991_dai = {
1286 /* ADC/DAC on primary */
1287 .name = "wm8991",
1288 .id = 1,
1289 .playback = {
1290 .stream_name = "Playback",
1291 .channels_min = 1,
1292 .channels_max = 2,
1293 .rates = SNDRV_PCM_RATE_8000_96000,
1294 .formats = WM8991_FORMATS
1295 },
1296 .capture = {
1297 .stream_name = "Capture",
1298 .channels_min = 1,
1299 .channels_max = 2,
1300 .rates = SNDRV_PCM_RATE_8000_96000,
1301 .formats = WM8991_FORMATS
1302 },
1303 .ops = &wm8991_ops
1304};
1305
1306static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1307 .probe = wm8991_probe,
1308 .remove = wm8991_remove,
1309 .suspend = wm8991_suspend,
1310 .resume = wm8991_resume,
1311 .set_bias_level = wm8991_set_bias_level,
89824995
MB		 1312 .controls = wm8991_snd_controls,
1313 .num_controls = ARRAY_SIZE(wm8991_snd_controls),
1314 .dapm_widgets = wm8991_dapm_widgets,
1315 .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets),
1316 .dapm_routes = wm8991_dapm_routes,
1317 .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes),
a86652e5
MB		 1318};
1319
1320static const struct regmap_config wm8991_regmap = {
1321 .reg_bits = 8,
1322 .val_bits = 16,
1323
1324 .max_register = WM8991_PLL3,
1325 .volatile_reg = wm8991_volatile,
1326 .reg_defaults = wm8991_reg_defaults,
1327 .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults),
1328 .cache_type = REGCACHE_RBTREE,
203db220
DP		 1329};
1330
7a79e94e
BP		 1331static int wm8991_i2c_probe(struct i2c_client *i2c,
1332 const struct i2c_device_id *id)
203db220
DP		 1333{
1334 struct wm8991_priv *wm8991;
a0a05916 1335 unsigned int val;
203db220
DP		 1336 int ret;
1337
046d4f02 1338 wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL);
203db220
DP		 1339 if (!wm8991)
1340 return -ENOMEM;
1341
a86652e5
MB		 1342 wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap);
1343 if (IS_ERR(wm8991->regmap))
1344 return PTR_ERR(wm8991->regmap);
1345
203db220
DP		 1346 i2c_set_clientdata(i2c, wm8991);
1347
a0a05916
MB		 1348 ret = regmap_read(wm8991->regmap, WM8991_RESET, &val);
1349 if (ret != 0) {
1350 dev_err(&i2c->dev, "Failed to read device ID: %d\n", ret);
1351 return ret;
1352 }
1353 if (val != 0x8991) {
1354 dev_err(&i2c->dev, "Device with ID %x is not a WM8991\n", val);
1355 return -EINVAL;
1356 }
1357
e4634804
MB		 1358 ret = regmap_write(wm8991->regmap, WM8991_RESET, 0);
1359 if (ret < 0) {
1360 dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret);
1361 return ret;
1362 }
1363
1364 regmap_update_bits(wm8991->regmap, WM8991_AUDIO_INTERFACE_4,
1365 WM8991_ALRCGPIO1, WM8991_ALRCGPIO1);
1366
1367 regmap_update_bits(wm8991->regmap, WM8991_GPIO1_GPIO2,
1368 WM8991_GPIO1_SEL_MASK, 1);
1369
1370 regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_1,
1371 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK,
1372 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK);
1373
1374 regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_2,
1375 WM8991_OPCLK_ENA, WM8991_OPCLK_ENA);
1376
1377 regmap_write(wm8991->regmap, WM8991_DAC_CTRL, 0);
1378 regmap_write(wm8991->regmap, WM8991_LEFT_OUTPUT_VOLUME,
1379 0x50 | (1<<8));
1380 regmap_write(wm8991->regmap, WM8991_RIGHT_OUTPUT_VOLUME,
1381 0x50 | (1<<8));
1382
203db220
DP		 1383 ret = snd_soc_register_codec(&i2c->dev,
1384 &soc_codec_dev_wm8991, &wm8991_dai, 1);
046d4f02 1385
203db220
DP		 1386 return ret;
1387}
1388
7a79e94e 1389static int wm8991_i2c_remove(struct i2c_client *client)
203db220
DP		 1390{
1391 snd_soc_unregister_codec(&client->dev);
046d4f02 1392
203db220
DP		 1393 return 0;
1394}
1395
1396static const struct i2c_device_id wm8991_i2c_id[] = {
1397 { "wm8991", 0 },
1398 { }
1399};
1400MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1401
1402static struct i2c_driver wm8991_i2c_driver = {
1403 .driver = {
1404 .name = "wm8991",
1405 .owner = THIS_MODULE,
1406 },
1407 .probe = wm8991_i2c_probe,
7a79e94e 1408 .remove = wm8991_i2c_remove,
203db220
DP		 1409 .id_table = wm8991_i2c_id,
1410};
1411
38ece8db 1412module_i2c_driver(wm8991_i2c_driver);
203db220
DP		 1413
1414MODULE_DESCRIPTION("ASoC WM8991 driver");
1415MODULE_AUTHOR("Graeme Gregory");
1416MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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