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Merge branch 'upstream/xen-tracing2' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
a2342ae3
MB		 21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
a2342ae3
MB		 25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
42 TLV_DB_RANGE_HEAD(7),
43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
4dcc93d0 64static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 65{
d96ca3cd 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 67 unsigned int reg;
68 int count = 0;
1479c3fb 69 int timeout;
4dcc93d0
MB		 70 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 76
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 78
1479c3fb
MB		 79 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
d96ca3cd 83
1479c3fb
MB		 84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
d96ca3cd 91 msleep(1);
1479c3fb
MB		 92
93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
94 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
a2342ae3 96
4dcc93d0 97 if (reg & op)
5a9f91ca
MB		 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
a2342ae3
MB		 100}
101
d96ca3cd
MB		 102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
3ed7074c
MB		 112/*
113 * Startup calibration of the DC servo
114 */
115static void calibrate_dc_servo(struct snd_soc_codec *codec)
116{
b2c812e2 117 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
20a4e7fc 118 s8 offset;
8437f700 119 u16 reg, reg_l, reg_r, dcs_cfg;
3ed7074c 120
fec6dd83
MB		 121 /* If we're using a digital only path and have a previously
122 * callibrated DC servo offset stored then use that. */
123 if (hubs->class_w && hubs->class_w_dcs) {
124 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
125 hubs->class_w_dcs);
126 snd_soc_write(codec, WM8993_DC_SERVO_3, hubs->class_w_dcs);
127 wait_for_dc_servo(codec,
128 WM8993_DCS_TRIG_DAC_WR_0 |
129 WM8993_DCS_TRIG_DAC_WR_1);
130 return;
131 }
132
f9acf9fe 133 if (hubs->series_startup) {
11cef5f0
MB		 134 /* Set for 32 series updates */
135 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
136 WM8993_DCS_SERIES_NO_01_MASK,
137 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
138 wait_for_dc_servo(codec,
139 WM8993_DCS_TRIG_SERIES_0 |
140 WM8993_DCS_TRIG_SERIES_1);
141 } else {
142 wait_for_dc_servo(codec,
143 WM8993_DCS_TRIG_STARTUP_0 |
144 WM8993_DCS_TRIG_STARTUP_1);
145 }
3ed7074c 146
fec6dd83
MB		 147 /* Different chips in the family support different readback
148 * methods.
149 */
150 switch (hubs->dcs_readback_mode) {
151 case 0:
152 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
ef995e3a 153 & WM8993_DCS_INTEG_CHAN_0_MASK;
fec6dd83
MB		 154 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
155 & WM8993_DCS_INTEG_CHAN_1_MASK;
156 break;
157 case 1:
158 reg = snd_soc_read(codec, WM8993_DC_SERVO_3);
d5b040c9 159 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
fec6dd83 160 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
d5b040c9 161 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
fec6dd83
MB		 162 break;
163 default:
9e3be1ed 164 WARN(1, "Unknown DCS readback method\n");
fec6dd83
MB		 165 break;
166 }
167
168 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
169
3ed7074c
MB		 170 /* Apply correction to DC servo result */
171 if (hubs->dcs_codes) {
172 dev_dbg(codec->dev, "Applying %d code DC servo correction\n",
173 hubs->dcs_codes);
174
d5b040c9
MB		 175 /* HPOUT1R */
176 offset = reg_r;
20a4e7fc
MB		 177 offset += hubs->dcs_codes;
178 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 179
d5b040c9
MB		 180 /* HPOUT1L */
181 offset = reg_l;
20a4e7fc
MB		 182 offset += hubs->dcs_codes;
183 dcs_cfg |= (u8)offset;
3ed7074c 184
3254d285
MB		 185 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
186
3ed7074c
MB		 187 /* Do it */
188 snd_soc_write(codec, WM8993_DC_SERVO_3, dcs_cfg);
4dcc93d0
MB		 189 wait_for_dc_servo(codec,
190 WM8993_DCS_TRIG_DAC_WR_0 |
191 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 192 } else {
d5b040c9
MB		 193 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
194 dcs_cfg |= reg_l;
3ed7074c 195 }
fec6dd83
MB		 196
197 /* Save the callibrated offset if we're in class W mode and
198 * therefore don't have any analogue signal mixed in. */
199 if (hubs->class_w)
200 hubs->class_w_dcs = dcs_cfg;
3ed7074c
MB		 201}
202
a2342ae3
MB		 203/*
204 * Update the DC servo calibration on gain changes
205 */
206static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 207 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 208{
209 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 210 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 211 int ret;
212
213 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
214
fec6dd83
MB		 215 /* Updating the analogue gains invalidates the DC servo cache */
216 hubs->class_w_dcs = 0;
217
ae9d8607
MB		 218 /* If we're applying an offset correction then updating the
219 * callibration would be likely to introduce further offsets. */
780b75b4 220 if (hubs->dcs_codes || hubs->no_series_update)
ae9d8607
MB		 221 return ret;
222
a2342ae3
MB		 223 /* Only need to do this if the outputs are active */
224 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
225 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
226 snd_soc_update_bits(codec,
227 WM8993_DC_SERVO_0,
228 WM8993_DCS_TRIG_SINGLE_0 |
229 WM8993_DCS_TRIG_SINGLE_1,
230 WM8993_DCS_TRIG_SINGLE_0 |
231 WM8993_DCS_TRIG_SINGLE_1);
232
233 return ret;
234}
235
236static const struct snd_kcontrol_new analogue_snd_controls[] = {
237SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
238 inpga_tlv),
239SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 240SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 241
242SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
243 inpga_tlv),
244SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 245SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 246
247
248SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
249 inpga_tlv),
250SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 251SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 252
253SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
254 inpga_tlv),
255SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 256SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 257
258SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
259 inmix_sw_tlv),
260SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
261 inmix_sw_tlv),
262SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
263 inmix_tlv),
264SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
265SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
266 inmix_tlv),
267
268SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
269 inmix_sw_tlv),
270SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
271 inmix_sw_tlv),
272SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
273 inmix_tlv),
274SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
275SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
276 inmix_tlv),
277
278SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
279 outmix_tlv),
280SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
281 outmix_tlv),
282SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
283 outmix_tlv),
284SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
285 outmix_tlv),
286SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
287 outmix_tlv),
288SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
289 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
290SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
291 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
292SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
293 outmix_tlv),
294
295SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
296 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
297SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
298 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
299SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
300 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
301SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
302 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
303SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
304 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
305SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
306 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
307SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
308 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
309SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
310 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
311
312SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
313 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
314SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
315 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
316SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
317 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
318
319SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
320SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
321
322SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
323 5, 1, 1, wm_hubs_spkmix_tlv),
324SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
325 4, 1, 1, wm_hubs_spkmix_tlv),
326SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
327 3, 1, 1, wm_hubs_spkmix_tlv),
328
329SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
330 5, 1, 1, wm_hubs_spkmix_tlv),
331SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
332 4, 1, 1, wm_hubs_spkmix_tlv),
333SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
334 3, 1, 1, wm_hubs_spkmix_tlv),
335
336SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
337 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
338 0, 3, 1, spkmixout_tlv),
339SOC_DOUBLE_R_TLV("Speaker Volume",
340 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
341 0, 63, 0, outpga_tlv),
342SOC_DOUBLE_R("Speaker Switch",
343 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
344 6, 1, 0),
345SOC_DOUBLE_R("Speaker ZC Switch",
346 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
347 7, 1, 0),
ed8cc471 348SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 349 spkboost_tlv),
350SOC_ENUM("Speaker Reference", speaker_ref),
351SOC_ENUM("Speaker Mode", speaker_mode),
352
353{
354 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Headphone Volume",
355 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |
356 SNDRV_CTL_ELEM_ACCESS_READWRITE,
357 .tlv.p = outpga_tlv,
358 .info = snd_soc_info_volsw_2r,
359 .get = snd_soc_get_volsw_2r, .put = wm8993_put_dc_servo,
360 .private_value = (unsigned long)&(struct soc_mixer_control) {
361 .reg = WM8993_LEFT_OUTPUT_VOLUME,
362 .rreg = WM8993_RIGHT_OUTPUT_VOLUME,
363 .shift = 0, .max = 63
364 },
365},
366SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
367 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
368SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
369 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
370
371SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
372SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
373SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
374 line_tlv),
375
376SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
377SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
378SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
379 line_tlv),
380};
381
3ed7074c
MB		 382static int hp_supply_event(struct snd_soc_dapm_widget *w,
383 struct snd_kcontrol *kcontrol, int event)
384{
385 struct snd_soc_codec *codec = w->codec;
b2c812e2 386 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 387
388 switch (event) {
389 case SND_SOC_DAPM_PRE_PMU:
390 switch (hubs->hp_startup_mode) {
391 case 0:
392 break;
393 case 1:
394 /* Enable the headphone amp */
395 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
396 WM8993_HPOUT1L_ENA |
397 WM8993_HPOUT1R_ENA,
398 WM8993_HPOUT1L_ENA |
399 WM8993_HPOUT1R_ENA);
400
401 /* Enable the second stage */
402 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
403 WM8993_HPOUT1L_DLY |
404 WM8993_HPOUT1R_DLY,
405 WM8993_HPOUT1L_DLY |
406 WM8993_HPOUT1R_DLY);
407 break;
408 default:
409 dev_err(codec->dev, "Unknown HP startup mode %d\n",
410 hubs->hp_startup_mode);
411 break;
412 }
413
414 case SND_SOC_DAPM_PRE_PMD:
415 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
416 WM8993_CP_ENA, 0);
417 break;
418 }
419
420 return 0;
421}
422
a2342ae3
MB		 423static int hp_event(struct snd_soc_dapm_widget *w,
424 struct snd_kcontrol *kcontrol, int event)
425{
426 struct snd_soc_codec *codec = w->codec;
427 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
428
429 switch (event) {
430 case SND_SOC_DAPM_POST_PMU:
431 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
432 WM8993_CP_ENA, WM8993_CP_ENA);
433
434 msleep(5);
435
436 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
437 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
438 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
439
440 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
441 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
442
3ed7074c
MB		 443 /* Smallest supported update interval */
444 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
445 WM8993_DCS_TIMER_PERIOD_01_MASK, 1);
446
447 calibrate_dc_servo(codec);
a2342ae3
MB		 448
449 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
450 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
451 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
452 break;
453
454 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 455 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 456 WM8993_HPOUT1L_OUTP |
457 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 458 WM8993_HPOUT1L_RMV_SHORT |
459 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 460
3ed7074c 461 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 462 WM8993_HPOUT1L_DLY |
463 WM8993_HPOUT1R_DLY, 0);
a2342ae3 464
395e4b73
MB		 465 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
466
a2342ae3
MB		 467 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
468 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
469 0);
a2342ae3
MB		 470 break;
471 }
472
473 return 0;
474}
475
476static int earpiece_event(struct snd_soc_dapm_widget *w,
477 struct snd_kcontrol *control, int event)
478{
479 struct snd_soc_codec *codec = w->codec;
480 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
481
482 switch (event) {
483 case SND_SOC_DAPM_PRE_PMU:
484 reg |= WM8993_HPOUT2_IN_ENA;
485 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
486 udelay(50);
487 break;
488
489 case SND_SOC_DAPM_POST_PMD:
490 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
491 break;
492
493 default:
494 BUG();
495 break;
496 }
497
498 return 0;
499}
500
501static const struct snd_kcontrol_new in1l_pga[] = {
502SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
503SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
504};
505
506static const struct snd_kcontrol_new in1r_pga[] = {
507SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
508SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
509};
510
511static const struct snd_kcontrol_new in2l_pga[] = {
512SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
513SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
514};
515
516static const struct snd_kcontrol_new in2r_pga[] = {
517SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
518SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
519};
520
521static const struct snd_kcontrol_new mixinl[] = {
522SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
523SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
524};
525
526static const struct snd_kcontrol_new mixinr[] = {
527SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
528SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
529};
530
531static const struct snd_kcontrol_new left_output_mixer[] = {
532SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
533SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
534SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
535SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
536SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
537SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
538SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
539SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
540};
541
542static const struct snd_kcontrol_new right_output_mixer[] = {
543SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
544SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
545SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
546SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
547SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
548SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
549SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
550SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
551};
552
553static const struct snd_kcontrol_new earpiece_mixer[] = {
554SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
555SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
556SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
557};
558
559static const struct snd_kcontrol_new left_speaker_boost[] = {
560SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
561SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
562SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
563};
564
565static const struct snd_kcontrol_new right_speaker_boost[] = {
566SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
567SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
568SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
569};
570
571static const struct snd_kcontrol_new line1_mix[] = {
572SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
573SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
574SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
575};
576
577static const struct snd_kcontrol_new line1n_mix[] = {
578SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
579SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
580};
581
582static const struct snd_kcontrol_new line1p_mix[] = {
583SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
584};
585
586static const struct snd_kcontrol_new line2_mix[] = {
587SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0),
588SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0),
589SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
590};
591
592static const struct snd_kcontrol_new line2n_mix[] = {
593SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
594SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
595};
596
597static const struct snd_kcontrol_new line2p_mix[] = {
598SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
599};
600
601static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
602SND_SOC_DAPM_INPUT("IN1LN"),
603SND_SOC_DAPM_INPUT("IN1LP"),
604SND_SOC_DAPM_INPUT("IN2LN"),
34825948 605SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 606SND_SOC_DAPM_INPUT("IN1RN"),
607SND_SOC_DAPM_INPUT("IN1RP"),
608SND_SOC_DAPM_INPUT("IN2RN"),
34825948 609SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3
MB		 610
611SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
612SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
613
614SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
615 in1l_pga, ARRAY_SIZE(in1l_pga)),
616SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
617 in1r_pga, ARRAY_SIZE(in1r_pga)),
618
619SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
620 in2l_pga, ARRAY_SIZE(in2l_pga)),
621SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
622 in2r_pga, ARRAY_SIZE(in2r_pga)),
623
a2342ae3
MB		 624SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
625 mixinl, ARRAY_SIZE(mixinl)),
626SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
627 mixinr, ARRAY_SIZE(mixinr)),
628
a2342ae3
MB		 629SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
630 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
631SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
632 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
633
634SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
635SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
636
3ed7074c
MB		 637SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
638 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 639SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
640 NULL, 0,
641 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
642
643SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
644 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
645SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
646 NULL, 0, earpiece_event,
647 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
648
649SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
650 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
651SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
652 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
653
654SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
655 NULL, 0),
656SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
657 NULL, 0),
658
659SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
660 line1_mix, ARRAY_SIZE(line1_mix)),
661SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
662 line2_mix, ARRAY_SIZE(line2_mix)),
663
664SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
665 line1n_mix, ARRAY_SIZE(line1n_mix)),
666SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
667 line1p_mix, ARRAY_SIZE(line1p_mix)),
668SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
669 line2n_mix, ARRAY_SIZE(line2n_mix)),
670SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
671 line2p_mix, ARRAY_SIZE(line2p_mix)),
672
673SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
674 NULL, 0),
675SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
676 NULL, 0),
677SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
678 NULL, 0),
679SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
680 NULL, 0),
681
682SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
683SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
684SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
685SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
686SND_SOC_DAPM_OUTPUT("HPOUT1L"),
687SND_SOC_DAPM_OUTPUT("HPOUT1R"),
688SND_SOC_DAPM_OUTPUT("HPOUT2P"),
689SND_SOC_DAPM_OUTPUT("HPOUT2N"),
690SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
691SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
692SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
693SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
694};
695
696static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 697 { "MICBIAS1", NULL, "CLK_SYS" },
698 { "MICBIAS2", NULL, "CLK_SYS" },
699
a2342ae3
MB		 700 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
701 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
702
703 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
704 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
705
34825948 706 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 707 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
708
34825948 709 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 710 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
711
34825948
JS		 712 { "Direct Voice", NULL, "IN2LP:VXRN" },
713 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 714
715 { "MIXINL", "IN1L Switch", "IN1L PGA" },
716 { "MIXINL", "IN2L Switch", "IN2L PGA" },
717 { "MIXINL", NULL, "Direct Voice" },
718 { "MIXINL", NULL, "IN1LP" },
719 { "MIXINL", NULL, "Left Output Mixer" },
720
721 { "MIXINR", "IN1R Switch", "IN1R PGA" },
722 { "MIXINR", "IN2R Switch", "IN2R PGA" },
723 { "MIXINR", NULL, "Direct Voice" },
724 { "MIXINR", NULL, "IN1RP" },
725 { "MIXINR", NULL, "Right Output Mixer" },
726
727 { "ADCL", NULL, "MIXINL" },
728 { "ADCR", NULL, "MIXINR" },
729
730 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
731 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
732 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
733 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 734 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 735 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
736 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
737
738 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
739 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
740 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
741 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 742 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 743 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
744 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
745
746 { "Left Output PGA", NULL, "Left Output Mixer" },
747 { "Left Output PGA", NULL, "TOCLK" },
748
749 { "Right Output PGA", NULL, "Right Output Mixer" },
750 { "Right Output PGA", NULL, "TOCLK" },
751
752 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
753 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
754 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
755
756 { "Earpiece Driver", NULL, "Earpiece Mixer" },
757 { "HPOUT2N", NULL, "Earpiece Driver" },
758 { "HPOUT2P", NULL, "Earpiece Driver" },
759
760 { "SPKL", "Input Switch", "MIXINL" },
761 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 762 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 763 { "SPKL", NULL, "TOCLK" },
764
765 { "SPKR", "Input Switch", "MIXINR" },
766 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 767 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 768 { "SPKR", NULL, "TOCLK" },
769
770 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
771 { "SPKL Boost", "SPKL Switch", "SPKL" },
772 { "SPKL Boost", "SPKR Switch", "SPKR" },
773
774 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
775 { "SPKR Boost", "SPKR Switch", "SPKR" },
776 { "SPKR Boost", "SPKL Switch", "SPKL" },
777
778 { "SPKL Driver", NULL, "SPKL Boost" },
779 { "SPKL Driver", NULL, "CLK_SYS" },
780
781 { "SPKR Driver", NULL, "SPKR Boost" },
782 { "SPKR Driver", NULL, "CLK_SYS" },
783
784 { "SPKOUTLP", NULL, "SPKL Driver" },
785 { "SPKOUTLN", NULL, "SPKL Driver" },
786 { "SPKOUTRP", NULL, "SPKR Driver" },
787 { "SPKOUTRN", NULL, "SPKR Driver" },
788
39cca168
MB		 789 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
790 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 791
792 { "Headphone PGA", NULL, "Left Headphone Mux" },
793 { "Headphone PGA", NULL, "Right Headphone Mux" },
794 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 795 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 796
797 { "HPOUT1L", NULL, "Headphone PGA" },
798 { "HPOUT1R", NULL, "Headphone PGA" },
799
800 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
801 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
802 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
803 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
804};
805
806static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
807 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
808 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 809 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 810
811 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
812 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
813};
814
815static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 816 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
817 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 818
d0b48af6 819 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 820
821 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
822 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
823};
824
825static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
826 { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
827 { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
d0b48af6 828 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 829
830 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
831 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
832};
833
834static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 835 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
836 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 837
d0b48af6 838 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 839
840 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
841 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
842};
843
844int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
845{
ce6120cc
LG		 846 struct snd_soc_dapm_context *dapm = &codec->dapm;
847
a2342ae3
MB		 848 /* Latch volume update bits & default ZC on */
849 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
850 WM8993_IN1_VU, WM8993_IN1_VU);
851 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
852 WM8993_IN1_VU, WM8993_IN1_VU);
853 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
854 WM8993_IN2_VU, WM8993_IN2_VU);
855 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
856 WM8993_IN2_VU, WM8993_IN2_VU);
857
fb5af53d
MB		 858 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
859 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 860 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
861 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
862
863 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 864 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
865 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 866 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
867 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
868 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
869
870 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 871 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
872 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 873 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
874 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
875 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
876
877 snd_soc_add_controls(codec, analogue_snd_controls,
878 ARRAY_SIZE(analogue_snd_controls));
879
ce6120cc 880 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 881 ARRAY_SIZE(analogue_dapm_widgets));
882 return 0;
883}
884EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
885
886int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
887 int lineout1_diff, int lineout2_diff)
888{
d96ca3cd 889 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 890 struct snd_soc_dapm_context *dapm = &codec->dapm;
891
d96ca3cd
MB		 892 init_completion(&hubs->dcs_done);
893
ce6120cc 894 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 895 ARRAY_SIZE(analogue_routes));
896
897 if (lineout1_diff)
ce6120cc 898 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 899 lineout1_diff_routes,
900 ARRAY_SIZE(lineout1_diff_routes));
901 else
ce6120cc 902 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 903 lineout1_se_routes,
904 ARRAY_SIZE(lineout1_se_routes));
905
906 if (lineout2_diff)
ce6120cc 907 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 908 lineout2_diff_routes,
909 ARRAY_SIZE(lineout2_diff_routes));
910 else
ce6120cc 911 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 912 lineout2_se_routes,
913 ARRAY_SIZE(lineout2_se_routes));
914
915 return 0;
916}
917EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
918
aa983d9d
MB		 919int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
920 int lineout1_diff, int lineout2_diff,
921 int lineout1fb, int lineout2fb,
922 int jd_scthr, int jd_thr, int micbias1_lvl,
923 int micbias2_lvl)
924{
925 if (!lineout1_diff)
926 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
927 WM8993_LINEOUT1_MODE,
928 WM8993_LINEOUT1_MODE);
929 if (!lineout2_diff)
930 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
931 WM8993_LINEOUT2_MODE,
932 WM8993_LINEOUT2_MODE);
933
821dd91e
MB		 934 /* If the line outputs are differential then we aren't presenting
935 * VMID as an output and can disable it.
936 */
937 if (lineout1_diff && lineout2_diff)
ce6120cc 938 codec->dapm.idle_bias_off = 1;
821dd91e 939
aa983d9d
MB		 940 if (lineout1fb)
941 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
942 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
943
944 if (lineout2fb)
945 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
946 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
947
948 snd_soc_update_bits(codec, WM8993_MICBIAS,
949 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
950 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
951 jd_scthr << WM8993_JD_SCTHR_SHIFT |
952 jd_thr << WM8993_JD_THR_SHIFT |
953 micbias1_lvl |
954 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
955
956 return 0;
957}
958EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
959
a2342ae3
MB		 960MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
961MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
962MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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