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ASoC: Support separate left and right channel dcs_codes values
[deliverable/linux.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
79ef0abc 21#include <linux/mfd/wm8994/registers.h>
a2342ae3
MB		 22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
a2342ae3
MB		 26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "wm8993.h"
30#include "wm_hubs.h"
31
32const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
33EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
34
35static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
37static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
38static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
39static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
40static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
41static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
42static const unsigned int spkboost_tlv[] = {
43 TLV_DB_RANGE_HEAD(7),
44 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
45 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
46};
47static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
48
49static const char *speaker_ref_text[] = {
50 "SPKVDD/2",
51 "VMID",
52};
53
54static const struct soc_enum speaker_ref =
55 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
56
57static const char *speaker_mode_text[] = {
58 "Class D",
59 "Class AB",
60};
61
62static const struct soc_enum speaker_mode =
63 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
64
4dcc93d0 65static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 66{
d96ca3cd 67 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 68 unsigned int reg;
69 int count = 0;
1479c3fb 70 int timeout;
4dcc93d0
MB		 71 unsigned int val;
72
73 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
74
75 /* Trigger the command */
76 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 77
78 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 79
1479c3fb
MB		 80 if (hubs->dcs_done_irq)
81 timeout = 4;
82 else
83 timeout = 400;
d96ca3cd 84
1479c3fb
MB		 85 do {
86 count++;
87
88 if (hubs->dcs_done_irq)
89 wait_for_completion_timeout(&hubs->dcs_done,
90 msecs_to_jiffies(250));
91 else
d96ca3cd 92 msleep(1);
1479c3fb
MB		 93
94 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
95 dev_dbg(codec->dev, "DC servo: %x\n", reg);
96 } while (reg & op && count < timeout);
a2342ae3 97
4dcc93d0 98 if (reg & op)
5a9f91ca
MB		 99 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
100 op);
a2342ae3
MB		 101}
102
d96ca3cd
MB		 103irqreturn_t wm_hubs_dcs_done(int irq, void *data)
104{
105 struct wm_hubs_data *hubs = data;
106
107 complete(&hubs->dcs_done);
108
109 return IRQ_HANDLED;
110}
111EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
112
3ed7074c
MB		 113/*
114 * Startup calibration of the DC servo
115 */
116static void calibrate_dc_servo(struct snd_soc_codec *codec)
117{
b2c812e2 118 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
20a4e7fc 119 s8 offset;
79ef0abc
MB		 120 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
121
122 switch (hubs->dcs_readback_mode) {
123 case 2:
124 dcs_reg = WM8994_DC_SERVO_4E;
125 break;
126 default:
127 dcs_reg = WM8993_DC_SERVO_3;
128 break;
129 }
3ed7074c 130
fec6dd83
MB		 131 /* If we're using a digital only path and have a previously
132 * callibrated DC servo offset stored then use that. */
133 if (hubs->class_w && hubs->class_w_dcs) {
134 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
135 hubs->class_w_dcs);
79ef0abc 136 snd_soc_write(codec, dcs_reg, hubs->class_w_dcs);
fec6dd83
MB		 137 wait_for_dc_servo(codec,
138 WM8993_DCS_TRIG_DAC_WR_0 |
139 WM8993_DCS_TRIG_DAC_WR_1);
140 return;
141 }
142
f9acf9fe 143 if (hubs->series_startup) {
11cef5f0
MB		 144 /* Set for 32 series updates */
145 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
146 WM8993_DCS_SERIES_NO_01_MASK,
147 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
148 wait_for_dc_servo(codec,
149 WM8993_DCS_TRIG_SERIES_0 |
150 WM8993_DCS_TRIG_SERIES_1);
151 } else {
152 wait_for_dc_servo(codec,
153 WM8993_DCS_TRIG_STARTUP_0 |
154 WM8993_DCS_TRIG_STARTUP_1);
155 }
3ed7074c 156
fec6dd83
MB		 157 /* Different chips in the family support different readback
158 * methods.
159 */
160 switch (hubs->dcs_readback_mode) {
161 case 0:
162 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
ef995e3a 163 & WM8993_DCS_INTEG_CHAN_0_MASK;
fec6dd83
MB		 164 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
165 & WM8993_DCS_INTEG_CHAN_1_MASK;
166 break;
79ef0abc 167 case 2:
fec6dd83 168 case 1:
79ef0abc 169 reg = snd_soc_read(codec, dcs_reg);
d5b040c9 170 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
fec6dd83 171 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
d5b040c9 172 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
fec6dd83
MB		 173 break;
174 default:
9e3be1ed 175 WARN(1, "Unknown DCS readback method\n");
fec6dd83
MB		 176 break;
177 }
178
179 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
180
3ed7074c 181 /* Apply correction to DC servo result */
4537c4e7
MB		 182 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
183 dev_dbg(codec->dev,
184 "Applying %d/%d code DC servo correction\n",
185 hubs->dcs_codes_l, hubs->dcs_codes_r);
3ed7074c 186
d5b040c9
MB		 187 /* HPOUT1R */
188 offset = reg_r;
4537c4e7 189 offset += hubs->dcs_codes_r;
20a4e7fc 190 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 191
d5b040c9
MB		 192 /* HPOUT1L */
193 offset = reg_l;
4537c4e7 194 offset += hubs->dcs_codes_l;
20a4e7fc 195 dcs_cfg |= (u8)offset;
3ed7074c 196
3254d285
MB		 197 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
198
3ed7074c 199 /* Do it */
79ef0abc 200 snd_soc_write(codec, dcs_reg, dcs_cfg);
4dcc93d0
MB		 201 wait_for_dc_servo(codec,
202 WM8993_DCS_TRIG_DAC_WR_0 |
203 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 204 } else {
d5b040c9
MB		 205 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
206 dcs_cfg |= reg_l;
3ed7074c 207 }
fec6dd83
MB		 208
209 /* Save the callibrated offset if we're in class W mode and
210 * therefore don't have any analogue signal mixed in. */
211 if (hubs->class_w)
212 hubs->class_w_dcs = dcs_cfg;
3ed7074c
MB		 213}
214
a2342ae3
MB		 215/*
216 * Update the DC servo calibration on gain changes
217 */
218static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 219 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 220{
221 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 222 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 223 int ret;
224
225 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
226
fec6dd83
MB		 227 /* Updating the analogue gains invalidates the DC servo cache */
228 hubs->class_w_dcs = 0;
229
ae9d8607
MB		 230 /* If we're applying an offset correction then updating the
231 * callibration would be likely to introduce further offsets. */
4537c4e7 232 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
ae9d8607
MB		 233 return ret;
234
a2342ae3
MB		 235 /* Only need to do this if the outputs are active */
236 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
237 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
238 snd_soc_update_bits(codec,
239 WM8993_DC_SERVO_0,
240 WM8993_DCS_TRIG_SINGLE_0 |
241 WM8993_DCS_TRIG_SINGLE_1,
242 WM8993_DCS_TRIG_SINGLE_0 |
243 WM8993_DCS_TRIG_SINGLE_1);
244
245 return ret;
246}
247
248static const struct snd_kcontrol_new analogue_snd_controls[] = {
249SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
250 inpga_tlv),
251SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 252SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 253
254SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
255 inpga_tlv),
256SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 257SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 258
259
260SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
261 inpga_tlv),
262SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 263SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 264
265SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
266 inpga_tlv),
267SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 268SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 269
270SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
271 inmix_sw_tlv),
272SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
273 inmix_sw_tlv),
274SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
275 inmix_tlv),
276SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
277SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
278 inmix_tlv),
279
280SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
281 inmix_sw_tlv),
282SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
283 inmix_sw_tlv),
284SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
285 inmix_tlv),
286SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
287SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
288 inmix_tlv),
289
290SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
291 outmix_tlv),
292SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
293 outmix_tlv),
294SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
295 outmix_tlv),
296SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
297 outmix_tlv),
298SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
299 outmix_tlv),
300SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
301 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
302SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
303 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
304SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
305 outmix_tlv),
306
307SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
308 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
309SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
310 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
311SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
312 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
313SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
314 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
315SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
316 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
317SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
318 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
319SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
320 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
321SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
322 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
323
324SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
325 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
326SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
327 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
328SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
329 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
330
331SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
332SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
333
334SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
335 5, 1, 1, wm_hubs_spkmix_tlv),
336SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
337 4, 1, 1, wm_hubs_spkmix_tlv),
338SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
339 3, 1, 1, wm_hubs_spkmix_tlv),
340
341SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
342 5, 1, 1, wm_hubs_spkmix_tlv),
343SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
344 4, 1, 1, wm_hubs_spkmix_tlv),
345SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
346 3, 1, 1, wm_hubs_spkmix_tlv),
347
348SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
349 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
350 0, 3, 1, spkmixout_tlv),
351SOC_DOUBLE_R_TLV("Speaker Volume",
352 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
353 0, 63, 0, outpga_tlv),
354SOC_DOUBLE_R("Speaker Switch",
355 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
356 6, 1, 0),
357SOC_DOUBLE_R("Speaker ZC Switch",
358 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
359 7, 1, 0),
ed8cc471 360SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 361 spkboost_tlv),
362SOC_ENUM("Speaker Reference", speaker_ref),
363SOC_ENUM("Speaker Mode", speaker_mode),
364
365{
366 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Headphone Volume",
367 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |
368 SNDRV_CTL_ELEM_ACCESS_READWRITE,
369 .tlv.p = outpga_tlv,
370 .info = snd_soc_info_volsw_2r,
371 .get = snd_soc_get_volsw_2r, .put = wm8993_put_dc_servo,
372 .private_value = (unsigned long)&(struct soc_mixer_control) {
373 .reg = WM8993_LEFT_OUTPUT_VOLUME,
374 .rreg = WM8993_RIGHT_OUTPUT_VOLUME,
375 .shift = 0, .max = 63
376 },
377},
378SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
379 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
380SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
381 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
382
383SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
384SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
385SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
386 line_tlv),
387
388SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
389SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
390SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
391 line_tlv),
392};
393
3ed7074c
MB		 394static int hp_supply_event(struct snd_soc_dapm_widget *w,
395 struct snd_kcontrol *kcontrol, int event)
396{
397 struct snd_soc_codec *codec = w->codec;
b2c812e2 398 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 399
400 switch (event) {
401 case SND_SOC_DAPM_PRE_PMU:
402 switch (hubs->hp_startup_mode) {
403 case 0:
404 break;
405 case 1:
406 /* Enable the headphone amp */
407 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
408 WM8993_HPOUT1L_ENA |
409 WM8993_HPOUT1R_ENA,
410 WM8993_HPOUT1L_ENA |
411 WM8993_HPOUT1R_ENA);
412
413 /* Enable the second stage */
414 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
415 WM8993_HPOUT1L_DLY |
416 WM8993_HPOUT1R_DLY,
417 WM8993_HPOUT1L_DLY |
418 WM8993_HPOUT1R_DLY);
419 break;
420 default:
421 dev_err(codec->dev, "Unknown HP startup mode %d\n",
422 hubs->hp_startup_mode);
423 break;
424 }
425
426 case SND_SOC_DAPM_PRE_PMD:
427 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
428 WM8993_CP_ENA, 0);
429 break;
430 }
431
432 return 0;
433}
434
a2342ae3
MB		 435static int hp_event(struct snd_soc_dapm_widget *w,
436 struct snd_kcontrol *kcontrol, int event)
437{
438 struct snd_soc_codec *codec = w->codec;
439 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
440
441 switch (event) {
442 case SND_SOC_DAPM_POST_PMU:
443 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
444 WM8993_CP_ENA, WM8993_CP_ENA);
445
446 msleep(5);
447
448 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
449 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
450 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
451
452 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
453 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
454
3ed7074c
MB		 455 /* Smallest supported update interval */
456 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
457 WM8993_DCS_TIMER_PERIOD_01_MASK, 1);
458
459 calibrate_dc_servo(codec);
a2342ae3
MB		 460
461 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
462 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
463 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
464 break;
465
466 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 467 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 468 WM8993_HPOUT1L_OUTP |
469 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 470 WM8993_HPOUT1L_RMV_SHORT |
471 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 472
3ed7074c 473 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 474 WM8993_HPOUT1L_DLY |
475 WM8993_HPOUT1R_DLY, 0);
a2342ae3 476
395e4b73
MB		 477 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
478
a2342ae3
MB		 479 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
480 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
481 0);
a2342ae3
MB		 482 break;
483 }
484
485 return 0;
486}
487
488static int earpiece_event(struct snd_soc_dapm_widget *w,
489 struct snd_kcontrol *control, int event)
490{
491 struct snd_soc_codec *codec = w->codec;
492 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
493
494 switch (event) {
495 case SND_SOC_DAPM_PRE_PMU:
496 reg |= WM8993_HPOUT2_IN_ENA;
497 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
498 udelay(50);
499 break;
500
501 case SND_SOC_DAPM_POST_PMD:
502 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
503 break;
504
505 default:
506 BUG();
507 break;
508 }
509
510 return 0;
511}
512
513static const struct snd_kcontrol_new in1l_pga[] = {
514SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
515SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
516};
517
518static const struct snd_kcontrol_new in1r_pga[] = {
519SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
520SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
521};
522
523static const struct snd_kcontrol_new in2l_pga[] = {
524SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
525SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
526};
527
528static const struct snd_kcontrol_new in2r_pga[] = {
529SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
530SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
531};
532
533static const struct snd_kcontrol_new mixinl[] = {
534SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
535SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
536};
537
538static const struct snd_kcontrol_new mixinr[] = {
539SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
540SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
541};
542
543static const struct snd_kcontrol_new left_output_mixer[] = {
544SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
545SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
546SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
547SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
548SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
549SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
550SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
551SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
552};
553
554static const struct snd_kcontrol_new right_output_mixer[] = {
555SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
556SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
557SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
558SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
559SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
560SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
561SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
562SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
563};
564
565static const struct snd_kcontrol_new earpiece_mixer[] = {
566SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
567SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
568SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
569};
570
571static const struct snd_kcontrol_new left_speaker_boost[] = {
572SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
573SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
574SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
575};
576
577static const struct snd_kcontrol_new right_speaker_boost[] = {
578SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
579SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
580SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
581};
582
583static const struct snd_kcontrol_new line1_mix[] = {
584SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
585SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
586SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
587};
588
589static const struct snd_kcontrol_new line1n_mix[] = {
590SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
591SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
592};
593
594static const struct snd_kcontrol_new line1p_mix[] = {
595SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
596};
597
598static const struct snd_kcontrol_new line2_mix[] = {
599SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0),
600SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0),
601SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
602};
603
604static const struct snd_kcontrol_new line2n_mix[] = {
605SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
606SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
607};
608
609static const struct snd_kcontrol_new line2p_mix[] = {
610SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
611};
612
613static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
614SND_SOC_DAPM_INPUT("IN1LN"),
615SND_SOC_DAPM_INPUT("IN1LP"),
616SND_SOC_DAPM_INPUT("IN2LN"),
34825948 617SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 618SND_SOC_DAPM_INPUT("IN1RN"),
619SND_SOC_DAPM_INPUT("IN1RP"),
620SND_SOC_DAPM_INPUT("IN2RN"),
34825948 621SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3
MB		 622
623SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
624SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
625
626SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
627 in1l_pga, ARRAY_SIZE(in1l_pga)),
628SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
629 in1r_pga, ARRAY_SIZE(in1r_pga)),
630
631SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
632 in2l_pga, ARRAY_SIZE(in2l_pga)),
633SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
634 in2r_pga, ARRAY_SIZE(in2r_pga)),
635
a2342ae3
MB		 636SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
637 mixinl, ARRAY_SIZE(mixinl)),
638SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
639 mixinr, ARRAY_SIZE(mixinr)),
640
a2342ae3
MB		 641SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
642 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
643SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
644 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
645
646SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
647SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
648
3ed7074c
MB		 649SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
650 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 651SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
652 NULL, 0,
653 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
654
655SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
656 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
657SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
658 NULL, 0, earpiece_event,
659 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
660
661SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
662 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
663SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
664 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
665
666SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
667 NULL, 0),
668SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
669 NULL, 0),
670
671SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
672 line1_mix, ARRAY_SIZE(line1_mix)),
673SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
674 line2_mix, ARRAY_SIZE(line2_mix)),
675
676SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
677 line1n_mix, ARRAY_SIZE(line1n_mix)),
678SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
679 line1p_mix, ARRAY_SIZE(line1p_mix)),
680SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
681 line2n_mix, ARRAY_SIZE(line2n_mix)),
682SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
683 line2p_mix, ARRAY_SIZE(line2p_mix)),
684
685SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
686 NULL, 0),
687SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
688 NULL, 0),
689SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
690 NULL, 0),
691SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
692 NULL, 0),
693
694SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
695SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
696SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
697SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
698SND_SOC_DAPM_OUTPUT("HPOUT1L"),
699SND_SOC_DAPM_OUTPUT("HPOUT1R"),
700SND_SOC_DAPM_OUTPUT("HPOUT2P"),
701SND_SOC_DAPM_OUTPUT("HPOUT2N"),
702SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
703SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
704SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
705SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
706};
707
708static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 709 { "MICBIAS1", NULL, "CLK_SYS" },
710 { "MICBIAS2", NULL, "CLK_SYS" },
711
a2342ae3
MB		 712 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
713 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
714
715 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
716 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
717
34825948 718 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 719 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
720
34825948 721 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 722 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
723
34825948
JS		 724 { "Direct Voice", NULL, "IN2LP:VXRN" },
725 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 726
727 { "MIXINL", "IN1L Switch", "IN1L PGA" },
728 { "MIXINL", "IN2L Switch", "IN2L PGA" },
729 { "MIXINL", NULL, "Direct Voice" },
730 { "MIXINL", NULL, "IN1LP" },
731 { "MIXINL", NULL, "Left Output Mixer" },
732
733 { "MIXINR", "IN1R Switch", "IN1R PGA" },
734 { "MIXINR", "IN2R Switch", "IN2R PGA" },
735 { "MIXINR", NULL, "Direct Voice" },
736 { "MIXINR", NULL, "IN1RP" },
737 { "MIXINR", NULL, "Right Output Mixer" },
738
739 { "ADCL", NULL, "MIXINL" },
740 { "ADCR", NULL, "MIXINR" },
741
742 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
743 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
744 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
745 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 746 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 747 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
748 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
749
750 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
751 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
752 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
753 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 754 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 755 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
756 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
757
758 { "Left Output PGA", NULL, "Left Output Mixer" },
759 { "Left Output PGA", NULL, "TOCLK" },
760
761 { "Right Output PGA", NULL, "Right Output Mixer" },
762 { "Right Output PGA", NULL, "TOCLK" },
763
764 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
765 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
766 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
767
768 { "Earpiece Driver", NULL, "Earpiece Mixer" },
769 { "HPOUT2N", NULL, "Earpiece Driver" },
770 { "HPOUT2P", NULL, "Earpiece Driver" },
771
772 { "SPKL", "Input Switch", "MIXINL" },
773 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 774 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 775 { "SPKL", NULL, "TOCLK" },
776
777 { "SPKR", "Input Switch", "MIXINR" },
778 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 779 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 780 { "SPKR", NULL, "TOCLK" },
781
782 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
783 { "SPKL Boost", "SPKL Switch", "SPKL" },
784 { "SPKL Boost", "SPKR Switch", "SPKR" },
785
786 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
787 { "SPKR Boost", "SPKR Switch", "SPKR" },
788 { "SPKR Boost", "SPKL Switch", "SPKL" },
789
790 { "SPKL Driver", NULL, "SPKL Boost" },
791 { "SPKL Driver", NULL, "CLK_SYS" },
792
793 { "SPKR Driver", NULL, "SPKR Boost" },
794 { "SPKR Driver", NULL, "CLK_SYS" },
795
796 { "SPKOUTLP", NULL, "SPKL Driver" },
797 { "SPKOUTLN", NULL, "SPKL Driver" },
798 { "SPKOUTRP", NULL, "SPKR Driver" },
799 { "SPKOUTRN", NULL, "SPKR Driver" },
800
39cca168
MB		 801 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
802 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 803
804 { "Headphone PGA", NULL, "Left Headphone Mux" },
805 { "Headphone PGA", NULL, "Right Headphone Mux" },
806 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 807 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 808
809 { "HPOUT1L", NULL, "Headphone PGA" },
810 { "HPOUT1R", NULL, "Headphone PGA" },
811
812 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
813 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
814 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
815 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
816};
817
818static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
819 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
820 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 821 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 822
823 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
824 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
825};
826
827static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 828 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
829 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 830
d0b48af6 831 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 832
833 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
834 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
835};
836
837static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
838 { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
839 { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
d0b48af6 840 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 841
842 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
843 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
844};
845
846static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 847 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
848 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 849
d0b48af6 850 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 851
852 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
853 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
854};
855
856int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
857{
ce6120cc
LG		 858 struct snd_soc_dapm_context *dapm = &codec->dapm;
859
a2342ae3
MB		 860 /* Latch volume update bits & default ZC on */
861 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
862 WM8993_IN1_VU, WM8993_IN1_VU);
863 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
864 WM8993_IN1_VU, WM8993_IN1_VU);
865 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
866 WM8993_IN2_VU, WM8993_IN2_VU);
867 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
868 WM8993_IN2_VU, WM8993_IN2_VU);
869
fb5af53d
MB		 870 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
871 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 872 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
873 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
874
875 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 876 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
877 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 878 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
879 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
880 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
881
882 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 883 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
884 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 885 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
886 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
887 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
888
889 snd_soc_add_controls(codec, analogue_snd_controls,
890 ARRAY_SIZE(analogue_snd_controls));
891
ce6120cc 892 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 893 ARRAY_SIZE(analogue_dapm_widgets));
894 return 0;
895}
896EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
897
898int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
899 int lineout1_diff, int lineout2_diff)
900{
d96ca3cd 901 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 902 struct snd_soc_dapm_context *dapm = &codec->dapm;
903
d96ca3cd
MB		 904 init_completion(&hubs->dcs_done);
905
ce6120cc 906 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 907 ARRAY_SIZE(analogue_routes));
908
909 if (lineout1_diff)
ce6120cc 910 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 911 lineout1_diff_routes,
912 ARRAY_SIZE(lineout1_diff_routes));
913 else
ce6120cc 914 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 915 lineout1_se_routes,
916 ARRAY_SIZE(lineout1_se_routes));
917
918 if (lineout2_diff)
ce6120cc 919 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 920 lineout2_diff_routes,
921 ARRAY_SIZE(lineout2_diff_routes));
922 else
ce6120cc 923 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 924 lineout2_se_routes,
925 ARRAY_SIZE(lineout2_se_routes));
926
927 return 0;
928}
929EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
930
aa983d9d
MB		 931int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
932 int lineout1_diff, int lineout2_diff,
933 int lineout1fb, int lineout2fb,
934 int jd_scthr, int jd_thr, int micbias1_lvl,
935 int micbias2_lvl)
936{
937 if (!lineout1_diff)
938 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
939 WM8993_LINEOUT1_MODE,
940 WM8993_LINEOUT1_MODE);
941 if (!lineout2_diff)
942 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
943 WM8993_LINEOUT2_MODE,
944 WM8993_LINEOUT2_MODE);
945
821dd91e
MB		 946 /* If the line outputs are differential then we aren't presenting
947 * VMID as an output and can disable it.
948 */
949 if (lineout1_diff && lineout2_diff)
ce6120cc 950 codec->dapm.idle_bias_off = 1;
821dd91e 951
aa983d9d
MB		 952 if (lineout1fb)
953 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
954 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
955
956 if (lineout2fb)
957 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
958 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
959
960 snd_soc_update_bits(codec, WM8993_MICBIAS,
961 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
962 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
963 jd_scthr << WM8993_JD_SCTHR_SHIFT |
964 jd_thr << WM8993_JD_THR_SHIFT |
965 micbias1_lvl |
966 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
967
968 return 0;
969}
970EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
971
a2342ae3
MB		 972MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
973MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
974MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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