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ASoC: wm9090: fix DB_RANGE size
[deliverable/linux.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
79ef0abc 21#include <linux/mfd/wm8994/registers.h>
a2342ae3
MB		 22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
a2342ae3
MB		 26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "wm8993.h"
30#include "wm_hubs.h"
31
32const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
33EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
34
35static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
37static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
38static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
39static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
40static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
41static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
42static const unsigned int spkboost_tlv[] = {
43 TLV_DB_RANGE_HEAD(7),
44 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
45 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
46};
47static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
48
49static const char *speaker_ref_text[] = {
50 "SPKVDD/2",
51 "VMID",
52};
53
54static const struct soc_enum speaker_ref =
55 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
56
57static const char *speaker_mode_text[] = {
58 "Class D",
59 "Class AB",
60};
61
62static const struct soc_enum speaker_mode =
63 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
64
4dcc93d0 65static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 66{
d96ca3cd 67 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 68 unsigned int reg;
69 int count = 0;
1479c3fb 70 int timeout;
4dcc93d0
MB		 71 unsigned int val;
72
73 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
74
75 /* Trigger the command */
76 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 77
78 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 79
1479c3fb
MB		 80 if (hubs->dcs_done_irq)
81 timeout = 4;
82 else
83 timeout = 400;
d96ca3cd 84
1479c3fb
MB		 85 do {
86 count++;
87
88 if (hubs->dcs_done_irq)
89 wait_for_completion_timeout(&hubs->dcs_done,
90 msecs_to_jiffies(250));
91 else
d96ca3cd 92 msleep(1);
1479c3fb
MB		 93
94 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
95 dev_dbg(codec->dev, "DC servo: %x\n", reg);
96 } while (reg & op && count < timeout);
a2342ae3 97
4dcc93d0 98 if (reg & op)
5a9f91ca
MB		 99 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
100 op);
a2342ae3
MB		 101}
102
d96ca3cd
MB		 103irqreturn_t wm_hubs_dcs_done(int irq, void *data)
104{
105 struct wm_hubs_data *hubs = data;
106
107 complete(&hubs->dcs_done);
108
109 return IRQ_HANDLED;
110}
111EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
112
3ed7074c
MB		 113/*
114 * Startup calibration of the DC servo
115 */
116static void calibrate_dc_servo(struct snd_soc_codec *codec)
117{
b2c812e2 118 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
20a4e7fc 119 s8 offset;
79ef0abc
MB		 120 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
121
122 switch (hubs->dcs_readback_mode) {
123 case 2:
124 dcs_reg = WM8994_DC_SERVO_4E;
125 break;
126 default:
127 dcs_reg = WM8993_DC_SERVO_3;
128 break;
129 }
3ed7074c 130
fec6dd83
MB		 131 /* If we're using a digital only path and have a previously
132 * callibrated DC servo offset stored then use that. */
133 if (hubs->class_w && hubs->class_w_dcs) {
134 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
135 hubs->class_w_dcs);
79ef0abc 136 snd_soc_write(codec, dcs_reg, hubs->class_w_dcs);
fec6dd83
MB		 137 wait_for_dc_servo(codec,
138 WM8993_DCS_TRIG_DAC_WR_0 |
139 WM8993_DCS_TRIG_DAC_WR_1);
140 return;
141 }
142
f9acf9fe 143 if (hubs->series_startup) {
11cef5f0
MB		 144 /* Set for 32 series updates */
145 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
146 WM8993_DCS_SERIES_NO_01_MASK,
147 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
148 wait_for_dc_servo(codec,
149 WM8993_DCS_TRIG_SERIES_0 |
150 WM8993_DCS_TRIG_SERIES_1);
151 } else {
152 wait_for_dc_servo(codec,
153 WM8993_DCS_TRIG_STARTUP_0 |
154 WM8993_DCS_TRIG_STARTUP_1);
155 }
3ed7074c 156
fec6dd83
MB		 157 /* Different chips in the family support different readback
158 * methods.
159 */
160 switch (hubs->dcs_readback_mode) {
161 case 0:
162 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
ef995e3a 163 & WM8993_DCS_INTEG_CHAN_0_MASK;
fec6dd83
MB		 164 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
165 & WM8993_DCS_INTEG_CHAN_1_MASK;
166 break;
79ef0abc 167 case 2:
fec6dd83 168 case 1:
79ef0abc 169 reg = snd_soc_read(codec, dcs_reg);
d5b040c9 170 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
fec6dd83 171 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
d5b040c9 172 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
fec6dd83
MB		 173 break;
174 default:
9e3be1ed 175 WARN(1, "Unknown DCS readback method\n");
fec6dd83
MB		 176 break;
177 }
178
179 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
180
3ed7074c 181 /* Apply correction to DC servo result */
4537c4e7
MB		 182 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
183 dev_dbg(codec->dev,
184 "Applying %d/%d code DC servo correction\n",
185 hubs->dcs_codes_l, hubs->dcs_codes_r);
3ed7074c 186
d5b040c9
MB		 187 /* HPOUT1R */
188 offset = reg_r;
4537c4e7 189 offset += hubs->dcs_codes_r;
20a4e7fc 190 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 191
d5b040c9
MB		 192 /* HPOUT1L */
193 offset = reg_l;
4537c4e7 194 offset += hubs->dcs_codes_l;
20a4e7fc 195 dcs_cfg |= (u8)offset;
3ed7074c 196
3254d285
MB		 197 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
198
3ed7074c 199 /* Do it */
79ef0abc 200 snd_soc_write(codec, dcs_reg, dcs_cfg);
4dcc93d0
MB		 201 wait_for_dc_servo(codec,
202 WM8993_DCS_TRIG_DAC_WR_0 |
203 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 204 } else {
d5b040c9
MB		 205 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
206 dcs_cfg |= reg_l;
3ed7074c 207 }
fec6dd83
MB		 208
209 /* Save the callibrated offset if we're in class W mode and
210 * therefore don't have any analogue signal mixed in. */
211 if (hubs->class_w)
212 hubs->class_w_dcs = dcs_cfg;
3ed7074c
MB		 213}
214
a2342ae3
MB		 215/*
216 * Update the DC servo calibration on gain changes
217 */
218static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 219 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 220{
221 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 222 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 223 int ret;
224
c4671a95 225 ret = snd_soc_put_volsw(kcontrol, ucontrol);
a2342ae3 226
fec6dd83
MB		 227 /* Updating the analogue gains invalidates the DC servo cache */
228 hubs->class_w_dcs = 0;
229
ae9d8607
MB		 230 /* If we're applying an offset correction then updating the
231 * callibration would be likely to introduce further offsets. */
4537c4e7 232 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
ae9d8607
MB		 233 return ret;
234
a2342ae3
MB		 235 /* Only need to do this if the outputs are active */
236 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
237 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
238 snd_soc_update_bits(codec,
239 WM8993_DC_SERVO_0,
240 WM8993_DCS_TRIG_SINGLE_0 |
241 WM8993_DCS_TRIG_SINGLE_1,
242 WM8993_DCS_TRIG_SINGLE_0 |
243 WM8993_DCS_TRIG_SINGLE_1);
244
245 return ret;
246}
247
248static const struct snd_kcontrol_new analogue_snd_controls[] = {
249SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
250 inpga_tlv),
251SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 252SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 253
254SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
255 inpga_tlv),
256SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 257SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 258
259
260SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
261 inpga_tlv),
262SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 263SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 264
265SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
266 inpga_tlv),
267SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 268SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 269
270SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
271 inmix_sw_tlv),
272SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
273 inmix_sw_tlv),
274SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
275 inmix_tlv),
276SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
277SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
278 inmix_tlv),
279
280SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
281 inmix_sw_tlv),
282SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
283 inmix_sw_tlv),
284SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
285 inmix_tlv),
286SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
287SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
288 inmix_tlv),
289
290SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
291 outmix_tlv),
292SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
293 outmix_tlv),
294SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
295 outmix_tlv),
296SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
297 outmix_tlv),
298SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
299 outmix_tlv),
300SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
301 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
302SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
303 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
304SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
305 outmix_tlv),
306
307SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
308 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
309SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
310 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
311SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
312 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
313SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
314 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
315SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
316 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
317SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
318 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
319SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
320 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
321SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
322 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
323
324SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
325 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
326SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
327 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
328SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
329 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
330
331SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
332SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
333
334SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
335 5, 1, 1, wm_hubs_spkmix_tlv),
336SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
337 4, 1, 1, wm_hubs_spkmix_tlv),
338SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
339 3, 1, 1, wm_hubs_spkmix_tlv),
340
341SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
342 5, 1, 1, wm_hubs_spkmix_tlv),
343SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
344 4, 1, 1, wm_hubs_spkmix_tlv),
345SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
346 3, 1, 1, wm_hubs_spkmix_tlv),
347
348SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
349 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
350 0, 3, 1, spkmixout_tlv),
351SOC_DOUBLE_R_TLV("Speaker Volume",
352 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
353 0, 63, 0, outpga_tlv),
354SOC_DOUBLE_R("Speaker Switch",
355 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
356 6, 1, 0),
357SOC_DOUBLE_R("Speaker ZC Switch",
358 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
359 7, 1, 0),
ed8cc471 360SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 361 spkboost_tlv),
362SOC_ENUM("Speaker Reference", speaker_ref),
363SOC_ENUM("Speaker Mode", speaker_mode),
364
0f9887d1
PU		 365SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
366 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
c4671a95 367 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
0f9887d1
PU		 368 outpga_tlv),
369
a2342ae3
MB		 370SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
371 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
372SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
373 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
374
375SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
376SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
377SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
378 line_tlv),
379
380SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
381SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
382SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
383 line_tlv),
384};
385
3ed7074c
MB		 386static int hp_supply_event(struct snd_soc_dapm_widget *w,
387 struct snd_kcontrol *kcontrol, int event)
388{
389 struct snd_soc_codec *codec = w->codec;
b2c812e2 390 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 391
392 switch (event) {
393 case SND_SOC_DAPM_PRE_PMU:
394 switch (hubs->hp_startup_mode) {
395 case 0:
396 break;
397 case 1:
398 /* Enable the headphone amp */
399 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
400 WM8993_HPOUT1L_ENA |
401 WM8993_HPOUT1R_ENA,
402 WM8993_HPOUT1L_ENA |
403 WM8993_HPOUT1R_ENA);
404
405 /* Enable the second stage */
406 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
407 WM8993_HPOUT1L_DLY |
408 WM8993_HPOUT1R_DLY,
409 WM8993_HPOUT1L_DLY |
410 WM8993_HPOUT1R_DLY);
411 break;
412 default:
413 dev_err(codec->dev, "Unknown HP startup mode %d\n",
414 hubs->hp_startup_mode);
415 break;
416 }
417
418 case SND_SOC_DAPM_PRE_PMD:
419 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
420 WM8993_CP_ENA, 0);
421 break;
422 }
423
424 return 0;
425}
426
a2342ae3
MB		 427static int hp_event(struct snd_soc_dapm_widget *w,
428 struct snd_kcontrol *kcontrol, int event)
429{
430 struct snd_soc_codec *codec = w->codec;
431 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
432
433 switch (event) {
434 case SND_SOC_DAPM_POST_PMU:
435 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
436 WM8993_CP_ENA, WM8993_CP_ENA);
437
438 msleep(5);
439
440 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
441 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
442 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
443
444 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
445 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
446
3ed7074c 447 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
f9925d44 448 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
3ed7074c
MB		 449
450 calibrate_dc_servo(codec);
a2342ae3
MB		 451
452 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
453 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
454 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
455 break;
456
457 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 458 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 459 WM8993_HPOUT1L_OUTP |
460 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 461 WM8993_HPOUT1L_RMV_SHORT |
462 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 463
3ed7074c 464 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 465 WM8993_HPOUT1L_DLY |
466 WM8993_HPOUT1R_DLY, 0);
a2342ae3 467
395e4b73
MB		 468 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
469
a2342ae3
MB		 470 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
471 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
472 0);
a2342ae3
MB		 473 break;
474 }
475
476 return 0;
477}
478
479static int earpiece_event(struct snd_soc_dapm_widget *w,
480 struct snd_kcontrol *control, int event)
481{
482 struct snd_soc_codec *codec = w->codec;
483 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
484
485 switch (event) {
486 case SND_SOC_DAPM_PRE_PMU:
487 reg |= WM8993_HPOUT2_IN_ENA;
488 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
489 udelay(50);
490 break;
491
492 case SND_SOC_DAPM_POST_PMD:
493 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
494 break;
495
496 default:
497 BUG();
498 break;
499 }
500
501 return 0;
502}
503
504static const struct snd_kcontrol_new in1l_pga[] = {
505SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
506SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
507};
508
509static const struct snd_kcontrol_new in1r_pga[] = {
510SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
511SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
512};
513
514static const struct snd_kcontrol_new in2l_pga[] = {
515SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
516SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
517};
518
519static const struct snd_kcontrol_new in2r_pga[] = {
520SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
521SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
522};
523
524static const struct snd_kcontrol_new mixinl[] = {
525SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
526SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
527};
528
529static const struct snd_kcontrol_new mixinr[] = {
530SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
531SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
532};
533
534static const struct snd_kcontrol_new left_output_mixer[] = {
535SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
536SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
537SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
538SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
539SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
540SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
541SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
542SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
543};
544
545static const struct snd_kcontrol_new right_output_mixer[] = {
546SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
547SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
548SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
549SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
550SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
551SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
552SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
553SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
554};
555
556static const struct snd_kcontrol_new earpiece_mixer[] = {
557SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
558SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
559SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
560};
561
562static const struct snd_kcontrol_new left_speaker_boost[] = {
563SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
564SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
565SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
566};
567
568static const struct snd_kcontrol_new right_speaker_boost[] = {
569SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
570SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
571SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
572};
573
574static const struct snd_kcontrol_new line1_mix[] = {
575SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
576SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
577SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
578};
579
580static const struct snd_kcontrol_new line1n_mix[] = {
581SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
582SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
583};
584
585static const struct snd_kcontrol_new line1p_mix[] = {
586SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
587};
588
589static const struct snd_kcontrol_new line2_mix[] = {
590SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0),
591SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0),
592SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
593};
594
595static const struct snd_kcontrol_new line2n_mix[] = {
596SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
597SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
598};
599
600static const struct snd_kcontrol_new line2p_mix[] = {
601SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
602};
603
604static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
605SND_SOC_DAPM_INPUT("IN1LN"),
606SND_SOC_DAPM_INPUT("IN1LP"),
607SND_SOC_DAPM_INPUT("IN2LN"),
34825948 608SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 609SND_SOC_DAPM_INPUT("IN1RN"),
610SND_SOC_DAPM_INPUT("IN1RP"),
611SND_SOC_DAPM_INPUT("IN2RN"),
34825948 612SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3
MB		 613
614SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
615SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
616
617SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
618 in1l_pga, ARRAY_SIZE(in1l_pga)),
619SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
620 in1r_pga, ARRAY_SIZE(in1r_pga)),
621
622SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
623 in2l_pga, ARRAY_SIZE(in2l_pga)),
624SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
625 in2r_pga, ARRAY_SIZE(in2r_pga)),
626
a2342ae3
MB		 627SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
628 mixinl, ARRAY_SIZE(mixinl)),
629SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
630 mixinr, ARRAY_SIZE(mixinr)),
631
a2342ae3
MB		 632SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
633 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
634SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
635 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
636
637SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
638SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
639
3ed7074c
MB		 640SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
641 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 642SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
643 NULL, 0,
644 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
645
646SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
647 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
648SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
649 NULL, 0, earpiece_event,
650 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
651
652SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
653 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
654SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
655 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
656
657SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
658 NULL, 0),
659SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
660 NULL, 0),
661
662SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
663 line1_mix, ARRAY_SIZE(line1_mix)),
664SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
665 line2_mix, ARRAY_SIZE(line2_mix)),
666
667SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
668 line1n_mix, ARRAY_SIZE(line1n_mix)),
669SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
670 line1p_mix, ARRAY_SIZE(line1p_mix)),
671SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
672 line2n_mix, ARRAY_SIZE(line2n_mix)),
673SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
674 line2p_mix, ARRAY_SIZE(line2p_mix)),
675
676SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
677 NULL, 0),
678SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
679 NULL, 0),
680SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
681 NULL, 0),
682SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
683 NULL, 0),
684
685SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
686SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
687SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
688SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
689SND_SOC_DAPM_OUTPUT("HPOUT1L"),
690SND_SOC_DAPM_OUTPUT("HPOUT1R"),
691SND_SOC_DAPM_OUTPUT("HPOUT2P"),
692SND_SOC_DAPM_OUTPUT("HPOUT2N"),
693SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
694SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
695SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
696SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
697};
698
699static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 700 { "MICBIAS1", NULL, "CLK_SYS" },
701 { "MICBIAS2", NULL, "CLK_SYS" },
702
a2342ae3
MB		 703 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
704 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
705
4e04adaf
MB		 706 { "IN1L PGA", NULL, "VMID" },
707 { "IN1R PGA", NULL, "VMID" },
708 { "IN2L PGA", NULL, "VMID" },
709 { "IN2R PGA", NULL, "VMID" },
710
a2342ae3
MB		 711 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
712 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
713
34825948 714 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 715 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
716
34825948 717 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 718 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
719
34825948
JS		 720 { "Direct Voice", NULL, "IN2LP:VXRN" },
721 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 722
723 { "MIXINL", "IN1L Switch", "IN1L PGA" },
724 { "MIXINL", "IN2L Switch", "IN2L PGA" },
725 { "MIXINL", NULL, "Direct Voice" },
726 { "MIXINL", NULL, "IN1LP" },
727 { "MIXINL", NULL, "Left Output Mixer" },
4e04adaf 728 { "MIXINL", NULL, "VMID" },
a2342ae3
MB		 729
730 { "MIXINR", "IN1R Switch", "IN1R PGA" },
731 { "MIXINR", "IN2R Switch", "IN2R PGA" },
732 { "MIXINR", NULL, "Direct Voice" },
733 { "MIXINR", NULL, "IN1RP" },
734 { "MIXINR", NULL, "Right Output Mixer" },
4e04adaf 735 { "MIXINR", NULL, "VMID" },
a2342ae3
MB		 736
737 { "ADCL", NULL, "MIXINL" },
738 { "ADCR", NULL, "MIXINR" },
739
740 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
741 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
742 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
743 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 744 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 745 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
746 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
747
748 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
749 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
750 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
751 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 752 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 753 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
754 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
755
756 { "Left Output PGA", NULL, "Left Output Mixer" },
757 { "Left Output PGA", NULL, "TOCLK" },
758
759 { "Right Output PGA", NULL, "Right Output Mixer" },
760 { "Right Output PGA", NULL, "TOCLK" },
761
762 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
763 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
764 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
765
4e04adaf 766 { "Earpiece Driver", NULL, "VMID" },
a2342ae3
MB		 767 { "Earpiece Driver", NULL, "Earpiece Mixer" },
768 { "HPOUT2N", NULL, "Earpiece Driver" },
769 { "HPOUT2P", NULL, "Earpiece Driver" },
770
771 { "SPKL", "Input Switch", "MIXINL" },
772 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 773 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 774 { "SPKL", NULL, "TOCLK" },
775
776 { "SPKR", "Input Switch", "MIXINR" },
777 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 778 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 779 { "SPKR", NULL, "TOCLK" },
780
781 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
782 { "SPKL Boost", "SPKL Switch", "SPKL" },
783 { "SPKL Boost", "SPKR Switch", "SPKR" },
784
785 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
786 { "SPKR Boost", "SPKR Switch", "SPKR" },
787 { "SPKR Boost", "SPKL Switch", "SPKL" },
788
4e04adaf 789 { "SPKL Driver", NULL, "VMID" },
a2342ae3
MB		 790 { "SPKL Driver", NULL, "SPKL Boost" },
791 { "SPKL Driver", NULL, "CLK_SYS" },
792
4e04adaf 793 { "SPKR Driver", NULL, "VMID" },
a2342ae3
MB		 794 { "SPKR Driver", NULL, "SPKR Boost" },
795 { "SPKR Driver", NULL, "CLK_SYS" },
796
797 { "SPKOUTLP", NULL, "SPKL Driver" },
798 { "SPKOUTLN", NULL, "SPKL Driver" },
799 { "SPKOUTRP", NULL, "SPKR Driver" },
800 { "SPKOUTRN", NULL, "SPKR Driver" },
801
39cca168
MB		 802 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
803 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 804
805 { "Headphone PGA", NULL, "Left Headphone Mux" },
806 { "Headphone PGA", NULL, "Right Headphone Mux" },
4e04adaf 807 { "Headphone PGA", NULL, "VMID" },
a2342ae3 808 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 809 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 810
811 { "HPOUT1L", NULL, "Headphone PGA" },
812 { "HPOUT1R", NULL, "Headphone PGA" },
813
4e04adaf
MB		 814 { "LINEOUT1N Driver", NULL, "VMID" },
815 { "LINEOUT1P Driver", NULL, "VMID" },
816 { "LINEOUT2N Driver", NULL, "VMID" },
817 { "LINEOUT2P Driver", NULL, "VMID" },
818
a2342ae3
MB		 819 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
820 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
821 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
822 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
823};
824
825static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
826 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
827 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 828 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 829
830 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
831 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
832};
833
834static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 835 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
836 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 837
d0b48af6 838 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 839
840 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
841 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
842};
843
844static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
845 { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
846 { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
d0b48af6 847 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 848
849 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
850 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
851};
852
853static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 854 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
855 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 856
d0b48af6 857 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 858
859 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
860 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
861};
862
863int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
864{
ce6120cc
LG		 865 struct snd_soc_dapm_context *dapm = &codec->dapm;
866
a2342ae3
MB		 867 /* Latch volume update bits & default ZC on */
868 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
869 WM8993_IN1_VU, WM8993_IN1_VU);
870 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
871 WM8993_IN1_VU, WM8993_IN1_VU);
872 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
873 WM8993_IN2_VU, WM8993_IN2_VU);
874 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
875 WM8993_IN2_VU, WM8993_IN2_VU);
876
fb5af53d
MB		 877 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
878 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 879 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
880 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
881
882 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 883 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
884 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 885 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
886 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
887 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
888
889 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 890 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
891 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 892 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
893 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
894 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
895
896 snd_soc_add_controls(codec, analogue_snd_controls,
897 ARRAY_SIZE(analogue_snd_controls));
898
ce6120cc 899 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 900 ARRAY_SIZE(analogue_dapm_widgets));
901 return 0;
902}
903EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
904
905int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
906 int lineout1_diff, int lineout2_diff)
907{
d96ca3cd 908 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 909 struct snd_soc_dapm_context *dapm = &codec->dapm;
910
d96ca3cd
MB		 911 init_completion(&hubs->dcs_done);
912
ce6120cc 913 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 914 ARRAY_SIZE(analogue_routes));
915
916 if (lineout1_diff)
ce6120cc 917 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 918 lineout1_diff_routes,
919 ARRAY_SIZE(lineout1_diff_routes));
920 else
ce6120cc 921 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 922 lineout1_se_routes,
923 ARRAY_SIZE(lineout1_se_routes));
924
925 if (lineout2_diff)
ce6120cc 926 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 927 lineout2_diff_routes,
928 ARRAY_SIZE(lineout2_diff_routes));
929 else
ce6120cc 930 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 931 lineout2_se_routes,
932 ARRAY_SIZE(lineout2_se_routes));
933
934 return 0;
935}
936EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
937
aa983d9d
MB		 938int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
939 int lineout1_diff, int lineout2_diff,
940 int lineout1fb, int lineout2fb,
941 int jd_scthr, int jd_thr, int micbias1_lvl,
942 int micbias2_lvl)
943{
944 if (!lineout1_diff)
945 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
946 WM8993_LINEOUT1_MODE,
947 WM8993_LINEOUT1_MODE);
948 if (!lineout2_diff)
949 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
950 WM8993_LINEOUT2_MODE,
951 WM8993_LINEOUT2_MODE);
952
821dd91e
MB		 953 /* If the line outputs are differential then we aren't presenting
954 * VMID as an output and can disable it.
955 */
956 if (lineout1_diff && lineout2_diff)
ce6120cc 957 codec->dapm.idle_bias_off = 1;
821dd91e 958
aa983d9d
MB		 959 if (lineout1fb)
960 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
961 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
962
963 if (lineout2fb)
964 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
965 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
966
967 snd_soc_update_bits(codec, WM8993_MICBIAS,
968 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
969 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
970 jd_scthr << WM8993_JD_SCTHR_SHIFT |
971 jd_thr << WM8993_JD_THR_SHIFT |
972 micbias1_lvl |
973 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
974
975 return 0;
976}
977EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
978
a2342ae3
MB		 979MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
980MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
981MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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