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ASoC: Implement DC servo completion IRQ handling for wm_hubs devices
[deliverable/linux.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
a2342ae3
MB		 21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
a2342ae3
MB		 25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
42 TLV_DB_RANGE_HEAD(7),
43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
4dcc93d0 64static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 65{
d96ca3cd 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 67 unsigned int reg;
68 int count = 0;
4dcc93d0 69 unsigned int val;
d96ca3cd 70 unsigned long timeout;
4dcc93d0
MB		 71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 76
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 78
d96ca3cd
MB		 79 if (hubs->dcs_done_irq) {
80 timeout = wait_for_completion_timeout(&hubs->dcs_done,
81 msecs_to_jiffies(500));
82 if (timeout == 0)
83 dev_warn(codec->dev, "No DC servo interrupt\n");
84
4dcc93d0 85 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
d96ca3cd
MB		 86 } else {
87 do {
88 count++;
89 msleep(1);
90 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
91 dev_dbg(codec->dev, "DC servo: %x\n", reg);
92 } while (reg & op && count < 400);
93 }
a2342ae3 94
4dcc93d0 95 if (reg & op)
5a9f91ca
MB		 96 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
97 op);
a2342ae3
MB		 98}
99
d96ca3cd
MB		 100irqreturn_t wm_hubs_dcs_done(int irq, void *data)
101{
102 struct wm_hubs_data *hubs = data;
103
104 complete(&hubs->dcs_done);
105
106 return IRQ_HANDLED;
107}
108EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
109
3ed7074c
MB		 110/*
111 * Startup calibration of the DC servo
112 */
113static void calibrate_dc_servo(struct snd_soc_codec *codec)
114{
b2c812e2 115 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
20a4e7fc 116 s8 offset;
8437f700 117 u16 reg, reg_l, reg_r, dcs_cfg;
3ed7074c 118
fec6dd83
MB		 119 /* If we're using a digital only path and have a previously
120 * callibrated DC servo offset stored then use that. */
121 if (hubs->class_w && hubs->class_w_dcs) {
122 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
123 hubs->class_w_dcs);
124 snd_soc_write(codec, WM8993_DC_SERVO_3, hubs->class_w_dcs);
125 wait_for_dc_servo(codec,
126 WM8993_DCS_TRIG_DAC_WR_0 |
127 WM8993_DCS_TRIG_DAC_WR_1);
128 return;
129 }
130
f9acf9fe 131 if (hubs->series_startup) {
11cef5f0
MB		 132 /* Set for 32 series updates */
133 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
134 WM8993_DCS_SERIES_NO_01_MASK,
135 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
136 wait_for_dc_servo(codec,
137 WM8993_DCS_TRIG_SERIES_0 |
138 WM8993_DCS_TRIG_SERIES_1);
139 } else {
140 wait_for_dc_servo(codec,
141 WM8993_DCS_TRIG_STARTUP_0 |
142 WM8993_DCS_TRIG_STARTUP_1);
143 }
3ed7074c 144
fec6dd83
MB		 145 /* Different chips in the family support different readback
146 * methods.
147 */
148 switch (hubs->dcs_readback_mode) {
149 case 0:
150 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
ef995e3a 151 & WM8993_DCS_INTEG_CHAN_0_MASK;
fec6dd83
MB		 152 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
153 & WM8993_DCS_INTEG_CHAN_1_MASK;
154 break;
155 case 1:
156 reg = snd_soc_read(codec, WM8993_DC_SERVO_3);
d5b040c9 157 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
fec6dd83 158 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
d5b040c9 159 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
fec6dd83
MB		 160 break;
161 default:
9e3be1ed 162 WARN(1, "Unknown DCS readback method\n");
fec6dd83
MB		 163 break;
164 }
165
166 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
167
3ed7074c
MB		 168 /* Apply correction to DC servo result */
169 if (hubs->dcs_codes) {
170 dev_dbg(codec->dev, "Applying %d code DC servo correction\n",
171 hubs->dcs_codes);
172
d5b040c9
MB		 173 /* HPOUT1R */
174 offset = reg_r;
20a4e7fc
MB		 175 offset += hubs->dcs_codes;
176 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 177
d5b040c9
MB		 178 /* HPOUT1L */
179 offset = reg_l;
20a4e7fc
MB		 180 offset += hubs->dcs_codes;
181 dcs_cfg |= (u8)offset;
3ed7074c 182
3254d285
MB		 183 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
184
3ed7074c
MB		 185 /* Do it */
186 snd_soc_write(codec, WM8993_DC_SERVO_3, dcs_cfg);
4dcc93d0
MB		 187 wait_for_dc_servo(codec,
188 WM8993_DCS_TRIG_DAC_WR_0 |
189 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 190 } else {
d5b040c9
MB		 191 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
192 dcs_cfg |= reg_l;
3ed7074c 193 }
fec6dd83
MB		 194
195 /* Save the callibrated offset if we're in class W mode and
196 * therefore don't have any analogue signal mixed in. */
197 if (hubs->class_w)
198 hubs->class_w_dcs = dcs_cfg;
3ed7074c
MB		 199}
200
a2342ae3
MB		 201/*
202 * Update the DC servo calibration on gain changes
203 */
204static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 205 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 206{
207 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 208 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 209 int ret;
210
211 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
212
fec6dd83
MB		 213 /* Updating the analogue gains invalidates the DC servo cache */
214 hubs->class_w_dcs = 0;
215
ae9d8607
MB		 216 /* If we're applying an offset correction then updating the
217 * callibration would be likely to introduce further offsets. */
780b75b4 218 if (hubs->dcs_codes || hubs->no_series_update)
ae9d8607
MB		 219 return ret;
220
a2342ae3
MB		 221 /* Only need to do this if the outputs are active */
222 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
223 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
224 snd_soc_update_bits(codec,
225 WM8993_DC_SERVO_0,
226 WM8993_DCS_TRIG_SINGLE_0 |
227 WM8993_DCS_TRIG_SINGLE_1,
228 WM8993_DCS_TRIG_SINGLE_0 |
229 WM8993_DCS_TRIG_SINGLE_1);
230
231 return ret;
232}
233
234static const struct snd_kcontrol_new analogue_snd_controls[] = {
235SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
236 inpga_tlv),
237SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 238SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 239
240SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
241 inpga_tlv),
242SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 243SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 244
245
246SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
247 inpga_tlv),
248SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 249SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 250
251SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
252 inpga_tlv),
253SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 254SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 255
256SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
257 inmix_sw_tlv),
258SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
259 inmix_sw_tlv),
260SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
261 inmix_tlv),
262SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
263SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
264 inmix_tlv),
265
266SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
267 inmix_sw_tlv),
268SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
269 inmix_sw_tlv),
270SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
271 inmix_tlv),
272SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
273SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
274 inmix_tlv),
275
276SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
277 outmix_tlv),
278SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
279 outmix_tlv),
280SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
281 outmix_tlv),
282SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
283 outmix_tlv),
284SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
285 outmix_tlv),
286SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
287 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
288SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
289 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
290SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
291 outmix_tlv),
292
293SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
294 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
295SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
296 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
297SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
298 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
299SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
300 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
301SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
302 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
303SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
304 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
305SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
306 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
307SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
308 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
309
310SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
311 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
312SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
313 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
314SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
315 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
316
317SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
318SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
319
320SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
321 5, 1, 1, wm_hubs_spkmix_tlv),
322SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
323 4, 1, 1, wm_hubs_spkmix_tlv),
324SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
325 3, 1, 1, wm_hubs_spkmix_tlv),
326
327SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
328 5, 1, 1, wm_hubs_spkmix_tlv),
329SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
330 4, 1, 1, wm_hubs_spkmix_tlv),
331SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
332 3, 1, 1, wm_hubs_spkmix_tlv),
333
334SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
335 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
336 0, 3, 1, spkmixout_tlv),
337SOC_DOUBLE_R_TLV("Speaker Volume",
338 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
339 0, 63, 0, outpga_tlv),
340SOC_DOUBLE_R("Speaker Switch",
341 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
342 6, 1, 0),
343SOC_DOUBLE_R("Speaker ZC Switch",
344 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
345 7, 1, 0),
ed8cc471 346SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 347 spkboost_tlv),
348SOC_ENUM("Speaker Reference", speaker_ref),
349SOC_ENUM("Speaker Mode", speaker_mode),
350
351{
352 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Headphone Volume",
353 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |
354 SNDRV_CTL_ELEM_ACCESS_READWRITE,
355 .tlv.p = outpga_tlv,
356 .info = snd_soc_info_volsw_2r,
357 .get = snd_soc_get_volsw_2r, .put = wm8993_put_dc_servo,
358 .private_value = (unsigned long)&(struct soc_mixer_control) {
359 .reg = WM8993_LEFT_OUTPUT_VOLUME,
360 .rreg = WM8993_RIGHT_OUTPUT_VOLUME,
361 .shift = 0, .max = 63
362 },
363},
364SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
365 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
366SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
367 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
368
369SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
370SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
371SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
372 line_tlv),
373
374SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
375SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
376SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
377 line_tlv),
378};
379
3ed7074c
MB		 380static int hp_supply_event(struct snd_soc_dapm_widget *w,
381 struct snd_kcontrol *kcontrol, int event)
382{
383 struct snd_soc_codec *codec = w->codec;
b2c812e2 384 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 385
386 switch (event) {
387 case SND_SOC_DAPM_PRE_PMU:
388 switch (hubs->hp_startup_mode) {
389 case 0:
390 break;
391 case 1:
392 /* Enable the headphone amp */
393 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
394 WM8993_HPOUT1L_ENA |
395 WM8993_HPOUT1R_ENA,
396 WM8993_HPOUT1L_ENA |
397 WM8993_HPOUT1R_ENA);
398
399 /* Enable the second stage */
400 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
401 WM8993_HPOUT1L_DLY |
402 WM8993_HPOUT1R_DLY,
403 WM8993_HPOUT1L_DLY |
404 WM8993_HPOUT1R_DLY);
405 break;
406 default:
407 dev_err(codec->dev, "Unknown HP startup mode %d\n",
408 hubs->hp_startup_mode);
409 break;
410 }
411
412 case SND_SOC_DAPM_PRE_PMD:
413 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
414 WM8993_CP_ENA, 0);
415 break;
416 }
417
418 return 0;
419}
420
a2342ae3
MB		 421static int hp_event(struct snd_soc_dapm_widget *w,
422 struct snd_kcontrol *kcontrol, int event)
423{
424 struct snd_soc_codec *codec = w->codec;
425 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
426
427 switch (event) {
428 case SND_SOC_DAPM_POST_PMU:
429 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
430 WM8993_CP_ENA, WM8993_CP_ENA);
431
432 msleep(5);
433
434 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
435 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
436 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
437
438 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
439 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
440
3ed7074c
MB		 441 /* Smallest supported update interval */
442 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
443 WM8993_DCS_TIMER_PERIOD_01_MASK, 1);
444
445 calibrate_dc_servo(codec);
a2342ae3
MB		 446
447 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
448 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
449 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
450 break;
451
452 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 453 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 454 WM8993_HPOUT1L_OUTP |
455 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 456 WM8993_HPOUT1L_RMV_SHORT |
457 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 458
3ed7074c 459 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 460 WM8993_HPOUT1L_DLY |
461 WM8993_HPOUT1R_DLY, 0);
a2342ae3 462
395e4b73
MB		 463 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
464
a2342ae3
MB		 465 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
466 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
467 0);
a2342ae3
MB		 468 break;
469 }
470
471 return 0;
472}
473
474static int earpiece_event(struct snd_soc_dapm_widget *w,
475 struct snd_kcontrol *control, int event)
476{
477 struct snd_soc_codec *codec = w->codec;
478 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
479
480 switch (event) {
481 case SND_SOC_DAPM_PRE_PMU:
482 reg |= WM8993_HPOUT2_IN_ENA;
483 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
484 udelay(50);
485 break;
486
487 case SND_SOC_DAPM_POST_PMD:
488 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
489 break;
490
491 default:
492 BUG();
493 break;
494 }
495
496 return 0;
497}
498
499static const struct snd_kcontrol_new in1l_pga[] = {
500SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
501SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
502};
503
504static const struct snd_kcontrol_new in1r_pga[] = {
505SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
506SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
507};
508
509static const struct snd_kcontrol_new in2l_pga[] = {
510SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
511SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
512};
513
514static const struct snd_kcontrol_new in2r_pga[] = {
515SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
516SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
517};
518
519static const struct snd_kcontrol_new mixinl[] = {
520SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
521SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
522};
523
524static const struct snd_kcontrol_new mixinr[] = {
525SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
526SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
527};
528
529static const struct snd_kcontrol_new left_output_mixer[] = {
530SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
531SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
532SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
533SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
534SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
535SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
536SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
537SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
538};
539
540static const struct snd_kcontrol_new right_output_mixer[] = {
541SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
542SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
543SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
544SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
545SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
546SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
547SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
548SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
549};
550
551static const struct snd_kcontrol_new earpiece_mixer[] = {
552SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
553SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
554SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
555};
556
557static const struct snd_kcontrol_new left_speaker_boost[] = {
558SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
559SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
560SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
561};
562
563static const struct snd_kcontrol_new right_speaker_boost[] = {
564SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
565SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
566SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
567};
568
569static const struct snd_kcontrol_new line1_mix[] = {
570SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
571SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
572SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
573};
574
575static const struct snd_kcontrol_new line1n_mix[] = {
576SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
577SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
578};
579
580static const struct snd_kcontrol_new line1p_mix[] = {
581SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
582};
583
584static const struct snd_kcontrol_new line2_mix[] = {
585SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0),
586SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0),
587SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
588};
589
590static const struct snd_kcontrol_new line2n_mix[] = {
591SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
592SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
593};
594
595static const struct snd_kcontrol_new line2p_mix[] = {
596SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
597};
598
599static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
600SND_SOC_DAPM_INPUT("IN1LN"),
601SND_SOC_DAPM_INPUT("IN1LP"),
602SND_SOC_DAPM_INPUT("IN2LN"),
34825948 603SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 604SND_SOC_DAPM_INPUT("IN1RN"),
605SND_SOC_DAPM_INPUT("IN1RP"),
606SND_SOC_DAPM_INPUT("IN2RN"),
34825948 607SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3
MB		 608
609SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
610SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
611
612SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
613 in1l_pga, ARRAY_SIZE(in1l_pga)),
614SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
615 in1r_pga, ARRAY_SIZE(in1r_pga)),
616
617SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
618 in2l_pga, ARRAY_SIZE(in2l_pga)),
619SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
620 in2r_pga, ARRAY_SIZE(in2r_pga)),
621
a2342ae3
MB		 622SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
623 mixinl, ARRAY_SIZE(mixinl)),
624SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
625 mixinr, ARRAY_SIZE(mixinr)),
626
a2342ae3
MB		 627SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
628 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
629SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
630 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
631
632SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
633SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
634
3ed7074c
MB		 635SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
636 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 637SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
638 NULL, 0,
639 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
640
641SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
642 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
643SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
644 NULL, 0, earpiece_event,
645 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
646
647SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
648 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
649SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
650 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
651
652SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
653 NULL, 0),
654SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
655 NULL, 0),
656
657SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
658 line1_mix, ARRAY_SIZE(line1_mix)),
659SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
660 line2_mix, ARRAY_SIZE(line2_mix)),
661
662SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
663 line1n_mix, ARRAY_SIZE(line1n_mix)),
664SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
665 line1p_mix, ARRAY_SIZE(line1p_mix)),
666SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
667 line2n_mix, ARRAY_SIZE(line2n_mix)),
668SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
669 line2p_mix, ARRAY_SIZE(line2p_mix)),
670
671SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
672 NULL, 0),
673SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
674 NULL, 0),
675SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
676 NULL, 0),
677SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
678 NULL, 0),
679
680SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
681SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
682SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
683SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
684SND_SOC_DAPM_OUTPUT("HPOUT1L"),
685SND_SOC_DAPM_OUTPUT("HPOUT1R"),
686SND_SOC_DAPM_OUTPUT("HPOUT2P"),
687SND_SOC_DAPM_OUTPUT("HPOUT2N"),
688SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
689SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
690SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
691SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
692};
693
694static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 695 { "MICBIAS1", NULL, "CLK_SYS" },
696 { "MICBIAS2", NULL, "CLK_SYS" },
697
a2342ae3
MB		 698 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
699 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
700
701 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
702 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
703
34825948 704 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 705 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
706
34825948 707 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 708 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
709
34825948
JS		 710 { "Direct Voice", NULL, "IN2LP:VXRN" },
711 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 712
713 { "MIXINL", "IN1L Switch", "IN1L PGA" },
714 { "MIXINL", "IN2L Switch", "IN2L PGA" },
715 { "MIXINL", NULL, "Direct Voice" },
716 { "MIXINL", NULL, "IN1LP" },
717 { "MIXINL", NULL, "Left Output Mixer" },
718
719 { "MIXINR", "IN1R Switch", "IN1R PGA" },
720 { "MIXINR", "IN2R Switch", "IN2R PGA" },
721 { "MIXINR", NULL, "Direct Voice" },
722 { "MIXINR", NULL, "IN1RP" },
723 { "MIXINR", NULL, "Right Output Mixer" },
724
725 { "ADCL", NULL, "MIXINL" },
726 { "ADCR", NULL, "MIXINR" },
727
728 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
729 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
730 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
731 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 732 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 733 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
734 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
735
736 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
737 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
738 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
739 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 740 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 741 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
742 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
743
744 { "Left Output PGA", NULL, "Left Output Mixer" },
745 { "Left Output PGA", NULL, "TOCLK" },
746
747 { "Right Output PGA", NULL, "Right Output Mixer" },
748 { "Right Output PGA", NULL, "TOCLK" },
749
750 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
751 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
752 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
753
754 { "Earpiece Driver", NULL, "Earpiece Mixer" },
755 { "HPOUT2N", NULL, "Earpiece Driver" },
756 { "HPOUT2P", NULL, "Earpiece Driver" },
757
758 { "SPKL", "Input Switch", "MIXINL" },
759 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 760 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 761 { "SPKL", NULL, "TOCLK" },
762
763 { "SPKR", "Input Switch", "MIXINR" },
764 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 765 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 766 { "SPKR", NULL, "TOCLK" },
767
768 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
769 { "SPKL Boost", "SPKL Switch", "SPKL" },
770 { "SPKL Boost", "SPKR Switch", "SPKR" },
771
772 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
773 { "SPKR Boost", "SPKR Switch", "SPKR" },
774 { "SPKR Boost", "SPKL Switch", "SPKL" },
775
776 { "SPKL Driver", NULL, "SPKL Boost" },
777 { "SPKL Driver", NULL, "CLK_SYS" },
778
779 { "SPKR Driver", NULL, "SPKR Boost" },
780 { "SPKR Driver", NULL, "CLK_SYS" },
781
782 { "SPKOUTLP", NULL, "SPKL Driver" },
783 { "SPKOUTLN", NULL, "SPKL Driver" },
784 { "SPKOUTRP", NULL, "SPKR Driver" },
785 { "SPKOUTRN", NULL, "SPKR Driver" },
786
39cca168
MB		 787 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
788 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 789
790 { "Headphone PGA", NULL, "Left Headphone Mux" },
791 { "Headphone PGA", NULL, "Right Headphone Mux" },
792 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 793 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 794
795 { "HPOUT1L", NULL, "Headphone PGA" },
796 { "HPOUT1R", NULL, "Headphone PGA" },
797
798 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
799 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
800 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
801 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
802};
803
804static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
805 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
806 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 807 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 808
809 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
810 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
811};
812
813static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 814 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
815 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 816
d0b48af6 817 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 818
819 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
820 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
821};
822
823static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
824 { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
825 { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
d0b48af6 826 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 827
828 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
829 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
830};
831
832static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 833 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
834 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 835
d0b48af6 836 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 837
838 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
839 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
840};
841
842int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
843{
ce6120cc
LG		 844 struct snd_soc_dapm_context *dapm = &codec->dapm;
845
a2342ae3
MB		 846 /* Latch volume update bits & default ZC on */
847 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
848 WM8993_IN1_VU, WM8993_IN1_VU);
849 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
850 WM8993_IN1_VU, WM8993_IN1_VU);
851 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
852 WM8993_IN2_VU, WM8993_IN2_VU);
853 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
854 WM8993_IN2_VU, WM8993_IN2_VU);
855
fb5af53d
MB		 856 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
857 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 858 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
859 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
860
861 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 862 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
863 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 864 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
865 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
866 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
867
868 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 869 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
870 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 871 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
872 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
873 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
874
875 snd_soc_add_controls(codec, analogue_snd_controls,
876 ARRAY_SIZE(analogue_snd_controls));
877
ce6120cc 878 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 879 ARRAY_SIZE(analogue_dapm_widgets));
880 return 0;
881}
882EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
883
884int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
885 int lineout1_diff, int lineout2_diff)
886{
d96ca3cd 887 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 888 struct snd_soc_dapm_context *dapm = &codec->dapm;
889
d96ca3cd
MB		 890 init_completion(&hubs->dcs_done);
891
ce6120cc 892 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 893 ARRAY_SIZE(analogue_routes));
894
895 if (lineout1_diff)
ce6120cc 896 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 897 lineout1_diff_routes,
898 ARRAY_SIZE(lineout1_diff_routes));
899 else
ce6120cc 900 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 901 lineout1_se_routes,
902 ARRAY_SIZE(lineout1_se_routes));
903
904 if (lineout2_diff)
ce6120cc 905 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 906 lineout2_diff_routes,
907 ARRAY_SIZE(lineout2_diff_routes));
908 else
ce6120cc 909 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 910 lineout2_se_routes,
911 ARRAY_SIZE(lineout2_se_routes));
912
913 return 0;
914}
915EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
916
aa983d9d
MB		 917int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
918 int lineout1_diff, int lineout2_diff,
919 int lineout1fb, int lineout2fb,
920 int jd_scthr, int jd_thr, int micbias1_lvl,
921 int micbias2_lvl)
922{
923 if (!lineout1_diff)
924 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
925 WM8993_LINEOUT1_MODE,
926 WM8993_LINEOUT1_MODE);
927 if (!lineout2_diff)
928 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
929 WM8993_LINEOUT2_MODE,
930 WM8993_LINEOUT2_MODE);
931
821dd91e
MB		 932 /* If the line outputs are differential then we aren't presenting
933 * VMID as an output and can disable it.
934 */
935 if (lineout1_diff && lineout2_diff)
ce6120cc 936 codec->dapm.idle_bias_off = 1;
821dd91e 937
aa983d9d
MB		 938 if (lineout1fb)
939 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
940 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
941
942 if (lineout2fb)
943 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
944 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
945
946 snd_soc_update_bits(codec, WM8993_MICBIAS,
947 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
948 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
949 jd_scthr << WM8993_JD_SCTHR_SHIFT |
950 jd_thr << WM8993_JD_THR_SHIFT |
951 micbias1_lvl |
952 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
953
954 return 0;
955}
956EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
957
a2342ae3
MB		 958MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
959MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
960MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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